Preparation method of seed crystal layer, metal interconnection process method and semiconductor process equipment

Abstract

The invention discloses a preparation method of a seed crystal layer, a metal interconnection process method and semiconductor process equipment, and the preparation method of the seed crystal layer comprises the steps: depositing a metal seed crystal layer on a substrate of which the surface is provided with a through hole and a groove, and when the opening of the through hole and the groove is reduced until metal ions cannot enter the through hole and the groove, removing the metal seed crystal layer; stopping depositing the metal seed crystal layer; performing oxidation treatment on the surface of the substrate, so that the metal seed crystal layer on the surface of the substrate and a part of the metal seed crystal layer at the openings of the through holes and the grooves are converted into metal oxides; and placing the substrate in a solution capable of dissolving the metal oxide to dissolve the metal oxide on the surface of the substrate and at the openings of the through holes and the grooves so as to open the openings of the through holes and the grooves. According to the invention, the seed layer coverage rate of the bottoms and the side walls of the through holes and the grooves can be improved, and cavities are prevented from being generated in the subsequent metal electroplating process.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor manufacturing, and more specifically, relates to a method for preparing a seed crystal layer, a metal interconnection process method and semiconductor process equipment. Background Art

[0002] The metal interconnection technology in the back-end process of integrated circuit chip manufacturing is one of the key technologies in chip manufacturing. With the continuous miniaturization of chip feature sizes, the reliability problems caused by resistance and capacitance delay and electromigration of back-end metal interconnection lines have become the main obstacle to improving chip performance. In order to improve the problems of RC delay and electromigration in chips, the metal wire interconnection technology using dual Damascene process has become the mainstream. The common processes of the metal wire dual Damascene process are as follows: using photolithography technology to form grooves and vias in dielectric films, physical vapor deposition or chemical vapor deposition to deposit barrier layers / metal seed layers, electroplating metal to fill grooves and vias, chemical mechanical grinding to remove excess metal and expose the dielectric layer, and then the circuit required by the chip is realized.

[0003] However, as the feature size continues to shrink, the feature size of the through hole and groove opening is reduced while its aspect ratio is increasing or remaining unchanged. The change in size brings great challenges to the deposition technology of the barrier layer / metal seed layer. In order to cope with the miniaturization of the size, the deposition technology of the barrier layer / metal seed layer needs to cover the through hole and groove with a large aspect ratio (greater than 2.5) and a small opening feature size (less than 50nm) with a barrier layer / metal seed layer of sufficient thickness (the coverage of the metal seed layer is greater than 50%), while ensuring a sufficiently large opening (greater than 4nm) to avoid the formation of voids in the subsequent electroplating metal process due to the opening being too small, thereby affecting the electrical performance or reliability of the chip. However, in actual industrial production, especially in advanced processes, it is difficult to achieve the best parameters of the through hole and groove opening size and bottom coverage at the same time. Often when the step bottom coverage is optimal, the size of the through hole and groove opening is very small, so it is difficult to avoid the problem of voids in the subsequent electroplating metal process. Summary of the invention

[0004] The purpose of the present invention is to propose a method for preparing a seed layer, a metal interconnection process method and semiconductor process equipment, so as to improve the seed layer coverage of the bottom and side walls of through holes and grooves, while ensuring that the through holes and grooves have opening dimensions that meet the requirements of subsequent electroplating filling metal, thereby avoiding the generation of metal voids in the subsequent electroplating metal process.

[0005] In a first aspect, the present invention provides a method for preparing a metal seed layer, comprising:

[0006] Depositing a metal seed layer on a substrate having through holes and grooves on its surface, wherein during the deposition of the metal seed layer, the metal deposition rate at the top openings of the through holes and grooves is greater than the metal deposition rate at the side walls of the through holes and grooves, and stopping the deposition of the metal seed layer when the openings of the through holes and grooves are reduced to a point where metal ions cannot enter the through holes and grooves;

[0007] Performing oxidation treatment on the surface of the substrate to convert the metal seed layer on the surface of the substrate and a portion of the metal seed layer at the opening of the through hole and the groove into metal oxide;

[0008] The substrate is placed in a solution capable of dissolving metal oxides, so that the metal oxides on the surface of the substrate and at the openings of the through holes and the trenches are dissolved, thereby opening the openings of the through holes and the trenches.

[0009] Optionally, before depositing a metal seed layer on a substrate having through holes and grooves on a surface thereof, the method further comprises:

[0010] forming a diffusion barrier layer on the substrate, wherein the diffusion barrier layer covers the surface of the substrate and the bottom and sidewalls of the through hole and the trench;

[0011] The metal seed layer is deposited on the diffusion barrier layer.

[0012] Optionally, the oxidation treatment of the substrate surface includes:

[0013] Introducing an oxidizing gas and an inert gas into the process chamber, and exciting the oxidizing gas into plasma;

[0014] The surface of the substrate is bombarded by the plasma of the oxidizing gas so as to convert the metal seed layer at the openings of the through holes and trenches into metal oxide.

[0015] Optionally, the oxidizing gas includes at least one of oxygen, ozone and nitrogen dioxide.

[0016] Optionally, the solution capable of dissolving metal oxides includes an acidic solution and corresponding acid metal compounds, and the acidic solution includes a sulfuric acid solution, a nitric acid solution and an acidic chloride solution.

[0017] Optionally, when the openings of the through holes and the grooves are reduced to a level that metal ions cannot enter the through holes and the grooves, the size range of the through holes and the groove openings is 0 nm-4 nm.

[0018] Optionally, after opening the openings at the tops of the through holes and the trenches, the opening sizes of the through holes and the trenches are greater than 4 nm.

[0019] Optionally, the material of the metal seed layer includes at least one of Cu, Co and Ru.

[0020] Optionally, the material of the diffusion barrier layer includes at least one of TaN, Ta, Co, Ru and TiN.

[0021] Optionally, the material of the metal seed layer is Cu, and the process parameters for oxidizing the surface of the substrate include:

[0022] The process chamber pressure range is: 1mTorr to 10Torr;

[0023] Plasma excitation power range: 500W~3KW;

[0024] The bias power range is: 0W to 1800W.

[0025] Optionally, before forming the diffusion barrier layer on the surface of the substrate, the method further comprises:

[0026] Degassing the substrate to remove volatile impurities on the surface of the substrate; and / or

[0027] The substrate is subjected to a plasma pre-cleaning treatment to remove residues on the substrate surface and in the through holes and the grooves.

[0028] In a second aspect, the present invention provides a metal interconnection process method, comprising:

[0029] Providing a substrate obtained by using the method for preparing the metal seed crystal layer according to any one of the first aspects;

[0030] Metal is filled into the through holes and trenches of the substrate through an electroplating process to form metal interconnection lines.

[0031] In the third aspect, the present invention proposes a semiconductor process equipment, including multiple process chambers and a controller, the controller includes at least one processor and at least one memory, the memory stores a computer program, and when the computer program is executed by the processor, it implements the method for preparing a metal seed layer as described in any one of the first aspects.

[0032] The beneficial effects of the present invention are:

[0033] The preparation method of the metal seed layer of the present invention, when depositing the metal seed layer on the bottom and side walls of the through hole and the groove, stops depositing the metal seed layer until the openings at the tops of the through hole and the groove are reduced to the point where copper ions cannot enter the through hole and the groove, that is, adopts a strategy of giving priority to ensuring the coverage of the bottom and side walls, and keeps increasing the coverage of the seed layer at the bottom and side walls of the through hole and the groove until the openings are close to being closed or completely closed, without compromising on the minimum value of the openings, thereby achieving a higher coverage of the bottom and side walls, and then oxidizing the surface of the substrate to convert part of the metal seed layer at the openings at the tops of the through hole and the groove into metal oxide The material is then dissolved by a solution capable of dissolving metal oxides to dissolve the metal oxides at the top openings of the through holes and the grooves, thereby reopening the openings at the tops of the through holes and the grooves. This method can allow the through holes and the grooves to have a higher metal seed layer coverage at the bottom and side walls while ensuring that the opening size can meet the requirements of electroplating metal filling. Since the metal seed layer coverage at the bottom and side walls of the through holes and the grooves is higher, the remaining space in the through holes and the grooves that needs to be filled with metal is smaller. Therefore, even if the opening is smaller, it can meet the requirements of void-free metal filling in the subsequent electroplating process, thereby effectively avoiding the problem of metal voids in the subsequent electroplating process.

[0034] The system of the present invention has other characteristics and advantages, which will be apparent from the drawings incorporated herein and the following detailed description, or will be described in detail in the drawings incorporated herein and the following detailed description, which together serve to explain the specific principles of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The above and other objects, features and advantages of the present invention will become more apparent through a more detailed description of exemplary embodiments of the present invention in conjunction with the accompanying drawings, in which like reference numerals generally represent like components.

[0036] Figure 1 A schematic diagram showing the generation of voids in the metal electroplating process due to the excessively small openings of through holes and trenches in the existing metal seed layer preparation process.

[0037] Figure 2 A schematic diagram showing the generation of voids in the metal electroplating process due to insufficient bottom coverage of through holes and trenches in the existing metal seed layer preparation process.

[0038] Figure 3 The present invention shows the intention of realizing void-free metal filling by selecting a relatively stable compromise value of the process window in the existing metal seed layer preparation process.

[0039] Figure 4 A flow chart showing the steps of a method for preparing a metal seed crystal layer according to the present invention is shown.

[0040] Figure 5 A schematic diagram of forming a metal seed layer in a method for preparing a metal seed layer according to an embodiment of the present invention is shown.

[0041] Figure 6 A schematic diagram showing an oxidation treatment of a metal seed layer in a method for preparing a metal seed layer according to an embodiment of the present invention is shown.

[0042] Figure 7 A schematic diagram is shown after dissolving metal oxide to open an opening in a method for preparing a metal seed layer according to an embodiment of the present invention.

[0043] Figure 8 A schematic diagram of a metal interconnection process method for preparing a metal interconnection line according to an embodiment of the present invention is shown.

[0044] Fig. 9 A schematic diagram of a semiconductor process equipment according to an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0045] The existing process flow of metal interconnect dual damascene is as follows: first, grooves and vias are formed in the dielectric film using photolithography technology, then a barrier layer / metal seed layer with good step coverage is deposited using physical vapor deposition technology, then the grooves and vias are filled with metal electroplating, and finally, chemical mechanical polishing is used to remove excess metal.

[0046] In the process steps of preparing the barrier layer / metal seed layer, physical vapor deposition technology or a combination of physical vapor deposition and chemical vapor deposition (including atomic layer deposition) is often used to prepare the barrier layer / metal seed layer. When the wafer enters the process machine, it must first be degassed and plasma pre-cleaned to ensure that the oxide layer covering the previous metal wire and the residues after the slotting or drilling etching and cleaning processes can be removed before the deposition process, so as to strengthen the bonding strength of the metal bonds between the layers and reduce the resistance between the interconnected metal wires; then, a barrier layer is prepared by physical vapor deposition technology or a combination of physical vapor deposition and chemical vapor deposition (including atomic layer deposition) to prevent the diffusion of metal elements in the corresponding metal seed layer and improve the adhesion of the metal seed layer; then, the metal seed layer is prepared by physical vapor deposition technology as a seed for the subsequent metal electroplating process. The process integration requires that the bottom and sidewall coverage of the process should be large, and the opening feature size should be large to avoid metal voids due to premature closure of the opening during the subsequent metal electroplating process.

[0047] In order to cope with the miniaturization of size, the deposition technology of barrier layer / seed layer needs to cover the barrier layer / seed layer with sufficient thickness in the through holes and trenches with large aspect ratio and small opening feature size, while ensuring a large opening. Figure 1 and Figure 2 As shown, if the opening is too small ( Figure 1 ) or insufficient coverage ( Figure 2 ), voids may be generated in the subsequent metal plating process.

[0048] However, in actual industrial production, especially in advanced processes, it is difficult to optimize both the opening size and the bottom coverage at the same time. It is often necessary to take a relatively stable compromise value in the process window to achieve void-free filling, such as Figure 3 Generally speaking, when the bottom coverage is optimal, the size of the through hole and the trench opening are very small.

[0049] The present invention provides a seed layer preparation method, a metal interconnection process method and a semiconductor process equipment, which can realize a seed layer process with high bottom coverage and better opening, and avoid the generation of metal voids in the subsequent electroplating metal filling process.

[0050] The present invention will be described in more detail below with reference to the accompanying drawings. Although preferred embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to make the present invention more thorough and complete, and to fully convey the scope of the present invention to those skilled in the art.

[0051] Example 1

[0052] Figure 4 A flow chart showing the steps of a method for preparing a metal seed crystal layer according to the present invention is shown.

[0053] like Figure 4 As shown, this embodiment provides a method for preparing a metal seed crystal layer, comprising:

[0054] S1: depositing a metal seed layer 3 on a substrate 1 having through holes and grooves on its surface. During the deposition of the metal seed layer 3, the metal deposition rate at the top openings of the through holes and grooves is greater than the metal deposition rate at the side walls of the through holes and grooves. When the openings of the through holes and grooves are reduced to the point where metal ions cannot enter the through holes and grooves, the deposition of the metal seed layer 3 is stopped.

[0055] Specifically, substrate 1 is a substrate wafer that has completed the front-end process. Substrate 1 may include devices such as transistors. Through holes and grooves on the surface of substrate 1 are formed by an etching process. Through holes and grooves form openings on the surface of substrate 1. Through holes and grooves can be formed in the dielectric layer between adjacent metal layers, which are used to subsequently form metal connections therein to achieve electrical connections between devices, between devices and metal layers, or between adjacent metal layers.

[0056] The material of the metal seed crystal layer 3 includes at least one of Cu, Co and Ru. In this embodiment, the material of the metal seed crystal layer 3 is Cu.

[0057] Preferably, before executing step S1, the method further includes:

[0058] S01: Degassing the substrate 1 to remove volatile impurities on the surface of the substrate 1; then, plasma pre-cleaning the substrate 1 to remove residues on the surface of the substrate 1 and in the through holes and trenches.

[0059] Specifically, after the substrate 1 is introduced into the process machine, it is first subjected to degassing and plasma pre-cleaning to ensure that the oxide layer covering the previous metal wire, the residues after the through hole or groove etching and the cleaning process can be removed before the deposition process, so as to strengthen the bonding strength of the metal bonds between the layers and reduce the resistance between the interconnected copper wires. Among them, the degassing treatment is to heat the wafer to remove volatile impurities such as water vapor adsorbed by the film layer on the upper surface of the wafer to avoid the influence of volatile impurities on subsequent processes, which can be completed by a degassing process chamber. Plasma pre-cleaning is to remove the residues of the previous process on the substrate 1 by the reaction of plasma with the oxide layer on the metal wire of the substrate 1 and the residues in the groove or hole (or by plasma bombardment). The plasma pre-cleaning treatment can be completed by a plasma pre-cleaning process chamber.

[0060] In this embodiment, before executing step S1, the method further includes:

[0061] S02: forming a diffusion barrier layer 2 on the substrate 1, the diffusion barrier layer 2 covers the surface of the substrate 1 and the bottom and sidewalls of the through hole and the trench; a metal seed layer 3 is deposited on the diffusion barrier layer 2;

[0062] The material of the diffusion barrier layer includes at least one of TaN, Ta, Co, a compound consisting of two elements Co and Ru, Co doped with Ru, Ru doped with Co, RuTa, Ru and TiN.

[0063] Specifically, the diffusion barrier layer 2 is used to prevent the diffusion of metal elements in the metal seed layer 3 and improve the adhesion of the metal seed layer 3. In this embodiment, in order to prevent the diffusion of copper elements, the diffusion barrier layer 2 can be a composite film layer of TaN / Ta, TaN / Ta / Co, TaN / CoTaN / Ru, TaN / Co / Ru, TaN / Ru(Co) or TaN / RuTa. Taking the preparation of the diffusion barrier layer 2 of the TaN / Ta composite film layer as an example, a layer of TaN film is first deposited on the surface of the substrate 1 to cover the surface of the substrate 1 and the bottom and sidewalls of the through hole and the groove, and then a layer of Ta film is deposited to cover the TaN film, thereby forming a TaN / Ta composite diffusion barrier layer 2. The preparation of the diffusion barrier layer 2 can be completed in a process chamber for preparing the barrier layer, and the diffusion barrier layer 2 can be prepared by a physical vapor deposition process or a combination of physical vapor deposition and chemical vapor deposition (including atomic layer deposition).

[0064] In other embodiments, when the material of the metal seed layer 3 is Co, the material of the diffusion barrier layer 2 may be TiN. When the material of the metal seed layer 3 is Ru, since Ru has a low diffusivity, it may be selected not to prepare the diffusion barrier layer 2, that is, step S02 may be omitted, and the process of step S2 may be directly performed.

[0065] In step S1, the metal seed layer 3 is used as a seed for the subsequent metal electroplating process. The metal seed layer 3 can be prepared by a physical vapor deposition process and completed by a metal seed layer 3 process chamber. It should be noted that when the openings of the through holes and grooves are reduced to the point where metal ions cannot enter the through holes and grooves, the size of the corresponding through hole and groove openings can be selected in the range of 0nm-4nm.

[0066] In this embodiment, it is preferred that when the size of the through hole and the groove opening is less than 4 nm, that is, when the opening of the through hole and the groove is close to being closed, the deposition of the metal seed layer 3 is stopped. More preferably, when the size of the through hole and the groove opening is 0 nm, that is, when the opening of the through hole and the groove is completely closed, the deposition of the metal seed layer 3 is stopped, so as to ensure the highest bottom coverage.

[0067] The structure after the metal seed layer 3 is deposited in step S1 is as follows Figure 5As shown. Step S1 is an important improvement of the present invention, which changes the process strategy of the metal seed layer 3 currently commonly used in the industry. Specifically, the strategy currently commonly used in the industry is: during the deposition of the metal seed layer 3, it is necessary to ensure that the opening size is at least greater than a certain value (for example, 4nm or greater), that is, stop the deposition of the metal seed layer 3, so that the bottom step coverage reaches a relative maximum, for example, more than 50%. The process strategy for preparing the metal seed layer 3 in this step is: give priority to ensuring the seed layer coverage of the bottom and side walls of the through hole and the groove, and keep increasing the coverage until the opening is close to closed or completely closed (compared with the existing process of the metal seed layer 3, this method does not need to compromise the minimum value of the opening), and when no more copper ions can enter the through hole and the groove, the deposition of the metal seed layer 3 is stopped, thereby achieving a higher bottom coverage, and at the same time, compared with the existing process, it also expands the process window for the preparation of the metal seed layer 3.

[0068] S2: performing oxidation treatment on the surface of the substrate 1 to transform the metal seed crystal layer 3 on the surface of the substrate 1 and a part of the metal seed crystal layer 3 at the opening of the through hole and the groove into metal oxide 4.

[0069] This step specifically includes:

[0070] introducing an oxidizing gas and an inert gas into the process chamber, and exciting the oxidizing gas into plasma;

[0071] The surface of the substrate 1 is bombarded with plasma of an oxidizing gas so as to convert the metal seed layer 3 at the openings of the through holes and trenches into a metal oxide 4 .

[0072] The oxidizing gas includes at least one of oxygen, ozone and nitrogen dioxide. In this embodiment, oxygen is preferred. In other embodiments, when the material of the metal seed layer 3 is Co or Ru, the oxidizing gas can select ozone or nitrogen dioxide with stronger oxidizing properties or a combination of ozone and nitrogen dioxide as the oxidizing gas.

[0073] Preferably, the process parameters for the oxidation treatment of the copper seed layer in this step include:

[0074] The process chamber pressure range is: 1mTorr to 10Torr;

[0075] Plasma excitation power range: 500W~3KW;

[0076] The bias power range is: 0W to 1800W.

[0077] Specifically, this step can be completed by a newly added post-processing chamber. After the substrate 1 enters the post-processing chamber, the substrate 1 is placed on a heater or an electrostatic chuck, and an oxidizing gas and an inert gas are introduced for ignition. The inert gas is preferably argon. The chamber pressure range is preferably 1mTorr-10Torr. The typical process time is between 5s-120s. The excitation mode of the oxidizing gas plasma can be selected from ICP, CCP, and RPS. In this embodiment, oxygen plasma is excited above the substrate 1, and the excitation power range is preferably 500W to 3KW. The speed and angle of the oxygen ion falling are controlled by applying a bias voltage. The applied bias power is preferably 0W to 1000W. The high-energy oxygen ions bombard the copper seed layer on the surface of the substrate 1 to oxidize it. The thickness of the metal oxide 4 is increased or decreased by controlling the process time according to specific needs. For the metal seed layer that is nearly closed or completely closed at the top of the through hole and the groove, the oxygen plasma will also oxidize it, such as Figure 6 shown.

[0078] The post-processing chamber introduced in this step uses an oxidizing gas plasma to oxidize the metal seed layer 3 on the surface of the nearly closed or completely closed through holes and grooves, causing them to oxidize. The purpose of oxidation is to oxidize the metal seed layer on the surface of the substrate 1 and the metal seed layer at the through holes and grooves into metal oxide 4, providing a basis for the subsequent reopening of the through holes and the openings at the tops of the grooves.

[0079] S3: placing the substrate 1 in a solution capable of dissolving the metal oxide 4, so that the metal oxide 4 at the top openings of the through-holes and the trenches is dissolved, thereby opening the openings of the through-holes and the trenches.

[0080] Among them, the solution capable of dissolving the metal oxide 4 includes an acidic solution capable of dissolving the metal oxide 4 and a corresponding acid radical metal compound, and the acidic solution includes a sulfuric acid solution, a nitric acid solution and an acidic chloride solution (such as a cupric chloride solution, an aluminum chloride solution, a zinc chloride solution, etc.).

[0081] After this step is completed, the size of the openings of the through holes and the grooves after opening is preferably greater than 4 nm.

[0082] Specifically, this step is a step of opening nearly closed or completely closed openings of through holes and grooves. In this step, the substrate 1 can be placed in a solution that can react with the metal oxide 4, and the metal oxide 4 on the surface of the substrate 1 and at the top openings of the through holes and grooves can be dissolved by the solution, thereby opening the openings of the through holes and grooves, so that the through holes and grooves can be filled subsequently by copper electroplating.

[0083] In this embodiment, a copper electroplating solution is preferably used. The copper electroplating solution contains a large amount of sulfuric acid (H2SO4), copper sulfate CuSO4 and reducing components. The copper electroplating solution can react with the metal oxide 4 (i.e., copper oxide) on the surface of the substrate 1 and at the top openings of the through holes and grooves. Generally, the copper oxide can be dissolved in less than 5 seconds. That is, after the substrate 1 enters the copper electroplating solution for a period of time, the openings of the through holes and grooves that have been nearly closed or completely closed will be reopened. Figure 7 At the same time, the copper electroplating solution can also be used to integrate the process of opening the through hole and the groove opening with the subsequent copper electroplating process into one process, and the process of opening the opening is completed while the copper electroplating process is being performed, that is, when the copper electroplating process is performed, the substrate 1 is placed in the electroplating solution for a period of time, such as 4-10 seconds, and the copper electroplating process is directly performed after the opening of the through hole and the groove is opened, thereby eliminating the need to add additional dissolution processes and related materials, thereby improving process efficiency and reducing process costs.

[0084] Since step S1 can maximize the coverage of the metal seed layer 3 at the bottom and side walls of the through holes and grooves, the cavities in the through holes and grooves that need to be filled with metal by electroplating will be smaller. Therefore, through steps S2-S3, as long as a smaller opening can be opened, it can be ensured that the electroplated metal can completely fill the remaining space in the through holes and grooves, thereby ensuring that no voids will be generated in the subsequent metal electroplating process.

[0085] Example 2

[0086] This embodiment provides a metal interconnection process method, including:

[0087] Providing a substrate obtained by the method for preparing the metal seed layer of Example 1;

[0088] Through the electroplating process, metal is filled in the through holes and trenches of the substrate to form metal interconnection lines 5 .

[0089] The substrate structure obtained by the method of Example 1 is Figure 7 In the structure shown in the figure, since the bottom and sidewall of the through hole and the groove on the substrate have a higher coverage rate and have an opening that can meet the requirements of electroplating filling metal, the problem of voids generated during the electroplating process can be effectively avoided by directly electroplating the substrate, and finally the metal interconnection line 5 can be formed to achieve a better electrical connection effect, such as Figure 8 shown.

[0090] The electroplated metal material includes at least one of Cu, Co and Ru. In this embodiment, the electroplated metal is Cu, and the metal interconnection line 5 formed by electroplating is a copper interconnection line.

[0091] Example 3

[0092] Fig. 9A schematic diagram of a semiconductor process equipment according to an embodiment of the present invention is shown.

[0093] like Fig. 9 As shown, this embodiment provides a semiconductor process equipment 100, including multiple process chambers and a controller (not shown), the controller includes at least one processor and at least one memory, the memory stores a computer program, and when the computer program is executed by the processor, the method for preparing the metal seed layer of Example 1 is implemented.

[0094] The multiple process chambers include at least one degassing process chamber 102, at least one pre-cleaning process chamber 101, at least one barrier layer process chamber 103, at least one seed layer process chamber 104, and at least one post-processing process chamber 105. In this embodiment, there are two degassing process chambers 102, two pre-cleaning process chambers 101, two barrier layer process chambers 103, and two seed layer process chambers 104, and one post-processing process chamber 105.

[0095] Among them, the degassing process chamber 102 is used to heat the wafer to remove volatile impurities on the wafer surface; the pre-cleaning process chamber 101 is used to perform plasma pre-cleaning treatment on the wafer to remove residues on the wafer surface and in the through holes and grooves; the barrier layer process chamber 103 is used to prepare a diffusion barrier layer 2 on the wafer through a deposition process; the seed layer process chamber 104 is used to prepare a metal seed layer 3 on the wafer through a deposition process; and the post-processing process chamber 105 is used to oxidize the wafer surface to convert part of the metal seed layer 3 into metal oxide 4.

[0096] In this embodiment, the semiconductor process equipment 100 further includes a wafer box storage cabinet 106, a wafer transfer mechanism 107 and a wafer transfer chamber, and the wafer transfer chamber is connected to each process chamber.

[0097] Exemplarily, the controller may be a host computer or a slave computer. The controller may control the wafer transfer mechanism 107 to transfer the wafers to be processed between the process chambers, and may also control the process chambers to respectively complete the corresponding process steps in the method for preparing the seed layer of Example 1.

[0098] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A method for preparing a metal seed layer, characterized in that: include: Depositing a metal seed layer on a substrate having through holes and grooves on its surface, wherein during the deposition of the metal seed layer, the metal deposition rate at the top openings of the through holes and grooves is greater than the metal deposition rate at the side walls of the through holes and grooves, and stopping the deposition of the metal seed layer when the openings of the through holes and grooves are reduced to a point where metal ions cannot enter the through holes and grooves; Performing oxidation treatment on the surface of the substrate to convert the metal seed layer on the surface of the substrate and a portion of the metal seed layer at the opening of the through hole and the groove into metal oxide; The substrate is placed in a solution capable of dissolving metal oxides, so that the metal oxides on the surface of the substrate and at the openings of the through holes and the trenches are dissolved, thereby opening the openings of the through holes and the trenches.

2. The method for preparing a metal seed layer according to claim 1, characterized in that: Before depositing a metal seed layer on a substrate having through holes and trenches on the surface, the method further includes: forming a diffusion barrier layer on the substrate, wherein the diffusion barrier layer covers the surface of the substrate and the bottom and sidewalls of the through hole and the trench; The metal seed layer is deposited on the diffusion barrier layer.

3. The method for preparing a metal seed layer according to claim 1, characterized in that: The oxidation treatment of the substrate surface comprises: Introducing an oxidizing gas and an inert gas into the process chamber, and exciting the oxidizing gas into plasma; The surface of the substrate is bombarded by the plasma of the oxidizing gas so as to convert the metal seed layer at the openings of the through holes and trenches into metal oxide.

4. The method for preparing a metal seed layer according to claim 3, characterized in that: The oxidizing gas includes at least one of oxygen, ozone and nitrogen dioxide.

5. The method for preparing a metal seed layer according to claim 1, characterized in that: The solution capable of dissolving metal oxides includes an acidic solution and a corresponding acid radical metal compound, and the acidic solution includes a sulfuric acid solution, a nitric acid solution and an acidic chloride solution.

6. The method for preparing a metal seed layer according to claim 1, characterized in that: When the openings of the through holes and the grooves are reduced to the point where metal ions cannot enter the through holes and the grooves, the size range of the through holes and the groove openings is 0 nm-4 nm.

7. The method for preparing a metal seed layer according to claim 1, characterized in that: After opening the openings at the tops of the through holes and trenches, the opening sizes of the through holes and trenches are greater than 4 nm.

8. The method for preparing a metal seed layer according to any one of claims 1 to 7, characterized in that: The material of the metal seed layer includes at least one of Cu, Co and Ru.

9. The method for preparing a metal seed layer according to claim 2, characterized in that: The material of the diffusion barrier layer includes at least one of TaN, Ta, Co, a compound consisting of two elements Co and Ru, Co doped with Ru, Ru doped with Co, RuTa, Ru and TiN.

10. The method for preparing a metal seed layer according to claim 1, characterized in that: The material of the metal seed layer is Cu, and the process parameters for oxidizing the surface of the substrate include: The process chamber pressure range is: 1mTorr to 10Torr; Plasma excitation power range: 500W~3KW; The bias power range is: 0W to 1800W.

11. The method for preparing a metal seed layer according to claim 2, characterized in that: Before forming a diffusion barrier layer on the surface of the substrate, the method further includes: Degassing the substrate to remove volatile impurities on the surface of the substrate; and / or The substrate is subjected to a plasma pre-cleaning treatment to remove residues on the substrate surface and in the through holes and the grooves.

12. A metal interconnection process method, characterized in that: include: Providing a substrate obtained by the method for preparing a metal seed layer according to any one of claims 1 to 11; Metal is filled into the through holes and trenches of the substrate through an electroplating process to form metal interconnection lines.

13. A semiconductor process equipment, comprising a plurality of process chambers and a controller, characterized in that: The controller includes at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method for preparing a metal seed layer according to any one of claims 1 to 11 is implemented.

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