Chip packaging body and electronic equipment

Abstract

The invention provides a chip packaging body and electronic equipment, relates to the technical field of electronics, and is used for improving the temperature measurement precision of stacked chips and constructing a three-dimensional temperature sensing network in the stacked chips. The chip packaging body comprises a plurality of stacked chips and a first temperature sensing unit, the first temperature sensing unit comprises a first connecting electrode, a first thermoelectric component, a second thermoelectric component and two first conductive connecting wires, and the first thermoelectric component and the second thermoelectric component penetrate through at least two adjacent chips. The first connecting electrode connects the ends, located on the same side of the at least two adjacent chips, of the first thermoelectric assembly and the second thermoelectric assembly, and the ends, located on the other side of the at least two adjacent chips, of the first thermoelectric assembly and the second thermoelectric assembly are connected with the two first conductive connecting wires respectively. Electromotive forces generated by the first thermoelectric component and the second thermoelectric component are opposite.

Description

Technical Field

[0001] The present application relates to the field of electronic technology, and in particular to a chip package and an electronic device. Background Art

[0002] With the continuous development of the digital economy, people have higher and higher requirements for the performance of electronic devices. Improving the performance of processing units in electronic devices is one of the important ways to improve the performance of electronic devices. However, with the continuous advancement of process nodes, it takes a great cost to further reduce the size of transistors in processing units. Therefore, the industry has turned its attention to 3D (dimension) packaging technology.

[0003] However, there are many problems with 3D packaging technology. One of them is that 3D packages have the characteristics of high power and high energy consumption. Due to the stacking setting, the temperature field distribution inside the 3D package is uneven, and traditional temperature sensors cannot fully cover different positions. In the prior art, when measuring the temperature of a chip, a temperature sensing unit is generally set on the surface of the chip, for example, a diode or a thermistor is set on the surface of the chip. These technologies make it difficult to obtain the temperature at different heights in the 3D package, so it is impossible to take the optimal cooling method, and it is also difficult to provide effective empirical data for subsequent updates and iterations of the 3D package. Therefore, accurate and efficient detection of the temperature at each point inside the chip is an urgent problem to be solved. Summary of the invention

[0004] The present application provides a chip package and an electronic device, wherein the chip package is used to solve the problem of inaccurate temperature measurement of stacked chips and difficulty in constructing a temperature sensing network in the stacked chips.

[0005] To achieve the above purpose, this embodiment adopts the following technical solutions:

[0006] In a first aspect, a chip package is provided, comprising a plurality of stacked chips and a first temperature sensing unit, wherein the first temperature sensing unit comprises a first connecting electrode, a first thermoelectric component, a second thermoelectric component and two first conductive lines, wherein the first thermoelectric component and the second thermoelectric component penetrate at least two adjacent chips, wherein the first connecting electrode connects one end of the first thermoelectric component and the second thermoelectric component located on the same side of the at least two adjacent chips, and one end of the first thermoelectric component and the second thermoelectric component located on the other side of the at least two adjacent chips are respectively connected to the two first conductive lines; and the electromotive force generated by the first thermoelectric component is opposite to that generated by the second thermoelectric component.

[0007] In the chip package provided by the embodiment of the present application, the first temperature sensing unit includes a first thermoelectric component and a second thermoelectric component, a first connecting electrode connects the same side ends of the first thermoelectric component and the second thermoelectric component, and two first conductive wires are respectively connected to the other ends of the first thermoelectric component and the second thermoelectric component, thereby forming a thermoelectric arm, that is, the smallest unit for measuring temperature. When there is a temperature difference between the two ends of the first thermoelectric component and the second thermoelectric component, the first thermoelectric component and the second thermoelectric component will generate an electromotive force at their respective ends, and the first connecting electrode connects the first thermoelectric component and the second thermoelectric component in series, so that the electromotive force is superimposed and increased. Temperature information can be obtained by measuring the electromotive force, which can be used to measure the temperature at the first connecting electrode. The first connecting electrode can be set at the temperature to be measured of any chip, so as to measure the temperature at that place.

[0008] The first thermoelectric component and the second thermoelectric component run through at least two adjacent chips. It is easy to understand that the temperature difference of the same chip may be small, and the electromotive force generated is also small, which is not conducive to measurement. The temperature difference between different chips is generally larger than the temperature difference of the same chip. Therefore, the electromotive force generated is also larger and easier to measure, thereby improving the measurement accuracy. At the same time, the requirements for the measurement circuit are correspondingly reduced, saving costs. From another perspective, the first thermoelectric component and the second thermoelectric component run through at least two adjacent chips, so the position of the first connecting electrode and the first conductive connection in the chip package in the direction of stacking multiple chips can be flexibly set, which is conducive to obtaining the temperature of the chip package at various locations in the direction of stacking multiple chips, and is convenient for building a three-dimensional temperature sensing network in the chip package.

[0009] In a possible implementation of the first aspect, each of the at least two chips through which the first thermoelectric component and the second thermoelectric component penetrate is provided with a first through silicon via and a second through silicon via; the first thermoelectric component includes a first detection portion penetrating the first through silicon via, and the second thermoelectric component includes a second detection portion penetrating the second through silicon via, and the types of thermoelectric materials of the first detection portion and the second detection portion are opposite. In this way, the electromotive force generated by the first thermoelectric component and the second thermoelectric component can be opposite by making the types of thermoelectric materials of the first detection portion and the second detection portion opposite. In addition, the first detection portion of the first thermoelectric component is provided in the first through silicon via, and the second detection portion of the second thermoelectric component is provided in the second through silicon via, so that when the through silicon via for interconnection is formed in the stacking packaging process, the first through silicon via and the second through silicon via can be formed at the same time, and some process steps of setting the first temperature sensing unit can be omitted.

[0010] In a possible implementation of the first aspect, of the at least two first detection parts included in the first thermoelectric assembly, adjacent first detection parts are directly connected; of the at least two second detection parts included in the second thermoelectric assembly, adjacent second detection parts are directly connected. In this way, the first thermoelectric assembly is composed of adjacent first detection parts connected, and the second thermoelectric assembly is composed of adjacent second detection parts connected. When bonding two adjacent chips in a stacked arrangement, direct bonding technology can be used to avoid setting other structures before bonding to connect the detection parts, thereby reducing process steps.

[0011] In a possible implementation of the first aspect, the first thermoelectric assembly further includes a first connection structure, and the adjacent first detection parts of at least two first detection parts included in the first thermoelectric assembly are connected by the first connection structure; the second thermoelectric assembly further includes a second connection structure, and the adjacent second detection parts of at least two second detection parts included in the second thermoelectric assembly are connected by the second connection structure; the materials of the first connection structure and the second connection structure include at least one of metal and thermoelectric material. In this way, the adjacent first detection parts and the second detection parts are respectively connected by the first connection structure and the second connection structure, and the alignment requirements between the adjacent first detection parts and the adjacent second detection parts can be reduced during bonding, and the first detection parts and the second detection parts respectively arranged in the adjacent chips are allowed to have a certain misalignment in the chip plane direction when bonding adjacent chips. In addition, since the first detection part and the second detection part are respectively arranged in the first silicon through hole and the second silicon through hole in the adjacent chip, the alignment requirements of the corresponding silicon through holes in the adjacent chips can also be reduced, allowing a certain misalignment, reducing the restrictions on the position of the silicon through holes in each chip, reducing the impact on the circuit setting area in each chip, and improving the flexibility of the silicon through hole setting.

[0012] In a possible implementation of the first aspect, the chip package further includes a bonding layer, which is disposed between adjacent chips among the plurality of chips, and the first connection structure and the second connection structure are embedded in the bonding layer. In this way, the adjacent chips are bonded via the bonding layer, and a mature bonding process can be used to improve the reliability of chip bonding.

[0013] In a possible implementation of the first aspect, a first dielectric layer is provided between the first detection unit and the first through silicon via, and between the second detection unit and the second through silicon via. In this way, leakage current is avoided between the first detection unit and the second detection unit, the influence of the electromotive force generated by the temperature difference on the first detection unit and the second detection unit is reduced, and the accuracy of temperature measurement is improved.

[0014] In a possible implementation of the first aspect, a conductive layer is provided between the first detection unit and the first through silicon via, and between the second detection unit and the second through silicon via; a second dielectric layer is provided between the first detection unit and the conductive layer in the same first through silicon via, and between the second detection unit and the conductive layer in the same second through silicon via. In this way, while the first detection unit and the second detection unit are used to measure the temperature, the conductive layer can also be used to transmit signals, thereby realizing the reuse of the through silicon vias; at the same time, by reusing the through silicon vias, the chip area occupied by the first detection unit and the second detection unit can also be reduced.

[0015] In a possible implementation of the first aspect, the chip where the conductive layer is located includes a rewiring layer, and the conductive layer is connected to the rewiring layer, so that signal transmission between the stacked chips is achieved through the connection between the conductive layer and the rewiring layer.

[0016] In a possible implementation of the first aspect, the Seebeck coefficient of the first thermoelectric component is positive, the Seebeck coefficient of the second thermoelectric component is negative, and the cross-sectional area of ​​the first thermoelectric component parallel to the chip is larger than the cross-sectional area of ​​the second thermoelectric component parallel to the chip. The majority carriers of thermoelectric materials with positive Seebeck coefficients are holes, and the majority carriers of thermoelectric materials with negative Seebeck coefficients are electrons. Holes are more difficult to move than electrons. If the cross-sectional area of ​​the first thermoelectric component parallel to the chip is larger than the cross-sectional area of ​​the second thermoelectric component parallel to the chip, then under the same temperature difference, the difference in electromotive force generated by the first thermoelectric component and the second thermoelectric component can be reduced, which is conducive to improving the temperature measurement accuracy.

[0017] In a possible implementation of the first aspect, the chip package includes a plurality of first temperature sensing units, the chips through which the plurality of first temperature sensing units pass are not completely the same, and the first conductive lines of the plurality of first temperature sensing units are arranged on the same surface of the same chip. In this way, a three-dimensional temperature sensing network can be formed, and since the first conductive lines are arranged on the same surface of the same chip, the process of forming the first conductive lines can be performed on only one chip, avoiding the formation of the first conductive lines on other chips stacked in the chip package, greatly reducing the process flow.

[0018] In a possible implementation of the first aspect, the chip package further includes at least one measurement circuit, and the first conductive lines of the plurality of first temperature sensing units are connected to the same measurement circuit. In this way, the number of measurement circuits to be provided can be reduced, and further, only one measurement circuit can be provided. In addition, when the first conductive lines of the plurality of first temperature sensing units are provided on the same surface of the same chip, the connection between the first conductive lines of the plurality of first temperature sensing units and the measurement circuit can be simplified.

[0019] In a possible implementation of the first aspect, the chip package also includes a second temperature sensing unit, the second temperature sensing unit includes a second connecting electrode, a third thermoelectric component, a fourth thermoelectric component and two second conductive wires, the third thermoelectric component and the fourth thermoelectric component pass through a chip, the second connecting electrode connects the third thermoelectric component and the fourth thermoelectric component at one end on the same side of the chip, and the third thermoelectric component and the fourth thermoelectric component at one end on the other side of the chip are respectively connected to the two second conductive wires; the electromotive force generated by the third thermoelectric component is opposite to that of the fourth thermoelectric component. In this way, the third thermoelectric component and the fourth thermoelectric component of the second temperature sensing unit only pass through one chip, which improves the flexibility of the temperature sensing unit setting and is more conducive to building a three-dimensional temperature sensing network.

[0020] In a possible implementation of the first aspect, the plurality of chips include a first chip and a second chip adjacent to each other, the first chip and the second chip are both provided with a second temperature sensing unit, and the distance between the second conductive line of the second temperature sensing unit provided in the first chip and the second connection electrode of the second temperature sensing unit provided in the second chip in a direction parallel to the chip is less than or equal to 1 mm. In this way, the temperature at the second conductive line of the second temperature sensing unit in the first chip can be determined by determining the temperature at the second connection electrode of the second temperature sensing unit in the second chip, and a temperature measuring device for obtaining the temperature at the second conductive line of the second temperature sensing unit in the first chip can be omitted, thereby conveniently obtaining the absolute temperature at the second connection electrode of the second temperature sensing unit in the first chip.

[0021] In a second aspect, an embodiment of the present application provides an electronic device, comprising a chip package according to any one of the first aspects and a printed circuit board, wherein the chip package is connected to the printed circuit board. Thus, since the electronic device uses the chip package according to any one of the first aspects, the performance of the electronic device can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of an electronic device provided in an embodiment of the present application;

[0023] Figure 2 is a schematic diagram of the three-dimensional structure of a chip package provided in an embodiment of the present application;

[0024] Figure 3 yes Figure 2 A cross-sectional view along the AA direction when the middle chip package does not include the first temperature sensing unit;

[0025] Figure 4 is a cross-sectional view of another embodiment in which the chip package does not include the first temperature sensing unit;

[0026] Figure 5It is a schematic diagram of the principle of thermoelectric materials generating electromotive force;

[0027] Figure 6 yes Figure 2 A cross-sectional view of the chip package along the AA direction;

[0028] Figure 7 A schematic diagram of a partial three-dimensional structure of a thermoelectric component in one embodiment;

[0029] Figure 8 A schematic diagram of a partial three-dimensional structure of a thermoelectric component in another embodiment;

[0030] Fig. 9 is a cross-sectional view of a chip package in yet another embodiment;

[0031] Fig.10 FIG. 4 is a cross-sectional view of a chip package in another embodiment. DETAILED DESCRIPTION

[0032] Unless otherwise defined, the technical terms or scientific terms used in this application should be understood by those skilled in the art in the ordinary sense. The terms "first", "second", "third" and similar words used in the specification and claims of this application do not indicate any order, quantity or importance, but are only used to distinguish different components. Thus, the features defined as "first", "second", and "third" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise stated, the meaning of "multiple" is two or more.

[0033] The directional terms such as "left", "right", "up" and "down" are defined relative to the orientation of the device schematically placed in the drawings. It should be understood that these directional terms are relative concepts. They are used for relative description and clarification, and they may change accordingly according to the change of the orientation of the chip or semiconductor packaging structure.

[0034] Figure 1An electronic device 10 is provided for an embodiment of the present application. The electronic device 10 may be a terminal device, such as a mobile phone, a tablet computer, a smart bracelet, or a personal computer (PC), a server, a workstation, etc. The electronic device 10 includes a printed circuit board 11 (PCB), a bus is provided on the printed circuit board, and a system on chip (Soc) 12 connected to the bus. The system on chip 12 is combined with the printed circuit board 11 and connected to the bus. The system on chip 12 can be used to process data, such as processing application data, processing image data, and caching temporary data. In one embodiment, the system on chip 12 may include an application processor (AP) for processing applications, a graphics processing unit (GPU) for processing image data, and a first random read access memory for caching high-speed data. The first random read access memory may be a static random access memory (SRAM), a dynamic random access memory (DRAM), or an embedded flash memory (EFlash). The above-mentioned application processor, image processing unit and first random read access memory can be integrated into one bare chip (die) or be separately arranged in multiple bare chips. That is to say, multiple functional units can be integrated into one chip or be separately arranged in multiple chips, but the system on chip 12 includes at least two chips, which are stacked and packaged together through packaging technology. That is to say, the system on chip 12 is a chip package formed by at least two chips stacked and packaged. The stacking packaging technology can adopt 2.5D (dimension) or 3D packaging, etc., to obtain faster data transmission rate between chips.

[0035] In addition, the electronic device 10 may also include a communication chip 13 and a power management chip 14 connected to the system on chip 12 via a bus. The communication chip 13 may be used for processing the protocol stack, or amplifying and filtering analog radio frequency signals, or performing the above functions simultaneously. The power management chip 14 may be used to power other chips.

[0036] The embodiment of the present application further provides a chip package, which may be the aforementioned system on chip 12 .

[0037] Figure 2FIG. 1 is a schematic diagram of a three-dimensional structure of a chip package 100 in one embodiment. The chip package 100 includes a first temperature sensing unit 130 and a plurality of chips (see FIG. 1 ) stacked in a manner similar to that of FIG. 1 . Figure 2 110, 120), Figure 2 In the figure, only two chips are stacked for illustration, namely, a first chip 110 and a second chip 120. It is easy to understand that when multiple chips are stacked, they can also be arranged in the same manner.

[0038] A bonding layer 190 may be included between the first chip 110 and the second chip 120, and the bonding layer 190 reliably bonds the first chip 110 and the second chip 120 together. The bonding between the first chip 110 and the second chip 120 may be performed by an adhesive bonding process, in which case the material of the bonding layer 190 may include compounds such as epoxy resin, resin, moldable polymer, polyimide, etc.; a metal eutectic bonding process may also be used, in which case the material of the bonding layer 190 may include binary alloys such as Pb / In, Pb / Sn, In / Sn, Au / Si, etc. It is easy to understand that in some embodiments, the first chip 110 and the second chip 120 may be directly bonded, that is, there is no bonding layer 190 between the first chip 110 and the second chip 120.

[0039] The first chip 110 and the second chip 120 may be bare chips, and the substrate of the bare chip may include a single element semiconductor substrate, such as a substrate formed of silicon or germanium; it may also be a compound substrate, such as a substrate formed of compounds such as silicon germanium, silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, and indium antimonide. The substrate may also be a semiconductor on insulator (SOI) substrate. In some embodiments, various functional elements are integrated on the bare chip, for example, the integrated functional element is an application processor, a graphics processing unit, or a random read access memory. One functional unit may be integrated on a bare chip, or multiple functional units may be integrated, for example, the first bare chip is integrated as an application processor, and the second bare chip is integrated with a graphics processing unit and a memory at the same time, and the first bare chip and the second bare chip are stacked.

[0040] like Figure 3 As shown, Figure 3 yes Figure 2The cross-sectional view along the AA direction when the chip package does not include the first temperature sensing unit. The chip package 100 is provided with a first through silicon via 111 that penetrates the first chip 110 and a first through silicon via 121 that penetrates the second chip 120. That is to say, one end of the first through silicon via 111 is exposed to the upper surface of the first chip 110, and the other end is exposed to the lower surface, and continues between the upper surface and the lower surface of the first chip 110; similarly, one end of the first through silicon via 121 is exposed to the upper surface of the second chip 120, and the other end is exposed to the lower surface, and continues between the upper surface and the lower surface of the second chip 120. Through holes corresponding to the first through silicon via 111 and the first through silicon via 121 are also formed in the bonding layer 190, and the through holes connect the first through silicon via 111 and the first through silicon via 121.

[0041] Similarly, the chip package 100 is further provided with a second through silicon via 112 penetrating the first chip 110 and a second through silicon via 122 penetrating the second chip 120 .

[0042] In some embodiments, the first through silicon via 111 and the first through silicon via 121 extend in the same direction, and the second through silicon via 112 and the second through silicon via 122 are connected and extend in the same direction. For example, the first through silicon via 111 and the first through silicon via 121 extend in the same straight line direction, and the second through silicon via 112 and the second through silicon via 122 extend in the same straight line direction. In this case, the extension direction of the first through silicon via 111 and the extension direction of the first through silicon via 121 may be parallel to each other, and the first through silicon via 111 and the first through silicon via 121 are both in the thickness direction of the chip package 100 (i.e., the stacking direction of multiple chips, see Figure 3 In another example, the first through silicon via 111 and the first through silicon via 121 extend in directions parallel to each other, the second through silicon via 112 and the second through silicon via 122 extend in directions parallel to each other, and the first through silicon via 111 and the first through silicon via 121 are staggered by a certain position in a direction parallel to the chip, and the second through silicon via 112 and the second through silicon via 122 are also staggered by a certain position in a direction parallel to the chip, such as Figure 4 As shown, the first through silicon via 111 and the first through silicon via 121 are connected through a through hole penetrating the bonding layer 190 , and the second through silicon via 112 and the second through silicon via 122 are connected through a through hole penetrating the bonding layer 190 .

[0043] It should be noted that the cross-sectional shapes of the aforementioned through silicon vias are not limited, and may be, for example, circular holes, square holes, or other shapes. The cross-sectional shapes of the aforementioned through silicon vias may be the same or different.

[0044] Please continue to see Figure 2The first temperature sensing unit 130 includes a first thermoelectric component 132, a second thermoelectric component 133, a first connecting electrode 131 and two first conductive lines 134a, 134b. The thermoelectric component (including the first thermoelectric component 132 and the second thermoelectric component 133) can generate an electromotive force when there is a difference between the temperature at one end and the temperature at the other end, and the greater the temperature difference, the greater the electromotive force generated. The thermoelectric component can include thermoelectric materials, and the thermoelectric materials include but are not limited to compound semiconductors with thermoelectric properties (such as BiTe-based, BiSb-based, PbTe-based, SnSe-based, etc.), oxygen-containing compounds (such as Bi2O2Se-based, BiCuSeO-based, ZnO-based, Ca3Co4O9-based, etc.), various doped Si-based materials, polymer materials (such as PEDOT-PSS, etc.), and various new low-dimensional thermoelectric materials.

[0045] Figure 5 This is a schematic diagram of the principle of thermoelectric materials generating electromotive force, which is explained by taking thermoelectric materials as semiconductor materials. Figure 5 As shown, the specific structure of the thermoelectric material includes a P-type semiconductor, an N-type semiconductor and a connecting electrode. The connecting electrode connects the upper ends of the P-type semiconductor and the N-type semiconductor to form a thermoelectric arm. The lower end of the thermoelectric arm, that is, the lower end of the P-type semiconductor and the N-type semiconductor can be connected to a sensing circuit (not shown in the figure) through conductive wires.

[0046] If the thermoelectric arm is a hot end at one end of the connecting electrode and a cold end at the other end, for example, the upper end of the thermoelectric arm is a hot end and the lower end is a cold end. At the beginning, the carrier concentrations at the hot end and the cold end are the same. As the temperature changes, the average movement speed of the majority carriers at the hot end increases, the energy increases, and the chemical potential increases, so the majority carriers will move to the cold end and accumulate, thereby generating an electric field inside the thermoelectric material, which hinders the majority carriers from moving to the cold end and promotes the minority carriers to move to the hot end, and finally reaches equilibrium. Specifically, for P-type semiconductors, the majority carriers are holes, the minority carriers are electrons, and the holes accumulate at the cold end. The direction of the electric field generated is upward, that is, the cold end points to the hot end; for N-type semiconductors, the majority carriers are electrons, the minority carriers are holes, and the electrons accumulate at the cold end. The direction of the electric field generated is upward, that is, the hot end points to the cold end. At this time, the P-type semiconductor and the N-type semiconductor in the thermoelectric arm are connected in series through the connecting electrode, and the generated electromotive force is superimposed and increased. The temperature difference between the hot end and the cold end is positively correlated with the magnitude of the electromotive force, and is also related to the specific materials of the P-type semiconductor and the N-type semiconductor.

[0047] It is easy to understand that different thermoelectric materials have different abilities to generate electromotive force due to temperature difference, and the Seebeck coefficient is a parameter used to measure this ability. The Seebeck coefficient can be positive or negative, and the positive or negative of the Seebeck coefficient is related to the positive or negative of the generated electromotive force. For example, the electromotive force generated by the temperature difference of a P-type semiconductor points from the cold end to the hot end, and the corresponding Seebeck coefficient is positive; the electromotive force generated by the temperature difference of an N-type semiconductor points from the hot end to the cold end, and the corresponding Seebeck coefficient is negative.

[0048] See also Figure 6 , and combined with Figure 2 The first thermoelectric component 132 and the second thermoelectric component 133 respectively penetrate the chip package 100, and a first dielectric layer 142 is provided between the first thermoelectric component 132 and the first through silicon vias 111 and 121, and a first dielectric layer 142 is also provided between the second thermoelectric component 133 and the second through silicon vias 112 and 122. The first thermoelectric component 132 and the second thermoelectric component 133 are connected on the upper side of the chip package 100 through the first connecting electrode 131, that is, the first connecting electrode 131 connects the ends of the first thermoelectric component 132 and the second thermoelectric component 133 on the same side of the adjacent first chip 110 and the second chip 120, thereby forming a thermoelectric arm. The first thermoelectric component 132 and the second thermoelectric component 133 are respectively connected to the two first conductive wires 134a and 134b on the lower side of the chip package 100, that is, the first thermoelectric component 132 and the second thermoelectric component 133 are respectively connected to the two first conductive wires 134a and 134b at one end on the other side of the adjacent first chip 110 and the second chip 120.

[0049] Figure 6 yes Figure 2 The cross-sectional view of the chip package along the AA direction is as follows: Figure 6 As shown, the first thermoelectric component 132 includes first detection parts 1321a and 1321b, and the first detection parts 1321a and 1321b are thermoelectric materials. The first detection part 1321a is arranged in the first silicon via 111, and the first detection part 1321b is arranged in the first silicon via 121. The thermoelectric materials used in the first detection part 1321a and the first detection part 1321b may be the same or different, but it should be understood that the positive and negative Seebeck coefficients of the thermoelectric materials used in the first detection part 1321a and the first detection part 1321b should be the same.

[0050] The second thermoelectric component 133 includes second detection parts 1331a and 1331b, which are also thermoelectric materials. The second detection part 1331a is arranged in the second silicon via 112, and the second detection part 1331b is arranged in the second silicon via 122. The thermoelectric materials used in the second detection parts 1331a and 1331b may be the same or different, but it should be understood that the positive and negative Seebeck coefficients of the thermoelectric materials used in the second detection parts 1331a and 1331b should be the same.

[0051] In addition, since the first thermoelectric assembly 132 is connected to the second thermoelectric assembly 133 through the first connecting electrode 131, in order to avoid the electromotive force generated by the first thermoelectric assembly 132 and the second thermoelectric assembly 133 from canceling each other, the first detection part 1321a, 1321b and the second detection part 1331a, 1331b use materials with opposite positive and negative Seebeck coefficients, for example, the Seebeck coefficients of the first detection parts 1321a, 1321b are positive, and the Seebeck coefficients of the second detection parts 1331a, 1331b are negative. As a result, the electromotive force generated by the first thermoelectric assembly 132 and the second thermoelectric assembly 133 are opposite, so that they are superimposed and increased.

[0052] In the embodiment of the present application, by setting the first temperature sensing unit 130 in the chip package 100, the first thermoelectric component 132 and the second thermoelectric component 133 of the first temperature sensing unit 130 penetrate at least two adjacent chips of the chip package 100, and the first connecting electrode 131 connects one end of the first thermoelectric component 132 and the second thermoelectric component 133, thereby forming a thermoelectric arm. By sensing the electromotive force generated by the thermoelectric arm, the temperature at the location of the first connecting electrode 131 of the thermoelectric arm can be obtained, so that the temperature at a specific position in the chip can be obtained.

[0053] The location of the first connection electrode 131 can be determined according to the location where the temperature needs to be measured in the chip package 100. For example, the first connection electrode 131 can be arranged above the active layer of the chip and in contact with the active layer, that is, the first electrode 131 is arranged in the interconnection layer of the chip, in which case the first connection electrode 131 can be formed simultaneously with the metal wire in the interconnection layer; the first connection electrode 131 can also be arranged above the interconnection layer and in contact with the interconnection layer, in which case the first connection electrode 131 needs to be formed separately after the interconnection layer is formed.

[0054] In some embodiments, the first detection portion 1321 a and the first detection portion 1321 b may be connected via a connection structure 1322 , and the second detection portion 1331 a and the second detection portion 1331 b may be connected via a connection structure 1332 .

[0055] During the preparation process, a first through silicon via 111 and a second through silicon via 112 may be formed on the first chip 110, and a first dielectric layer 142 may be formed on the inner sidewalls of the first through silicon via 111 and the second through silicon via 112. The first dielectric layer 142 is an insulating material. A suitable process may be used according to the material of the first dielectric layer 142. For example, when the first dielectric layer 142 is SiO2, it may be formed by directly oxidizing the sidewalls of the through silicon via after forming the through silicon via. The first dielectric layer 142 may also be formed by a deposition process.

[0056] After forming the first dielectric layer 142, corresponding thermoelectric materials can be formed in the first through silicon via 111 and the second through silicon via 112 respectively through a deposition process. For example, a thermoelectric material is formed in the first through silicon via 111 through an ALD (Atomic Layer Deposition) process, and another thermoelectric material is formed in the second through silicon via 112 through an ALD process, and the two thermoelectric materials are different. The thermoelectric materials in the first through silicon via 111 and the second through silicon via 112 form a first detection portion 1321a and a second detection portion 1331a respectively. It is easy to understand that the formed thermoelectric material fills the corresponding through silicon via, and the shape of the thermoelectric material is the same as the shape of the through silicon via, that is, the shape of the through silicon via determines the shape of the thermoelectric material. Figure 7 , is a schematic diagram of a three-dimensional structure after a first dielectric layer 142 and a thermoelectric material 141 are formed in a through silicon via, wherein the first dielectric layer 142 is disposed around the thermoelectric material 141 , and the first dielectric layer 142 is in contact with the thermoelectric material 141 .

[0057] A first through silicon via 121 and a second through silicon via 122 may be formed on the second chip 120 by a similar method, and a first detection portion 1321b and a second detection portion 1331b may be formed in the second through silicon via 121 and the second through silicon via 122, as well as a first dielectric layer 142 between the first through silicon via 121 and the first detection portion 1321b, and between the second through silicon via 122 and the second detection portion 1331b.

[0058] In some embodiments, after the thermoelectric material is formed, a planarization process may be performed to make the thermoelectric material flush with the surface of the chip.

[0059] Then, connection structures 1322 and 1332 may be formed on the upper surface of the second chip 120 . The connection structure 1322 is located on and connected to the first detection portion 1321 b , and the connection structure 1332 is located on and connected to the second detection portion 1331 b .

[0060] The connection structure 1322 can use the same or different thermoelectric material as the first detection parts 1321a and 1321b, but the Seebeck coefficients of the thermoelectric materials used in the connection structure 1322 and the first detection parts 1321a and 1321b should be the same. For example, the connection structure 1322 and the first detection part 1321a both use P-type semiconductor materials.

[0061] The connection structure 1332 may be made of the same or different thermoelectric material as the second detection parts 1331a and 1331b, but the Seebeck coefficients of the thermoelectric materials used in the connection structure 1332 and the second detection parts 1331a and 1331b should be the same. For example, the connection structure 1332 and the second detection part 1331a both use N-type semiconductor materials.

[0062] After forming the connection structures 1322 and 1332, the first chip 110 and the second chip 120 can be bonded after applying an adhesive on the second chip 120. After bonding, the adhesive forms a bonding layer 190. The connection structure 1322 connects the first detection parts 1321a and 1321b, and the connection structure 1332 connects the second detection part 1331a and the second detection part 1331b. At this time, the connection structure 1322 is embedded in the bonding layer 190.

[0063] In some embodiments, connection structures 1322 , 1332 and a bonding layer 190 may also be formed on the lower surface of the first chip 110 .

[0064] In some embodiments, a portion of the connection structure may be formed on the lower surface of the first chip 110 and the upper surface of the second chip 120, respectively. The portion of the connection structure formed on the lower surface of the first chip 110 and the portion of the connection structure formed on the upper surface of the second chip 120 are bonded together through a bonding process to form connection structures 1322 and 1332.

[0065] In some embodiments, the connection structures 1322 and 1332 may be made of metal materials. In this case, the connection structures 1322 and 1332 may also be formed in the same manner as the thermoelectric materials described above, that is, the connection structures 1322 and 1332 may be directly formed on the second chip 120 or the first chip 110, or may be in two parts and formed on the lower surface of the first chip 110 and the upper surface of the second chip 120, respectively, and then the two parts are bonded to form the connection structures 1322 and 1332. The two parts may be bonded by a eutectic bonding process. For example, when the metal material is copper, Cu-Cu hot pressing bonding may be used, that is, copper atoms between the bonding surfaces of the two parts are fully diffused and finally integrated to achieve bonding. At this time, adhesive may not be used. After bonding, the connection structures 1322 and 1332 space the first chip 110 and the second chip 120 by a certain distance, that is, a gap is formed between the first chip 110 and the second chip 120. The connection structures 1322 and 1332 pass through the gap to connect the first detection parts 1321a and 1321b and the second detection parts 1331a and 1331b of the first chip 110 and the second chip 120 respectively. The thickness of the gap may be considered as the thickness of the bonding layer 190. It is easy to understand that in order to facilitate the formation of metal or prevent metal diffusion, a seed layer and a barrier layer may be formed before forming the connection structures 1322 and 1332 or parts of the connection structures 1322 and 1332.

[0066] In some embodiments, the first detection portion 1321a and the first detection portion 1321b, and the second detection portion 1331a and the second detection portion 1331b may be directly connected without providing the connection structure 1322, 1332. That is, after the first detection portion 1321a and the first detection portion 1321b are formed in the first through silicon via 111 and the first through silicon via 121, and the second detection portion 1331a and the second detection portion 1331b are formed in the second through silicon via 112 and the second through silicon via 122, respectively, the first detection portion 1321a and the first detection portion 1321b, and the second detection portion 1331a and the second detection portion 1331b are connected by direct bonding.

[0067] The two first conductive wires 134a and 134b are respectively connected to the first thermoelectric component 132 and the second thermoelectric component 133, and the first conductive wires 134a and 134b are arranged on the lower surface of the second chip 120. The first conductive wires 134a and 134b can be formed by a process for forming a redistribution layer. The first conductive wires 134a and 134b can be connected to a measurement circuit (not shown in the figure) or directly connected to a related temperature control device.

[0068] In stacked packages, through silicon vias in the chips are used for metal interconnection. In order to achieve metal interconnection through through silicon vias, in some embodiments, such as Figure 8As shown, in the through silicon via, not only the thermoelectric material 141 forming the first detection part or the second detection part is arranged, but also the metal material is arranged outside the thermoelectric material 141, thereby realizing the temperature measurement and information transmission functions at the same time. For example, the first detection part or the second detection part is arranged in the first chip 110, and the conductive layer 143 is arranged outside the first detection part or the second detection part. When the first chip 110 includes a rewiring layer, the conductive layer 143 is connected to the rewiring layer, so that information transmission with the first chip 110 can be realized through the conductive layer 143.

[0069] The above-mentioned rewiring layer refers to a film layer composed of an insulating layer and a metal used to form wiring on the chip, so that the IO (Input / Output) pads of the chip can be freely redistributed to a position suitable for bonding with external circuit leads.

[0070] Specifically, a conductive layer 143 is provided between the thermoelectric material 141 and the first dielectric layer 142. The material of the conductive layer 143 can be a conductive material commonly used in semiconductor processes, such as metal materials such as copper, tin, tungsten, or materials such as polysilicon. Similarly, a second dielectric layer 144 is formed between the conductive layer 143 and the thermoelectric material 141 (i.e., the first detection portion or the second detection portion). The second dielectric layer 144 can be formed by a deposition process, such as an ALD process. Correspondingly, the connection structures 1322 and 1332 are also respectively provided with a portion connecting the thermoelectric material 141 and the conductive layer 143 and a dielectric layer that insulates each portion.

[0071] As can be seen from the above records, the electromotive force generated by the temperature difference of the thermoelectric material is related to the type of majority carriers. The electromotive force is generated by the movement of the majority carriers, and electrons are easier to move than holes. Therefore, in the thermoelectric arm, when the difference between the first thermoelectric component 132 and the second thermoelectric component 133 is only the positive and negative Seebeck coefficients of the thermoelectric materials used, for example, the thermoelectric material used in the first thermoelectric component 132 is a P-type semiconductor material, and the thermoelectric material used in the second thermoelectric component 133 is an N-type semiconductor material, then the majority carriers of the first thermoelectric component 132 are holes, and the majority carriers of the second thermoelectric component 133 are electrons. At this time, the electromotive force generated by the first thermoelectric component 132 is greater than that of the second thermoelectric component 133, that is, there is a difference in the electromotive force generated on both sides of the first connecting electrode 131. When the electromotive forces generated by the first thermoelectric component 132 and the second thermoelectric component 133 are as equal as possible, it is beneficial to improve the temperature detection accuracy. To this end, in some embodiments, when the Seebeck coefficient of the thermoelectric material used in the first thermoelectric assembly 132 is positive and the Seebeck coefficient of the thermoelectric material used in the second thermoelectric assembly 133 is negative, the cross-sectional area of ​​the first thermoelectric assembly 132 parallel to the chip can be made larger than the cross-sectional area of ​​the second thermoelectric assembly 133 parallel to the chip. Thus, the number of holes flowing in the first thermoelectric assembly 132 can be increased, thereby reducing the difference between the electromotive force generated by the first thermoelectric assembly 132 and the electromotive force generated by the second thermoelectric assembly 133.

[0072] In addition, the chip package 100 has a thickness direction (ie, a stacking direction of multiple chips, see Fig. 9 The temperature difference in the vertical direction (in the vertical direction) may be small, and the electromotive force generated by a single first temperature sensing unit 130 is also small, which is not conducive to measurement by the measurement circuit. Therefore, in some embodiments, multiple first temperature sensing units 130 can be connected in series.

[0073] The two first temperature sensing units 130 are connected in series for illustration. Fig. 9As shown, the chip package 100 includes two first temperature sensing units 130A and 130B, which are arranged adjacent to each other and penetrate the adjacent first chip 110 and second chip 120 arranged in a stack. The first conductive wire 134b connected to the lower end of the second thermoelectric component 133 of the first temperature sensing unit 130A is connected to the first conductive wire 134a connected to the lower end of the first thermoelectric component 132 of the first temperature sensing unit 130B through the conductive wire 134c. It is easy to understand that the second thermoelectric component 133 of the first temperature sensing unit 130A can also be directly connected to the first thermoelectric component 132 of the first temperature sensing unit 130B through the conductive wire 134c. It is easy to understand that in order to measure the electromotive force generated by the first temperature sensing units 130A and 130B connected in series, the first conductive wire 134a connected to the lower end of the first thermoelectric component 132 of the first temperature sensing unit 130A and the first conductive wire 134b connected to the lower end of the second thermoelectric component 133 of the first temperature sensing unit 130B are also connected to the two ends of the measuring circuit respectively.

[0074] In some embodiments, the number of chips through which the first thermoelectric component 132 and the second thermoelectric component 133 of the first temperature sensing unit 130 penetrate adjacently arranged chips may also be greater than two, that is, the difference between these embodiments and the aforementioned embodiments is only the number of chips through which the first thermoelectric component 132 and the second thermoelectric component 133 penetrate, and the arrangement of other connection structures and the like is the same or similar to the aforementioned embodiments. Fig.10 As shown, the first thermoelectric component 132 and the second thermoelectric component 133 of the first temperature sensing unit 130 penetrate the second chip 120 , the first chip 110 and the third chip 160 that are adjacently arranged.

[0075] Furthermore, in order to construct a three-dimensional sensing network, in some embodiments, a plurality of first temperature sensing units 130 may be provided in the chip package 100, and the connection electrodes of the plurality of first temperature sensing units 130 may be provided on the upper surfaces of different chips, for example, Fig.10 As shown, a first connection electrode of a first temperature sensing unit 130 is disposed on the upper surface of the first chip 110, and a first connection electrode of another first temperature sensing unit 130 is disposed on the upper surface of the third chip 160. It can be understood that the connection electrodes of several first temperature sensing units 130 among the plurality of first temperature sensing units 130 can also be disposed at different positions on the surface of the same chip to measure the temperature at different positions of the same chip.

[0076] In some embodiments, the first conductive wires 134a and 134b respectively corresponding to the plurality of first temperature sensing units 130 provided in the chip package 100 may be provided on the same chip. For example, the first conductive wires 134a and 134b respectively corresponding to the plurality of first temperature sensing units 130 are provided on the lower surface of the second chip 120. Thus, when forming the first conductive wires 134a and 134b respectively corresponding to the plurality of first temperature sensing units 130, the same process may be used to form them, thereby saving manufacturing costs.

[0077] In addition, when the first conductive lines 134a and 134b of the plurality of first temperature sensing units 130 are arranged on the same chip surface, it is also convenient to connect the plurality of first temperature sensing units 130 to the same measurement circuit 170. The measurement circuit 170 can be used to convert the electromotive force information obtained by the temperature sensing unit into temperature information. The measurement circuit 170 can be arranged on any chip or outside the package 100.

[0078] Fig.10 In the embodiment, the first conductive lines 134a and 134b corresponding to the two first temperature sensing units 130 are both arranged on the surface of the second chip 120, and the measuring circuit 170 is arranged on the other surface of the second chip 120. In order to connect the two first temperature sensing units 130 with the measuring circuit 170, it is only necessary to arrange a silicon through hole (not shown in the figure) for transmitting a signal on the second chip 120. It is easy to understand that at this time, the following can be used: Figure 8 In addition, if the measurement circuit 170 and the first conductive wires 134a and 134b corresponding to the two first temperature sensing units 130 are respectively arranged on the same surface of the second chip 120, in this case, there is no need to arrange the silicon vias for transmitting signals.

[0079] Please continue to see Fig.10 In some embodiments, a second temperature sensing unit 150 is further provided in the chip package 100. The second temperature sensing unit 150 includes a second connecting electrode 151, a third thermoelectric component 152, a fourth thermoelectric component 153 and two second conductive wires 154a and 154b. The third thermoelectric component 152 and the fourth thermoelectric component 153 only pass through one chip. Fig.10The third thermoelectric component 152 and the fourth thermoelectric component 153 passing through the first chip 110 are used as an example for illustration. The second connecting electrode 151 connects the third thermoelectric component 152 and the fourth thermoelectric component 153 at one end on the same side of the first chip 110, and the third thermoelectric component 152 and the fourth thermoelectric component 153 at one end on the other side of the first chip 110 are respectively connected to two second conductive wires 154a and 154b. The electromotive force generated by the third thermoelectric component 152 is opposite to that of the fourth thermoelectric component 153. The difference between the second temperature sensing unit 150 and the first temperature sensing unit 130 is only the number of chips through which the thermoelectric component passes. The thermoelectric component of the second temperature sensing unit 150 only passes through one chip. Therefore, the second temperature sensing unit 150 does not need to be provided with a connection structure. Other settings of the second temperature sensing unit 150 may be the same as those of the first temperature sensing unit 130, and will not be repeated in this application.

[0080] In some embodiments, a plurality of second temperature sensing units 150 are provided in the chip package 100, and the plurality of second temperature sensing units 150 can be used to detect the temperature at different positions of the chip. It can be known from the aforementioned temperature measurement principle that when measuring the temperature through thermoelectric materials, the temperature difference between the hot end and the cold end is calculated by the electromotive force generated between the hot end and the cold end, that is, it measures the relative temperature, not the absolute temperature. Therefore, in order to measure the absolute temperature, it is also necessary to obtain the absolute temperature of the cold end. When there are a plurality of second temperature sensing units 150, in order to obtain the absolute temperature, it is necessary to obtain the absolute temperature of one end of the second conductive connection line of each second temperature sensing unit 150. And to obtain the absolute temperature of one end of the second conductive connection line of the second temperature sensing unit 150, it is necessary to set a corresponding temperature measuring device to measure the temperature of the position.

[0081] In some embodiments, one end of the second conductive line of one second temperature sensing unit 150 may be close to one end of the connecting electrode of another second temperature sensing unit 150. Fig.10As shown, two second temperature sensing units 150 are arranged in the chip package 100, and the two second temperature sensing units 150 are respectively arranged in two adjacent chips. Specifically, one second temperature sensing unit 150 is arranged in the first chip 110, and the other second temperature sensing unit 150 is arranged in the second chip 120, and the second conductive lines 154a and 154b of the second temperature sensing unit 150 arranged in the first chip 110 are close to the second connecting electrode 151 of the second temperature sensing unit 150 in the second chip 120. For example, the second temperature sensing unit 150 in the first chip 110 is close to the second connecting electrode 151 of the second temperature sensing unit 150 in the second chip 120. The distance between the second conductive lines 154a, 154b of the second temperature sensing unit 150 and the second connection electrode 151 of the second temperature sensing unit 150 in the second chip 120 in a direction parallel to the first chip 110 or the second chip 120 is less than or equal to 1 mm, that is, in the orthographic projection onto the reference plane, the distance between the second conductive lines 154a, 154b of the second temperature sensing unit 150 in the first chip 110 and the second connection electrode 151 of the second temperature sensing unit 150 in the second chip 120 is less than or equal to 1 mm, and the reference plane is a plane parallel to the first chip 110 or the second chip 120.

[0082] Since the second conductive lines 154a, 154b of the second temperature sensing unit 150 in the first chip 110 are close to the second connection electrode 151 of the second temperature sensing unit 150 in the second chip 120, it can be considered that the temperature of the second conductive lines 154a, 154b of the second temperature sensing unit 150 in the first chip 110 is the same as the temperature of the second connection electrode 151 of the second temperature sensing unit 150 in the second chip 120, that is, the temperature of one end of the second temperature sensing unit 150 in the first chip 110 is equal to the temperature of one end of the second temperature sensing unit 150 in the second chip 120. Thus, the number of temperature measuring devices for obtaining the absolute temperature of one end of the second temperature sensing unit 150 can be reduced.

[0083] By disposing the first temperature sensing unit 130 and / or the second temperature sensing unit 150 in the chip package 100, a three-dimensional temperature sensing network can be constructed inside the chip package 100, which is beneficial to controlling the chip temperature and improving the chip performance.

[0084] The above are only specific implementations of the present application, but the protection scope of the application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A chip package, characterized in that: include: A plurality of stacked chips and a first temperature sensing unit, wherein the first temperature sensing unit comprises a first connecting electrode, a first thermoelectric component, a second thermoelectric component and two first conductive wires, wherein the first thermoelectric component and the second thermoelectric component penetrate at least two adjacent chips, wherein the first connecting electrode connects one end of the first thermoelectric component and the second thermoelectric component located on the same side of the at least two adjacent chips, and one end of the first thermoelectric component and the second thermoelectric component located on the other side of the at least two adjacent chips is respectively connected to the two first conductive wires; The first thermoelectric component and the second thermoelectric component generate opposite electromotive forces.

2. The chip package according to claim 1, wherein: Each of the at least two chips through which the first thermoelectric component and the second thermoelectric component penetrate is provided with a first through silicon via and a second through silicon via; The first thermoelectric component includes a first detection portion penetrating the first through silicon via, and the second thermoelectric component includes a second detection portion penetrating the second through silicon via. The types of thermoelectric materials of the first detection portion and the second detection portion are opposite.

3. The chip package according to claim 2, wherein: Among the at least two first detection parts included in the first thermoelectric assembly, adjacent first detection parts are directly connected; Among the at least two second detection parts included in the second thermoelectric assembly, adjacent second detection parts are directly connected.

4. The chip package according to claim 2, wherein: The first thermoelectric assembly further includes a first connection structure, and adjacent first detection parts of at least two first detection parts included in the first thermoelectric assembly are connected via the first connection structure; The second thermoelectric assembly further includes a second connection structure, and adjacent second detection parts of at least two second detection parts included in the second thermoelectric assembly are connected via the second connection structure; The materials of the first connection structure and the second connection structure include at least one of metal and thermoelectric material.

5. The chip package according to claim 4, wherein: The chip package further includes a bonding layer disposed between adjacent chips among the plurality of chips, and the first connection structure and the second connection structure are embedded in the bonding layer.

6. The chip package according to claim 2, wherein: A first dielectric layer is disposed between the first detection portion and the first through silicon via, and between the second detection portion and the second through silicon via.

7. The chip package according to any one of claims 2 to 6, characterized in that: A conductive layer is disposed between the first detection portion and the first through silicon via, and between the second detection portion and the second through silicon via; A second dielectric layer is disposed between the first detection portion and the conductive layer in the same first through silicon via, and between the second detection portion and the conductive layer in the same second through silicon via.

8. The chip package according to claim 7, wherein: The chip where the conductive layer is located includes a rewiring layer, and the conductive layer is connected to the rewiring layer.

9. The chip package according to any one of claims 1 to 8, wherein: The Seebeck coefficient of the first thermoelectric component is positive, the Seebeck coefficient of the second thermoelectric component is negative, and the cross-sectional area of ​​the first thermoelectric component parallel to the chip is greater than the cross-sectional area of ​​the second thermoelectric component parallel to the chip.

10. The chip package according to any one of claims 1 to 9, wherein: The chip package includes a plurality of the first temperature sensing units, the chips penetrated by the plurality of the first temperature sensing units are not completely the same, and the first conductive lines of the plurality of the first temperature sensing units are arranged on the same surface of the same chip.

11. The chip package according to claim 10, wherein: The chip package further includes at least one measuring circuit, and the first conductive lines of the plurality of first temperature sensing units are connected to the same measuring circuit.

12. The chip package according to any one of claims 1 to 11, characterized in that: The chip package also includes a second temperature sensing unit, which includes a second connecting electrode, a third thermoelectric component, a fourth thermoelectric component and two second conductive wires, wherein the third thermoelectric component and the fourth thermoelectric component penetrate a chip, the second connecting electrode connects the third thermoelectric component and the fourth thermoelectric component at one end on the same side of the chip, and the third thermoelectric component and the fourth thermoelectric component at one end on the other side of the chip are respectively connected to the two second conductive wires; The third thermoelectric assembly generates an electromotive force opposite to that generated by the fourth thermoelectric assembly.

13. The chip package according to claim 12, wherein: The multiple chips include an adjacent first chip and a second chip, the first chip and the second chip are both provided with the second temperature sensing unit, and the distance between the second conductive line of the second temperature sensing unit provided in the first chip and the second connecting electrode of the second temperature sensing unit provided in the second chip in a direction parallel to the chips is less than or equal to 1 mm.

14. An electronic device, characterized in that: The invention comprises a chip package and a printed circuit board as claimed in any one of claims 1 to 13, wherein the chip package is connected to the printed circuit board.

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