Ultra-wideband temperature compensation attenuator circuit

Abstract

The invention relates to the technical field of radio frequency microwave circuits, and discloses an ultra-wideband temperature compensation attenuator circuit which comprises a clamping circuit, a differential amplification circuit and an attenuation circuit. The clamping circuit adopts a clamping diode to suppress power supply voltage fluctuation so as to limit the amplitude range of the input voltage of the differential amplification circuit; the differential amplification circuit adopts a temperature compensation diode to generate temperature-related voltage, compares the temperature-related voltage with reference voltage, then performs differential amplification, and outputs temperature-related differential voltage; the attenuation circuit switches the working state according to the differential voltage related to the temperature so as to carry out linear adjustment and temperature compensation on the signal attenuation amount. Through the collaborative design of introducing the differential amplification circuit and the attenuation circuit, automatic adjustment can be carried out according to the change of the environment temperature, and the stable attenuation characteristic is maintained all the time.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency microwave circuits, and in particular to an ultra-wideband temperature compensation attenuator circuit used in ultra-wideband communication, radar, electronic countermeasure and other systems. Background Art

[0002] In today's RF microwave technology field, with the rapid development of communication, radar, electronic countermeasures and other technologies, the performance requirements of RF systems are increasing. As a key component in the RF system, the attenuator is used to accurately adjust the signal strength to ensure that the system can operate stably under different working conditions. However, traditional temperature compensated attenuators have exposed many problems in practical applications, which seriously limit the further improvement of RF system performance.

[0003] Traditional temperature-compensated attenuators have obvious deficiencies in temperature compensation. In a wide temperature range working environment, such as -55°C to +125°C, the attenuation compensation of traditional temperature-compensated attenuators is limited, and it is impossible to achieve precise control of signal attenuation, resulting in unstable signal attenuation characteristics, which in turn affects the overall performance of the system. This is a key issue that needs to be solved in application scenarios that require extremely high signal stability, such as high-precision radar detection and long-distance communication.

[0004] In addition, the circuit design of traditional temperature-compensated attenuators is sensitive to process batch fluctuations. In the actual production process, due to certain differences in the parameters of components in different batches, this will cause large fluctuations in the performance of traditional temperature-compensated attenuators, and the consistency of mass production of products cannot be guaranteed. This not only increases production costs, but also reduces product reliability and stability, bringing great difficulties to large-scale production and application.

[0005] Furthermore, the frequency response characteristics of traditional temperature-compensated attenuators are difficult to meet the requirements of modern ultra-wideband technology. Ultra-wideband technology requires attenuators to maintain good attenuation characteristics consistency over a very wide frequency range, but traditionally designed attenuators often cannot achieve this goal within a wide frequency band, and are prone to signal distortion, interference and other problems, which seriously affects the application effect of ultra-wideband technology.

[0006] In summary, the shortcomings of the existing traditional temperature-compensated attenuators in terms of temperature compensation performance, sensitivity to process batch fluctuations, and frequency response characteristics can no longer meet the needs of modern high-performance RF systems. Therefore, the development of a new temperature-compensated attenuator circuit that can achieve large attenuation compensation in a wide temperature range, is insensitive to process batch fluctuations, ensures mass production consistency, and has good attenuation characteristics in an ultra-wideband frequency range has become a research hotspot and a key issue that needs to be solved in the current field of RF microwave technology. Summary of the invention

[0007] In view of the above-mentioned deficiencies in the prior art, the present invention provides an ultra-wideband temperature compensation attenuator circuit.

[0008] In order to achieve the above-mentioned object of the invention, the technical solution adopted by the present invention is: An ultra-wideband temperature-compensated attenuator circuit comprises a clamping circuit, a differential amplifier circuit and an attenuation circuit; the clamping circuit adopts a clamping diode to suppress power supply voltage fluctuations so as to limit the amplitude range of the input voltage of the differential amplifier circuit; the differential amplifier circuit adopts a temperature-compensating diode to generate a voltage related to temperature, and performs differential amplification after comparing it with a reference voltage, and outputs a differential voltage related to temperature; the attenuation circuit switches the working state according to the differential voltage related to temperature, so as to perform linear regulation and temperature compensation on the signal attenuation.

[0009] In an optional embodiment, the clamping circuit includes a current limiting resistor, a first diode, a second diode and a third diode; one end of the current limiting resistor is an input end of the clamping circuit, which is connected to the power supply voltage; the other end of the current limiting resistor is an output end of the clamping circuit, which is connected to the differential amplifier circuit; the first diode, the second diode and the third diode are connected in series in sequence, and the cathode of the first diode is connected to the other end of the current limiting resistor, and the anode of the third diode is grounded.

[0010] In an optional embodiment, the differential amplifier circuit includes a first transistor, a second transistor and a third transistor; the gate of the first transistor is the input end of the differential amplifier circuit and is connected to the output end of the clamp circuit; the source of the first transistor is connected to the drain of the second transistor and the drain of the third transistor; the drain of the first transistor is connected to one end of the first resistor, and the other end of the first resistor is connected to the gate of the second transistor and the gate of the third transistor through the second resistor and the third resistor respectively; the gate of the second transistor is grounded through a fourth diode, a fifth diode and a sixth diode connected in series in sequence; the gate of the third transistor is grounded through a fourth resistor; the source of the second transistor is the first output end of the differential amplifier circuit, and the source of the third transistor is the second output end of the differential amplifier circuit.

[0011] In an optional implementation, the source of the second transistor is grounded via a fifth resistor, and the source of the third transistor is grounded via a sixth resistor.

[0012] In an optional implementation, the first transistor, the second transistor and the third transistor are depletion-type field effect transistors.

[0013] In an optional embodiment, the attenuation circuit includes a fourth transistor, a fifth transistor and a sixth transistor; the gate of the fourth transistor is connected to the first output terminal of the differential amplifier circuit, the drain of the fourth transistor is connected to the drain of the fifth transistor, the source of the fourth transistor is connected to the drain of the sixth transistor, and the drain of the fifth transistor is connected to the drain of the sixth transistor through a seventh resistor; the gate of the fifth transistor is connected to the second output terminal of the differential amplifier circuit, and the source of the fifth transistor is grounded through an eighth resistor; the gate of the sixth transistor is connected to the second output terminal of the differential amplifier circuit, and the source of the sixth transistor is grounded through a ninth resistor.

[0014] In an optional implementation, the gate of the fourth transistor is connected to the first output terminal of the differential amplifier circuit through a tenth resistor, the gate of the fifth transistor is connected to the second output terminal of the differential amplifier circuit through an eleventh resistor, and the gate of the sixth transistor is connected to the second output terminal of the differential amplifier circuit through a twelfth resistor.

[0015] The present invention has the following beneficial effects: 1. The ultra-wideband temperature compensated attenuator circuit of the present invention can cover an ultra-wide frequency band from 0.1 GHz to 20 GHz, ensuring that the circuit works stably under high frequency and broadband conditions and maintains excellent performance indicators.

[0016] 2. The present invention introduces the collaborative design of the differential amplifier circuit and the attenuation circuit, which can automatically adjust according to the change of ambient temperature and always maintain a stable attenuation characteristic. In the scenario of large temperature fluctuation, the consistency of signal attenuation can still be guaranteed, significantly improving the reliability of the RF link.

[0017] 3. Different from the traditional complex compensation network, the present invention realizes the high optimization of the circuit structure through the organic combination of the differential amplifier circuit and the attenuation circuit, which not only simplifies the design, but also reduces the power consumption and greatly improves the reliability and practicability of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 This is a schematic diagram of the ultra-wideband temperature compensation attenuator circuit of the present invention.

[0019] Figure 2 The insertion loss simulation results of the present invention under different temperature conditions are shown.

[0020] Figure 3 These are the insertion loss simulation results of the present invention at three temperatures when the VEE voltage changes. DETAILED DESCRIPTION

[0021] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0022] like Figure 1 As shown, an ultra-wideband temperature compensated attenuator circuit provided by an embodiment of the present invention includes a clamping circuit, a differential amplifier circuit and an attenuation circuit; the clamping circuit adopts a clamping diode to suppress power supply voltage fluctuations to limit the amplitude range of the input voltage of the differential amplifier circuit; the differential amplifier circuit adopts a temperature compensation diode to generate a temperature-related voltage, and performs differential amplification after comparing it with a reference voltage, and outputs a temperature-related differential voltage; the attenuation circuit switches the working state according to the temperature-related differential voltage to perform linear adjustment and temperature compensation on the signal attenuation.

[0023] This embodiment effectively suppresses the fluctuation of VEE voltage through the clamping circuit, prevents the voltage fluctuation from having an adverse effect on the performance of the subsequent temperature compensation circuit, provides a stable working voltage environment for the entire circuit, and ensures the stable operation of the circuit; then, the differential amplifier circuit uses the temperature characteristics of the diode to generate a temperature-related voltage, and the differential amplifier output drives the differential voltage of the attenuation circuit, thereby reducing the impact of process batch fluctuations on circuit performance by virtue of the common-mode suppression characteristics; finally, the attenuation circuit, driven by the differential voltage, can flexibly switch different working states according to temperature changes, realize the temperature compensation characteristics of low insertion loss at high temperature and high insertion loss at low temperature, and then effectively compensate for the high and low temperature gain fluctuations of the amplifier chip or the multi-function chip.

[0024] This embodiment has low power consumption characteristics through overall circuit design optimization, and can maintain consistency in signal attenuation even in an environment with large temperature fluctuations. It is suitable for high-frequency communications, radars and other fields that have high requirements for signal stability and accuracy.

[0025] In an optional embodiment of the present invention, the clamping circuit includes a current limiting resistor R0, a first diode D1, a second diode D2 and a third diode D3; one end of the current limiting resistor R0 is an input end of the clamping circuit, connected to a power supply voltage VEE; the other end of the current limiting resistor R0 is an output end of the clamping circuit, connected to a differential amplifier circuit; the first diode D1, the second diode D2 and the third diode D3 are connected in series in sequence, and the cathode of the first diode D1 is connected to the other end of the current limiting resistor R0, and the anode of the third diode D3 is grounded.

[0026] In this embodiment, the nonlinear temperature characteristic of a single tube is converted into an approximately linear superposition by using three-stage diode series connection to solve the problem that the traditional single tube clamp has a nonlinear voltage drop in a wide temperature range, which causes the bias drift of the subsequent circuit. This makes the change with temperature smoother. The linearity of the temperature coefficient is improved by multiple stages in series connection, making the temperature compensation more accurate.

[0027] This embodiment adopts a specific structure of three-stage diode series + current limiting resistor, in which the reverse leakage current of the diode increases exponentially with the temperature rise, forms a negative feedback path through the current limiting resistor R0, and realizes dynamic voltage adjustment through the temperature-current characteristic, thereby offsetting the VEE voltage fluctuation; and the current limiting resistor R0 and the diode junction capacitance constitute a low-pass filter, which can filter out the high-frequency ripple of the VEE power supply. The clamping circuit of this embodiment effectively suppresses the fluctuation of the VEE voltage through the voltage clamping characteristics of the diode, limits the amplitude range of the input voltage, prevents the input signal from being too high or too low to cause damage to the subsequent circuit, provides a stable input voltage environment for the entire circuit, and protects the normal operation of the subsequent circuit.

[0028] In an optional embodiment of the present invention, the differential amplifier circuit includes a first transistor T1, a second transistor T2 and a third transistor T3; the gate of the first transistor T1 is the input end of the differential amplifier circuit, and is connected to the output end of the clamp circuit; the source of the first transistor T1 is connected to the drain of the second transistor T2 and the drain of the third transistor T3; the drain of the first transistor T1 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the gate of the second transistor T2 and the gate of the third transistor T3 through the second resistor R2 and the third resistor R3 respectively; the gate of the second transistor T2 is grounded through a fourth diode D4, a fifth diode D5 and a sixth diode D6 connected in series in sequence; the gate of the third transistor T3 is grounded through a fourth resistor R4; the source of the second transistor T2 is the first output end of the differential amplifier circuit, and the source of the third transistor T3 is the second output end of the differential amplifier circuit.

[0029] This embodiment uses a specific structure of dual closed-loop temperature compensation + fast switching FET transistors to solve the problem of transient overshoot caused by delayed response of traditional open-loop temperature compensation circuits; the main compensation loop forms a temperature-voltage conversion core through the fourth diode D4, the fifth diode D5 and the sixth diode D6, detects changes in ambient temperature, and adjusts the attenuation to achieve second-level steady-state compensation; the auxiliary compensation loop introduces VEE feedback through the gate of the first transistor T1 to compensate for power supply voltage drift, achieve real-time monitoring of VEE voltage fluctuations, and perform millisecond-level fast fine-tuning. This embodiment uses the fourth diode D4, the fifth diode D5 and the sixth diode D6 in series to expand the temperature detection sensitivity and provide sufficient adjustment margin for subsequent compensation; and the second resistor R2 and the third resistor R3 form a common-mode feedback path to determine the common-mode rejection ratio.

[0030] In this embodiment, the problem of output drift caused by β value difference of traditional BJT transistor differential pair during process fluctuation is solved. A specific structure of depletion field effect transistor differential pair + three-diode temperature sensor is adopted. The zero-bias conduction characteristic of the depletion field effect transistor adopted by the first transistor T1, the second transistor T2 and the third transistor T3 is utilized to avoid startup failure, and the high gate impedance reduces the sensitivity of process parameters. In addition, the second transistor T2 and the third transistor T3 are arranged in a strictly symmetrical manner, so that the process deviation is suppressed by common mode in the differential output.

[0031] In this embodiment, the source of the second transistor T2 is grounded through the fifth resistor R5, and the source of the third transistor T3 is grounded through the sixth resistor R6. Current negative feedback is introduced through the fifth resistor R5 and the sixth resistor R6 to stabilize the operating point and improve linearity.

[0032] The differential amplifier circuit of this embodiment utilizes the temperature characteristics of the fourth diode D4, the fifth diode D5 and the sixth diode D6, and generates a temperature-dependent diode input voltage V by using the characteristics that the conduction voltage drop varies with temperature. D Voltage V R As the reference terminal voltage, V D The second transistor T2 and the third transistor T3 are depletion-type logic transistors, and the differential amplifier circuit formed by them is V D and V R The voltage difference between the diodes is amplified to output a pair of differential voltages V1 and V2 to drive the attenuation circuit. At high temperatures, as the temperature rises, the conduction voltage drop of the diode decreases, resulting in V D The differential output voltage V1 after amplification by the differential amplifier circuit increases, while V2 decreases. At low temperatures, when the temperature decreases, the conduction voltage drop of the diode increases, resulting in V D The differential output voltage V1 of the differential amplifier circuit decreases, while V2 increases. Through the differential amplifier circuit, the output voltages V1 and V2 can reflect temperature changes in real time, driving the attenuation circuit to make corresponding adjustments. Since the differential circuit has good common-mode rejection characteristics, it can effectively suppress the impact of component parameter changes caused by process batch fluctuations on circuit performance, thereby ensuring the consistency of the circuit in different batches of production. At the same time, by adjusting the differential voltage of the input signal and the related resistance value, the gain of the output signal can also be accurately controlled to suppress the interference of the common-mode signal.

[0033] In an optional embodiment of the present invention, the attenuation circuit includes a fourth transistor M1, a fifth transistor M2 and a sixth transistor M3; the gate of the fourth transistor M1 is connected to the first output terminal of the differential amplifier circuit, the drain of the fourth transistor M1 is connected to the drain of the fifth transistor M2, the source of the fourth transistor M1 is connected to the drain of the sixth transistor M3, and the drain of the fifth transistor M2 is connected to the drain of the sixth transistor M3 through the seventh resistor R7; the gate of the fifth transistor M2 is connected to the second output terminal of the differential amplifier circuit, and the source of the fifth transistor M2 is grounded through the eighth resistor R8; the gate of the sixth transistor M3 is connected to the second output terminal of the differential amplifier circuit, and the source of the sixth transistor M3 is grounded through the ninth resistor R9.

[0034] In this embodiment, in order to solve the problem of signal reflection caused by parasitic capacitance in traditional single-tube switches, a distributed transistor structure is adopted to split the traditional single-stage attenuator into a fourth transistor M1, a fifth transistor M2 and a sixth transistor M3 to form a distributed switch, thereby effectively reducing the influence of parasitic capacitance; wherein the fourth transistor M1 is used as a series switch to control the on and off of the main signal path, the fifth transistor M2 and the sixth transistor M3 are used as parallel switches to form a π-type attenuation network, the seventh resistor R7 determines the minimum insertion loss, and the eighth resistor R8 and the ninth resistor R9 cooperate with the seventh resistor R7 to achieve impedance matching.

[0035] In this embodiment, the gate of the fourth transistor M1 is connected through the tenth resistor R 10 The gate of the fifth transistor M2 is connected to the first output terminal of the differential amplifier circuit through the eleventh resistor R 11 The gate of the sixth transistor M3 is connected to the second output terminal of the differential amplifier circuit through the twelfth resistor R 12 connected to the second output terminal of the differential amplifier circuit; wherein the tenth resistor R 10 11th resistor R 11 and the twelfth resistor R 12 Provide electromagnetic isolation between the gate and source to prevent high-frequency signals from coupling to the control end, thereby achieving high-frequency isolation and preventing gate oscillation.

[0036] The attenuation circuit of this embodiment, driven by the differential voltages V1 and V2, can flexibly switch different working states according to the change of temperature, thereby realizing the adjustment of the signal attenuation. When the temperature rises, the differential output voltage turns on the series switch tube M1 and turns off the parallel switch tubes M2 and M3. In this case, the signal is mainly transmitted through M1, and the insertion loss of the attenuation circuit is the smallest at this time, and it is in a low-loss state. Under normal temperature conditions, M1, M2, and M3 are in an intermediate state between on and off, and the insertion loss of the attenuation circuit increases, but still remains within an acceptable range. When the temperature drops, the differential output voltage turns off M1, and M2 and M3 turn on. At this time, the signal is attenuated by the π-type attenuator composed of R7, R8, and R9, and the insertion loss of the circuit reaches the maximum. By adjusting the gate voltages (i.e., V1 and V2) of the FET switch tubes M1, M2, and M3, the attenuation is automatically adjusted according to the change of temperature, and a large attenuation compensation amount is achieved in a wide temperature range (-55°C to +125°C), ensuring the stability of the signal attenuation characteristics.

[0037] Through the above working mechanism, the attenuation circuit of this embodiment can achieve temperature compensation characteristics of low insertion loss at high temperature and high insertion loss at low temperature, thereby effectively compensating for high and low temperature gain fluctuations of the amplifier chip or multi-function chip. Figure 2 The insertion loss simulation curve of the temperature compensation circuit at -55℃ to 125℃ is displayed, which intuitively presents the insertion loss of the circuit at different temperatures; Figure 2 The curves in the figure represent the attenuation value of the temperature compensated attenuator with a temperature step of 10 degrees in the temperature range of -55 degrees to 125 degrees. It can be seen that the attenuation value ranges from -7dB to -0.5dB, and the temperature compensation range reaches 6dB. Figure 3 The curve in the figure shows the insertion loss simulation results of the temperature compensation circuit at three temperatures (low temperature -55 degrees, normal temperature 25 degrees, high temperature +125 degrees) when the VEE voltage changes (5±0.5V), which clearly reflects the impact of voltage fluctuations on the insertion loss of the circuit at different temperatures. The frequency range of the circuit of the present invention covers DC -40GHz and can work stably at ultra-wideband frequencies; the temperature compensation range is -55°C to +125°C, and can effectively compensate for signal attenuation within this temperature range; the attenuation compensation amount reaches 6dB, which is greater than the traditional temperature compensation attenuator.

[0038] The present invention achieves the following goals: first, it has a large attenuation compensation amount within a wide temperature range (-55°C to +125°C), can accurately control the signal attenuation amount, and ensure the stability of the signal attenuation characteristics; second, it adopts a unique differential circuit design to reduce the sensitivity to process batch fluctuations and ensure mass production consistency; third, it has good attenuation characteristic consistency within the ultra-wideband frequency range (DC-40GHz) to meet the application requirements of modern ultra-wideband technology.

[0039] The above content is only a preferred implementation of the present invention. It should be emphasized that for ordinary technicians familiar with the technology in this field, on the basis of following the core idea of ​​the present invention, the circuit design can be adjusted and optimized according to actual needs. For example, different temperature compensation elements can be selected to meet special environmental requirements, or the precise control of signal gain can be achieved by changing the component parameters of the differential amplifier. Whether it is the optimization of the specific circuit structure or the reconfiguration of the component parameters, these changes do not deviate from the technical essence of the present invention, and therefore still belong to the scope of protection of the present invention. The above improvements should be interpreted based on the claims and the basic principles of the invention.

[0040] The present invention uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

[0041] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.

Claims

1. An ultra-wideband temperature compensated attenuator circuit, characterized in that: It includes a clamping circuit, a differential amplifier circuit and an attenuation circuit; the clamping circuit adopts a clamping diode to suppress power supply voltage fluctuations to limit the amplitude range of the input voltage of the differential amplifier circuit; the differential amplifier circuit adopts a temperature compensation diode to generate a temperature-related voltage, and performs differential amplification after comparing it with a reference voltage, and outputs a temperature-related differential voltage; the attenuation circuit switches the working state according to the temperature-related differential voltage to perform linear regulation and temperature compensation on the signal attenuation.

2. The ultra-wideband temperature compensated attenuator circuit according to claim 1, characterized in that: The clamp circuit includes a current limiting resistor, a first diode, a second diode and a third diode; one end of the current limiting resistor is an input end of the clamp circuit, which is connected to a power supply voltage; the other end of the current limiting resistor is an output end of the clamp circuit, which is connected to a differential amplifier circuit; the first diode, the second diode and the third diode are connected in series in sequence, and the cathode of the first diode is connected to the other end of the current limiting resistor, and the anode of the third diode is grounded.

3. The ultra-wideband temperature compensated attenuator circuit according to claim 1, characterized in that: The differential amplifier circuit includes a first transistor, a second transistor and a third transistor; the gate of the first transistor is the input end of the differential amplifier circuit and is connected to the output end of the clamp circuit; the source of the first transistor is connected to the drain of the second transistor and the drain of the third transistor; the drain of the first transistor is connected to one end of the first resistor, and the other end of the first resistor is connected to the gate of the second transistor and the gate of the third transistor through the second resistor and the third resistor respectively; the gate of the second transistor is grounded through a fourth diode, a fifth diode and a sixth diode connected in series in sequence; the gate of the third transistor is grounded through a fourth resistor; the source of the second transistor is the first output end of the differential amplifier circuit, and the source of the third transistor is the second output end of the differential amplifier circuit.

4. The ultra-wideband temperature compensated attenuator circuit according to claim 3, characterized in that: A source of the second transistor is grounded via a fifth resistor, and a source of the third transistor is grounded via a sixth resistor.

5. The ultra-wideband temperature compensated attenuator circuit according to claim 1, characterized in that: The first transistor, the second transistor and the third transistor are depletion-type field effect transistors.

6. The ultra-wideband temperature compensated attenuator circuit according to claim 1, characterized in that: The attenuation circuit includes a fourth transistor, a fifth transistor and a sixth transistor; the gate of the fourth transistor is connected to the first output terminal of the differential amplifier circuit, the drain of the fourth transistor is connected to the drain of the fifth transistor, the source of the fourth transistor is connected to the drain of the sixth transistor, and the drain of the fifth transistor is connected to the drain of the sixth transistor through a seventh resistor; the gate of the fifth transistor is connected to the second output terminal of the differential amplifier circuit, and the source of the fifth transistor is grounded through an eighth resistor; the gate of the sixth transistor is connected to the second output terminal of the differential amplifier circuit, and the source of the sixth transistor is grounded through a ninth resistor.

7. The ultra-wideband temperature compensated attenuator circuit according to claim 6, characterized in that: The gate of the fourth transistor is connected to the first output terminal of the differential amplifier circuit through the tenth resistor, the gate of the fifth transistor is connected to the second output terminal of the differential amplifier circuit through the eleventh resistor, and the gate of the sixth transistor is connected to the second output terminal of the differential amplifier circuit through the twelfth resistor.

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