Signal isolation circuit for current loop

Abstract

The invention relates to a signal isolation circuit for a current loop, and belongs to the technical field of signal isolation transmission. According to the invention, an isolated amplifier or an isolated ADC is used as an isolation chip, and energy is extracted from a current loop to supply power to the high-voltage side of the isolation chip through the innovative electricity larceny shunting unit, the current increasing unit and the voltage regulating unit; the problem that in the prior art, when an isolation chip is applied to a 4-20 mA current loop, loop power supply is difficult to use according to the high-voltage side current requirement is solved. The signal isolation circuit for the current loop is simple in structure, has the advantages of being low in cost, easy to integrate, small in size, light in weight and the like, and has wide application prospects.

Description

Technical Field

[0001] The present invention relates to the field of signal isolation transmission, and in particular to a signal isolation circuit for a current loop; Background Art

[0002] Many industrial sites and laboratories currently involve data transmission between multiple devices. Many linear data are often transmitted using direct current, with 4-20mA DC signals being the most commonly used. To prevent mutual interference between two devices, current signals generally need to be isolated and transmitted. Current isolation solutions and their drawbacks are as follows: Use expensive signal isolators, which are generally priced high; Use of dedicated signal isolation modules has poor flexibility; Using isolated amplifiers offers certain advantages in cost and flexibility, but powering their high-voltage terminals typically requires the addition of isolated DC-DC power modules. However, these modules are generally expensive, increasing overall circuit costs. Furthermore, these modules have specific isolation parameters, which can affect the performance of the entire signal isolation circuit, potentially reducing isolation effectiveness. Summary of the Invention

[0003] The present invention aims to overcome the problems of high cost, poor flexibility, and potential reduction in isolation effectiveness in existing signal isolation circuits. It provides a signal isolation circuit that utilizes the energy of the current loop itself for power supply, thereby achieving low-cost, high-integration, and good-performance signal isolation. This is achieved through the following innovative circuit structure and operating principle: The signal isolation circuit for the current loop mainly includes a power stealing shunt unit, a sampling unit, a signal isolation unit, an optional current increasing unit and an optional voltage regulating unit.

[0004] The power-stealing shunt unit extracts energy from the current signal output of the source device. Using an internal voltage-stabilizing circuit, such as a parallel voltage-stabilizing source and resistor-capacitor combination or a more optimized power management chip (see the specific embodiments of this invention), it stabilizes the extracted energy at a voltage level suitable for powering the isolated front-end circuit. It also shunts excess current to ensure the proper operation of the source device. The unit's voltage output is connected to the corresponding power input of the subsequent unit, forming a power supply chain.

[0005] The sampling unit uses high-precision current sensors or resistors to accurately sample the input current signal, converting the sampled signal into a differential signal, which is then transmitted to the signal isolation unit via the differential signal output port. This unit works in conjunction with the power theft shunt unit and the signal isolation unit to ensure accurate signal acquisition without affecting the signal transmission of the source device.

[0006] Depending on the specific application requirements, the signal isolation unit uses a common isolated amplifier or isolated ADC as its core component to output analog or digital signals. The signal isolation unit isolates the input differential sampling signal and converts it into a signal that can be safely transmitted to the target device. The high-voltage side of the signal isolation unit is powered by a power shunting unit or current boosting unit, while the low-voltage side is powered by the target device.

[0007] As an optional supplement, the current boosting unit uses a DCDC chip or other high-efficiency power conversion circuit to convert the input voltage into a suitable voltage and current when the current provided by the power stealing shunt unit cannot meet the needs of the signal isolation unit. This provides sufficient energy for the signal isolation unit. Its input comes from the output of the power stealing shunt unit, and its output is connected to the high-voltage side power input of the signal isolation unit.

[0008] As an optional supplement, the voltage regulating unit mainly adjusts the output voltage of the power stealing shunt unit so that it is negatively correlated with the current value of the current loop, thereby achieving optimal energy utilization and avoiding unnecessary energy loss.

[0009] The isolation front-end circuit refers to all circuits between the isolation device and the port connected to the source device, with the isolation device as the demarcation point; The source device refers to a device or circuit that sends a signal carrying data.

[0010] The target device refers to a device or circuit that receives the isolated signal.

[0011] By utilizing the signal isolation circuit for a current loop described in the present invention, isolated collection of the current value of the current loop can be easily achieved in a low-cost manner.

[0012] The components used in the signal isolation circuit for the current loop described in the present invention are low-priced, few in number, and all have small packages, which greatly saves cost and space and facilitates miniaturization and integration.

[0013] The voltage drop generated on the input side of the signal isolation circuit for the current loop described in the present invention is relatively low, much smaller than the load capacity of most current signal output devices. This allows the input side of the signal isolation circuit for the current loop described in the present invention to be connected in series to the original current loop, which is very convenient for installation. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0015] Figure 1 : This is the top-level circuit principle of the signal isolation circuit for current loop described in the present invention Figure 1 ; Figure 2 :This is the top circuit principle of the signal isolation circuit for current loop described in the present invention Figure 2 ; Figure 3 :This is the top circuit principle of the signal isolation circuit for current loop described in the present invention Figure 3 ; Figure 4 : is a circuit diagram of the electricity theft shunting unit of the present invention; Figure 5 : is a circuit diagram of the sampling unit of the present invention; Figure 6 : is a circuit schematic diagram of the signal isolation unit described in the present invention; Figure 7 : is a circuit diagram of the current increasing unit of the present invention; Figure 8 : is a circuit diagram of the voltage regulating unit of the present invention; DETAILED DESCRIPTION

[0016] For ease of understanding, this disclosure is illustrated using three embodiments. Each embodiment utilizes a hierarchical design, dividing the entire circuit into two layers: a top layer and a bottom layer. The top layer defines the interfaces of each sub-unit circuit and the connections between these interfaces, while the bottom layer provides the internal design of each sub-unit circuit. It should be understood that these embodiments are provided for illustrative purposes only and should not be construed as limiting the implementation of the present disclosure.

[0017] Unless otherwise specified, the materials, instruments and methods used in the following embodiments are conventional materials, instruments and methods in the art and can be obtained through commercial channels.

[0018] Example_Jia Zi: Reference Figure 1 The top circuit principle of a signal isolation circuit for a current loop is shown Figure 1 , including the electricity theft shunt unit, sampling unit and signal isolation unit; description is as follows: The IN+ of the electricity theft shunt unit is connected to the current outflow port of the source device, the IN- port is connected to the current inflow port CIIN+ of the sampling unit, the voltage output port VOUT is connected to the high-voltage side power port IVDD of the signal isolation unit, and the GND port is grounded; the current outflow port CIIN- of the sampling unit is connected to the current return port of the source device, the differential voltage ports CVOUTP and CVOUTN are connected to the high-voltage side differential voltage input ports IVINP and IVINN of the signal isolation unit; the high-voltage side common port IGND of the signal isolation unit is grounded, the low-voltage side power input port OVDD is connected to the power port of the target device, the signal output ports OP_C and ON_D are connected to the corresponding signal receiving ports of the target device, and the low-voltage side common port OGND is connected to the target device ground; The underlying circuit is described as follows: The electricity theft shunt unit consists of a parallel voltage regulator U1f, resistors R1f~R2f and a capacitor C1f; the external connection ports include: a current inflow port IIN+, a current outflow port IIN-, a voltage output port VOUT, a voltage adjustment signal input port ADJ and a common port GND.

[0019] The cathode of the parallel voltage regulator U1f is connected to the current inflow port IIN+, the anode is connected to the current outflow port IIN- and the common port GND, and the reference electrode is connected to the voltage adjustment signal input port ADJ; the resistor R1f is connected between the cathode of U1f and the reference electrode; the resistor R2f is connected between the anode of U1f and the reference electrode; and the capacitor C1f is connected between the cathode and anode of U1f.

[0020] The sampling unit is composed of a resistor R1c; the external connection ports include: a current inflow port CIIN+, a current outflow port CIIN- and a pair of differential voltage ports CVOUTP and CVOUTN.

[0021] The resistor R1c is connected between the current inflow port CIIN+ and the current outflow port CIIN-; a pair of differential voltage ports CVOUTP and CVOUTN are connected to the current inflow port CIIN+ and the current outflow port CIIN- respectively.

[0022] The signal isolation unit is composed of an isolation chip U1x, resistors R1x~R2x and capacitors C1x~C3x; the external connection ports include: High-voltage side - power supply port IVDD, common port IGND and a pair of differential voltage input ports IVINP and IVINN; Low-voltage side - power port OVDD, common port OGND and a pair of signal output ports OP_C and ON_D.

[0023] Pin 1 of the isolation chip U1x is connected to the high-voltage side power supply port IVDD, pin 2 is connected to the differential voltage input port IVINP via the resistor R1x, pin 3 is connected to the differential voltage input port IVINN via the resistor R2x, pin 4 is connected to the high-voltage side common port IGND, pin 5 is connected to the low-voltage side common port OGND, pin 6 is connected to the signal output port ON_D, pin 7 is connected to the signal output port OP_C, and pin 8 is connected to the low-voltage side power supply port OVDD; the capacitor C1x is connected between pins 2 and 3 of the isolation chip U1x; the capacitor C2x is connected between pins 1 and 4 of the isolation chip U1x; and the capacitor C3x is connected between pins 8 and 5 of the isolation chip U1x.

[0024] The isolation chip U1x is an isolated amplifier or an isolated ADC, for example: Isolated amplifier – CA-IS1200U; Isolated ADC – CA-IS1204W; Example_Jia Zi: End of example.

[0025] In the above embodiments, considering that the current value required for normal operation of the high-voltage side of many isolation chips is greater than 4 mA, if it is to be applied to a 4-20 mA current loop, it will face difficulties in device selection. The following embodiments will solve this problem.

[0026] Example _ A ugly: reference Figure 2 The top circuit principle of a signal isolation circuit for a current loop is shown Figure 2 , including the electricity theft shunt unit, sampling unit, signal isolation unit and current increasing unit; the description is as follows: The IN+ of the electricity theft shunt sampling unit is connected to the current outflow port of the source device, the IN- port is connected to the current inflow port CIIN+ of the sampling unit, the voltage output port VOUT is connected to the voltage input port VIN+ of the current increasing unit, and the GND port is grounded; the current outflow port CIIN- of the sampling unit is connected to the current return port of the source device, the differential voltage ports CVOUTP and CVOUTN are connected to the high-voltage side differential voltage input ports IVINP and IVINN of the signal isolation unit; the common port GND of the current increasing unit is grounded, the voltage output port ZVOUT is connected to the high-voltage side power port IVDD of the signal isolation unit; the high-voltage side common port IGND of the signal isolation unit is grounded, the low-voltage side power input port OVDD is connected to the power port of the target device, the signal output ports OP_C and ON_D are connected to the corresponding signal receiving ports of the target device, and the low-voltage side common port OGND is connected to the target device ground; The underlying circuit is described as follows: The electricity-stealing shunt unit is the same as the electricity-stealing shunt unit in Example 1.

[0027] The sampling unit is the same as the sampling unit in Example 1.

[0028] The signal isolation unit is the same as the signal isolation unit in Example 1.

[0029] The current increasing unit is composed of a DCDC chip U1z, an inductor L1z, resistors R1z~R2z and capacitors C1z~C4z; the external connection ports include: a voltage input port VIN+, a voltage output port ZVOUT+ and a common port GND.

[0030] The capacitor C2z is connected between pin 1 and pin 6 of the DCDC chip U1z; pin 2 of the DCDC chip U1z is connected to the common port GND, pin 3 is connected to the common port GND via resistor R2z, pins 4 and 5 are both connected to the voltage input port VIN+, and pin 6 is connected to the voltage output port ZVOUT+ via inductor L1z; the capacitor C3z is connected between the voltage input port VIN+ and the common port GND; the capacitor C1z and the resistor R1z are connected in parallel and connected between the voltage output port ZVOUT+ and pin 3 of the DCDC chip U1z; the capacitor C4z is connected between the voltage output port ZVOUT+ and the common port GND.

[0031] Example _ A: End of example.

[0032] The above embodiments introduce a current boost unit to accommodate situations where the current required for normal operation of the isolation chip's high-voltage side exceeds the minimum effective value of the current loop. However, this results in a greater voltage drop and greater power dissipation in the power-stealing shunt unit, which is particularly unfriendly to the current loop when the current value in the current loop is high. The following embodiments will address this issue.

[0033] Example _ Jiayin: Reference Figure 3 The top circuit principle of a signal isolation circuit for a current loop is shown Figure 2 , including the electricity theft shunt unit, sampling unit, signal isolation unit, current increasing unit and voltage regulating unit; the description is as follows: Based on Figure 2 In the case of a connection relationship, a voltage regulating unit is introduced. The voltage regulating signal output port OUTADJ of the voltage regulating unit is connected to the voltage adjustment signal input port ADJ of the electricity stealing shunt unit, the current signal detection port AFIN is connected to the current outflow port CIIN- of the sampling unit, the common port GND is grounded, and the voltage input port VS+ is connected to the voltage output interface ZVOUT+ of the current increasing unit; The underlying circuit is described as follows: The electricity-stealing shunt unit is the same as the electricity-stealing shunt unit in Embodiment 1-A.

[0034] The sampling unit is the same as the sampling unit in Example 1-A.

[0035] The signal isolation unit is the same as the signal isolation unit in embodiment A-Chou.

[0036] The flow increasing unit is the same as the flow increasing unit in Example 1-A.

[0037] The voltage regulating unit is composed of an operational amplifier U1t, a PNP transistor Q1t, resistors R1t~R2t and capacitors C1t~C2t; the external connection ports include: a voltage input port VS+, a current signal detection port AFIN, a voltage regulation signal output port OUTADJ and a common port GND.

[0038] Pins 1 and 2 of the operational amplifier U1t are connected to the common port GND, pin 3 is connected to the current signal detection port AFIN via the resistor R2t, pin 4 is connected to the base of the transistor Q1t, and pin 5 is connected to the voltage input port VS+; the collector of the transistor Q1t is connected to the common port GND, and the emitter is connected to the voltage regulation signal output port OUTADJ via the resistor R1t; the capacitor C1t is connected between pins 2 and 5 of the operational amplifier U1t; the resistor R3t and the capacitor C2t are connected in parallel and then connected between pins 3 and 4 of the operational amplifier U1t.

[0039] The operational amplifier U1t needs to be able to work normally when the voltage level of the current signal detection port AFIN is lower than the voltage level of the negative power supply port VS-. This embodiment uses a precision low-voltage operational amplifier of model LMV321dr-tr.

[0040] Example_Jiayin: End of example.

[0041] Working principle of the present invention: By leveraging the characteristics of a shunt regulator diode to draw power from the current loop to power the isolation chip, the isolation power supply can be eliminated, thus saving costs. However, many isolation chips require currents greater than 4mA on their high-voltage side for normal operation. Therefore, component selection for applications in 4-20mA current loops presents difficulties. To address this issue, the voltage drawn from the current loop can be increased, and then the characteristics of a DC-DC chip can be used to reduce the voltage and increase the current before powering the isolation chip. However, a higher voltage draws more load on the current loop at high currents, resulting in greater power dissipation in the shunt regulator diode. To address this issue, the current loop can be monitored to ensure that the voltage drawn from the current loop is inversely correlated with the current, thereby reducing the loop voltage drop at high currents.

Claims

1. A signal isolation circuit for a current loop, characterized in that: include: The power stealing shunt unit is used to steal energy from the current signal output end of the source device and achieve a regulated voltage output, power the isolation front-end circuit, and shunt the excess current at the signal input end for transmission; A sampling unit, used for sampling the current at the signal input end; A signal isolation unit, used for isolating and transmitting the current sampling value obtained by the sampling unit; The isolation front-end circuit refers to all circuits between the isolation device and the port connected to the source device, with the isolation device as the demarcation point; The source device refers to a device or circuit that sends a signal carrying data.

2. The signal isolation circuit for a current loop according to claim 1, characterized in that: It also includes a current increasing unit, which is used to provide a current increasing function when the current value provided by the power stealing shunt unit is smaller than the minimum current value required by the signal isolation unit.

3. The signal isolation circuit for current loop according to claim 1, characterized in that The electricity theft shunt unit includes 1 current input port, 1 current outflow port, 1 voltage output port, 1 voltage adjustment signal input port and 1 common port; the sampling unit includes 1 current inflow port, 1 current outflow port and 1 pair of differential signal output ports; the signal isolation unit includes 1 high-voltage side voltage input port, 1 pair of differential signal input ports, 1 high-voltage side common port, 1 low-voltage side voltage input port, 1 group of isolation signal ports and 1 low-voltage side common port; The connection relationship is as follows: the current inflow port of the electricity stealing shunt unit is connected to the current outflow port of the source device, the current outflow port is connected to the current inflow port of the sampling unit, the voltage output port is connected to the high-voltage side voltage input port of the signal isolation unit, and the common port is grounded; the current outflow port of the sampling unit is connected to the current return port of the source device, and a pair of differential signal output ports are connected to a pair of differential signal input ports of the signal isolation unit; the high-voltage side common port of the signal isolation unit is grounded, the low-voltage side voltage input port is connected to the voltage output port of the target device, a group of isolated signal ports are connected to the corresponding signal port of the target device, and the low-voltage side common port is connected to the ground of the target device; The target device refers to a device or circuit that receives the isolated signal.

4. The signal isolation circuit for current loop according to claim 2, characterized in that The electricity stealing shunt unit includes 1 current input port, 1 current outflow port, 1 voltage output port, 1 voltage adjustment signal input port and 1 common port; the sampling unit includes 1 current inflow port, 1 current outflow port and 1 pair of differential signal output ports; the signal isolation unit includes 1 high-voltage side voltage input port, 1 pair of differential signal input ports, 1 high-voltage side common port, 1 low-voltage side voltage input port, 1 group of isolation signal ports and 1 low-voltage side common port; the current increasing unit includes 1 voltage input port, 1 voltage output port and 1 common port; The connection relationship is as follows: the current inflow port of the electricity stealing shunt unit is connected to the current outflow port of the source device, the current outflow port is connected to the current inflow port of the sampling unit, the voltage output port is connected to the voltage input port of the current increasing unit, and the common port is grounded; the current outflow port of the sampling unit is connected to the current return port of the source device, and a pair of differential signal output ports are connected to a pair of differential signal input ports of the signal isolation unit; the voltage output port of the current increasing unit is connected to the high-voltage side voltage input port of the signal isolation unit, and the common port is grounded; the high-voltage side common port of the signal isolation unit is grounded, the low-voltage side voltage input port is connected to the voltage output port of the target device, a group of isolated signal ports are connected to the corresponding signal port of the target device, and the low-voltage side common port is connected to the ground of the target device; The target device refers to a device or circuit that receives the isolated signal.

5. The signal isolation circuit for current loop according to claim 4, characterized in that: It also includes a voltage regulating unit, which is used to adjust the output voltage of the electricity stealing shunt unit so that it is negatively correlated with the current value of the current loop.

6. The signal isolation circuit for a current loop according to claim 5, characterized in that: The voltage regulating unit includes a voltage input port, a current signal detection port, a voltage regulating signal output port and a common port; The connection relationship is: the voltage regulation signal output port of the voltage regulation unit is connected to the voltage adjustment signal input port of the electricity stealing shunt unit, the current signal detection port is connected to the current outflow port of the sampling unit, the common port is grounded, and the voltage input port is connected to the voltage output interface of the current increasing unit.

7. The signal isolation circuit for a current loop according to any one of claims 3 to 6, characterized in that: The electricity stealing shunt unit is composed of a parallel voltage-stabilizing source U1f, resistors R1f~R2f and a capacitor C1f; the cathode of the parallel voltage-stabilizing source U1f is connected to the current inflow port, the anode is connected to the current outflow port and the common port, and the reference electrode is connected to the voltage adjustment signal input port; the resistor R1f is connected between the cathode and the reference electrode of the parallel voltage-stabilizing source U1f; the resistor R2f is connected between the anode and the reference electrode of the parallel voltage-stabilizing source U1f; the capacitor C1f is connected between the cathode and the anode of the parallel voltage-stabilizing source U1f; The sampling unit is composed of a resistor R1c; the resistor R1c is connected between the current inflow port and the current outflow port, and is also connected between the pair of differential signal output ports; The signal isolation unit is composed of an isolation chip U1x, resistors R1x~R2x and capacitors C1x~C3x; pin 1 of the isolation chip U1x is connected to the high-voltage side voltage input port, pin 2 is connected to the positive port of the pair of differential signal input ports through the resistor R1x, pin 3 is connected to the negative port of the pair of differential signal input ports through the resistor R2x, pin 4 is connected to the high-voltage side common port, pin 5 is connected to the low-voltage side common port, pins 6 and 7 are respectively connected to the corresponding sub-ports in the group of isolation signal ports, and pin 8 is connected to the low-voltage side voltage input port; the capacitor C1x is connected between pins 2 and 3 of the isolation chip U1x; the capacitor C2x is connected between pins 1 and 4 of the isolation chip U1x; the capacitor C3x is connected between pins 8 and 5 of the isolation chip U1x.

8. The signal isolation circuit for a current loop according to any one of claims 4 to 6, characterized in that: The current increasing unit is composed of a DCDC chip U1z, an inductor L1z, resistors R1z~R2z and capacitors C1z~C4z; the capacitor C2z is connected between pin 1 and pin 6 of the DCDC chip U1z; pin 2 of the DCDC chip U1z is connected to the common port, pin 3 is connected to the common port via the resistor R2z, pins 4 and 5 are both connected to the voltage input port, and pin 6 is connected to the voltage output port via the inductor L1z; the capacitor C3z is connected between the voltage input port and the common port; the capacitor C1z and the resistor R1z are connected in parallel and then connected between the voltage output port and pin 3 of the DCDC chip U1z; the capacitor C4z is connected between the voltage output port and the common port.

9. The signal isolation circuit for a current loop according to any one of claims 5 to 6, characterized in that: The voltage regulating unit is composed of an operational amplifier U1t, a PNP transistor Q1t, resistors R1t~R2t and capacitors C1t~C2t; pins 1 and 2 of the operational amplifier U1t are both connected to the common port, pin 3 is connected to the current signal detection port via the resistor R2t, pin 4 is connected to the base of the transistor Q1t, and pin 5 is connected to the voltage input port; the collector of the transistor Q1t is connected to the common port, and the emitter is connected to the voltage regulating signal output port via the resistor R1t; the capacitor C1t is connected between pins 2 and 5 of the operational amplifier U1t; the resistor R3t and the capacitor C2t are connected in parallel and then connected between pins 3 and 4 of the operational amplifier U1t.

10. The signal isolation circuit for a current loop according to claim 7, characterized in that: The isolation chip U1x is an isolated amplifier or an isolated ADC.

Images