Aging system of digital-to-analog conversion chip

Abstract

The embodiment of the invention provides a burn-in system for a digital-to-analog conversion chip. The burn-in system comprises a burn-in board and a main control board which are connected through an adapter connector, the aging plate comprises a plurality of test stations for testing the digital-to-analog conversion chip; the main control board comprises a main controller, a power supply circuit and a clock circuit, the main controller is used for providing a test digital signal and a control signal for the digital-to-analog conversion chip and reading a converted test analog signal from the digital-to-analog conversion chip, the power supply circuit is used for supplying power to the digital-to-analog conversion chip, and the clock circuit is used for providing a clock signal for the digital-to-analog conversion chip. In the burn-in test process, the main control board is used for providing a power signal, a clock signal, a test digital signal and the like for the digital-to-analog conversion chip on the burn-in board, receiving a test analog signal of the chip, and determining whether the chip breaks down or not and related parameters of the chip according to the test analog signal, so that the dynamic burn-in test of the digital-to-analog conversion chip can be realized; the test coverage rate is high, and the product reliability can be improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of electronic devices, and in particular to a burn-in system for a digital-to-analog conversion chip. Background Art

[0002] Affected by factors such as manufacturing process, production materials, equipment and environment, the produced electronic devices may have potential defects. Reliability screening is an important means to eliminate devices with potential defects and possible early failures. It can effectively screen the devices before they are used. Aging is an important part of reliability screening and an effective means to eliminate early failures and improve circuit reliability. The traditional static aging method only applies electrical stress without applying an excitation signal, and only judges whether the device has failed by observing the power supply voltage and current. It cannot detect the relevant parameters and working status of the digital-to-analog conversion chip. Summary of the invention

[0003] In view of this, an object of an embodiment of the present application is to provide a burn-in system for a digital-to-analog conversion chip, which can implement dynamic burn-in testing of the digital-to-analog conversion chip.

[0004] Based on the above purpose, the embodiment of the present application provides a burn-in system for a digital-to-analog conversion chip, including a burn-in board and a main control board connected by an adapter connector;

[0005] The burn-in board includes a plurality of test stations for testing digital-to-analog conversion chips;

[0006] The main control board includes a main controller, a power supply circuit and a clock circuit. The main controller is used to provide a test digital signal and a control signal to the digital-to-analog conversion chip, and read the converted test analog signal from the digital-to-analog conversion chip. The power supply circuit is used to supply power to the digital-to-analog conversion chip. The clock circuit is used to provide a clock signal to the digital-to-analog conversion chip.

[0007] Optionally, during the aging test, the digital-to-analog conversion chip to be tested is plugged into the test station, and the aging board is placed in the aging test environment. During the aging time, the power supply circuit is used to power the digital-to-analog conversion chip to be tested, the clock circuit is used to provide a clock signal for the digital-to-analog conversion chip to be tested, and the main controller is used to provide a test digital signal and a control signal to the digital-to-analog conversion chip to be tested, so that the digital-to-analog conversion chip to be tested converts the test digital signal into a test analog signal, and transmits the test analog signal to the main controller.

[0008] Optionally, the main controller determines whether the digital-to-analog conversion chip fails based on the test simulation signal, and if no failure occurs, determines the test parameters of the digital-to-analog conversion chip based on the test simulation signal.

[0009] Optionally, the aging board is implemented based on a PCB board, and the analog ground and digital ground of the PCB board are isolated by a resistor with a resistance value of 0.

[0010] Optionally, the PCB board includes a signal layer and a ground layer, and the signal lines of the signal layer and the ground layer are wired in a vertical routing manner.

[0011] Optionally, the adapter connector is a gold finger, and the gold finger on the aging board is gold-plated.

[0012] Optionally, a fixed positioning pin and a fine-tuning positioning pin are provided on the upper portion of the aging plate.

[0013] From the above description, it can be seen that the burn-in system of the digital-to-analog conversion chip provided in the embodiment of the present application, during the burn-in test process, uses the main control board to provide power signals, clock signals, test digital signals, etc. to the digital-to-analog conversion chip on the burn-in board, and receives the test analog signal of the chip, and determines whether the chip fails and the relevant parameters of the chip based on the test analog signal, thereby realizing dynamic burn-in testing of the digital-to-analog conversion chip, with high test coverage, and can improve product reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0015] Figure 1 A block diagram of the system composition of an embodiment of the present application;

[0016] Figure 2 A partial schematic diagram of the main controller of an embodiment of the present application;

[0017] Figure 3A , 3B A schematic diagram of a partial circuit principle of the aging board of an embodiment of the present application;

[0018] Figure 4 This is a schematic diagram of the aging process of an embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0020] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connecting" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to represent relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0021] like Figure 1 As shown, the present application provides a burn-in system for a digital-to-analog conversion chip, including a burn-in board and a main control board connected by an adapter connector;

[0022] The burn-in board includes a plurality of test stations for testing digital-to-analog conversion chips;

[0023] The main control board includes a main controller, a power supply circuit and a clock circuit. The main controller is used to provide test digital signals and control signals to the digital-to-analog conversion chip, and read the converted test analog signals from the digital-to-analog conversion chip. The power supply circuit is used to supply power to the digital-to-analog conversion chip. The clock circuit is used to provide a clock signal to the digital-to-analog conversion chip.

[0024] The burn-in system of the digital-to-analog conversion chip provided in this embodiment includes a burn-in board and a main control board. The burn-in board and the main control board are connected through an adapter connector. The burn-in board is provided with multiple test stations. The digital-to-analog conversion chip to be tested can be connected to the test station through a connection socket. The main control board is provided with a main controller, a power supply circuit, a clock circuit, etc. The power supply circuit is used to supply power to the main control board and the burn-in board. The clock circuit is used to provide a clock signal to the main controller and the digital-to-analog conversion chip. The main controller is used to provide control signals such as chip select signals and test digital signals to the digital-to-analog conversion chip. During the test process, the main control board provides power, clock signals, control signals and test digital signals to the digital-to-analog conversion chip on the burn-in board to test the conversion function and related parameters of the digital-to-analog conversion chip.

[0025] In some embodiments, the process of performing a burn-in test on a digital-to-analog conversion chip using a burn-in system includes:

[0026] Pre-aging test: Before applying the aging test conditions, at 25°C, use the main control board to perform functional tests and related parameter tests on the digital-to-analog conversion chip to be tested on the aging board to ensure that the function and performance of the digital-to-analog conversion chip are normal.

[0027] During the aging test, the digital-to-analog conversion chip to be tested is plugged into the test station, and the aging board is placed in the aging test environment. During the aging time, the power supply circuit is used to power the digital-to-analog conversion chip to be tested, the clock circuit is used to provide a clock signal for the digital-to-analog conversion chip to be tested, and the main controller is used to provide test digital signals and control signals to the digital-to-analog conversion chip to be tested, so that the digital-to-analog conversion chip to be tested converts the test digital signal into a test analog signal and transmits the test analog signal to the main controller.

[0028] In some methods, the aging test conditions generally include thermal stress, electrical stress and time. For the DAC8830 digital-to-analog conversion chip, the aging time is generally 96 hours, the aging test temperature is 125°C, the operating voltage is 3.3V, and the output voltage of the digital-to-analog conversion chip is 2.5V after debugging and stabilization, indicating that the chip is working normally.

[0029] After aging test, at 25℃, use the main control board to perform functional test and related parameter test on the digital-to-analog conversion chip to be tested within 96 hours to detect whether the function and performance of the digital-to-analog conversion chip are normal.

[0030] In some embodiments, the main controller determines whether the digital-to-analog conversion chip fails based on the received test simulation signal, and if no failure occurs, determines the test parameters of the analog conversion chip based on the test simulation signal.

[0031] In this embodiment, during the test process, the main controller receives the test analog signal after the digital-to-analog conversion chip converts the test digital signal, and determines whether the chip fails based on the test analog signal. For example, according to the working sequence of the chip, if the test analog signal is not received when the signal should be received, or the voltage value of the test analog signal exceeds the specified voltage value, etc., it can be determined that the digital-to-analog conversion chip fails; if the digital-to-analog conversion chip does not fail, the main controller processes the test analog signal to obtain the signal-to-noise ratio, error, bandwidth and other related parameters of the digital-to-analog conversion chip, and can also measure the static working current, input current, input voltage and other DC parameters of the chip based on the burn-in board. In this way, the burn-in system of the present application can realize the dynamic burn-in of the digital-to-analog conversion chip, that is, during the entire burn-in test process, by applying electrical stress and driving signals, the working state and related parameters of the chip can be measured.

[0032] In some embodiments, the main control board is also equipped with a display unit, a storage unit, a reset circuit, a JATG interface circuit, a USB to serial port circuit, a key circuit, etc. The display unit can be used to display the relevant test results of the digital-to-analog conversion chip, the storage unit can be used to store the relevant test result data of the digital-to-analog conversion chip, and the reset circuit, key circuit, etc. can be used to facilitate testing. The main controller uses an STM32 series microcontroller, such as an STM32F407ZGT chip (such as Figure 2 It supports communication interfaces such as SPI, USB, CAN, and IIC, and has rich software resources such as library functions.

[0033] In some embodiments, the burn-in board is implemented based on a PCB board, which includes a signal layer and a ground layer. Since the signal transmission rate of the digital-to-analog conversion chip is relatively high, the wiring of the burn-in board is relatively dense, which can easily lead to direct interference with the digital signal. Therefore, the analog ground and digital ground of the PCB board are isolated by a resistor with a resistance of 0 to prevent high-frequency digital signals from being interfered with by analog signals and power signals; the problem of matching impedance is considered when designing vias, wiring and signal layers, and direct signal interference is reduced through impedance matching; the thickness of the dielectric between the ground layer and the signal layer is reduced to increase the anti-interference ability of the transmission path; for the signal lines of the signal layer and the ground layer, a mutually perpendicular routing method is adopted to reduce the length of parallel routing; a GND plane layer is added above or below the signal layer as a return path to effectively reduce signal reflections.

[0034] In some embodiments, the design size of the aging board is 600mm×290mm, and the adapter connector between the aging board and the main control board uses gold fingers. In order to ensure the accuracy of the test analog signal and improve the service life of the aging board, the gold fingers on the aging board are gold-plated. At the same time, in order to facilitate the positioning of the aging board and protect the gold fingers, fixed positioning pins and fine-tuning positioning pins are added to the upper part of the aging board.

[0035] like Figure 3A , 3B As shown, the burn-in board is configured with a reference circuit for providing a reference voltage for a digital-to-analog conversion chip and a chip control circuit for testing chips on multiple test stations.

[0036] like Figure 4 As shown, in some embodiments, the workflow of the burn-in system includes powering on the system, resetting the main controller, and loading a driver program for driving the digital-to-analog conversion chip, wherein the driver program includes providing test digital signals, clock signals, power signals, etc. to the chip, and receiving test analog signals; after loading is completed, the digital-to-analog conversion chip is subjected to a burn-in test, and if the chip fails, the fault information is recorded, the main controller is reset, and the burn-in test is performed again.

[0037] The burn-in system for the digital-to-analog conversion chip provided in the embodiment of the present application, during the burn-in test process, uses the main control board to provide power signals, clock signals, test digital signals, etc. to the digital-to-analog conversion chip on the burn-in board, and receives the test analog signals of the chip, determines whether the chip fails and the relevant parameters of the chip based on the test analog signals, and can realize dynamic burn-in testing of the digital-to-analog conversion chip, with high test coverage and wide applicability, which can improve product reliability.

[0038] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples. Based on the concept of the present disclosure, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0039] In addition, to simplify the description and discussion, and in order not to make the embodiments of the present application difficult to understand, the known power supply / ground connection with the integrated circuit (IC) chip and other components may or may not be shown in the provided drawings. In addition, the device can be shown in the form of a block diagram to avoid making the embodiments of the present application difficult to understand, and this also takes into account the fact that the details of the implementation of these block diagram devices are highly dependent on the platform to be implemented in the embodiments of the present application (that is, these details should be fully within the scope of understanding of those skilled in the art). In the case of elaborating specific details (e.g., circuits) to describe exemplary embodiments of the present disclosure, it is obvious to those skilled in the art that the embodiments of the present application can be implemented without these specific details or when these specific details are changed. Therefore, these descriptions should be considered illustrative rather than restrictive.

[0040] Although the present disclosure has been described in conjunction with specific embodiments of the present disclosure, many replacements, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description. For example, other memory architectures (e.g., dynamic RAM (DRAM)) may use the embodiments discussed.

[0041] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present disclosure.

Claims

1. A burn-in system for a digital-to-analog conversion chip, characterized in that: It includes a burn-in board and a main control board connected by an adapter connector; The burn-in board includes a plurality of test stations for testing digital-to-analog conversion chips; The main control board includes a main controller, a power supply circuit and a clock circuit. The main controller is used to provide a test digital signal and a control signal to the digital-to-analog conversion chip, and read the converted test analog signal from the digital-to-analog conversion chip. The power supply circuit is used to supply power to the digital-to-analog conversion chip. The clock circuit is used to provide a clock signal to the digital-to-analog conversion chip.

2. The system according to claim 1, characterized in that During the aging test, the digital-to-analog conversion chip to be tested is plugged into the test station, and the aging board is placed in the aging test environment. During the aging time, the power supply circuit is used to power the digital-to-analog conversion chip to be tested, the clock circuit is used to provide a clock signal for the digital-to-analog conversion chip to be tested, and the main controller is used to provide a test digital signal and a control signal to the digital-to-analog conversion chip to be tested, so that the digital-to-analog conversion chip to be tested converts the test digital signal into a test analog signal and transmits the test analog signal to the main controller.

3. The system according to claim 1 or 2, characterized in that: The main controller determines whether the digital-to-analog conversion chip fails according to the test simulation signal, and if no failure occurs, determines the test parameters of the digital-to-analog conversion chip according to the test simulation signal.

4. The system according to claim 1, characterized in that The burn-in board is implemented based on a PCB board, and the analog ground and digital ground of the PCB board are isolated by a resistor with a resistance value of 0.

5. The system according to claim 4, characterized in that The PCB board comprises a signal layer and a ground layer, and the signal lines of the signal layer and the ground layer are wired in a vertical routing manner.

6. The system according to claim 1, characterized in that The adapter connector is a gold finger, and the gold finger on the aging board is gold-plated.

7. The system according to claim 1, characterized in that A fixed positioning pin and a fine-tuning positioning pin are provided on the upper part of the aging plate.

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