A synchronous detection sampling circuit and method for phase compensation

Abstract

The present invention belongs to the field of battery detection, and discloses a synchronous detection sampling circuit and method for phase compensation. The synchronous detection sampling circuit for phase compensation includes a sampling and amplifying circuit, an RC phase adjustment circuit, a signal amplifying circuit, an analog switch and a low-pass filtering circuit, a temperature monitoring signal transmitting circuit, an arithmetic circuit, and an analog-to-digital conversion circuit. The analog switch and the low-pass filtering circuit are connected to the arithmetic circuit, the signal amplifying circuit, and the RC phase adjustment circuit. The signal amplifying circuit is connected to the sampling and amplifying circuit. The arithmetic circuit is connected to the temperature monitoring signal transmitting circuit and the analog-to-digital conversion circuit. The present invention optimizes the processing process of the signal to be measured by using the synchronous detection method of the tester, and improves the convenience and reliability of test debugging.

Description

Technical Field

[0001] The present invention relates to the field of battery detection, and particularly to a synchronous detection sampling circuit and method for phase compensation. Background Art

[0002] Due to the internal structure and chemical characteristics of lithium batteries, their ohmic internal resistance can only be accurately obtained under the test of 1KHZ signals. Therefore, the synchronous detection technology for 1KHZ signals has been applied by technicians. In synchronous detection, the phase relationship between the reference signal and the signal to be measured is the core factor determining the demodulation performance. Currently, an RC (RC refers to a circuit composed of a resistor and a capacitor) phase adjustment circuit built with a mechanical potentiometer is mostly used to adjust the phase of the reference signal.

[0003] Using an RC phase adjustment circuit built with a mechanical potentiometer to adjust the phase of the reference signal requires manual operation by opening the instrument chassis, which makes each phase adjustment cumbersome and unable to compensate for the real-time phase offset in a timely manner, resulting in an offset in the test results.

[0004] Therefore, how to provide a synchronous detection sampling circuit and method for phase compensation is an urgent problem to be solved at present. Summary of the Invention

[0005] Embodiments of the present invention provide a synchronous detection sampling circuit and method for phase compensation to solve the problem in the prior art that the real-time phase offset cannot be compensated in a timely manner, resulting in an offset in the test results.

[0006] To provide a basic understanding of some aspects of the disclosed embodiments, a simple summary is given below. This summary part is not a general review, nor is it intended to identify key / important constituent elements or delineate the protection scope of these embodiments. Its sole purpose is to present some concepts in a simple form as a prelude to the subsequent detailed description.

[0007] According to the first aspect of the embodiments of the present invention, a synchronous detection sampling circuit for phase compensation is provided.

[0008] In one embodiment, a synchronous detection sampling circuit for phase compensation includes:

[0009] A sampling and amplifying circuit that collects and amplifies the voltage signal formed by the positive and negative electrodes of the lithium battery;

[0010] An RC phase adjustment circuit that collects phase information from a constant current source, outputs a reference signal for synchronous detection, and adjusts the phase of the reference signal according to the resistance value of a digital potentiometer;

[0011] A signal amplification circuit that performs in-phase amplification on the output signal of the sampling and amplification circuit and performs an inverting process on the in-phase amplified circuit signal;

[0012] An analog switch and a low-pass filter circuit that use the reference signal output by the RC phase modulation circuit as a switching quantity to control the positive-phase and inverting outputs of the signal amplification circuit; and attenuate the high-order harmonics in the synchronous detection;

[0013] A temperature monitoring signal transmitting circuit that inputs a reference voltage into an operational circuit;

[0014] An operational circuit that respectively amplifies the low-pass filtered output signal and the circuit temperature monitoring signal, and suppresses common-mode interference through differential output;

[0015] An analog-to-digital conversion circuit that converts the analog signal output by the operational circuit into a digital quantity;

[0016] The analog switch and low-pass filter circuit are connected to the operational circuit, the signal amplification circuit, and the RC phase modulation circuit. The signal amplification circuit is connected to the sampling and amplification circuit. The operational circuit is connected to the temperature monitoring signal transmitting circuit and the analog-to-digital conversion circuit.

[0017] In one embodiment, the RC phase modulation circuit includes operational amplifiers U1A, U1B, U3B, U4A, resistors R1, R2, R3, R4, R5, R6, R7, capacitors C1, C2, and a digital potentiometer U2;

[0018] Among them, the third terminal of operational amplifier U1A is connected to one end of resistor R1, the first terminal of operational amplifier U1A is connected to one end of resistor R2, and the other end of resistor R2 is sequentially connected to one end of capacitor C1, one end of resistor R6, one end of resistor R7, and the fifth terminal of operational amplifier U1B;

[0019] The seventh terminal of operational amplifier U1B is connected to one end of resistor R3, the other end of resistor R3 is sequentially connected to one end of resistor R4, the seventh and eighth terminals of digital potentiometer U2, the other end of resistor R4 is sequentially connected to one end of capacitor C2 and the first terminal of digital potentiometer U2, the other end of capacitor C2 is sequentially connected to the sixth terminal of operational amplifier U3B and one end of resistor R5, and the seventh terminal of operational amplifier U3B is sequentially connected to the other end of resistor R5 and the second terminal of operational amplifier U4A.

[0020] In one embodiment, operational amplifiers U1A, U1B, resistor R1, resistor R2, resistor R6, resistor R7, and capacitor C1 form a first-stage circuit to perform low-pass filtering on the sampling signal;

[0021] The digital potentiometer U2, resistor R3, resistor R4, and capacitor C2 form a phase modulation circuit, and in combination with operational amplifier U3B, resistor R5, and operational amplifier U4A, perform phase modulation on the reference signal.

[0022] In one embodiment, the sampling and amplifying circuit includes capacitor C3, capacitor C4, capacitor C5, capacitor C6, capacitor C7, capacitor C8, resistor R20, resistor R21, resistor R22, and operational amplifier U8;

[0023] Among them, capacitor C3 is in parallel with capacitor C4, capacitor C5, capacitor C6, and capacitor C7, and is connected to one end of resistor R20;

[0024] The other end of resistor R20 is sequentially connected to one end of resistor R21 and the second terminal of operational amplifier U8. The sixth terminal of operational amplifier U8 is connected to the other end of resistor R21. The third terminal of operational amplifier U8 is sequentially connected to one end of resistor R22 and one end of capacitor C8.

[0025] In one embodiment, capacitor C8 and resistor R22 form a high-pass filter circuit for filtering the sampling signal.

[0026] In one embodiment, the signal amplifying circuit includes operational amplifiers U7A, U7B, resistor R16, resistor R17, resistor R18, and resistor R19;

[0027] Among them, the second terminal of operational amplifier U7A is sequentially connected to one end of resistor R19 and one end of resistor R16. The other end of resistor R19 is sequentially connected to the first terminal of operational amplifier U7A and one end of resistor R17. The other end of resistor R17 is sequentially connected to the sixth terminal of operational amplifier U7B and one end of resistor R18. The other end of resistor R18 is connected to the seventh terminal of operational amplifier U7B.

[0028] In one embodiment, the signal amplifying circuit includes an in-phase amplification part and an anti-phase amplification part, and the amplitudes of the in-phase signal and the anti-phase signal are equal.

[0029] In one embodiment, the operational circuit includes resistor R8, resistor R9, resistor R10, resistor R11, resistor R12, resistor R13, resistor R14, resistor R15, operational amplifiers U5A, U5B, U6A, and U6B;

[0030] Among them, the first terminal of operational amplifier U5A is connected to one end of resistor R9 and one end of resistor R8. The other end of resistor R8 is connected to one end of resistor R10. The other end of resistor R10 is sequentially connected to one end of resistor R11 and the first terminal of operational amplifier U5B. The other end of resistor R11 is connected to one end of resistor R12. The other end of resistor R12 is sequentially connected to the second terminal of operational amplifier U5A and one end of resistor R13. The other end of resistor R13 is sequentially connected to the second terminal and the third terminal of operational amplifier U6A. The third terminal of operational amplifier U5A is connected to the first terminal of operational amplifier U6A;

[0031] The second terminal of operational amplifier U5B is sequentially connected to one end of resistor R14 and one end of resistor R15. The other end of resistor R14 is sequentially connected to the third terminal and the second terminal of operational amplifier U6B. The third terminal of operational amplifier U5B is connected to the first terminal of operational amplifier U6B.

[0032] In one embodiment, the analog switch and the low-pass filter circuit include analog switch U11C, resistor R26, resistor R27, capacitor C12, and capacitor C13;

[0033] Among them, the fourth terminal of analog switch U11C is connected to one end of resistor R26. The other end of resistor R26 is connected to one end of capacitor C12 and one end of resistor R27. The other end of resistor R27 is connected to one end of capacitor C13.

[0034] According to the second aspect of the embodiments of the present invention, a synchronous detection sampling method for phase compensation is provided.

[0035] In one embodiment, the synchronous detection sampling method for phase compensation includes:

[0036] Utilize a constant current source to output a constant current signal, form a voltage signal across the positive and negative electrodes of the lithium battery, and collect and amplify the voltage signal formed across the positive and negative electrodes of the lithium battery through a sampling and amplifying circuit;

[0037] Perform in-phase amplification processing on the output signal of the sampling and amplifying circuit, and perform anti-phase processing on the in-phase amplification circuit signal; through an RC phase adjustment circuit, collect phase information from the constant current source, output a reference signal for synchronous detection, and adjust the phase of the reference signal according to the resistance value of the digital potentiometer;

[0038] Use the reference signal output by the RC phase adjustment circuit as a switching quantity to control the positive-phase and anti-phase outputs of the signal amplification circuit; attenuate the high-order harmonics in the synchronous detection;

[0039] Through a temperature monitoring signal transmitting circuit, input a reference voltage into the arithmetic circuit, and respectively perform amplification processing on the low-pass filtered output signal and the circuit temperature monitoring signal, and suppress common-mode interference through differential output; convert the analog quantity signal output by the arithmetic circuit into a digital quantity.

[0040] The technical solutions provided by the embodiments of the present invention may include the following beneficial effects:

[0041] (1) The present invention optimizes the processing process of the signal to be measured by using synchronous detection in the tester, improving the convenience and reliability of test debugging.

[0042] (2) The present invention precisely compensates the phase of the 1KHZ reference signal in a small range by adjusting the resistance value of the digital potentiometer through a single-chip microcomputer. That is, compensating the phase by adjusting the resistance value of the digital potentiometer through a single-chip microcomputer is more convenient than the prior art and has a higher compensation accuracy.

[0043] (3) The present invention realizes real-time regulation of the resistance value of the digital potentiometer by real-time sampling of the numerical change of the temperature monitoring signal through a single-chip microcomputer, and further realizes real-time compensation of the phase of the reference signal for synchronous detection sampling. That is, it can realize real-time compensation of the real-time offset of the phase of the synchronous detection reference signal affected by temperature.

[0044] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The drawings herein are incorporated into the specification and constitute a part of this specification, showing embodiments consistent with the present invention, and are used together with the specification to explain the principles of the present invention.

[0046] Figure 1 is a schematic diagram of an implementation scheme of a synchronous detection sampling circuit for phase compensation shown according to an exemplary embodiment;

[0047] Figure 2 is an RC phase modulation circuit diagram shown according to an exemplary embodiment;

[0048] Figure 3 is a sampling and amplifying circuit diagram shown according to an exemplary embodiment;

[0049] Figure 4 is a signal amplifying circuit diagram shown according to an exemplary embodiment;

[0050] Figure 5 is an operational circuit diagram shown according to an exemplary embodiment;

[0051] Figure 6 is a temperature monitoring signal transmitting circuit diagram shown according to an exemplary embodiment;

[0052] Figure 7 is an analog switch and low-pass filter circuit diagram shown according to an exemplary embodiment;

[0053] Figure 8is a circuit diagram of an analog-to-digital converter shown according to an exemplary embodiment;

[0054] Figure 9 is a schematic block diagram of a synchronous detection sampling circuit for phase compensation shown according to an exemplary embodiment;

[0055] Figure 10 is a flowchart of a synchronous detection sampling method for phase compensation shown according to an exemplary embodiment. Detailed implementation manners

[0056] The terms "longitudinal", "transverse", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. in this article indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing this article and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation. Therefore, it should not be understood as a limitation to the present invention. In the description of this article, unless otherwise specified and defined, the terms "mounted", "connected", and "connected" should be understood in a broad sense. For example, it can be a mechanical connection or an electrical connection, or it can be the communication inside two elements. It can be directly connected or indirectly connected through an intermediate medium. For those of ordinary skill in the art, the specific meanings of the above terms can be understood according to specific situations.

[0057] In this article, unless otherwise stated, the term "plurality" means two or more.

[0058] In this article, the character " / " means that the objects before and after are in an "or" relationship. For example, A / B means: A or B.

[0059] In this article, the term "and / or" is an association relationship describing an object, indicating that three relationships can exist. For example, A and / or B means: A or B, or, the three relationships of A and B.

[0060] It should be understood that although the steps in the flowchart are displayed sequentially according to the indication of the arrows, these steps do not necessarily have to be executed in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps does not have a strict order limit, and these steps can be executed in other orders. Moreover, at least a part of the steps in the figure may include multiple sub-steps or multiple stages. These sub-steps or stages do not necessarily have to be executed at the same moment, but can be executed at different moments. The execution order of these sub-steps or stages does not necessarily have to be sequential, but can be executed alternately or alternately with at least a part of other steps or sub-steps or stages of other steps.

[0061] Each module in the device or system of the present application can be implemented in whole or in part by software, hardware, or a combination thereof. The above-mentioned modules can be embedded in the processor of the computer device in hardware form or be independent of it, or be stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each of the above modules.

[0062] Without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other.

[0063] Figure 9 An embodiment of a synchronous detection and sampling circuit for phase compensation according to the present invention is shown.

[0064] In this alternative embodiment, the synchronous detection and sampling circuit for phase compensation includes:

[0065] A sampling and amplifying circuit that collects and amplifies the voltage signal formed between the positive and negative electrodes of the lithium battery.

[0066] An RC phase adjustment circuit that collects phase information from the constant current source, outputs a reference signal for synchronous detection, and adjusts the phase of the reference signal according to the resistance value of the digital potentiometer.

[0067] A signal amplifying circuit that performs in-phase amplification on the output signal of the sampling and amplifying circuit and performs an inverting process on the in-phase amplified circuit signal.

[0068] An analog switch and a low-pass filter circuit that use the reference signal output by the RC phase adjustment circuit as a switching quantity to control the positive-phase and inverting outputs of the signal amplifying circuit; and attenuate the high-order harmonics in the synchronous detection.

[0069] A temperature monitoring signal transmitting circuit that inputs a reference voltage into the arithmetic circuit.

[0070] An arithmetic circuit that respectively amplifies the output signal of the low-pass filter and the circuit temperature monitoring signal, and suppresses the common-mode interference through differential output.

[0071] An analog-to-digital conversion circuit that converts the analog signal output by the arithmetic circuit into a digital quantity.

[0072] The analog switch and the low-pass filter circuit are connected to the arithmetic circuit, the signal amplifying circuit, and the RC phase adjustment circuit. The signal amplifying circuit is connected to the sampling and amplifying circuit. The arithmetic circuit is connected to the temperature monitoring signal transmitting circuit and the analog-to-digital conversion circuit.

[0073] In this alternative embodiment, the RC phase modulation circuit includes operational amplifier U1A, operational amplifier U1B, operational amplifier U3B, operational amplifier U4A, resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, capacitor C1, capacitor C2, and digital potentiometer U2. Among them, the third terminal of operational amplifier U1A is connected to one end of resistor R1, the first terminal of operational amplifier U1A is connected to one end of resistor R2, and the other end of resistor R2 is successively connected to one end of capacitor C1, one end of resistor R6, one end of resistor R7, and the fifth terminal of operational amplifier U1B. The seventh terminal of operational amplifier U1B is connected to one end of resistor R3, the other end of resistor R3 is successively connected to one end of resistor R4, the seventh and eighth terminals of digital potentiometer U2, and the other end of resistor R4 is successively connected to one end of capacitor C2 and the first terminal of digital potentiometer U2. The other end of capacitor C2 is successively connected to the sixth terminal of operational amplifier U3B and one end of resistor R5, and the seventh terminal of operational amplifier U3B is successively connected to the other end of resistor R5 and the second terminal of operational amplifier U4A.

[0074] In this alternative embodiment, operational amplifier U1A, operational amplifier U1B, resistor R1, resistor R2, resistor R6, resistor R7, and capacitor C1 form the first-stage circuit to perform low-pass filtering on the sampling signal. Digital potentiometer U2, resistor R3, resistor R4, and capacitor C2 form the phase modulation circuit, and in combination with operational amplifier U3B, resistor R5, and operational amplifier U4A, perform phase modulation on the reference signal.

[0075] In this alternative embodiment, the sampling and amplifying circuit includes capacitor C3, capacitor C4, capacitor C5, capacitor C6, capacitor C7, capacitor C8, resistor R20, resistor R21, resistor R22, and operational amplifier U8. Among them, capacitor C3 is in parallel with capacitor C4, capacitor C5, capacitor C6, and capacitor C7 and is connected to one end of resistor R20. The other end of resistor R20 is successively connected to one end of resistor R21 and the second terminal of operational amplifier U8. The sixth terminal of operational amplifier U8 is connected to the other end of resistor R21. The third terminal of operational amplifier U8 is successively connected to one end of resistor R22 and one end of capacitor C8.

[0076] In this alternative embodiment, capacitor C8 and resistor R22 form a high-pass filter circuit for filtering the sampling signal.

[0077] In this alternative embodiment, the signal amplifying circuit includes operational amplifier U7A, operational amplifier U7B, resistor R16, resistor R17, resistor R18, and resistor R19. Among them, the second terminal of operational amplifier U7A is successively connected to one end of resistor R19 and one end of resistor R16. The other end of resistor R19 is successively connected to the first terminal of operational amplifier U7A and one end of resistor R17. The other end of resistor R17 is successively connected to the sixth terminal of operational amplifier U7B and one end of resistor R18. The other end of resistor R18 is connected to the seventh terminal of operational amplifier U7B.

[0078] In this alternative embodiment, the signal amplification circuit includes a non-inverting amplification part and an inverting amplification part, and the amplitudes of the non-inverting signal and the inverting signal are equal.

[0079] In this alternative embodiment, the operational circuit includes resistor R8, resistor R9, resistor R10, resistor R11, resistor R12, resistor R13, resistor R14, resistor R15, operational amplifier U5A, operational amplifier U5B, operational amplifier U6A, and operational amplifier U6B; wherein, the first terminal of operational amplifier U5A is connected to one end of resistor R9 and one end of resistor R8, the other end of resistor R8 is connected to one end of resistor R10, the other end of resistor R10 is sequentially connected to one end of resistor R11 and the first terminal of operational amplifier U5B, the other end of resistor R11 is connected to one end of resistor R12, the other end of resistor R12 is sequentially connected to the second terminal of operational amplifier U5A and one end of resistor R13, the other end of resistor R13 is sequentially connected to the second terminal and the third terminal of operational amplifier U6A, and the third terminal of operational amplifier U5A is connected to the first terminal of operational amplifier U6A; the second terminal of operational amplifier U5B is sequentially connected to one end of resistor R14 and one end of resistor R15, the other end of resistor R14 is sequentially connected to the third terminal and the second terminal of operational amplifier U6B, and the third terminal of operational amplifier U5B is connected to the first terminal of operational amplifier U6B.

[0080] In this alternative embodiment, the analog switch and the low-pass filter circuit include analog switch U11C, resistor R26, resistor R27, capacitor C12, and capacitor C13; wherein, the fourth terminal of analog switch U11C is connected to one end of resistor R26, the other end of resistor R26 is connected to one end of capacitor C12 and one end of resistor R27, and the other end of resistor R27 is connected to one end of capacitor C13.

[0081] Figure 10 An embodiment of a synchronous detection sampling method for phase compensation according to the present invention is shown.

[0082] In this alternative embodiment, the synchronous detection sampling method for phase compensation includes:

[0083] S101: Use a constant current source to output a constant current signal, form a voltage signal across the positive and negative electrodes of the lithium battery, and collect and amplify the voltage signal formed across the positive and negative electrodes of the lithium battery through a sampling and amplification circuit.

[0084] S102: Perform non-inverting amplification processing on the output signal of the sampling and amplification circuit, and perform inverting processing on the non-inverting amplification circuit signal; collect phase information from the constant current source through an RC phase adjustment circuit, output a reference signal for synchronous detection, and adjust the phase of the reference signal according to the resistance value of the digital potentiometer.

[0085] S103. Use the reference signal output by the RC phase modulation circuit as a switching quantity to control the positive and negative outputs of the signal amplification circuit; attenuate the high-order harmonics in the synchronous detection.

[0086] S104. Through the temperature monitoring signal transmitting circuit, input the reference voltage into the arithmetic circuit, and amplify the low-pass filtered output signal and the circuit temperature monitoring signal respectively. Suppress the common-mode interference through the differential output method; convert the analog signal output by the arithmetic circuit into a digital quantity.

[0087] To facilitate the understanding of the above technical solution of the present invention, the above technical solution of the present invention will be further described from the perspectives of architecture and principle as follows:

[0088] In synchronous detection, the phase relationship between the reference signal and the signal to be measured is the core factor determining the demodulation performance. The present invention provides an efficient phase compensation method for synchronous detection sampling in the process of measuring the internal resistance of lithium batteries. The present invention uses a digital potentiometer to replace the original mechanical potentiometer, and can compensate the real-time phase offset caused by temperature in cooperation with the circuit temperature detection circuit.

[0089] During the manufacturing process of lithium batteries, a 1KHZ AC signal is required as the excitation source to measure the ohmic internal resistance of lithium batteries. Therefore, the corresponding tester will use the synchronous detection method to process the signal to be measured. The present invention precisely optimizes this process, improving the convenience and reliability of test debugging.

[0090] As Figure 1 shown, a 1KHZ constant current source forms a 1KHZ AC voltage on the lithium battery. After being amplified by the sampling and amplification circuit, it is then subjected to in-phase amplification and anti-phase amplification to obtain two signals with the same amplitude and a phase difference of 180°. At the same time, the RC phase modulation circuit collects the phase information of the original 1KHZ constant current source to form a reference signal (1KHZ square wave signal). Since in synchronous detection, the phase relationship between the reference signal and the signal to be measured is the core factor determining the demodulation performance. The smaller the gap between the two, the more the demodulated signal can reflect the amplitude characteristics of the effective signal (1KHZ signal). Therefore, in the RC phase modulation circuit of the present invention, a digital potentiometer is connected in series with a capacitor, and the single-chip microcomputer sends a signal to adjust the resistance value of the digital potentiometer to adjust the phase of the reference signal, so that the reference signal is in phase with the signal to be measured.

[0091] In the present invention, at the analog switch, the reference signal is used as a switching quantity to alternately conduct the in-phase signal to be measured and the anti-phase signal to be measured. Then, synchronous detection sampling is realized through the low-pass filter circuit, and the amplitude information of the effective signal is converted into a direct current quantity. Finally, the analog signal is converted into a digital signal through the arithmetic circuit and the analog-to-digital conversion circuit and sent to the single-chip microcomputer for processing.

[0092] The present invention also adds a temperature monitoring signal at the arithmetic circuit. This signal and the sampling signal alternately pass through the arithmetic circuit, so the change in the magnitude of its signal can reflect the change in the circuit temperature. Through the calculation and adjustment of the single-chip microcomputer, temperature compensation for the phase of the reference signal can be achieved.

[0093] The following is the calculation process of the single-chip microcomputer for the temperature compensation function of the reference signal phase:

[0094] When the temperature is T1 °C, the magnitude of the temperature monitoring signal after passing through the arithmetic circuit is U1, and the signal obtained by synchronous demodulation is U2. At this time, the resistance value of the corresponding digital potentiometer is R0; when the temperature is T2 °C, the magnitude of the temperature monitoring signal after passing through the arithmetic circuit is U3, and the signal obtained by synchronous demodulation is U4. At this time, the resistance value of the digital potentiometer needs to be adjusted to R1 so that the signal obtained by synchronous demodulation changes from U4 to U2, ensuring that there is no deviation in the measured value of the same test item after the temperature change. Therefore, whenever the magnitude of the temperature monitoring signal changes by (U3 - U1), the resistance value of the digital potentiometer corresponding to (R1 - R0) needs to be adjusted. That is, in order to minimize the influence of temperature on the signal obtained by synchronous demodulation, the single-chip microcomputer needs to adjust the resistance value of the digital potentiometer according to the calculation method of (where is the real-time value of the temperature monitoring signal after passing through the arithmetic circuit).

[0095] Figure 1 This is the implementation scheme diagram of the present invention. 1 is a 1KHZ constant current source, which outputs a 1KHZ constant current signal to form a 1KHZ voltage signal at the positive and negative electrodes of the lithium battery; 2 is a sampling and amplifying circuit, which collects and amplifies the 1KHZ voltage signal formed at both ends of the positive and negative electrodes of the lithium battery; 3 is an RC phase adjustment circuit, which collects phase information from the 1KHZ constant current source and outputs a 1KHZ square wave with a duty cycle of 50% as the reference signal for synchronous demodulation. At the same time, the resistance value of the digital potentiometer inside the circuit can be adjusted through the single-chip microcomputer, thereby adjusting the phase of the reference signal; 4 is a non-inverting amplifying circuit, which performs non-inverting amplification on the output signal of the sampling and amplifying circuit; 5 is an inverting amplifying circuit, which performs inverting processing on the signal of the non-inverting amplifying circuit; 6 is a single-chip microcomputer, which performs data processing and digital quantity control; 7 is an analog switch, which uses the reference signal output by the RC phase adjustment circuit as a digital quantity to control the alternate conduction of the output of the non-inverting amplifying circuit and the output of the inverting amplifying circuit, realizing synchronous demodulation of the 1KHZ effective signal in the sampling signal; 8 is the circuit temperature monitoring signal, which generates a stable reference voltage of 2V and inputs it into the arithmetic circuit; 9 is a low-pass filtering circuit, which attenuates the high-order harmonics in the synchronous demodulation; 10 is an arithmetic circuit, which respectively amplifies the output signal of the low-pass filtering and the circuit temperature monitoring signal, and suppresses the common-mode interference through differential output; 11 is an analog-to-digital conversion circuit, which converts the analog signal output by the arithmetic circuit into a digital quantity and sends it to the single-chip microcomputer.

[0096] Figure 2 This is the circuit diagram of RC phase modulation. Among them, operational amplifiers U1A and U1B (TL062CDT), resistors R1, R2, R6, R7, and capacitor C1 form the first-stage circuit, which performs low-pass filtering on the sampling signal and superimposes a 2.5V DC voltage on the sampling signal to facilitate subsequent signal processing.

[0097] The digital potentiometer U2 (MAX5402), resistors R3, R4, and capacitor C2 form a phase modulation circuit. Pins 1, 7, and 8 of the digital potentiometer U2 (MAX5402) are equivalent to adjustable resistors and are in parallel with resistor R4; pins 2 and 6 of the digital potentiometer U2 (MAX5402) are connected to GND and 5V respectively to ensure the normal operation of the chip; pins 3, 4, and 5 of the digital potentiometer U2 (MAX5402) are the chip select, serial input, and clock pins respectively, which are connected to the single-chip microcomputer to adjust the resistance value. According to the phase angle formula , is the capacitive reactance of capacitor C2, and its value is (f is the frequency of the signal to be measured, 1KHZ), is the capacitance value of capacitor C2; resistor R is the equivalent resistance of the circuit composed of resistors R3, R4, and the digital potentiometer U2 (MAX5402). Among them, the digital potentiometer U2 (MAX5402) can be linearly adjusted within the range of 0 - 10KΩ through the control of the single-chip microcomputer, so 13KΩ ≤ R ≤ 16.38KΩ; substituting the capacitive reactance and the value of resistor R into the phase angle formula, we can get 44.18° ≤ ≤ 50.75°, that is, the phase angle of the reference signal can be accurately adjusted within the above range.

[0098] Finally, through the follower processing of operational amplifier U3B (OPA2188AID) and resistor R5, and then through the shaping of the zero-crossing comparator operational amplifier U4A (LM2903), the phase-modulated reference signal is obtained.

[0099] Figure 3 This is the sampling and amplification circuit diagram. Since the internal resistance of the lithium battery is generally at the mΩ level, the amplitude of the collected signal is very small and needs to be amplified. In the figure, capacitor C8 and resistor R22 form a high-pass filter circuit, and the cut-off frequency is , is the resistance value of resistor R22, is the capacitance value of capacitor C8, and it has almost no attenuation effect on the 1KHZ sampling signal. According to the virtual short principle of the operational amplifier, the voltage at the non-inverting terminal 3 of operational amplifier U8 (OPA1611A) is the same as the voltage at the inverting terminal 2 of the operational amplifier; according to the virtual open principle of the operational amplifier, the current flowing through resistor R20, resistor R21, and capacitors C3, C4, C5, C6, and C7 as a whole is the same. Therefore, it can be obtained that the signal to be measured obtained after the 1KHZ sampling signal passes through this sampling and amplification circuit is about 61 times the original.

[0100] Figure 4 This is the signal amplification circuit diagram. According to the virtual short principle of the operational amplifier, the voltages at the inverting and non-inverting terminals of operational amplifiers U7A and U7B (OPA2188AID) are equal, both being 0V; according to the virtual open principle of the operational amplifier, the currents flowing through resistors R16, R17, R18, and R19 are equal in magnitude; therefore, the inverted signal is amplified 4 times compared to the signal to be measured, but the phase deviates by 180°, and the non-inverted signal has the same amplitude as the inverted signal, but the phase deviates by 180°.

[0101] Figure 5 This is the operational circuit diagram. Among them, U5A and U5B are operational amplifier chips (OPA2188AID), and U6A and U6B are operational amplifier chips (OPA2340UA). According to the virtual open principle of the operational amplifier, it can be known that the currents at the inverting and non-inverting terminals of operational amplifiers U5A, U5B, U6A, and U6B can be approximately equivalent to 0, so it can be obtained that the currents flowing through R8 and R9 are equal, the currents flowing through R10 and R11 are equal, the currents flowing through R12 and R13 are equal, and the currents flowing through R14 and R15 are equal. According to the virtual short principle of the operational amplifier, it can be known that the potentials at the inverting and non-inverting terminals of operational amplifier U5A are the same, the potentials at the inverting and non-inverting terminals of operational amplifier U5B are the same, the potentials at the inverting and non-inverting terminals of operational amplifier U6A are the same, and the potentials at the inverting and non-inverting terminals of operational amplifier U6B are the same. Based on the above two principles, the positive voltage of the differential input of the AD chip , the negative voltage of the differential input of the AD chip , represents the input voltage of the operational circuit, so the gain coefficient of the operational circuit .

[0102] Figure 6 This is the temperature monitoring signal transmission circuit diagram, including voltage reference chip U9, capacitor C9, capacitor C10, capacitor C11, resistor R23, resistor R24, resistor R25, and operational amplifier U10A. The 9V DC voltage input is output as a stable 7V DC voltage through voltage reference chip U9 (ADR4550), then a stable 2V DC voltage is obtained through the voltage division of resistors R23 and R25, and then the operational amplifier U10A (OPA2188AID) is used to isolate the front and rear circuits and output a stable 2V DC temperature monitoring signal. Among them, capacitors C9, C10, and C11 play a role in stabilizing the input and output.

[0103] Figure 7It is a circuit diagram of a analog switch and a low-pass filter. The reference signal output by the RC phase modulation circuit is used as a switching quantity to control the in-phase amplification signal input pin and the anti-phase amplification input pin of the analog switch U11C (MC14020B) to conduct alternately. The output passes through two low-pass filters composed of resistor R26, capacitor C12 and resistor R27, capacitor C13, and the finally modulated signal is output, which is also the input signal of the operational circuit. The cut-off frequencies of the two low-pass filters are both (R is the resistance value in the low-pass filter circuit, and C is the capacitance value in the low-pass filter).

[0104] Figure 8 It is Figure 1 the analog-to-digital conversion circuit in

[0105] The present invention is not limited to the structure already described and shown in the drawings, and various modifications and changes can be made without departing from its scope. The scope of the present invention is only limited by the appended claims.

Claims

1. A synchronous detection sampling circuit for phase compensation, characterized in that: include: The sampling and amplification circuit collects and amplifies the voltage signals formed by the positive and negative electrodes of the lithium battery; The RC phase modulation circuit collects phase information from the constant current source, outputs a reference signal for synchronous detection, and adjusts the phase of the reference signal according to the resistance value of the digital potentiometer; specifically, the circuit includes: adjusting the resistance value of the digital potentiometer inside the circuit through the single chip microcomputer to adjust the phase of the reference signal; The signal amplifying circuit performs in-phase amplification processing on the output signal of the sampling amplifying circuit and performs in-phase processing on the signal of the in-phase amplifying circuit; The analog switch and low-pass filter circuit uses the reference signal output by the RC phase modulation circuit as the switch quantity to control the positive and negative phase outputs of the signal amplifier circuit; and attenuates the high-order harmonics in the synchronous detection; A temperature monitoring signal transmitting circuit generates a temperature monitoring signal and inputs the temperature monitoring signal into an operation circuit; The operation circuit amplifies the low-pass filter output signal and the temperature monitoring signal respectively, and suppresses common-mode interference by differential output; The analog-to-digital conversion circuit converts the analog signal output by the operation circuit into a digital signal and sends it to the single-chip microcomputer; The analog switch is connected to the low-pass filter circuit, the operation circuit, the signal amplification circuit and the RC phase modulation circuit; the signal amplification circuit is connected to the sampling amplification circuit; the operation circuit is connected to the temperature monitoring signal transmission circuit and the analog-to-digital conversion circuit.

2. A synchronous detection sampling circuit for phase compensation according to claim 1, characterized in that: The RC phase modulation circuit includes an operational amplifier U1A, an operational amplifier U1B, an operational amplifier U3B, an operational amplifier U4A, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a capacitor C1, a capacitor C2 and a digital potentiometer U2; The third end of the operational amplifier U1A is connected to one end of the resistor R1, the first end of the operational amplifier U1A is connected to one end of the resistor R2, and the other end of the resistor R2 is sequentially connected to one end of the capacitor C1, one end of the resistor R6, one end of the resistor R7, and the fifth end of the operational amplifier U1B; The seventh end of the operational amplifier U1B is connected to one end of the resistor R3, the other end of the resistor R3 is connected to one end of the resistor R4 and the seventh and eighth ends of the digital potentiometer U2 in sequence, the other end of the resistor R4 is connected to one end of the capacitor C2 and the first end of the digital potentiometer U2 in sequence, the other end of the capacitor C2 is connected to the sixth end of the operational amplifier U3B and one end of the resistor R5 in sequence, and the seventh end of the operational amplifier U3B is connected to the other end of the resistor R5 and the second end of the operational amplifier U4A in sequence.

3. A synchronous detection sampling circuit for phase compensation according to claim 2, characterized in that: The operational amplifier U1A, the operational amplifier U1B, the resistor R1, the resistor R2, the resistor R6, the resistor R7 and the capacitor C1 constitute a first-stage circuit for performing low-pass filtering on the sampling signal; The digital potentiometer U2, the resistor R3, the resistor R4 and the capacitor C2 form a phase adjustment circuit, and in combination with the operational amplifier U3B, the resistor R5 and the operational amplifier U4A, the reference signal is phase adjusted.

4. A synchronous detection sampling circuit for phase compensation according to claim 1, characterized in that: The sampling and amplifying circuit includes capacitor C3, capacitor C4, capacitor C5, capacitor C6, capacitor C7, capacitor C8, resistor R20, resistor R21, resistor R22 and operational amplifier U8; The capacitor C3 is connected in parallel with the capacitor C4, the capacitor C5, the capacitor C6 and the capacitor C7, and is connected to one end of the resistor R20; The other end of the resistor R20 is connected to one end of the resistor R21 and the second end of the operational amplifier U8 in sequence, the sixth end of the operational amplifier U8 is connected to the other end of the resistor R21, and the third end of the operational amplifier U8 is connected to one end of the resistor R22 and one end of the capacitor C8 in sequence.

5. A synchronous detection sampling circuit for phase compensation according to claim 4, characterized in that: The capacitor C8 and the resistor R22 form a high-pass filter circuit for filtering the sampling signal.

6. A synchronous detection sampling circuit for phase compensation according to claim 1, characterized in that: The signal amplification circuit includes an operational amplifier U7A, an operational amplifier U7B, a resistor R16, a resistor R17, a resistor R18 and a resistor R19; Among them, the second end of the operational amplifier U7A is connected to one end of the resistor R19 and one end of the resistor R16 in sequence, the other end of the resistor R19 is connected to the first end of the operational amplifier U7A and one end of the resistor R17 in sequence, the other end of the resistor R17 is connected to the sixth end of the operational amplifier U7B and one end of the resistor R18 in sequence, and the other end of the resistor R18 is connected to the seventh end of the operational amplifier U7B.

7. A synchronous detection sampling circuit for phase compensation according to claim 6, characterized in that: The signal amplifying circuit comprises an in-phase amplifying part and an inverting amplifying part, and the amplitudes of the in-phase signal and the inverting signal are equal.

8. The synchronous detection sampling circuit for phase compensation according to claim 1, characterized in that: The operation circuit includes a resistor R8, a resistor R9, a resistor R10, a resistor R11, a resistor R12, a resistor R13, a resistor R14, a resistor R15, an operational amplifier U5A, an operational amplifier U5B, an operational amplifier U6A and an operational amplifier U6B; Wherein, a first end of the operational amplifier U5A is connected to one end of the resistor R9 and one end of the resistor R8, the other end of the resistor R8 is connected to one end of the resistor R10, the other end of the resistor R10 is sequentially connected to one end of the resistor R11 and the first end of the operational amplifier U5B, the other end of the resistor R11 is connected to one end of the resistor R12, the other end of the resistor R12 is sequentially connected to the second end of the operational amplifier U5A and one end of the resistor R13, the other end of the resistor R13 is sequentially connected to the second end and the third end of the operational amplifier U6A, and the third end of the operational amplifier U5A is connected to the first end of the operational amplifier U6A; The second end of the operational amplifier U5B is connected to one end of the resistor R14 and one end of the resistor R15 in sequence, the other end of the resistor R14 is connected to the third end and the second end of the operational amplifier U6B in sequence, and the third end of the operational amplifier U5B is connected to the first end of the operational amplifier U6B.

9. The synchronous detection sampling circuit for phase compensation according to claim 1, characterized in that: The analog switch and low-pass filter circuit includes an analog switch U11C, a resistor R26, a resistor R27, a capacitor C12 and a capacitor C13; The fourth end of the analog switch U11C is connected to one end of the resistor R26, the other end of the resistor R26 is connected to one end of the capacitor C12 and one end of the resistor R27, and the other end of the resistor R27 is connected to one end of the capacitor C13.

10. A synchronous detection sampling method for phase compensation, characterized in that: include: A constant current source is used to output a constant current signal to form a voltage signal at the positive and negative electrodes of the lithium battery, and the voltage signal formed at the positive and negative electrodes of the lithium battery is collected and amplified by a sampling and amplification circuit; Perform in-phase amplification processing on the output signal of the sampling amplifier circuit, and perform in-phase processing on the signal of the in-phase amplifier circuit; The phase information is collected from the constant current source through the RC phase modulation circuit, and the reference signal of the synchronous detection is output, and the phase of the reference signal is adjusted according to the resistance value of the digital potentiometer; specifically, the method includes: adjusting the resistance value of the digital potentiometer inside the circuit through the single chip microcomputer to adjust the phase of the reference signal; The reference signal output by the RC phase modulation circuit is used as the switching quantity to control the positive and negative phase outputs of the signal amplifier circuit; the high-order harmonics in the synchronous detection are attenuated; A temperature monitoring signal is generated through a temperature monitoring signal transmitting circuit, and the temperature monitoring signal is input into an operation circuit. The low-pass filter output signal and the temperature monitoring signal are amplified respectively, and common-mode interference is suppressed by differential output. The analog signal output by the operation circuit is converted into a digital quantity and sent to the single-chip microcomputer.

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