Switching signal generation module and generation method, and sigma-delta analog-to-digital converter

Abstract

The invention provides a switching signal generation module and method and a sigma-delta analog-to-digital converter, and the module comprises a decoding unit which receives an N-bit binary code, converts the N-bit binary code into a 2N-1-bit thermometer code, and outputs the 2N-1-bit thermometer code; the signal generation unit is connected with the decoding unit, sets a transcoding position and a transcoding direction based on the lowest bit code value in the N-bit binary code, and processes the 2N-1-bit thermometer code based on the transcoding position and the transcoding direction to generate a switching signal; wherein N is a natural number greater than or equal to 2. According to the switching signal generation module, the switching signal generation method and the sigma-delta analog-to-digital converter provided by the invention, the problem of nonlinearity of an N-digit digital-to-analog conversion module in the existing sigma-delta analog-to-digital converter is solved.

Description

Technical Field

[0001] The present invention belongs to the technical field of electronic circuit design, and in particular relates to a switch signal generating module and generating method, and a Σ-Δ analog-to-digital converter. Background Art

[0002] The quantization method inside the Σ-Δ analog-to-digital converter is divided into single-bit quantization and multi-bit quantization, where single-bit quantization means that the converter includes 1 one-bit analog-to-digital conversion module and 1 one-bit digital-to-analog conversion module, and multi-bit quantization means that the converter includes 1 N (N≥2)-bit analog-to-digital conversion module and 1 N-bit digital-to-analog conversion module. In recent years, multi-bit quantization has gradually become the mainstream design direction. The advantages are that it can increase the signal-to-noise ratio, make the system easier to stabilize, generate fewer harmonic components, and make the downsampling filter relatively simple. The disadvantage is that the linearity of the converter depends on the linearity of the digital-to-analog conversion module. However, in practical applications, N-bit digital-to-analog conversion modules usually have nonlinear problems. Therefore, how to improve the nonlinearity of N-bit digital-to-analog conversion modules is a technical problem that technicians in this field are eager to solve.

[0003] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention

[0004] In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a switching signal generating module and generating method, and a Σ-Δ analog-to-digital converter, for solving the nonlinear problem of the N-bit digital-to-analog conversion module in the existing Σ-Δ analog-to-digital converter.

[0005] In order to achieve the above-mentioned object and other related objects, the present invention provides a switch signal generating module, the switch signal generating module comprising:

[0006] The decoding unit receives the N-bit binary code and converts the N-bit binary code into 2 N -1-bit thermometer code is output, where N is a natural number greater than or equal to 2;

[0007] A signal generating unit is connected to the decoding unit, and sets a transcoding position and a transcoding direction based on the lowest bit code value in the N-bit binary code, and performs a transcoding operation based on the transcoding position and the transcoding direction. N -1-bit thermometer code is processed to generate the switching signal.

[0008] Optionally, the signal generating unit includes:

[0009] The transcoding part is connected to the decoding unit and converts 2 N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N -2-bit code value for positive or reverse output;

[0010] A latch part connected to the decoding unit and the transcoding part, N -2nd in the 1-digit thermometer code N-1 The bit code value and the transcoding part output 2 N -2-bit code value is latched and output synchronously.

[0011] Optionally, the transcoding part includes 2 N -2 two-way selectors, the control end of each two-way selector is connected to the lowest bit code value in the N-bit binary code, and the first data end of each two-way selector is connected to 2 N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N -2-bit code value, the second data terminal of each two-way selector is connected to 2 in reverse order. N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N -2-bit code value, the output of each two-way selector outputs 2 N -2-digit code value.

[0012] Optionally, the latch portion includes 2 N -1 latch, respectively for 2 N -2nd in the 1-digit thermometer code N-1 The bit code value and the transcoding part output 2 N -2-bit code value is latched and output synchronously.

[0013] Optionally, the decoding unit is implemented using a thermometer decoder.

[0014] The present invention further provides a Σ-Δ analog-to-digital converter, the Σ-Δ analog-to-digital converter comprising: a switching signal generating module as described in any one of the above.

[0015] Optionally, the Σ-Δ analog-to-digital converter further includes:

[0016] A summing module receives an analog input signal and generates an analog difference signal by performing a difference operation on the analog input signal and an analog feedback signal;

[0017] An integration module, connected to the summing module, integrating the analog difference signal to generate an integration signal;

[0018] An N-bit analog-to-digital conversion module, connected to the integration module, performs analog-to-digital conversion on the integration signal to generate an N-bit binary code and inputs the code to the switch signal generation module;

[0019] An N-bit digital-to-analog conversion module, connected to the switch signal generation module, and performing switch switching based on the switch signal to generate the analog feedback signal;

[0020] The filtering and extraction module is connected to the N-bit analog-to-digital conversion module and performs digital filtering and downsampling on the N-bit binary code to generate a digital output signal.

[0021] Optionally, a differential amplifier module is used to replace the summing module, wherein the non-phase input terminal of the differential amplifier module receives the analog input signal, the inverting input terminal of the differential amplifier module receives the analog feedback signal, and the output terminal of the differential amplifier module generates the analog difference signal.

[0022] The present invention also provides a switch signal generating method, the switch signal generating method comprising:

[0023] Convert N bits of binary code into 2 N -1-bit thermometer code, where N is a natural number greater than or equal to 2;

[0024] The transcoding position and the transcoding direction are set based on the lowest bit code value in the N-bit binary code, and the transcoding position and the transcoding direction are adjusted based on the transcoding position and the transcoding direction. N -1-bit thermometer code is processed to generate the switching signal.

[0025] Optionally, when the control bits in the switch signal are arranged in positive order from left to right, the method for setting the transcoding position and the transcoding direction includes:

[0026] When the lowest bit code value in the N-bit binary code is "0", the first position from the left is set as the transcoding position, and the direction from left to right is set as the transcoding direction;

[0027] When the lowest bit code value in the N-bit binary code is "1", the first position from the right is set as the transcoding position, and the direction from right to left is set as the transcoding direction.

[0028] As described above, the switch signal generating module and generating method, and the Σ-Δ analog-to-digital converter of the present invention, through the design of the transcoding unit and the signal generating unit, propose a new switch switching strategy, which can not only improve the linearity of the Σ-Δ analog-to-digital converter by improving the linearity of the N-bit digital-to-analog conversion module, but also reduce costs by consuming less hardware resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1Shown is a circuit structure schematic diagram of an existing Σ-Δ analog-to-digital converter.

[0030] Figure 2 Display as Figure 1 Schematic diagram of the transcoding module generating switch signals based on binary codes.

[0031] Figure 3 Shown is another circuit structure schematic diagram of an existing Σ-Δ analog-to-digital converter.

[0032] Figure 4 Display as Figure 3 Schematic diagram of the DWA module generating switching signals based on binary code.

[0033] Figure 5 Display as Figure 3 A circuit structure diagram of the DWA module in FIG.

[0034] Figure 6 Display as Figure 5 A schematic diagram of a circuit structure of a barrel shifter.

[0035] Figure 7 Shown is a circuit structure schematic diagram of a switch signal generating module in an embodiment of the present invention.

[0036] Figure 8 It is a schematic diagram showing that a switch signal generating module generates a switch signal based on a binary code in an embodiment of the present invention.

[0037] Fig. 9 Shown is a circuit structure schematic diagram of a Σ-Δ analog-to-digital converter in an embodiment of the present invention.

[0038] Component number description

[0039] 10 Sigma-Delta Analog-to-Digital Converter

[0040] 100 Switch signal generation module

[0041] 110 Decoding unit

[0042] 120 signal generation unit

[0043] 121 Transcoding part

[0044] 122 Latch Section

[0045] 200 summation module

[0046] 300 points module

[0047] 400 N-bit analog-to-digital conversion module

[0048] 500 N-bit D / A conversion module

[0049] 510 Digital to Analog Conversion Unit

[0050] 600 Filter Extraction Module DETAILED DESCRIPTION

[0051] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0052] See also Figures 1 to 9 It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the form, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0053] Figure 1 A circuit structure of a Σ-Δ analog-to-digital converter is shown, including a summing module, an integrating module, an N-bit analog-to-digital conversion module, a transcoding module, an N-bit digital-to-analog conversion module and a filtering and extraction module, N is a natural number greater than or equal to 2, and the connection relationship of each module is shown in the figure; wherein the summing module performs a difference between an analog input signal and an analog feedback signal to generate an analog difference signal, the integrating module integrates the analog difference signal to generate an integral signal, the N-bit analog-to-digital conversion module performs an analog-to-digital conversion on the integral signal to generate an N-bit binary code, and the transcoding module generates a 2 N -1 bit thermometer code is used as the switching signal, the N-bit digital-to-analog conversion module performs switching based on the switching signal to generate an analog feedback signal, and the filtering and extraction module performs digital filtering and downsampling on the N-bit binary code to generate a digital output signal.

[0054] In the above scheme, the N-bit digital-to-analog conversion module includes 2 N -1 digital-to-analog conversion unit, each digital-to-analog conversion unit is based on 2 N -1 bit thermometer code to switch to achieve actuation, where 2 N -1-bit thermometer codes are arranged in positive order and control the 1st to 2nd N -1 digital-to-analog conversion unit; each time data is converted, the first digital-to-analog conversion unit will be activated, and the second digital-to-analog conversion unit to the second N -1 digital-to-analog conversion unit is activated in descending order, that is, the first digital-to-analog conversion unit to the second N-1 digital-to-analog conversion unit corresponding to the switch switching frequency is reduced in turn, resulting in the nonlinearity of the N-bit digital-to-analog conversion module. Taking N = 3 as an example, the transcoding module generates a 7-bit thermometer code as the switch signal based on the 3-bit binary code, and arranges each control bit in the switch signal in positive order and defines it as S0 to S6 in turn. The corresponding relationship between the 3-bit binary code and the switch signal is as follows: Figure 2 As shown; it can be seen from the figure that in the 7 data conversions, from the 1st digital-to-analog conversion unit to the 7th digital-to-analog conversion unit, the number of times actuated is reduced from 7 times to 1 time.

[0055] In order to improve the linearity of the N-bit D / A conversion module, a DWA (data weighted average) switching technology is proposed; Figure 3 As shown, the DWA module is used to replace the transcoding module. N -1 D / A conversion unit performs dynamic element matching (DEM), so that the starting point of the D / A conversion unit activated in the next data conversion is close to the end point of the D / A conversion unit activated in the previous data conversion, ensuring that the number of times each D / A conversion unit is activated during the data conversion process is the same, that is, the switching frequency corresponding to each D / A conversion unit is the same, improving linearity to achieve the purpose of performance optimization. Taking N=3 as an example, the DWA module generates a switch signal based on a 3-bit binary code, where the corresponding relationship between the 3-bit binary code and the switch signal is as follows Figure 4 As shown; it can be seen from the figure that in the 7 data conversions, each digital-to-analog conversion unit is activated the same number of times, which is 4 times.

[0056] Figure 5 The circuit structure of the DWA module is shown in FIG. 1 , which includes a thermometer decoder, a full adder, a register, a barrel shifter, and a latch. The connection relationship of each device is shown in the figure. The thermometer decoder converts the N-bit binary code into a 2-bit binary code. N -1-bit thermometer code, full adder and register constitute accumulator to accumulate the input times of N-bit binary code to generate shift control signal, barrel shifter is controlled by shift control signal pair 2 N -1 bit thermometer code is shifted to generate a switch signal, and the latch latches the switch signal and outputs it to each digital-to-analog conversion unit (as shown in the dotted box in the figure). Taking N=3 as an example, the barrel shifter is composed of 21 two-way selectors, such as Figure 6 shown.

[0057] It can be seen that although the use of the DWA module to dynamically match the components of each digital-to-analog conversion unit can improve the linearity of the N-bit digital-to-analog conversion module, it consumes more hardware resources. This embodiment proposes a switch signal generation module and generation method, and a Σ-Δ analog-to-digital converter, which adopts a new switch switching strategy, which can not only improve the linearity of the N-bit digital-to-analog conversion module, but also reduce costs by consuming less hardware resources.

[0058] like Figure 7 As shown, this embodiment provides a switch signal generating module 100, including a decoding unit 110 and a signal generating unit 120. Among them:

[0059] The decoding unit 110 receives an N-bit binary code and converts the N-bit binary code into a 2-bit binary code. N -1 bit thermometer code is output after it is decoded, where N is a natural number greater than or equal to 2. In one embodiment, the decoding unit 110 is implemented by a thermometer decoder; taking N=3 as an example, the binary code 001 is output as the thermometer code 0000001 after it is decoded by the thermometer decoder, the binary code 010 is output as the thermometer code 0000011 after it is decoded by the thermometer decoder, the binary code 011 is output as the thermometer code 0000111 after it is decoded by the thermometer decoder, the binary code 100 is output as the thermometer code 0001111 after it is decoded by the thermometer decoder, and the binary code 1 01 outputs the thermometer code 0011111 after passing through the thermometer decoder, the binary code 101 outputs the thermometer code 0111111 after passing through the thermometer decoder, and the binary code 111 outputs the thermometer code 1111111 after passing through the thermometer decoder, wherein the 3-bit binary code is arranged from left to right from high to low and is represented by B2B1B0 in sequence, and the 7-bit thermometer code is arranged from left to right in reverse order and is represented by T6T5T4T3T2T1T0 in sequence. It should be noted that the N-bit binary code and 2 N -1-bit thermometer code is transmitted in parallel, which is well known to those skilled in the art and is therefore not specifically described.

[0060] The signal generating unit 120 is connected to the decoding unit 110, and sets the transcoding position and the transcoding direction based on the lowest bit code value in the N-bit binary code, and performs a transcoding operation on the 2 N In one example, the signal generating unit 120 includes a transcoding part 121 and a latch part 122 .

[0061] The transcoding part 121 is connected to the decoding unit 110, and based on the lowest bit code value in the N-bit binary code, the 2 N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N-2-bit code values ​​are output in positive order or in reverse order. Taking N=3 as an example, the 3-bit binary code B2B1B0 is converted into a 7-bit thermometer code T6T5T4T3T2T1T0, wherein the 7-bit thermometer code is T0T1T2T3T4T5T6 when arranged in positive order, and except for the 4th code value T3, the remaining 6-bit code values ​​are T0T1T2T4T5T6, and the 6-bit code values ​​are T0T1T2T4T5T6 when they are output in positive order, and T6T5T4T2T1T0 when they are output in reverse order. In one embodiment, the transcoding part 121 includes 2 N -2 two-way selectors, the control end of each two-way selector is connected to the lowest bit code value in the N-bit binary code, and the first data end of each two-way selector is connected to 2 N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N -2-bit code value, the second data terminal of each two-way selector is connected to 2 in reverse order. N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N -2-bit code value, the output end of each two-way selector is used as the output end of the transcoding part 121 to output 2 N -2-digit code value.

[0062] Taking N=3 as an example, the transcoding part 121 includes 6 two-way selectors MUX1-MUX6, wherein: the control end of the first two-way selector MUX1 is connected to B0 in the 3-bit binary code, the first data end of the first two-way selector MUX1 is connected to T0 in the 7-bit thermometer code, the second data end of the first two-way selector MUX1 is connected to T6 in the 7-bit thermometer code, and the output end of the first two-way selector MUX1 outputs M0; the control end of the second two-way selector MUX2 is connected to B0 in the 3-bit binary code, The first data terminal of the second two-way selector MUX2 is connected to T1 in the 7-bit thermometer code, the second data terminal of the second two-way selector MUX2 is connected to T5 in the 7-bit thermometer code, and the output terminal of the second two-way selector MUX2 outputs M1; the control terminal of the third two-way selector MUX3 is connected to B0 in the 3-bit binary code, the first data terminal of the third two-way selector MUX3 is connected to T2 in the 7-bit thermometer code, the second data terminal of the third two-way selector MUX3 is connected to T4 in the 7-bit thermometer code, and the control terminal of the third two-way selector MUX3 is connected to B0 in the 3-bit binary code. The output end of the two-way selector MUX3 outputs M2; the control end of the fourth two-way selector MUX4 is connected to B0 in the 3-bit binary code, the first data end of the fourth two-way selector MUX4 is connected to T4 in the 7-bit thermometer code, the second data end of the fourth two-way selector MUX4 is connected to T2 in the 7-bit thermometer code, and the output end of the fourth two-way selector MUX4 outputs M4; the control end of the fifth two-way selector MUX5 is connected to B0 in the 3-bit binary code, the first data end of the fifth two-way selector MUX5 is connected to T4 in the 7-bit thermometer code, and the output end of the fourth two-way selector MUX4 outputs M4. The 5th two-way selector MUX5 is connected to T5 in the 7-bit thermometer code, the second data terminal of the 5th two-way selector MUX5 is connected to T1 in the 7-bit thermometer code, and the output terminal of the 5th two-way selector MUX5 outputs M5; the control terminal of the 6th two-way selector MUX6 is connected to B0 in the 3-bit binary code, the first data terminal of the 6th two-way selector MUX6 is connected to T6 in the 7-bit thermometer code, the second data terminal of the 6th two-way selector MUX6 is connected to T0 in the 7-bit thermometer code, and the output terminal of the 6th two-way selector MUX6 outputs M6. When the lowest bit code value B0 in the 3-bit binary code is "0", the transcoding part 121 outputs M0M1M2M4M5M6=T0T1T2T4T5T6; when the lowest bit code value B0 in the 3-bit binary code is "1", the transcoding part 121 outputs M0M1M2M4M5M6=T6T5T4T2T1T0.

[0063] The latch part 122 is connected to the decoding unit 110 and the transcoding part 121. N -2nd in the 1-digit thermometer code N-1 The bit code value and the 2 output of the transcoding part 121 N -2 bit code value is latched and then synchronously output to obtain a switch signal. In one embodiment, the latch part 122 includes 2 N-1 latch (not shown) for 2 N -2nd in the 1-digit thermometer code N-1 The bit code value and the 2 output of the transcoding part 121 N -2-bit code value is latched and then output synchronously; taking N=3 as an example, the latch part 122 includes 7 latches, among which the first latch latches M6 output by the transcoding part 121, the second latch latches M5 output by the transcoding part 121, the third latch latches M4 output by the transcoding part 121, the fourth latch latches the 4th code value (i.e., T3) in the 7-bit thermometer code, the fifth latch latches M2 output by the transcoding part 121, the sixth latch latches M1 output by the transcoding part 121, and the seventh latch latches M0 output by the transcoding part 121. After that, the 7 latches synchronously output the code values ​​latched by each of them to obtain a switching signal.

[0064] This embodiment also provides a switch signal generating method, comprising the following steps; wherein the switch signal generating method can be implemented based on the circuit structure described above.

[0065] Step S1, receiving an N-bit binary code and converting the N-bit binary code into a 2 N -1-bit thermometer code, where N is a natural number greater than or equal to 2. Taking N=3 as an example, binary code 001 corresponds to thermometer code 0000001, binary code 010 corresponds to thermometer code 0000011, binary code 011 corresponds to thermometer code 0000111, binary code 100 corresponds to thermometer code 0001111, binary code 101 corresponds to thermometer code 0011111, binary code 101 corresponds to thermometer code 0111111, and binary code 111 corresponds to thermometer code 1111111.

[0066] Step S2, setting the transcoding position and transcoding direction based on the lowest bit code value in the N-bit binary code, and performing a 2 N -1 bit thermometer code is processed to generate a switch signal. In one example, each control bit in the switch signal is arranged in positive order from left to right, and the method for setting the transcoding position and transcoding direction includes: when the lowest bit code value in the N-bit binary code is "0", the first position from the left is set as the transcoding position, and the direction from left to right is set as the transcoding direction, and based on the transcoding position and transcoding direction, 2 N -1-bit thermometer codes are arranged in positive order from left to right to obtain a switch signal; when the lowest bit code value in the N-bit binary code is "1", the first position from the right is set as the transcoding position, and the direction from right to left is set as the transcoding direction. Based on the transcoding position and transcoding direction, 2 N-1-bit thermometer codes are arranged in positive order from right to left to obtain the switch signal. Taking N=3 as an example, the switch signal includes 7 control bits. Each control bit is arranged in positive order and defined as S0~S6 in sequence, then:

[0067] For the 3-bit binary code 001, the 7-bit thermometer code 0000001 is processed based on the above transcoding position and transcoding direction to obtain the switch signal S0S1S2S3S4S5S6=0000001; for the 3-bit binary code 010, the 7-bit thermometer code 0000011 is processed based on the above transcoding position and transcoding direction to obtain the switch signal S0S1S2S3S4S5S6=1100000; for the 3-bit binary code 011, the 7-bit thermometer code 0000111 is processed based on the above transcoding position and transcoding direction to obtain the switch signal S0S1S2S3S4S5S6=0000111; for the 3-bit binary code 100, the 7-bit thermometer code 0001111 is processed based on the above transcoding position and transcoding direction to obtain the switch signal S0S1S2S3S4S5S6=0000111 The switch signal S0S1S2S3S4S5S6=1111000; for the 3-bit binary code 101, the 7-bit thermometer code 0011111 is processed based on the above transcoding position and transcoding direction to obtain the switch signal S0S1S2S3S4S5S6=0011111; for the 3-bit binary code 101, the 7-bit thermometer code 0111111 is processed based on the above transcoding position and transcoding direction to obtain the switch signal S0S1S2S3S4S5S6=1111110; for the 3-bit binary code 111, the 7-bit thermometer code 1111111 is processed based on the above transcoding position and transcoding direction to obtain the switch signal S0S1S2S3S4S5S6=1111111; wherein, the corresponding relationship between the N-bit binary code and the switch signal is as follows Figure 8 As shown in the figure, when each digital-to-analog conversion unit is switched on and off based on this switch signal, each digital-to-analog conversion unit is activated the same number of times in 7 data conversions, which is 4 times. In this way, the switching frequency of each digital-to-analog conversion unit is the same, which can improve the nonlinearity of the N-bit digital-to-analog conversion module.

[0068] like Fig. 9 As shown, this embodiment also provides a Σ-Δ analog-to-digital converter 10, including a switch signal generating module 100, wherein the switch signal generating module 100 is implemented using the circuit structure described above. It should be noted that the Σ-Δ analog-to-digital converter 10 formed by the switch signal generating module 100 of this embodiment can be applied to both AC systems and DC systems, but can only improve the performance of AC systems.

[0069] In one example, the Σ-Δ analog-to-digital converter 10 also includes a summing module 200, an integration module 300, an N-bit analog-to-digital conversion module 400, an N-bit digital-to-analog conversion module 500 and a filtering and extraction module 600; wherein the summing module 200 receives an analog input signal, and performs a difference between the analog input signal and the analog feedback signal to generate an analog difference signal; the integration module 300 is connected to the summing module 200, and integrates the analog difference signal to generate an integral signal; the N-bit analog-to-digital conversion module 400 is connected to the integration module 300, and performs analog-to-digital conversion on the integral signal to generate an N-bit binary code and inputs it to the switch signal generation module 100; the N-bit digital-to-analog conversion module 500 is connected to the switch signal generation module 100, and performs switch switching based on the switch signal to generate an analog feedback signal; the filtering and extraction module 600 is connected to the N-bit analog-to-digital conversion module 400, and performs digital filtering and downsampling on the N-bit binary code to generate a digital output signal. In practical applications, the summing module 200, the integrating module 300, the N-bit analog-to-digital conversion module 400 and the filtering and extraction module 600 can all be implemented by any known circuit structure, without limitation; the N-bit digital-to-analog conversion module 500 includes 2 N - 1 digital-to-analog conversion unit 510, such as Figure 7 As shown, the digital-to-analog conversion unit 510 can be implemented using any circuit structure including a switch, which has no substantial impact on the implementation of the solution of this embodiment.

[0070] In another example, a differential amplifier module (not shown in the figure) can be used to replace the summing module 200. In this case, the Σ-Δ analog-to-digital converter 10 includes, in addition to the switch signal generating module 100, a differential amplifier module, an integrating module 300, an N-bit analog-to-digital conversion module 400, an N-bit digital-to-analog conversion module 500, and a filtering and extraction module 600; wherein, the in-phase input terminal of the differential amplifier module receives an analog input signal, the inverting input terminal of the differential amplifier module receives an analog feedback signal, and the output terminal of the differential amplifier module generates an analog difference signal. The function of the differential amplifier module is the same as that of the summing module 200. In practical applications, the differential amplifier module can also be implemented using any existing known circuit structure, without limitation.

[0071] In summary, the switch signal generating module and generating method, and the Σ-Δ analog-to-digital converter of the present invention propose a new switch switching strategy through the design of the transcoding unit and the signal generating unit, which can not only improve the linearity of the Σ-Δ analog-to-digital converter by improving the linearity of the N-bit digital-to-analog conversion module, but also reduce the cost by consuming less hardware resources. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0072] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A switch signal generating module, characterized in that: The switch signal generating module comprises: The decoding unit receives the N-bit binary code and converts the N-bit binary code into 2 N -1-bit thermometer code is output, where N is a natural number greater than or equal to 2; A signal generating unit is connected to the decoding unit, and sets a transcoding position and a transcoding direction based on the lowest bit code value in the N-bit binary code, and performs a transcoding operation based on the transcoding position and the transcoding direction. N -1-bit thermometer code is processed to generate the switching signal.

2. The switch signal generating module according to claim 1, characterized in that: The signal generating unit comprises: The transcoding part is connected to the decoding unit and converts 2 N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N -2-bit code value for positive or reverse output; A latch part connected to the decoding unit and the transcoding part, N -2nd in the 1-digit thermometer code N-1 The bit code value and the transcoding part output 2 N -2-bit code value is latched and output synchronously.

3. The switch signal generating module according to claim 2, characterized in that: The transcoding part includes 2 N -2 two-way selectors, the control end of each two-way selector is connected to the lowest bit code value in the N-bit binary code, and the first data end of each two-way selector is connected to 2 N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N -2-bit code value, the second data terminal of each two-way selector is connected to 2 in reverse order. N -1 digit thermometer code except the 2nd N-1 The remaining 2 bits outside the code value N -2-bit code value, the output of each two-way selector outputs 2 N -2-digit code value.

4. The switch signal generating module according to claim 2, characterized in that: The latch section includes 2 N -1 latch, respectively for 2 N -2nd in the 1-digit thermometer code N-1 The bit code value and the transcoding part output 2 N -2-bit code value is latched and output synchronously.

5. The switch signal generating module according to any one of claims 1 to 4, characterized in that: The decoding unit is implemented by a thermometer decoder.

6. A Σ-Δ analog-to-digital converter, characterized in that: The Σ-Δ analog-to-digital converter comprises: a switching signal generating module according to any one of claims 1 to 5.

7. The Σ-Δ analog-to-digital converter according to claim 6, characterized in that: The Σ-Δ analog-to-digital converter further comprises: A summing module receives an analog input signal and generates an analog difference signal by performing a difference operation on the analog input signal and an analog feedback signal; An integration module, connected to the summing module, integrating the analog difference signal to generate an integration signal; An N-bit analog-to-digital conversion module, connected to the integration module, performs analog-to-digital conversion on the integration signal to generate an N-bit binary code and inputs the code to the switch signal generation module; An N-bit digital-to-analog conversion module, connected to the switch signal generation module, and performing switch switching based on the switch signal to generate the analog feedback signal; The filtering and extraction module is connected to the N-bit analog-to-digital conversion module and performs digital filtering and downsampling on the N-bit binary code to generate a digital output signal.

8. The Σ-Δ analog-to-digital converter according to claim 7, characterized in that: The summing module is replaced by a differential amplifier module, wherein the non-inverting input terminal of the differential amplifier module receives the analog input signal, the inverting input terminal of the differential amplifier module receives the analog feedback signal, and the output terminal of the differential amplifier module generates the analog difference signal.

9. A method for generating a switch signal, characterized in that: The switch signal generating method comprises: Convert N bits of binary code into 2 N -1-bit thermometer code, where N is a natural number greater than or equal to 2; The transcoding position and the transcoding direction are set based on the lowest bit code value in the N-bit binary code, and the transcoding position and the transcoding direction are adjusted based on the transcoding position and the transcoding direction. N -1-bit thermometer code is processed to generate the switching signal.

10. The switch signal generating method according to claim 9, characterized in that: When the control bits in the switch signal are arranged in positive order from left to right, the method for setting the transcoding position and the transcoding direction includes: When the lowest bit code value in the N-bit binary code is "0", the first position from the left is set as the transcoding position, and the direction from left to right is set as the transcoding direction; When the lowest bit code value in the N-bit binary code is "1", the first position from the right is set as the transcoding position, and the direction from right to left is set as the transcoding direction.

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