Light emitting diode and preparation method thereof
By adopting a composite transparent conductive layer and multiple conductive unit structures in the light emitting diode, the problem of etching through holes during etching the dielectric film layer is solved, and the current expansion capability and reliability of the light emitting diode are improved.
Patent Information
- Application Number
- CN202411761672.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-03
- Publication Date
- 2025-04-25
- Estimated Expiration
- 2044-12-03
AI Technical Summary
The existing light emitting diodes are prone to over-etching when etching through holes of the dielectric film layer, damaging the transparent conductive layer, making it too thin, resulting in a decrease in current expansion capability and a decrease in the reliability of the light emitting diode.
A composite transparent conductive layer is adopted, including a first transparent conductive layer and a second transparent conductive layer, wherein the second transparent conductive layer includes a plurality of conductive units, the dielectric film layer has a through hole corresponding to the plurality of conductive units, and the bottom of the through hole is located on the surface of the conductive unit. This structural design is designed to etch on the conductive unit even if it is overetched, and does not affect the first transparent electron conductive layer.
The overetching problem during the production of through-holes of the dielectric film layer is avoided, the thickness of the transparent conductive layer is maintained, and the current expansion capability and reliability of the light emitting diode are improved.
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Figure CN119894191A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of light-emitting devices, and in particular to a light-emitting diode and a method for preparing the same. Background Art
[0002] A light emitting diode (LED) is a semiconductor device that can emit light.
[0003] The related technology provides a light-emitting diode, the light-emitting diode structure includes an epitaxial structure, a transparent conductive layer, a dielectric film layer, and a metal reflective layer. The transparent conductive layer is located on the epitaxial structure, the dielectric film layer is located on the transparent conductive layer, the dielectric film layer is etched to form a through hole, and the metal reflective layer is connected to the transparent conductive layer through the through hole.
[0004] In the related art, when opening holes in the dielectric film layer, it is easy to over-etch, which damages the transparent conductive layer and makes the transparent conductive layer too thin. An excessively thin transparent conductive layer will lead to a decrease in current expansion capability and reduced reliability of the light-emitting diode. Summary of the invention
[0005] The embodiment of the present disclosure provides a light-emitting diode and a method for manufacturing the same, which can significantly improve the problem of over-etching when etching a through hole in a dielectric film layer. At the same time, a one-time etching is performed to increase the effective reflection area of the second insulating reflective sublayer and improve the reflectivity. The technical solution is as follows:
[0006] In one aspect, a light emitting diode is provided, the light emitting diode comprising: an epitaxial structure, a composite transparent conductive layer, a dielectric film layer and a metal reflective layer;
[0007] The composite transparent conductive layer includes a first transparent conductive sublayer and a second transparent conductive sublayer, wherein the second transparent conductive sublayer includes a plurality of conductive units;
[0008] The first transparent conductive sublayer is located on the surface of the epitaxial structure, the multiple conductive units are arranged at intervals on the surface of the first transparent conductive sublayer, the dielectric film layer covers the first transparent conductive sublayer, the dielectric film layer has through holes corresponding to the multiple conductive units, the bottom of the through hole is located on the surface of the conductive unit, and the metal reflective layer covers the dielectric film layer and is electrically connected to the second transparent conductive sublayer in the through hole.
[0009] Optionally, the thickness of the first transparent conductive sublayer is 70 to 300 angstroms, and the thickness of the second transparent conductive sublayer is 50 to 200 angstroms.
[0010] Optionally, projections of the conductive unit and the through hole on the surface of the epitaxial structure are two concentric circles, and the projection area of the conductive unit is larger than the projection area of the through hole.
[0011] Optionally, the dielectric film layer includes a first insulating reflective sublayer and a second insulating reflective sublayer stacked in sequence;
[0012] The first insulating reflective sublayer and the second insulating reflective sublayer both have the through hole.
[0013] Optionally, the first insulating reflective sublayer is SiO 2 layer, the second insulating reflective sublayer is a DBR layer, and the DBR layer is SiO 2 and Ti 3 O 5 A stack of layers consisting of alternating periods.
[0014] Optionally, the second insulating reflective sublayer includes SiO 2 and Ti 3 O 5 The alternating cycle is 5 to 13 cycles.
[0015] Optionally, the sidewall of the through hole of the dielectric film layer is a slope.
[0016] Optionally, the opening width H of the through hole is 30 to 80 μm. 2 .
[0017] In another aspect, a method for preparing a light emitting diode is provided, the method comprising:
[0018] fabricating epitaxial structures;
[0019] A composite transparent conductive layer is fabricated on the surface of the epitaxial structure, wherein the composite transparent conductive layer comprises a first transparent conductive sublayer and a second transparent conductive sublayer, wherein the second transparent conductive sublayer comprises a plurality of conductive units, the first transparent conductive sublayer is located on the surface of the epitaxial structure, and the plurality of conductive units are arranged at intervals on the surface of the first transparent conductive sublayer;
[0020] A dielectric film layer is fabricated on the composite transparent conductive layer, the dielectric film layer covers the first transparent conductive sublayer, the dielectric film layer has through holes corresponding to the plurality of conductive units, and the bottom of the through holes is located on the surface of the conductive unit;
[0021] A metal reflective layer is manufactured, wherein the metal reflective layer covers the dielectric film layer and is electrically connected to the second transparent conductive sublayer in the through hole.
[0022] Optionally, a composite transparent conductive layer is fabricated on the surface of the epitaxial structure, comprising:
[0023] Making a first transparent conductive film on the surface of the epitaxial structure to obtain the first transparent conductive sublayer;
[0024] Making a second transparent conductive film on the surface of the first transparent conductive sublayer;
[0025] The second transparent conductive film is patterned to obtain the plurality of conductive units as the second transparent conductive sub-layer.
[0026] Optionally, the dielectric film layer includes a first insulating reflective sublayer and a second insulating reflective sublayer stacked in sequence;
[0027] Producing a dielectric film layer on the composite transparent conductive layer, comprising:
[0028] The first insulating reflective sublayer is made by using PECVD equipment. The first insulating reflective sublayer is SiO 2 layer;
[0029] The second insulating reflective sublayer is manufactured by using an optical coating machine. The second insulating reflective sublayer is a DBR layer. The DBR layer is SiO 2 and Ti 3 O 5 A stack of layers consisting of alternating periods;
[0030] The through holes are formed on the first insulating reflective sublayer and the second insulating reflective sublayer by a patterning process.
[0031] Optionally, the second insulating reflective sublayer is manufactured using an optical coating machine, comprising:
[0032] Use optical coating machine to alternately make SiO 2 Layer and Ti 3 O 5 The alternating cycle is 5 to 13 cycles.
[0033] The technical solution provided by the embodiments of the present disclosure has the following beneficial effects:
[0034] In the embodiment of the present disclosure, a composite transparent conductive layer is used in the light-emitting diode, and the composite transparent conductive layer includes a first transparent conductive sublayer and a second transparent conductive sublayer, wherein the second transparent conductive sublayer includes a plurality of conductive units, and the plurality of conductive units are arranged at intervals on the surface of the first transparent conductive sublayer, and the dielectric film layer has through holes corresponding to the plurality of conductive units, and the bottom of the through hole is located on the surface of the conductive unit. This structural design is that when the dielectric film layer is opened, even if over-etching is performed, the etching is performed on the conductive unit, and the first transparent conductive sublayer is not affected, thereby avoiding the problem of over-etching when making the through hole of the dielectric film layer, making the transparent conductive layer too thin, resulting in a decrease in the current expansion capability, and improving the reliability of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0036] Figure 1 is a structural schematic diagram of a light emitting diode provided by an embodiment of the present disclosure;
[0037] Figure 2 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure;
[0038] Figure 3 This is a flow chart of another method for preparing a light emitting diode provided in an embodiment of the present disclosure.
[0039] The reference numerals are as follows:
[0040] 10: epitaxial structure; 20: electrode structure; 30: insulation structure;
[0041] 101: substrate; 102: first semiconductor layer; 103: active layer; 104: second semiconductor layer; 105: composite transparent conductive layer; 106: dielectric film layer; 107: metal reflective layer; 108: first electrode; 109: first electrode pad; 110: first insulating layer; 111: second insulating layer; 112: second electrode; 113: second electrode pad; 114: first insulating layer through hole; 115: second insulating layer through hole; 116: isolation groove; 117: step structure; 118: through hole;
[0042] 1051: first transparent conductive sublayer; 1052: second transparent conductive sublayer; 1053: conductive unit;
[0043] 1061: first insulating reflective sublayer; 1062: second insulating reflective sublayer;
[0044] H: Width of the opening. DETAILED DESCRIPTION
[0045] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.
[0046] Figure 1 A schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. Figure 1 The light emitting diode includes: an epitaxial structure 10 , a composite transparent conductive layer 105 , a dielectric film layer 106 and a metal reflective layer 107 .
[0047] The composite transparent conductive layer 105 includes a first transparent conductive sublayer 1051 and a second transparent conductive sublayer 1052 , and the second transparent conductive sublayer 1052 includes a plurality of conductive units 1053 .
[0048] The first transparent conductive sublayer 1051 is located on the surface of the epitaxial structure 10, and a plurality of conductive units 1053 are arranged at intervals on the surface of the first transparent conductive sublayer 1051. The dielectric film layer 106 covers the first transparent conductive sublayer 1051. The dielectric film layer 106 has through holes 118 corresponding to the plurality of conductive units 1053. The bottom of the through hole 118 is located on the surface of the conductive unit 1053. The metal reflective layer 107 covers the dielectric film layer 106 and is electrically connected to the second transparent conductive sublayer 1052 in the through hole 118.
[0049] In the embodiment of the present disclosure, a composite transparent conductive layer is used in the light-emitting diode, and the composite transparent conductive layer includes a first transparent conductive sublayer and a second transparent conductive sublayer, wherein the second transparent conductive sublayer includes a plurality of conductive units, and the plurality of conductive units are arranged at intervals on the surface of the first transparent conductive sublayer, and the dielectric film layer has through holes corresponding to the plurality of conductive units, and the bottom of the through hole is located on the surface of the conductive unit. This structural design is that when the dielectric film layer is opened, even if over-etching is performed, the etching is performed on the conductive unit, and the first transparent conductive sublayer is not affected, thereby avoiding the problem of over-etching when making the through hole of the dielectric film layer, making the transparent conductive layer too thin, resulting in a decrease in the current expansion capability, and improving the reliability of the light-emitting diode.
[0050] In the embodiment of the present disclosure, the first transparent conductive sublayer 1051 and the second transparent conductive sublayer 1052 may be indium tin oxide (ITO) layers. ITO has good transparency and conductivity. It allows light to pass through while conducting current to form an electrical connection.
[0051] In the disclosed embodiment, the thickness of the first transparent conductive sublayer 1051 can be 70 to 300 angstroms. This thickness will not cause the ohmic contact and current expansion of the second semiconductor layer to deteriorate due to being too thin, nor will it cause the film layer to absorb light and reduce the light output rate due to being too thick.
[0052] Exemplarily, the thickness of the first transparent conductive sublayer 1051 is 200 angstroms.
[0053] In the disclosed embodiment, the thickness of the second transparent conductive sublayer 1052 may be 50 to 200 angstroms, which will not reduce the etching barrier capability of the second transparent conductive sublayer and cause over-etching, nor will it be too thick to cause the overall thickness of the light-emitting diode.
[0054] Exemplarily, the thickness of the second transparent conductive sublayer 1052 is 100 angstroms.
[0055] In the embodiment of the present disclosure, the projections of the conductive unit 1053 and the through hole 118 on the surface of the epitaxial structure 10 are two concentric circles, and the projection area of the conductive unit 1053 is larger than the projection area of the through hole 118. This design can ensure the etching barrier effect of the conductive unit, prevent over-etching, and etch the through hole more uniformly.
[0056] The conductive unit 1053 and the through hole 118 may be truncated cone-shaped, wherein the cross section of the conductive unit 1053 is a trapezoid, and the cross section of the through hole 118 is an inverted trapezoid. The projection area here may refer to that the projection area of the top of the conductive unit 1053 is larger than the projection area of the bottom of the through hole 118, or the projection area of the bottom of the conductive unit 1053 is larger than the projection area of the top of the through hole 118, or the projection area of the middle of the conductive unit 1053 is larger than the projection area of the middle of the through hole 118.
[0057] In other embodiments, the projections of the conductive unit 1053 and the through hole 118 on the surface of the epitaxial structure 10 may also be other shapes, such as a rectangle.
[0058] In the embodiment of the present disclosure, the dielectric film layer 106 includes a first insulating reflective sublayer 1061 and a second insulating reflective sublayer 1062 stacked in sequence.
[0059] Both the first insulating reflective sub-layer 1061 and the second insulating reflective sub-layer 1062 have the through hole 118 .
[0060] In the embodiment of the present disclosure, the dielectric film layer formed by stacking the first insulating reflective sublayer and the second insulating reflective sublayer, the two insulating reflective sublayers can increase the reflective effect of the reflective layer and improve the brightness of the light emitting diode.
[0061] In the embodiment of the present disclosure, the sidewall of the through hole 118 of the dielectric film layer 106 is a slope. The slope can increase the effective reflection area of the second insulating reflection sublayer and improve the reflectivity.
[0062] In the embodiment of the present disclosure, the opening width H of the through hole 118 may be 30 to 80 μm. 2 The opening has this area to ensure metal electrical contact and reflection effect.
[0063] For example, the opening width H of the through hole 118 is 50 μm. 2 .
[0064] In the embodiment of the present disclosure, the first insulating reflective sublayer 1061 may be SiO 2 Layer. SiO 2 The layer has good stability and provides growth conditions for the second insulating reflective sublayer.
[0065] In the embodiment of the present disclosure, the thickness of the first insulating reflective sublayer 1061 may be 4000-6000 angstroms, which is not too thin to cause over-etching and damage the underlying structure, nor too thick to cause the entire light-emitting diode to be too thick.
[0066] Exemplarily, the thickness of the first insulating reflective sublayer 1061 is 5500 angstroms.
[0067] In the embodiment of the present disclosure, the second insulating reflective sublayer 1062 may be a DBR layer, and the DBR layer is SiO 2 and Ti 3 O 5 The DBR layer has good reflectivity and improves the brightness of the light-emitting diode.
[0068] In the embodiment of the present disclosure, SiO 2 and Ti 3 O 5 The alternating period may be 5 to 13 periods, which is neither too few to cause a decrease in reflectivity nor too many to cause the light emitting diode to be too thick.
[0069] For example, the SiO in the second insulating reflective sublayer 1062 2 and Ti 3 O 5 The alternating cycle may be 8 cycles.
[0070] In the disclosed embodiment, the thickness of the second insulating reflective sublayer 1062 may be 2000-6000 angstroms, which is not too thin to reduce the reflection area and reflectivity after etching, nor too thick to make the light emitting diode too thick as a whole.
[0071] Illustratively, the thickness of the second insulating reflective sublayer 1062 is 3700 angstroms.
[0072] In the embodiment of the present disclosure, the light emitting diode may further include: a substrate 101 , an electrode structure 20 and an insulating structure 30 .
[0073] Exemplarily, the epitaxial structure 10 includes a first semiconductor layer 102 , an active layer 103 and a second semiconductor layer 104 .
[0074] Exemplarily, the electrode structure 20 includes a first electrode 108 , a first electrode pad 109 , a second electrode 112 , and a second electrode pad 113 .
[0075] Exemplarily, the insulation structure 30 includes a first insulation layer 110 and a second insulation layer 111 .
[0076] The first semiconductor layer 102, the active layer 103, and the second semiconductor layer 104 are sequentially stacked on the substrate 101. The first semiconductor layer 102, the active layer 103, and the second semiconductor layer 104 are provided with a step structure 117 extending to the first semiconductor 102, the step structure 117 has a step bottom surface and a step top surface, the step bottom surface of the step structure is located in the first semiconductor layer 102, the step top surface of the step structure is located in the second semiconductor layer 104, and the bottom of the isolation trench 116 is located in the substrate 101.
[0077] Among them, the first insulating layer 110 covers the metal reflective layer 107 and the dielectric film layer 106, and the first insulating layer 110 respectively opens a first insulating layer through hole 114 at the metal reflective layer 107 and the step structure 117, the first electrode 108 is connected to the metal reflective layer 107 through the first insulating layer through hole 114 at the metal reflective layer 107, and the second electrode 112 is connected to the epitaxial structure 10 (first semiconductor layer 102) through the first insulating layer through hole 114 at the step structure 117.
[0078] The second insulating layer 111 covers the second electrode 112 and the first insulating layer 110. The second insulating layer 111 has second insulating layer through holes 115 at the first electrode 108 and the second electrode 112 respectively. The first electrode pad 109 is connected to the first electrode 108 via the second insulating layer through hole 115 at the first electrode 108. The second electrode pad 113 is connected to the second electrode 112 via the second insulating layer through hole 115 at the second electrode 112.
[0079] In the embodiment of the present disclosure, the substrate 101 may be any one of substrates such as a sapphire patterned substrate, a Si substrate, and a SiC substrate. The embodiment of the present disclosure does not limit the material of the substrate 101.
[0080] Exemplarily, the substrate 101 is a sapphire patterned substrate.
[0081] In the embodiment of the present disclosure, the first semiconductor layer 102 may be an N-type semiconductor layer, and the second semiconductor layer 104 may be a P-type semiconductor layer.
[0082] For example, the first semiconductor layer 102 may be made of N-type GaN material, and the second semiconductor layer 104 may be made of P-type GaN material.
[0083] In other embodiments, the first semiconductor layer 102 may be a P-type semiconductor layer, and the second semiconductor layer 104 may be an N-type semiconductor layer.
[0084] In the embodiment of the present disclosure, the active layer 103 may be a multi-quantum well layer, for example, the multi-quantum well layer may be an InGaN / GaN multi-quantum well structure.
[0085] In the embodiment of the present disclosure, the metal reflective layer 107 is a silver mirror layer, and the metal reflective layer 107 can be a combination of one or more metal or alloy layers such as Ag, Ni, Ti, TiW, Al, AlCu, Ti, Ni, Pt, Au, etc. Among them, the metal Ag is the main structure, which plays the role of light reflection and current expansion, and Ni and TiW play the role of preventing the migration and diffusion of the metal Ag.
[0086] Exemplarily, the metal reflective layer 107 is a stack of Ag, Ni, Ti and TiW.
[0087] In the embodiment of the present disclosure, the first electrode 108 and the second electrode 112 may be a combination of one or more metal or alloy layers such as Cr, Al, AlCu, Ti, Ni, Pt and Au.
[0088] Exemplarily, the first electrode 108 and the second electrode 112 are stacks of Cr, Al, AlCu, Ti, Ni, Pt, and Au.
[0089] In the embodiment of the present disclosure, the first electrode pad 109 and the second electrode pad 113 may be a combination of one or more metal or alloy layers such as Cr, Al, AlCu, Ti, Ni, Pt, Au and AuSn.
[0090] Exemplarily, the first electrode pad 109 and the second electrode pad 113 are stacked layers of Cr, Al, AlCu, Ti, Ni, Pt, Au, and AuSn.
[0091] In the embodiment of the present disclosure, the first insulating layer 110 and the second insulating layer 111 may be a distributed Bragg reflector (DBR) layer or a SiO 2 layer, DBR layer is SiO 2 With Ti 3 O 5 The formed stack.
[0092] It is worth noting that in the embodiments of the present disclosure, structures may be selectively increased or decreased based on the structure of the above-mentioned light emitting diode, and the present disclosure does not impose any limitation on this.
[0093] Figure 2 is a flow chart of a method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 2 The method steps include:
[0094] S11. Fabricating an epitaxial structure.
[0095] S12. A composite transparent conductive layer is manufactured on the surface of the epitaxial structure, wherein the composite transparent conductive layer includes a first transparent conductive sublayer and a second transparent conductive sublayer, wherein the second transparent conductive sublayer includes a plurality of conductive units, and the first transparent conductive sublayer is located on the surface of the epitaxial structure, and the plurality of conductive units are arranged at intervals on the surface of the first transparent conductive sublayer.
[0096] S13, manufacturing a dielectric film layer on the composite transparent conductive layer, wherein the dielectric film layer covers the first transparent conductive sublayer, and the dielectric film layer has through holes corresponding to the plurality of conductive units, and the bottoms of the through holes are located on the surfaces of the conductive units.
[0097] S14, manufacturing a metal reflective layer, wherein the metal reflective layer covers the dielectric film layer and is electrically connected to the second transparent conductive sublayer in the through hole.
[0098] In the embodiment of the present disclosure, a composite transparent conductive layer is used in the light-emitting diode, and the composite transparent conductive layer includes a first transparent conductive sublayer and a second transparent conductive sublayer, wherein the second transparent conductive sublayer includes a plurality of conductive units, and the plurality of conductive units are arranged at intervals on the surface of the first transparent conductive sublayer, and the dielectric film layer has through holes corresponding to the plurality of conductive units, and the bottom of the through hole is located on the surface of the conductive unit. This structural design is that when the dielectric film layer is opened, even if over-etching is performed, the etching is performed on the conductive unit, and the first transparent conductive sublayer is not affected, thereby avoiding the problem of over-etching when making the through hole of the dielectric film layer, making the transparent conductive layer too thin, resulting in a decrease in the current expansion capability, and improving the reliability of the light-emitting diode.
[0099] Figure 3 is a flow chart of another method for preparing a light emitting diode provided by an embodiment of the present disclosure. Figure 3 The method steps include:
[0100] S21. Forming a first semiconductor layer, an active layer, and a second semiconductor layer in sequence on a substrate, wherein the second semiconductor layer, the active layer, and the first semiconductor layer constitute an epitaxial structure.
[0101] The substrate may be any one of a sapphire patterned substrate, a Si substrate, a SiC substrate and the like.
[0102] In one example, step S21 includes:
[0103] The first step is to make the first semiconductor layer.
[0104] In the embodiment of the present disclosure, the first semiconductor layer is N-type GaN.
[0105] The second step is to make the active layer.
[0106] In the embodiment of the present disclosure, the active layer is a multi-quantum well layer, for example, the multi-quantum well layer may be an InGaN / GaN multi-quantum well structure.
[0107] The third step is to make the second semiconductor layer.
[0108] In the embodiment of the present disclosure, the second semiconductor layer is P-type GaN.
[0109] In the embodiment of the present disclosure, the first semiconductor layer, the active layer, and the second semiconductor layer are sequentially stacked on the substrate.
[0110] S22, graphically processing the epitaxial structure to form a step structure, wherein the step structure has a step top surface and a step bottom surface, the step bottom surface of the step structure is located in the epitaxial structure, the step top surface of the step structure is located in the second semiconductor layer, and the bottom of the isolation trench is located in the substrate.
[0111] In the disclosed embodiment, the epitaxial structure is patterned by inductively coupled plasma (ICP) etching.
[0112] S23. Composite a transparent conductive layer on the surface of the epitaxial structure, wherein the composite transparent conductive layer includes a first transparent conductive sublayer and a second transparent conductive sublayer.
[0113] In one example, step S23 includes:
[0114] The first step is to make a first transparent conductive film on the surface of the epitaxial structure to obtain a first transparent conductive sub-layer.
[0115] In the embodiment of the present disclosure, the first transparent conductive sublayer may be an indium tin oxide ITO layer. ITO has excellent transparency and conductivity. It allows light to pass through while conducting current to form an electrical connection.
[0116] In the disclosed embodiment, the thickness of the first transparent conductive sublayer may be 70 to 300 angstroms, which will not cause the ohmic contact and current expansion of the second semiconductor layer to deteriorate due to being too thin, nor will it cause the film layer to absorb light and reduce the light extraction rate due to being too thick.
[0117] Exemplarily, the thickness of the first transparent conductive sublayer is 200 angstroms.
[0118] The second step is to form a second transparent conductive film on the surface of the first transparent conductive sublayer.
[0119] In the embodiment of the present disclosure, the second transparent conductive sublayer may be an ITO layer. ITO has excellent transparency and conductivity. It allows light to pass through while conducting current to form an electrical connection.
[0120] In the disclosed embodiment, the thickness of the second transparent conductive sublayer may be 50 to 200 angstroms, which will not reduce the etching barrier capability of the second transparent conductive sublayer and cause over-etching, nor will it be too thick to cause the overall thickness of the light-emitting diode.
[0121] Exemplarily, the thickness of the second transparent conductive sublayer is 100 angstroms.
[0122] The third step is to perform patterning on the second transparent conductive film to obtain a plurality of conductive units as the second transparent conductive sub-layer.
[0123] In the embodiment of the present disclosure, the projections of the conductive unit and the through hole on the surface of the epitaxial structure are two concentric circles, and the projection area of the conductive unit is larger than the projection area of the through hole. This design can ensure the etching barrier effect of the conductive unit, prevent over-etching, and etch the through hole more uniformly.
[0124] In other embodiments, the projections of the conductive units and the through holes on the surface of the epitaxial structure may also be other shapes, such as a rectangle.
[0125] S24, manufacturing a dielectric film layer on the composite transparent conductive layer, wherein the dielectric film layer passes through the second transparent conductive sublayer and is connected to the first transparent conductive sublayer, and the dielectric film layer includes a first insulating reflective sublayer and a second insulating reflective sublayer.
[0126] In the embodiment of the present disclosure, the first insulating reflective sublayer and the second insulating reflective sublayer are manufactured by plasma enhanced chemical vapor deposition (PECVD).
[0127] In the embodiment of the present disclosure, the first insulating reflective sublayer may be SiO 2 layer.
[0128] In the embodiment of the present disclosure, the thickness of the first insulating reflective sublayer may be 4000-6000 angstroms, which is not too thin to cause over-etching and damage the underlying structure, nor too thick to cause the light emitting diode to be too thick as a whole.
[0129] Illustratively, the thickness of the first insulating reflective sublayer is 5500 angstroms.
[0130] In the embodiment of the present disclosure, an optical coating machine is used to make the second insulating reflective sublayer, and the second insulating reflective sublayer can be a DBR layer. The DBR layer is SiO 2 and Ti 3 O 5 The DBR layer has good reflectivity and improves the brightness of the light-emitting diode.
[0131] In the embodiment of the present disclosure, an optical coating machine is used to alternately make SiO 2 Layer and Ti 3 O 5 The number of alternating layers may be 5 to 13. The number of alternating layers may be neither too few to reduce the reflectivity nor too many to make the light emitting diode too thick.
[0132] Exemplarily, an optical coating machine is used to alternately make SiO 2 Layer and Ti 3 O 5 The alternating cycle can be 8 cycles.
[0133] In the embodiment of the present disclosure, the thickness of the second insulating reflective sublayer may be 2000-6000 angstroms, which is not too thin to cause a decrease in the reflective area and reflection after etching, nor too thick to cause the light emitting diode to be too thick as a whole.
[0134] Exemplarily, the thickness of the second dielectric film sublayer is 3700 angstroms.
[0135] S25, using a patterning process to form the through holes on the first insulating reflective sublayer and the second insulating reflective sublayer.
[0136] In the disclosed embodiment, the through holes in the dielectric film reflective layer are formed by ICP etching, and the through holes are formed on the first insulating reflective sublayer and the second insulating reflective sublayer by a patterning process.
[0137] In the disclosed embodiment, a graphic process is adopted, and the through hole has only one slope, which can reduce the upper bottom size of the through hole while ensuring that the lower bottom size of the through hole remains unchanged, increase the effective area of the dielectric film reflection layer, improve the reflectivity, and improve the brightness of the LED chip.
[0138] In the disclosed embodiment, the sidewall of the through hole of the dielectric film layer is a slope, which can increase the effective reflection area of the second insulating reflection sublayer and improve the reflectivity.
[0139] In the embodiment of the present disclosure, the width of the opening of the through hole may be 30 to 80 μm. 2 The opening has this area to ensure metal electrical contact and reflection effect.
[0140] Exemplarily, the width of the opening of the through hole is 50 μm 2 .
[0141] S26. Fabricate an insulating structure and an electrode structure, wherein the insulating structure covers the metal reflective layer and the dielectric film layer, and the electrode structure passes through the insulating structure to connect with the epitaxial structure.
[0142] In one example, step S26 includes:
[0143] The first step is to make a first insulating layer, which covers the metal reflective layer and the dielectric film layer.
[0144] The first insulating layer may be a DBR layer or a SiO 2 layer, DBR layer is SiO 2 With Ti 3 O 5 The formed stack.
[0145] The second step is to perform a graphic process on the first insulating layer and to open a through hole in the first insulating layer at the step structure.
[0146] In the embodiment of the present disclosure, a through hole in the first insulating layer is opened by wet etching or dry etching.
[0147] The third step is to make a first electrode and a second electrode. The first electrode is connected to the metal reflective layer through a through hole in the first insulating layer at the metal reflective layer, and the second electrode is connected to the epitaxial structure through a through hole in the first insulating layer at the step structure.
[0148] In the embodiment of the present disclosure, the first electrode and the second electrode may be a combination of one or more metal or alloy layers such as Cr, Al, AlCu, Ti, Ni, Pt and Au.
[0149] Exemplarily, the first electrode and the second electrode are stacks of Cr, Al, AlCu, Ti, Ni, Pt, and Au.
[0150] The fourth step is to manufacture a second insulating layer, wherein the second insulating layer covers the first electrode, the second electrode and the first insulating layer.
[0151] The second insulating layer can be a DBR layer or a SiO 2 layer, DBR layer is SiO 2 With Ti 3 O 5 The formed stack.
[0152] In the fifth step, the first insulating layer and the second insulating layer are patterned, through holes in the first insulating layer are opened at the metal reflective layer and the step structure, and through holes in the second insulating layer are opened at the first electrode and the second electrode.
[0153] In the embodiment of the present disclosure, the first insulating layer through hole and the second insulating layer through hole are opened by wet etching or dry etching.
[0154] Exemplarily, the wet etching process for opening the first insulating layer through hole and the second insulating layer through hole is relatively simple, low in cost, and has good isotropy, and the through holes can be formed uniformly.
[0155] Step 6: Make a first electrode pad and a second electrode pad. The first electrode pad is connected to the first electrode through a silver through-hole in the second insulating layer at the first electrode, and the second electrode pad is connected to the second electrode through a through-hole in the second insulating layer at the second electrode.
[0156] In the embodiment of the present disclosure, the first electrode pad and the second electrode pad may be a combination of one or more metal or alloy layers such as Cr, Al, AlCu, Ti, Ni, Pt, Au and AuSn.
[0157] Exemplarily, the first electrode pad and the second electrode pad are stacked layers of Cr, Al, AlCu, Ti, Ni, Pt, Au, and AuSn.
[0158] Table 1 is a comparison of the brightness of the light-emitting diodes made by the related technology and the embodiments of the present disclosure. Taking a 55mil chip as an example, the number of through holes in the light-emitting area is 1014, and the upper bottom area of a single through hole of the light-emitting diode made by the related technology is 201um. 2 The upper bottom area of a single through hole made using the embodiment of the present disclosure is 50um 2 The composite dielectric film layer area increases by about 9%. Using the same batch of epitaxial wafers to make chips for performance comparison, compared with the related technical solutions, the technical solution provided by the embodiment of the present disclosure has an average brightness increase of 1.81%, and the performance of other parameters is comparable.
[0159] Table 1
[0160]
[0161]
[0162] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. A light emitting diode, characterized in that: The light emitting diode comprises: an epitaxial structure (10), a composite transparent conductive layer (105), a dielectric film layer (106) and a metal reflective layer (107); The composite transparent conductive layer (105) comprises a first transparent conductive sublayer (1051) and a second transparent conductive sublayer (1052), wherein the second transparent conductive sublayer (1052) comprises a plurality of conductive units (1053); The first transparent conductive sublayer (1051) is located on the surface of the epitaxial structure (10), the plurality of conductive units (1053) are arranged at intervals on the surface of the first transparent conductive sublayer (1051), the dielectric film layer (106) covers the first transparent conductive sublayer (1051), the dielectric film layer (106) has through holes (118) corresponding to the plurality of conductive units (1053), the bottom of the through hole (118) is located on the surface of the conductive unit (1053), and the metal reflective layer (107) covers the dielectric film layer (106) and is electrically connected to the second transparent conductive sublayer (1052) in the through hole (118).
2. The light emitting diode according to claim 1, characterized in that: The thickness of the first transparent conductive sublayer (1051) is 70 to 300 angstroms, and the thickness of the second transparent conductive sublayer (1052) is 50 to 200 angstroms.
3. The light emitting diode according to claim 1 or 2, characterized in that: The projections of the conductive unit (1053) and the through hole (118) on the surface of the epitaxial structure (10) are two concentric circles, and the projection area of the conductive unit (1053) is larger than the projection area of the through hole (118).
4. The light emitting diode according to claim 1 or 2, characterized in that: The dielectric film layer (106) comprises a first insulating reflective sublayer (1061) and a second insulating reflective sublayer (1062) stacked in sequence; The first insulating reflective sublayer (1061) and the second insulating reflective sublayer (1062) both have the through hole (118).
5. The light emitting diode according to claim 4, characterized in that: The first insulating reflective sublayer (1061) is a SiO2 layer, and the second insulating reflective sublayer (1062) is a DBR layer. The DBR layer is a stacked layer composed of SiO2 and Ti3O5 in alternating periods.
6. The light emitting diode according to claim 5, characterized in that: The alternating period of SiO2 and Ti3O5 in the second insulating reflective sublayer (1062) is 5 to 13 periods.
7. The light emitting diode according to claim 1 or 2, characterized in that: The side wall of the through hole (118) of the dielectric film layer (106) is a slope.
8. The light emitting diode according to claim 7, characterized in that: The opening width H of the through hole (118) is 30 to 80 μm 2 .
9. A method for preparing a light emitting diode, characterized in that: The method comprises: fabricating epitaxial structures; A composite transparent conductive layer is fabricated on the surface of the epitaxial structure, wherein the composite transparent conductive layer comprises a first transparent conductive sublayer and a second transparent conductive sublayer, wherein the second transparent conductive sublayer comprises a plurality of conductive units, the first transparent conductive sublayer is located on the surface of the epitaxial structure, and the plurality of conductive units are arranged at intervals on the surface of the first transparent conductive sublayer; A dielectric film layer is fabricated on the composite transparent conductive layer, the dielectric film layer covers the first transparent conductive sublayer, the dielectric film layer has through holes corresponding to the plurality of conductive units, and the bottom of the through holes is located on the surface of the conductive unit; A metal reflective layer is manufactured, wherein the metal reflective layer covers the dielectric film layer and is electrically connected to the second transparent conductive sublayer in the through hole.
10. The method for preparing a light emitting diode according to claim 9, characterized in that: Producing a composite transparent conductive layer on the surface of the epitaxial structure includes: Making a first transparent conductive film on the surface of the epitaxial structure to obtain the first transparent conductive sublayer; Making a second transparent conductive film on the surface of the first transparent conductive sublayer; The second transparent conductive film is patterned to obtain the plurality of conductive units as the second transparent conductive sub-layer.
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