Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor capable of reducing an internal stress difference and preventing peeling between layers. A multilayer ceramic capacitor (1) is provided with an end-surface-exposed internal electrode (15A) and a side-surface-exposed internal electrode (15B), and is provided with a first dielectric layer (14A) on which the end-surface-exposed internal electrode (15A) is disposed, and a second dielectric layer (14B) on which the side-surface-exposed internal electrode (15B) is disposed, and is characterized in that: one surface side of one dielectric layer of the first dielectric layer (14A) or the second dielectric layer (14B) on which the internal electrode is not exposed; an auxiliary internal electrode (16) is disposed, the auxiliary internal electrode (16) is separated from the internal electrode, is exposed on one surface, and faces a lead-out part of another internal electrode adjacent to the internal electrode in the lamination direction, and the auxiliary internal electrode (16) is provided with through holes (17h) which penetrate in the lamination direction and in which a dielectric material of the same material as that of the dielectric layer is disposed. The dielectric layer on the one main surface side and the dielectric layer on the other main surface side, which are in contact with the auxiliary internal electrode (16), are connected by a dielectric.

Description

Technical Field

[0001] The present invention relates to a laminated ceramic capacitor. Background Art

[0002] A multi-terminal laminated ceramic capacitor comprises: a laminated body in which a plurality of dielectric layers having internal electrodes exposed on end faces of the laminated body and a plurality of dielectric layers having internal electrodes exposed on side faces of the laminated body are alternately laminated; an end face external electrode arranged on the end face; and a side face external electrode arranged on the side face (see Patent Document 1).

[0003] Prior Art Literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2010-98052 Summary of the invention

[0006] Problem that the invention aims to solve

[0007] In a multi-terminal laminated ceramic capacitor, the direction in which the internal electrodes extend differs for each layer. Therefore, during sintering, the shrinkage direction of each layer differs, and the internal stress difference between layers becomes large, especially in the lead-out region where the lead-out portion of the internal electrode is provided. This increases the possibility of interlayer delamination.

[0008] An object of the present invention is to provide a multilayer ceramic capacitor capable of reducing internal stress differences and preventing interlayer peeling.

[0009] Technical solutions to solve problems

[0010] In order to solve the above-mentioned problems, the multilayer ceramic capacitor of the present invention comprises: a laminated body, in which a plurality of dielectric layers are laminated and provided with internal electrodes, and the laminated body has two main surfaces respectively arranged on both sides of a lamination direction, two side surfaces respectively arranged on both sides of a width direction intersecting the lamination direction, and two end surfaces respectively arranged on both sides of a length direction intersecting the lamination direction and the width direction; an end surface external electrode arranged on the end surface in the laminated body; and a side surface external electrode arranged on the side surface in the laminated body, the internal electrode comprises an end surface exposed internal electrode exposed on the end surface, and a side surface exposed internal electrode exposed on the side surface, the end surface exposed internal electrode and the side surface exposed internal electrode have opposing portions respectively opposed to each other and lead portions led out from the opposing portions, the dielectric layer comprises an end surface exposed internal electrode and the dielectric layer has an end surface exposed internal electrode; A first dielectric layer having an electrode, and a second dielectric layer having the inner electrode exposed on the side surface and alternately stacked with the first dielectric layer, wherein an auxiliary internal electrode is arranged on one side of the side surface or the end surface of at least one of the first dielectric layer or the second dielectric layer, where the inner electrode arranged in the one dielectric layer is not exposed, the auxiliary internal electrode is arranged separately from the internal electrode, exposed on the one surface, and opposed to the lead-out portion of the other internal electrode adjacent to the internal electrode in the stacking direction, the auxiliary internal electrode is provided with through holes penetrating in the stacking direction, respectively, and having dielectrics made of the same material as the dielectric layers arranged thereon, and the dielectric layer on one main surface side and the dielectric layer on the other main surface side in contact with the auxiliary internal electrode are connected via the dielectric.

[0011] Effects of the Invention

[0012] According to the present invention, it is possible to provide a multilayer ceramic capacitor capable of reducing internal stress differences and preventing interlayer peeling. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a schematic perspective view of the multilayer ceramic capacitor 1 .

[0014] Figure 2 is the edge of the multilayer ceramic capacitor 1 Figure 1 sectional view of the first embodiment taken along line II-II in FIG.

[0015] Figure 3 is the edge of the multilayer ceramic capacitor 1 Figure 1 sectional view of the first embodiment taken along line III-III in FIG.

[0016] Figure 4 It is a cross-sectional view of the first embodiment of the multilayer ceramic capacitor 1 in which the internal electrode 15A is exposed along the end surface.

[0017] Figure 5 It is a cross-sectional view of the first embodiment of the multilayer ceramic capacitor 1 along the side surface where the internal electrode 15B is exposed.

[0018] Figure 6 The drawings are for explaining the steps of manufacturing the laminated body 2 in the method of manufacturing the laminated ceramic capacitor 1 .

[0019] Figure 7 1 is a flowchart for explaining a method for manufacturing the multilayer ceramic capacitor 1 .

[0020] Figure 8 is the edge of the multilayer ceramic capacitor 1 Figure 1 sectional view of the second embodiment taken along line II-II in FIG.

[0021] Fig. 9 is the edge of the multilayer ceramic capacitor 1 Figure 1 sectional view of the second embodiment taken along line III-III in FIG. DETAILED DESCRIPTION

[0022] (First embodiment)

[0023] Hereinafter, a multilayer ceramic capacitor 1 according to a first embodiment of the present invention will be described. Figure 1 It is a schematic perspective view of the multilayer ceramic capacitor 1 . Figure 2 is the edge of the multilayer ceramic capacitor 1 Figure 1 sectional view of the first embodiment taken along line II-II in FIG. Figure 3 is the edge of the multilayer ceramic capacitor 1 Figure 1 sectional view of the first embodiment taken along line III-III in FIG.

[0024] (Multilayer ceramic capacitor 1)

[0025] The multilayer ceramic capacitor 1 is a multilayer ceramic capacitor 1 having a three-terminal structure, including end surface external electrodes 3 provided on both end surfaces C in the length direction L of the multilayer body 2 and side surface external electrodes 4 provided on both side surfaces B in the width direction W of the multilayer body 2. The multilayer body 2 includes an inner layer portion 11 in which a dielectric layer 14 and an internal electrode 15 are stacked, and an outer layer portion 12.

[0026] In addition, in this specification, as a term indicating the orientation of the laminated ceramic capacitor 1, in the laminated ceramic capacitor 1, the direction in which the dielectric layer 14 and the internal electrode 15 are laminated is referred to as the lamination direction T. The direction intersecting the lamination direction T and in which the pair of end surface external electrodes 3 are provided is referred to as the length direction L. The direction intersecting both the length direction L and the lamination direction T is referred to as the width direction W. In the embodiment, the lamination direction T, the length direction L, and the width direction W are orthogonal to each other.

[0027] Furthermore, in the following description, a pair of outer surfaces among the six outer surfaces of the stacked body 2 arranged on both sides of the stacking direction T are set as main surfaces A, a pair of outer surfaces extending in the stacking direction T and arranged on both sides of the width direction W are set as side surfaces B, and a pair of outer surfaces extending in the stacking direction T and arranged on both sides of the length direction L are set as end surfaces C.

[0028] (Laminate 2)

[0029] The laminate 2 includes an inner layer portion 11 and outer layer portions 12 disposed on both sides of the inner layer portion 11 in the lamination direction T. The laminate 2 preferably has rounded corners and ridges. The corners are where three faces of the laminate intersect, and the ridges are where two faces of the laminate intersect.

[0030] (Inner layer portion 11)

[0031] In the inner layer portion 11 , a plurality of dielectric layers 14 and internal electrodes 15 are stacked along the stacking direction T.

[0032] (Dielectric layer 14)

[0033] The dielectric layer 14 is made of a ceramic material. As the ceramic material, for example, a dielectric ceramic having BaTiO3 as a main component is used. In addition, as the ceramic material, a material having at least one of the auxiliary components such as Mn compounds, Fe compounds, Cr compounds, Co compounds, and Ni compounds added to these main components can also be used.

[0034] (Internal electrode 15)

[0035] The internal electrode 15 is preferably formed of a metal material represented by Ni, Cu, Ag, Pd, Ag—Pd alloy, Au, or the like.

[0036] The internal electrode 15 includes a plurality of end surface exposed internal electrodes 15A and a plurality of side surface exposed internal electrodes 15B arranged alternately. When there is no need to distinguish between the end surface exposed internal electrodes 15A and the side surface exposed internal electrodes 15B, they are collectively described as the internal electrode 15.

[0037] Figure 4 It is a cross-sectional view of the multilayer ceramic capacitor 1 along the end surface, with the internal electrode 15A exposed. Figure 5 It is a cross-sectional view of the multilayer ceramic capacitor 1 along the side surface, with the internal electrode 15B exposed.

[0038] (Internal electrode 15A is exposed on the end surface)

[0039] like Figure 4As shown in FIG. 1 , the end surface exposed internal electrode 15A extends between the two end surfaces C in the length direction L of the stack 2 and is separated from the two side surfaces B in the width direction W by a certain distance. The end surface exposed internal electrode 15A includes an end surface facing portion 15Aa located in the center between the two end surfaces C, and an end surface lead portion 15Ab extending from the end surface facing portion 15Aa to the end surfaces C on both sides. The end surface lead portions 15Ab extend to the end surfaces C on both sides and are exposed on the end surfaces C of the stack 2, and are connected to the end surface external electrodes 3 provided on the two side surfaces in the width direction W of the stack 2.

[0040] (Internal electrode 15B is exposed on the side)

[0041] like Figure 5 As shown in the figure, the side exposed internal electrode 15B is smaller than the stacked body 2 and is separated from the two end faces C in the length direction L by a certain distance. The side exposed internal electrode 15B has a side facing portion 15Ba located in the center between the two side faces B, and a side lead portion 15Bb extending from the side facing portion 15Ba to the side faces B on both sides. The side lead portions 15Bb extend to the side faces B on both sides and are exposed on the side faces B of the stacked body 2, and are connected to the side external electrodes 4 provided on the two side faces in the width direction W of the stacked body 2.

[0042] The end surface opposing portion 15Aa and the side surface opposing portion 15Ba are opposed to each other, forming a capacitor portion. In the following description, when there is no need to distinguish between the end surface opposing portion 15Aa and the side surface opposing portion 15Ba, they are collectively described as the opposing portion 15a. When there is no need to distinguish between the end surface lead-out portion 15Ab and the side surface lead-out portion 15Bb, they are collectively described as the lead-out portion 15b. In addition, the region in the stack 2 where the opposing portion 15a is arranged is described as the opposing region, and the region in the stack 2 where the end surface lead-out portion 15Ab or the side surface lead-out portion 15Bb is described as the lead-out region.

[0043] In dielectric layer 14 , first dielectric layers 14A and second dielectric layers 14B are alternately stacked. First dielectric layer 14A includes end surface exposed internal electrodes 15A exposed at end surface C, and second dielectric layer 14B includes side surface exposed internal electrodes 15B exposed at a portion of side surface B.

[0044] (Outer layer 12)

[0045] Back to Figure 2 as well as Figure 3 The outer layer portion 12 is a dielectric layer having a certain thickness and arranged on the main surface A side of the inner layer portion 11. The outer layer portion 12 is made of the same material as the dielectric layer 14 of the inner layer portion 11.

[0046] (End surface external electrode 3)

[0047] End surface external electrodes 3 are arranged on both end surfaces C of the laminate 2. End surface lead portions 15Ab where the end surface internal electrodes 15A are exposed are connected to the end surface external electrodes 3. The end surface external electrodes 3 cover not only the end surface C but also a portion of the principal surface A and the side surface B on the end surface C side.

[0048] (Side external electrode 4)

[0049] Side external electrodes 4 are arranged on both side surfaces B of the laminate 2. Side lead portions 15Bb of the side internal electrodes 15B are connected to the side external electrodes 4. The side external electrodes 4 cover not only the side surfaces B but also a portion of the side surface B side of the principal surface A.

[0050] The end surface external electrode 3 and the side surface external electrode 4 include a base electrode layer 31 and a plating layer 32 disposed on the base electrode layer 31 . The plating layer 32 includes a Ni (nickel) plating layer 321 disposed on the base electrode layer 31 and a Sn (tin) plating layer 322 disposed on the Ni plating layer 321 .

[0051] (Auxiliary internal electrode 16A is exposed on the side)

[0052] like Figure 3 as well as Figure 4 As shown, in the first embodiment, a side-exposed auxiliary internal electrode 16A serving as an auxiliary internal electrode 16 is arranged on the side surface B where the end-exposed internal electrode 15A is not exposed in the first dielectric layer 14A where the end-exposed internal electrode 15A is arranged.

[0053] The side-exposed auxiliary internal electrode 16A is arranged at a given length in the longitudinal direction L and separated from the end-face exposed internal electrode 15A at a substantially central portion in the longitudinal direction L. The side-exposed auxiliary internal electrode 16A is exposed at the side surface B and faces the side lead-out portion 15Bb of the side-exposed internal electrode 15B of the other internal electrode 15 adjacent to the end-face exposed internal electrode 15A in the stacking direction T.

[0054] (Dimension d1 of the auxiliary internal electrode 16A exposed from the side)

[0055] like Figure 3 As shown, when the dimension in the width direction W from the side surface B to the edge of the side surface B where the internal electrode 15A is exposed is D1, the dimension d1 in the width direction W where the auxiliary internal electrode 16A is exposed on the side surface is D1 / 5<d1<D1×4 / 5.

[0056] In addition, when explaining the auxiliary internal electrode 16A exposed on the side and the auxiliary internal electrode 16B exposed on the end surface of the second embodiment described later together, the dimension of the auxiliary internal electrode 16 in the width direction W is represented by d, and the dimension of the width direction W from one surface to the edge of one surface of the internal electrode 15 is represented by D.

[0057] (Through hole 16h)

[0058] The auxiliary inner electrode 16A is exposed on the side surface and a plurality of through holes 16 h are provided penetrating in the stacking direction T. A dielectric material of the same material as that of the dielectric layer 14 is arranged in the through holes 16 h.

[0059] (Through hole 16h)

[0060] When the through holes 16h are divided into the side area 16a which is closer to the side B side than the center in the width direction W where the auxiliary internal electrode 16A is exposed from the side, and the central area 16b which is closer to the end surface exposed internal electrode 15A side than the center in the width direction W where the auxiliary internal electrode 16A is exposed from the side, the through holes 16h are provided in the central area 16b. However, the through holes 16h only need to be provided in at least the central area 16b, and may be provided in the side area 16a. In this case, with respect to the through holes 16h, it is preferable that the number of through holes 16h provided in the central area 16b is greater than the number of through holes 16h provided in the side area 16a.

[0061] (Dimension r of through hole 16h)

[0062] The plurality of through holes 16h include one or more, preferably two or more through holes 16h having a dimension r in the width direction W satisfying d1 / 200≤r≤d1 / 5 in the center region 16b.

[0063] (Method for Manufacturing Multilayer Ceramic Capacitor 1)

[0064] Next, a method for manufacturing the multilayer ceramic capacitor 1 according to the embodiment will be described. Figure 6 The drawings are for explaining the steps of manufacturing the laminated body 2 in the method of manufacturing the laminated ceramic capacitor 1 . Figure 7 1 is a flowchart for explaining a method for manufacturing the multilayer ceramic capacitor 1 .

[0065] (Internal Electrode Pattern Forming Step S1)

[0066] The ceramic green sheet to be the first dielectric layer 14A is formed with conductive paste to expose the end surface internal electrode 15A and the side surface auxiliary internal electrode 16A. Similarly, the ceramic green sheet to be the second dielectric layer 14B is formed with conductive paste to expose the side surface internal electrode 15B.

[0067] The ceramic green sheet is a tape-shaped sheet formed by molding a ceramic slurry containing ceramic powder, a binder, and a solvent onto a carrier film using a die coater, a gravure coater, a micro gravure coater, or the like.

[0068] The end surface exposed internal electrode 15A, the side surface exposed internal electrode 15B, and the side surface exposed auxiliary internal electrode 16A are formed by printing such as screen printing, gravure printing, relief printing, or the like.

[0069] The side-exposed auxiliary internal electrode 16A provided with the through-hole 16h may be formed simultaneously with the end-face exposed internal electrode 15A by using a printed pattern of the side-exposed auxiliary internal electrode 16A provided with the through-hole 16h in advance.

[0070] Without limitation to this, after the ceramic green sheet is printed with ink of a given viscosity to expose the end surface internal electrode 15A, the side surface may be printed with ink of a viscosity lower than the given viscosity to expose the auxiliary internal electrode 16A, thereby forming a through hole 16h by exposing the auxiliary internal electrode 16A on the side surface during sintering.

[0071] In addition, after the end surface of the ceramic green sheet is printed with ink having a given metal content to expose the internal electrode 15A, the side surface is printed with ink having a metal content less than the given metal content to expose the auxiliary internal electrode 16A, thereby forming a through hole 16h by exposing the auxiliary internal electrode 16A on the side surface during sintering.

[0072] Furthermore, after the end surface of the ceramic green sheet is printed with a metal ink having a given particle size to expose the internal electrode 15A, the side surface is printed with a metal ink having a particle size different from the given particle size to expose the auxiliary internal electrode 16A, thereby forming a through hole 16h by exposing the auxiliary internal electrode 16A on the side surface during sintering.

[0073] (Lamination process S2)

[0074] Ceramic sheets forming first dielectric layers 14A with end surface exposed internal electrodes 15A and ceramic sheets forming second dielectric layers 14B with side surface exposed internal electrodes 15B are alternately stacked. Next, ceramic green sheets for outer layers are placed on top and bottom and bonded by thermocompression to form a mother block.

[0075] (Master block cutting process S3)

[0076] Next, the mother block is cut in the longitudinal direction L and the width direction W to be divided, thereby manufacturing a plurality of rectangular parallelepiped laminated bodies 2 .

[0077] (External Electrode Forming Step S4)

[0078] Next, end surface external electrodes 3 are formed on both end surfaces C of the stacked body 2, and side surface external electrodes 4 are formed on both side surfaces B of the stacked body 2. The end surface lead-out portion 15Ab where the internal electrode 15A is exposed at the end surface is connected to the end surface external electrode 3. The end surface external electrode 3 is formed so as to cover not only the end surface C but also a portion of the end surface C side of the principal surface A and the side surface B. The side surface lead-out portion 15Bb where the internal electrode 15B is exposed at the side surface is connected to the side surface external electrode 4. The side surface external electrode 4 is formed so as to cover not only the side surface B but also a portion of the side surface B side of the principal surface A.

[0079] (Firing process S5)

[0080] Then, the stack 2 is heated at a set firing temperature in a nitrogen atmosphere for a given time. Thus, the end surface external electrodes 3 and the side surface external electrodes 4 are fired and attached to the stack 2, thereby manufacturing the stack 2. Figure 1 The multilayer ceramic capacitor 1 is shown.

[0081] (Effect of auxiliary internal electrode 16)

[0082] Generally speaking, in a multi-terminal laminated ceramic capacitor such as a three-terminal laminated ceramic capacitor, the direction in which the internal electrode extends differs for each layer. In the case where the auxiliary internal electrode 16 as in the embodiment is not provided, in the lead-out region, a state is formed in which a lead-out portion is arranged as an internal electrode on one side of the adjacent layers but no internal electrode is arranged on the other side. Therefore, during sintering, the shrinkage amount of each layer in the lead-out region is different, and the internal stress difference between the layers becomes large. As a result, the possibility of causing peeling between the layers becomes high.

[0083] However, in the first embodiment, the side-exposed auxiliary internal electrode 16A serving as the auxiliary internal electrode 16 is arranged on the side surface B where the end-exposed internal electrode 15A is not exposed in the first dielectric layer 14A where the end-exposed internal electrode 15A is arranged.

[0084] Therefore, in the lead region, the lead portion 15b is arranged in one of the adjacent layers, and the auxiliary internal electrode 16 is arranged in the other layer. That is, the internal electrodes are arranged in both of the dielectric layers 14 adjacent to each other in the lead region. Therefore, the difference in the amount of shrinkage of each layer during sintering becomes smaller, the difference in internal stress is reduced, and the possibility of peeling between layers is reduced.

[0085] (Effect of the size d1 of the auxiliary internal electrode 16)

[0086] When the dimension in the width direction W of the edge on the side surface B where the internal electrode 15A is exposed from the side surface B to the end surface is defined as D, the dimension d in the width direction W of the auxiliary internal electrode 16 is D / 5<d<D×4 / 5.

[0087] As a result, the dimension d in the width direction W of the auxiliary inner electrode 16 can be sufficiently ensured, and thus interlayer delamination due to the internal stress difference can be more effectively suppressed.

[0088] (The effect of through hole 16h exists)

[0089] Furthermore, the auxiliary inner electrode 16 is provided with a plurality of through holes 16 h penetrating in the stacking direction T. A dielectric material made of the same material as that of the dielectric layer 14 is arranged in the through holes 16 h.

[0090] The second dielectric layer 14B on the first main surface A side and the first dielectric layer 14A on the second main surface A side in contact with the auxiliary inner electrode 16 are connected via the dielectric. The dielectric in the through hole 16h thus serves as an anchor, and interlayer delamination caused by internal stress difference can be more effectively suppressed.

[0091] (Effect of the through hole 16h being located in the central area)

[0092] The through hole 16h is provided in the central region 16b when the auxiliary internal electrode 16 is divided into a side region 16a closer to the side surface B than the center in the width direction W of the auxiliary internal electrode 16 and a central region 16b closer to the end surface exposing the internal electrode 15A than the center in the width direction W of the auxiliary internal electrode 16.

[0093] Therefore, an anchor effect is exerted in the center region 16 b , and thus interlayer separation caused by the internal stress difference can be more effectively suppressed.

[0094] (Effect of the size r of the through hole 16h)

[0095] The plurality of through holes 16h include one or more, preferably two or more through holes 16h having a dimension r in the width direction W satisfying d1 / 200≤r≤d1 / 5 in the center region 16b.

[0096] d1 / 200 is the minimum size that can be provided as a through hole 16h in the grain region. Moreover, r≤d1 / 5, so that two or more through holes 16h can be arranged in the width direction W in the central side region 16b of the auxiliary internal electrode 16, where the size in the width direction is d1 / 2, so that the interlayer peeling caused by the internal stress difference can be more effectively suppressed.

[0097] (Second embodiment)

[0098] Next, a multilayer ceramic capacitor 100 according to a second embodiment of the present invention will be described. Figure 1, which are common to the first embodiment. In the multilayer ceramic capacitor 100 of the second embodiment, the parts common to the multilayer ceramic capacitor 1 of the first embodiment are denoted by the common reference numerals, and the common descriptions are omitted.

[0099] Figure 8 The multilayer ceramic capacitor 100 is Figure 1 sectional view of the second embodiment taken along line II-II in FIG. Fig. 9 The multilayer ceramic capacitor 100 is Figure 1 sectional view of the second embodiment taken along line III-III in FIG.

[0100] (Auxiliary internal electrode 16)

[0101] In the first embodiment, the side-exposed auxiliary internal electrode 16A is arranged as the auxiliary internal electrode 16 on the side B side where the end-exposed internal electrode 15A is not exposed in the first dielectric layer 14A where the end-exposed internal electrode 15A is arranged. Fig. 9 As shown, the side exposed auxiliary internal electrode 16A is not provided.

[0102] (Auxiliary internal electrode 16)

[0103] like Figure 8 As shown, in the second embodiment, an end surface exposed auxiliary internal electrode 16B serving as an auxiliary internal electrode 16 is arranged on the end surface C side where the side surface exposed internal electrode 15B is not exposed in the second dielectric layer 14B where the side surface exposed internal electrode 15B is arranged.

[0104] The end surface exposed auxiliary internal electrode 16B is arranged approximately in the center of the width direction W, with a given dimension in the width direction W and separated from the side surface exposed internal electrode 15B. The end surface exposed auxiliary internal electrode 16B is exposed at the end surface C, and faces the end surface lead-out portion 15Ab of the end surface exposed internal electrode 15A of another internal electrode 15 adjacent to the side surface exposed internal electrode 15B in the stacking direction T.

[0105] Therefore, in the lead-out region, the lead-out portion 15b is arranged in one of the adjacent layers, and the end-face exposed auxiliary internal electrode 16B is arranged in the other layer. That is, the internal electrodes are arranged in both of the dielectric layers 14 adjacent to each other in the lead-out region. Therefore, the difference in the amount of shrinkage of each layer during sintering becomes smaller, the difference in internal stress is reduced, and the possibility of peeling between layers is reduced.

[0106] (Dimension d of the auxiliary internal electrode 16B exposed at the end surface)

[0107] When the dimension in the length direction L from the end face C to the edge of the end face C where the internal electrode 15B is exposed is D2, the dimension d2 in the length direction L where the auxiliary internal electrode 16B is exposed at the end face is D2 / 5<d2<D2×4 / 5.

[0108] As a result, the dimension d2 in the longitudinal direction L of the auxiliary inner electrode 16B exposed at the end surface can be sufficiently ensured, so that interlayer delamination caused by the internal stress difference can be more effectively suppressed.

[0109] (Through hole 16h)

[0110] The auxiliary inner electrode 16B is exposed on the end surface, and a plurality of through holes 16 h are provided penetrating in the stacking direction T. A dielectric material of the same material as that of the dielectric layer 14 is arranged in the through holes 16 h.

[0111] The second dielectric layer 14B on the first main surface A side and the first dielectric layer 14A on the second main surface A side in contact with the auxiliary inner electrode 16 are connected via the dielectric. The dielectric in the through hole 16h thus serves as an anchor, and interlayer delamination caused by internal stress difference can be more effectively suppressed.

[0112] (Through hole 16h)

[0113] like Figure 8 As shown in FIG. 1 , when the through holes 16h are divided into the side area 16a located closer to the end surface C than the center in the length direction L of the auxiliary internal electrode 16 and the central area 16b located closer to the end surface on the side where the internal electrode 15A is exposed than the center in the length direction L of the auxiliary internal electrode 16, the through holes 16h are provided in the central area 16b. However, the through holes 16h only need to be provided in at least the central area 16b, and may be provided in the side area 16a. In this case, with respect to the through holes 16h, it is preferable that the number of the through holes 16h provided in the central area 16b is greater than the number of the through holes 16h provided in the side area 16a.

[0114] Therefore, an anchor effect is exerted in the center region 16 b , and thus interlayer separation caused by the internal stress difference can be more effectively suppressed.

[0115] (Dimension r of through hole 16h)

[0116] The plurality of through holes 16h include one or more, preferably two or more through holes 16h having a dimension r in the longitudinal direction L satisfying d2 / 200≤r≤d2 / 5 in the central region 16b.

[0117] d2 / 200 is the minimum size that can be provided as a through hole 16h in the grain region. Since r≤d2 / 5, two or more through holes 16h can be arranged in the longitudinal direction L in the central side region 16b of the auxiliary internal electrode 16 whose width direction size is d2 / 2.

[0118] (Third embodiment)

[0119] Next, a multilayer ceramic capacitor according to a third embodiment of the present invention will be described. In the multilayer ceramic capacitor 100 according to the third embodiment, the same reference numerals as those in the first and second embodiments are used, and the common descriptions are omitted.

[0120] In the third embodiment, similarly to the first embodiment, a side-exposed auxiliary internal electrode 16A serving as an auxiliary internal electrode 16 is arranged on the side B where the end-exposed internal electrode 15A is not exposed in the first dielectric layer 14A where the end-exposed internal electrode 15A is arranged.

[0121] Further, similarly to the second embodiment, an end surface exposed auxiliary internal electrode 16B serving as an auxiliary internal electrode 16 is arranged on the end surface C side where the side surface exposed internal electrode 15B is not exposed in the second dielectric layer 14B where the side surface exposed internal electrode 15B is arranged.

[0122] Therefore, according to the third embodiment, both the effects of the first embodiment and the effects of the second embodiment are achieved.

[0123] As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, Various changes and deformation|transformation are possible.

[0124] <1> A multilayer ceramic capacitor comprising:

[0125] A laminated body, wherein a plurality of dielectric layers provided with internal electrodes are laminated, and the laminated body has two main surfaces respectively arranged on both sides of a lamination direction, two side surfaces respectively arranged on both sides of a width direction intersecting the lamination direction, and two end surfaces respectively arranged on both sides of a length direction intersecting the lamination direction and the width direction;

[0126] an end surface external electrode disposed on the end surface of the stack; and

[0127] a side external electrode disposed on the side surface of the stacked body,

[0128] The internal electrode comprises an end surface exposed internal electrode exposed at the end surface and a side surface exposed internal electrode exposed at the side surface, wherein the end surface exposed internal electrode and the side surface exposed internal electrode have opposing portions respectively opposed to each other and lead portions led out from the opposing portions,

[0129] The dielectric layer includes a first dielectric layer on which the end surface exposed internal electrodes are arranged, and a second dielectric layer on which the side surface exposed internal electrodes are arranged and which is alternately stacked with the first dielectric layer.

[0130] in,

[0131] An auxiliary internal electrode is arranged on one side of the side surface or the end surface of at least one of the first dielectric layer or the second dielectric layer where the internal electrode arranged in the one dielectric layer is not exposed, the auxiliary internal electrode being arranged separately from the internal electrode, exposed on the one surface, and facing a lead portion of another internal electrode adjacent to the internal electrode in the stacking direction,

[0132] The auxiliary inner electrode is provided with through holes each penetrating in the stacking direction and provided with a dielectric made of the same material as the dielectric layer, and the dielectric layer on one main surface side and the dielectric layer on the other main surface side contacting the auxiliary inner electrode are connected via the dielectric.

[0133] <2> The multilayer ceramic capacitor according to <1>, wherein

[0134] The auxiliary inner electrode is arranged on the first dielectric layer.

[0135] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein:

[0136] The auxiliary inner electrode is arranged on the second dielectric layer.

[0137] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein

[0138] When the auxiliary internal electrode is divided into a side surface region on the side surface side and a center region on the internal electrode side at the center of the one surface exposed from the auxiliary internal electrode toward the internal electrode, the through hole is arranged in the center region.

[0139] <5> The multilayer ceramic capacitor according to any one of <1> to <4>, wherein

[0140] When the dimension in the direction parallel to the width direction or the length direction from the one surface exposed of the auxiliary internal electrode to the edge of the one surface side of the internal electrode is set to D, and the dimension in the direction parallel to the width direction or the length direction from the one surface toward the internal electrode of the auxiliary internal electrode is set to d, D / 5<d<D×4 / 5.

[0141] <6> The multilayer ceramic capacitor according to any one of <1> to <5>, wherein

[0142] The auxiliary inner electrode includes the through hole whose maximum dimension r in a direction parallel to the width direction or the longitudinal direction toward the inner electrode from the one surface exposed from the auxiliary inner electrode satisfies d / 200≤r≤d / 5.

[0143] Description of Reference Numerals

[0144] 1 Multilayer Ceramic Capacitors

[0145] 2 Laminated body

[0146] 3 End surface external electrode

[0147] 4 Side external electrodes

[0148] 14 Dielectric layer

[0149] 14A 1st dielectric layer

[0150] 14B Second dielectric layer

[0151] 15 Internal Electrode

[0152] 15A The internal electrode is exposed on the end face

[0153] 15Aa End surface facing part

[0154] 15Ab End lead

[0155] 15B The internal electrodes are exposed on the side

[0156] 15Ba Side facing part

[0157] 15Bb Side lead

[0158] 15a Opposing part

[0159] 15b Lead-out section

[0160] 16 Auxiliary internal electrode

[0161] 16A Auxiliary internal electrodes exposed on the side

[0162] 16B Auxiliary internal electrode exposed on the end face

[0163] 16a Lateral area

[0164] 16b Central side area

[0165] 16h Through hole.

Claims

1. A multilayer ceramic capacitor comprising: A laminated body, wherein a plurality of dielectric layers provided with internal electrodes are laminated, and the laminated body has two main surfaces respectively arranged on both sides of a lamination direction, two side surfaces respectively arranged on both sides of a width direction intersecting the lamination direction, and two end surfaces respectively arranged on both sides of a length direction intersecting the lamination direction and the width direction; an end surface external electrode disposed on the end surface of the stack; and a side external electrode disposed on the side surface of the stacked body, The internal electrode comprises an end surface exposed internal electrode exposed at the end surface and a side surface exposed internal electrode exposed at the side surface, wherein the end surface exposed internal electrode and the side surface exposed internal electrode have opposing portions respectively opposed to each other and lead portions led out from the opposing portions, The dielectric layer includes a first dielectric layer on which the end surface exposed internal electrodes are arranged, and a second dielectric layer on which the side surface exposed internal electrodes are arranged and which is alternately stacked with the first dielectric layer. in, An auxiliary internal electrode is arranged on one side of the side surface or the end surface of at least one of the first dielectric layer or the second dielectric layer where the internal electrode arranged in the one dielectric layer is not exposed, the auxiliary internal electrode being arranged separately from the internal electrode, exposed on the one surface, and facing a lead portion of another internal electrode adjacent to the internal electrode in the stacking direction, The auxiliary inner electrode is provided with through holes each penetrating in the stacking direction and provided with a dielectric made of the same material as the dielectric layer, and the dielectric layer on one main surface side and the dielectric layer on the other main surface side contacting the auxiliary inner electrode are connected via the dielectric.

2. The multilayer ceramic capacitor according to claim 1, wherein The auxiliary inner electrode is arranged on the first dielectric layer.

3. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein: The auxiliary inner electrode is arranged on the second dielectric layer.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein: When the auxiliary internal electrode is divided into a side surface region on the side surface side and a center region on the internal electrode side at the center of the one surface exposed from the auxiliary internal electrode toward the internal electrode, the through hole is arranged in the center region.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein When a dimension from the one surface exposed by the auxiliary internal electrode to the edge of the one surface side of the internal electrode in a direction parallel to the width direction or the length direction is denoted as D, and a dimension from the one surface of the auxiliary internal electrode toward the internal electrode in a direction parallel to the width direction or the length direction is denoted as d, D / 5<d<D×4 / 5.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein: The auxiliary internal electrode has a maximum dimension r in a direction parallel to the width direction or the length direction from the one surface exposed from the auxiliary internal electrode toward the internal electrode. d / 200≤r≤d / 5 The through hole.

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