Balun with asymmetric inductor and adjustable impedance conversion ratio

Abstract

The balun circuit includes a first transformer (316) including a first inductor (319) and a second inductor (318), the first inductor having an electrical value (Lbp) different from an electrical value (Lu / 2) of the second inductor; a second transformer (324) comprising a third inductor (327) and a fourth inductor (326), the third inductor having an electrical value (Lbm) different from the electrical value (Lu / 2) of the fourth inductor, the first inductor being connected to the positive terminal (342) of the balancing port, the third inductor being connected to the negative terminal (348) of the balancing port, and the fourth inductor being connected to the negative terminal (348) of the balancing port. The second inductor is connected to an unbalanced port (312) and the fourth inductor is connected to a node.

Description

Technical Field

[0001] The present disclosure relates generally to electronics and, more particularly, to baluns for transceivers. Background Art

[0002] Wireless communication devices and technologies are becoming more and more common, as are communication devices that operate at millimeter wave (mmW) frequencies. Wireless communication devices typically transmit and / or receive communication signals. In a radio frequency (RF) transceiver, the communication signal is typically amplified and transmitted by a transmitting section, and the received communication signal is amplified and processed by a receiving section. Transceivers for mmW frequency communications (such as for some 5G and 6G applications) typically use a so-called superheterodyne architecture. A superheterodyne architecture is an architecture in which a baseband information signal is up-converted to an intermediate frequency (IF) in a transmit mode and then further up-converted to a radio frequency (RF) signal for transmission. In the receive mode of the superheterodyne architecture, the RF signal is first down-converted to an IF and then further down-converted to a baseband. One of the components used in such a transceiver is called a balun. The term balun is used because the balun converts a balanced signal (such as a differential signal) to an unbalanced signal (such as a single-ended signal), and vice versa.

[0003] In some implementations, the IF section bandwidth for 5G and 6G applications can be as small as about 1% and as large as over 30% or more. It is challenging to combine a high impedance ratio in a single component and simultaneously perform balanced to unbalanced signal conversion with a wide bandwidth. Conventional transformers cannot achieve a sufficiently wide bandwidth while providing the desired impedance transformation ratio. Summary of the invention

[0004] Various implementations of systems, methods, and devices within the scope of the appended claims each have several aspects, no single one of which is solely responsible for the desirable attributes described herein. Without limiting the scope of the appended claims, certain governing features are described herein.

[0005] Details of one or more specific implementations of the subject matter described in this specification are set forth in the accompanying drawings and the following description. Other features, aspects, and advantages will become apparent from the description, drawings, and claims. Note that the relative sizes of the following drawings may not be drawn to scale.

[0006] One aspect of the present disclosure provides a balanced-unbalanced converter circuit, which includes a first transformer, the first transformer including a first inductor and a second inductor, the first inductor having an electrical value different from that of the second inductor; a second transformer, the second transformer including a third inductor and a fourth inductor, the third inductor having an electrical value different from that of the fourth inductor, the first inductor being connected to a positive terminal of a balanced port, the third inductor being connected to a negative terminal of the balanced port, the second inductor being connected to an unbalanced port and the fourth inductor being connected to a node; a first capacitor (Cbp) connected across the first inductor; and a second capacitor connected across the third inductor.

[0007] Another aspect of the present disclosure provides a method for signal conversion, the method comprising adjusting an impedance transformation ratio (ITR) of a balun circuit by selecting an inductor value; adjusting the impedance transformation ratio (ITR) of the balun circuit by selecting a capacitor value; and converting a signal between balanced and unbalanced.

[0008] Another aspect of the present disclosure provides a balun circuit including a pair of asymmetric transformers coupled together, wherein inductors on unbalanced sides of the asymmetric transformers have approximately equal inductances. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In the drawings, like reference numerals refer to like parts throughout the various views unless otherwise indicated. For reference numerals with alphabetic characters, such as "102a" or "102b", the alphabetic characters may distinguish between two similar parts or elements in the same figure. When it is intended that a reference numeral encompass all parts having the same reference numeral in all figures, the alphabetic characters of the reference numeral may be omitted.

[0010] Figure 1 is a diagram showing a wireless device communicating with a wireless communication system.

[0011] Figure 2A is a block diagram illustrating a wireless device in which example techniques of this disclosure may be implemented.

[0012] Figure 2B is a block diagram illustrating a wireless device in which example techniques of this disclosure may be implemented.

[0013] Figure 3 is a block diagram of a balun circuit according to an exemplary embodiment of the present disclosure.

[0014] Figure 4is a block diagram of a balun circuit according to an alternative exemplary embodiment of the present disclosure.

[0015] Figure 5 is a block diagram of a balun circuit according to an alternative exemplary embodiment of the present disclosure.

[0016] Figure 6 is a block diagram of a balun circuit according to an exemplary embodiment of the present disclosure.

[0017] Figure 7 It is shown Figure 3 , Figure 4 , Figure 5 and Figure 6 Schematic diagram of an exemplary embodiment of a transformer.

[0018] Figure 8 is a flow chart describing an example of the operation of a method for signal conversion.

[0019] Fig. 9 is a functional block diagram of a device for signal conversion. DETAILED DESCRIPTION

[0020] The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.

[0021] In a communication device transceiver, one or more baluns or balun circuits may be used for signal processing before and / or after various other signal processing circuits.

[0022] The balun according to the exemplary embodiment may be used to convert a single-ended signal at an antenna or another port into a differential signal compatible with an on-chip differential circuit, and vice versa.

[0023] A balun according to an exemplary embodiment may be used in a receiver to provide impedance matching, thereby optimizing the receiver noise figure (NF) with a wide bandwidth.

[0024] A balun according to an exemplary embodiment may be used in a receiver to provide matching with an intermediate frequency (IF) port of a down-conversion mixer, which typically has an output impedance higher than 50 ohms, making it difficult to match a differential signal to a single-ended signal and convert the differential signal to a single-ended signal over a transmission line (TL) with sufficient bandwidth and low loss.

[0025] The balun according to the exemplary embodiment can be used in a transmitter, such as after a power amplifier (PA). For example, the impedance of the antenna may change, which may damage the PA. The balun according to the exemplary embodiment can provide a variable impedance to protect the power amplifier.

[0026] A balun according to an exemplary embodiment may be used in impedance agnostic applications such that gain is not compromised despite the presence of unpredictable parasitic effects.

[0027] In an exemplary embodiment, a balun with an asymmetrical inductor and an adjustable impedance transformation ratio can provide a high impedance ratio in a single functional element and perform balanced to unbalanced signal conversion with a wide bandwidth.

[0028] In an exemplary embodiment, a balun with an asymmetrical inductor and an adjustable impedance transformation ratio may provide a variable or tunable impedance transformation ratio (ITR).

[0029] In an exemplary embodiment, a balun with an asymmetric inductor and an adjustable impedance transformation ratio (ITR) can be implemented using a small circuit area.

[0030] In an exemplary embodiment, a balun with an asymmetric inductor and an adjustable impedance transformation ratio (ITR) may use capacitor tuning to provide an adjustable impedance transformation ratio over a wide range.

[0031] In an exemplary embodiment, a balun with an asymmetric inductor and an adjustable impedance transformation ratio may use electrostatic discharge (ESD) protection diodes to provide a portion of the total capacitance in a broadband balun, thereby providing ESD protection for IF frequencies ranging up to approximately 30 GHz.

[0032] A balun may be implemented using one or more inductive elements, such as inductors, and may be configured as a transformer. A balun may also typically provide impedance conversion in a system where an unbalanced impedance (e.g., 50 ohms or 75 ohms) is coupled to a balanced impedance (e.g., 200 ohms or 300 ohms). The use of an inductive balun to allow an RF amplifier to provide multi-band or high bandwidth operation typically results in a decrease in the balun quality factor (Q) and increased complexity and cost due to the use of additional switches in the balun configuration. Exemplary embodiments of the balun described herein may minimize the decrease in the balun quality factor (Q) and minimize the complexity and cost of the balun.

[0033] As used herein, the term "adjustable impedance transformation ratio" refers to dynamically adjusting the impedance transformation ratio of a balun during a device design phase, during device manufacturing or calibration, or during device operation.

[0034] As used herein, the term "tunable" refers to dynamically changing component values ​​during device operation.

[0035] As used herein, the term "variable" refers to component values ​​that are selected during device design, manufacture, or calibration.

[0036] Figure 1 1 is a diagram showing wireless device 110 communicating with wireless communication system 120. Wireless communication system 120 may be a Long Term Evolution (LTE) system, a Code Division Multiple Access (CDMA) system, a Global System for Mobile Communications (GSM) system, a Wireless Local Area Network (WLAN) system, a 5G NR (New Radio) system, or some other wireless system. A CDMA system may implement Wideband CDMA (WCDMA), CDMA 1X, Evolution Data Optimized (EVDO), Time Division Synchronous CDMA (TD-SCDMA), or some other version of CDMA. For simplicity, Figure 1 A wireless communication system 120 is shown including two base stations 130 and 132 and one system controller 140. In general, a wireless communication system may include any number of base stations and any set of network entities.

[0037] The wireless device 110 may also be referred to as a user equipment (UE), a mobile station, a terminal, an access terminal, a subscriber unit, a station, etc. The wireless device 110 may be a cellular phone, a smart phone, a tablet device, a wireless modem, a personal digital assistant (PDA), a handheld device, a laptop computer, a smartbook, a netbook, a tablet computer, a cordless phone, a medical device, a car, a device configured to connect to one or more other devices (e.g., through the Internet of Things), a wireless local loop (WLL) station, a Bluetooth device, etc. The wireless device 110 may communicate with the wireless communication system 120. The wireless device 110 may also receive signals from a broadcast station (e.g., a broadcast station 134) and / or signals from a satellite (e.g., a satellite 150 in one or more global navigation satellite systems (GNSS)). The wireless device 110 may support one or more radio technologies for wireless communication, such as LTE, WCDMA, CDMA 1X, EVDO, TD-SCDMA, GSM, 802.11, 802.15, 5G, Sub6 5G, 6G, UWB, etc.

[0038] The wireless device 110 may support carrier aggregation, for example, as described in one or more LTE or 5G standards. In some embodiments, carrier aggregation is used to send a single data stream over multiple carriers, for example, as opposed to separate carriers for the respective data streams. The wireless device 110 is capable of operating in a variety of communication bands, including, for example, those used by LTE, WiFi, 5G, or other communication bands within a wide frequency range. The wireless device 110 is also capable of communicating directly with other wireless devices without communicating through a network.

[0039] Generally speaking, carrier aggregation (CA) can be classified into two types: intra-band CA and inter-band CA. Intra-band CA refers to the operation on multiple carriers in the same frequency band. Inter-band CA refers to the operation on multiple carriers in different frequency bands.

[0040] Figure 2A is a block diagram illustrating a wireless device 200 in which exemplary techniques of the present disclosure may be implemented. The wireless device 200 may be, for example, Figure 1 An implementation of a wireless device 110 is illustrated.

[0041] Figure 2A An example of a transceiver 220 is shown with a transmitter 230 and a receiver 250. In general, conditioning of the signals in the transmitter 230 and the receiver 250 may be performed by one or more stages of amplifiers, filters, upconverters, downconverters, etc. These circuit blocks are based on Figure 2A The configuration shown in is arranged differently. In addition, Figure 2A Other circuit blocks not shown in FIG. 2 may also be used to condition signals in transmitter 230 and receiver 250, such as phase shifters as discussed further below. Figure 2A Or any signal in any other diagram in the accompanying drawings may be single-ended or differential. Figure 2A Some circuit blocks in the circuit can also be omitted.

[0042] exist Figure 2A In the example shown, the wireless device 200 generally includes a transceiver 220 and a data processor 210. The data processor 210 may include a processor 296 operatively coupled to a memory 298. The memory 298 may be configured to store data and program codes generally shown using reference numeral 299, and may generally include analog and / or digital processing components. The transceiver 220 includes a transmitter 230 and a receiver 250 that support bidirectional communication. In general, the wireless device 200 may include any number of transmitters and / or receivers for any number of communication systems and frequency bands. All or a portion of the transceiver 220 may be implemented on one or more analog integrated circuits (ICs), RF ICs (RFICs), mixed signal ICs, etc.

[0043] A transmitter or receiver can be implemented using a superheterodyne architecture or a direct conversion architecture. In a superheterodyne architecture, the signal undergoes multiple stages of frequency conversion between radio frequency (RF) and baseband, such as from RF to intermediate frequency (IF) in one stage and then from IF to baseband in another stage for a receiver. In a direct conversion architecture, the signal is converted between RF and baseband in one stage. Superheterodyne and direct conversion architectures may use different circuit blocks and / or have different requirements. Figure 2A In the example shown, transmitter 230 and receiver 250 are implemented using a direct conversion architecture.

[0044] In the transmit path, the data processor 210 processes the data to be transmitted and provides in-phase (I) and quadrature (Q) analog output signals to the transmitter 230. In an exemplary embodiment, the data processor 210 includes digital-to-analog converters (DACs) 214a and 214b for converting the digital signals generated by the data processor 210 into I analog output signals and Q analog output signals (e.g., I analog output signals and Q analog output signals) for further processing. In other embodiments, the DACs 214a and 214b are included in the transceiver 220, and the data processor 210 provides data (e.g., for I and Q) to the transceiver 220 in a digital manner.

[0045] In the transmitter 230, low pass filters 232a and 232b filter the I and Q analog transmit signals respectively to remove the undesired image frequencies caused by the previous digital-to-analog conversion. Amplifiers (Amp) 234a and 234b amplify the signals from the low pass filters 232a and 232b respectively, and provide the I baseband signal and the Q baseband signal. The up-converter 240 with up-conversion mixers 241a and 241b uses the I TX LO signal and the Q TX LO signal from the transmit (TX) local oscillator (LO) signal generator 290 to up-convert the I baseband signal and the Q baseband signal, and provides the up-converted signal. The filter 242 filters the up-converted signal to remove the undesired image frequencies caused by the frequency up-conversion and the noise in the receive frequency band. The power amplifier (PA) 244 amplifies the signal from the filter 242 to obtain the desired output power level and provide the transmit RF signal. The transmit RF signal is routed through a duplexer or switch 246 and transmitted via an antenna 248, or alternatively, may be sent to a separate transmit antenna that is distinct from a separate receive antenna. Although the examples discussed herein utilize I and Q signals, those skilled in the art will appreciate that the components of a transceiver may be configured to utilize polar modulation.

[0046] In the receive path, antenna 248 receives the communication signal and provides a received RF signal, which can be routed through a duplexer or switch 246 and provided to a low noise amplifier (LNA) 252. The duplexer 246 is designed to operate with a specific RX and TX duplexer frequency separation so that the RX signal is isolated from the TX signal. Alternatively, there may be a separate transmit antenna and a separate receive antenna as mentioned above, in which case RX and TX isolation can be achieved by limited coupling between the two antennas. In the case of separate RX and TX antennas, the RX antenna can be directly coupled to the LNA 252. The received RF signal is amplified by the LNA 252 and filtered by the filter 254 to obtain the desired RF input signal. The down-conversion mixers 261a and 261b in the down-converter 260 mix the output of the filter 254 with the I RX LO signal and the Q RX LO signal (i.e., LO_I and LO_Q) from the receive (RX) LO signal generator 280 to generate an I baseband signal and a Q baseband signal. The I baseband signal and the Q baseband signal are amplified by amplifiers 262a and 262b and further filtered by low pass filters 264a and 264b to obtain I analog input signals and Q analog input signals, which are provided to the data processor 210. In the exemplary embodiment shown, the data processor 210 includes analog-to-digital converters (ADCs) 216a and 216b for converting the analog input signals into digital signals to be further processed by the data processor 210. In some embodiments, the ADCs 216a and 216b are included in the transceiver 220 and provide data to the data processor 210 in a digital form.

[0047] exist Figure 2A 2 , TX LO signal generator 290 generates I TX LO signal and Q TX LO signal for up-conversion, and RX LO signal generator 280 generates I RX LO signal and Q RX LO signal for down-conversion. Each LO signal is a periodic signal with a specific base frequency. Phase-locked loop (PLL) 292 receives timing information from data processor 210 and generates a control signal for adjusting the frequency and / or phase of the TX LO signal from LO signal generator 290. Similarly, PLL 282 receives timing information from data processor 210 and generates a control signal for adjusting the frequency and / or phase of the RX LO signal from LO signal generator 280.

[0048] In an exemplary embodiment, RX PLL 282, TX PLL 292, RX LO signal generator 280, and TX LO signal generator 290 may alternatively be combined into a single LO generator circuit 295, which may include a common or shared LO signal generator circuit to provide the TX LO signal and the RX LO signal. Alternatively, separate LO generator circuits may be used to generate the TX LO signal and the RX LO signal.

[0049] The wireless device 200 may support CA and may (i) receive multiple downlink signals transmitted by one or more cells on multiple downlink carriers at different frequencies and / or (ii) transmit multiple uplink signals to one or more cells on multiple uplink carriers. However, those skilled in the art will appreciate that the various aspects described herein may be implemented in systems, devices, and / or architectures that do not support carrier aggregation.

[0050] Figure 2A 200, and the configurations illustrated therein may or may not represent physical device configurations in certain specific implementations. For example, as described above, transceiver 220 may be implemented in various integrated circuits (ICs), RF ICs (RFICs), mixed signal ICs, etc. In some embodiments, transceiver 220 is implemented on a substrate or board (such as a printed circuit board (PCB)) having various modules, chips, and / or components. For example, power amplifier 244, filter 242, and duplexer 246 may be implemented in separate modules or as discrete components, while the remaining components illustrated in transceiver 220 may be implemented in a single transceiver chip.

[0051] The power amplifier 244 may include one or more stages including, for example, a driver stage, a power amplifier stage, or other components that may be configured to amplify communication signals at one or more frequencies, in one or more frequency bands, and at one or more power levels. Depending on various factors, the power amplifier 244 may be configured to operate using one or more driver stages, one or more power amplifier stages, one or more impedance matching networks, and may be configured to provide good linearity, efficiency, or a combination of good linearity and efficiency.

[0052] In an exemplary embodiment in a super-heterodyne architecture, filter 242, PA 244, LNA 252, and filter 254 may be implemented separately from other components in transmitter 230 and receiver 250 and may be implemented on a millimeter wave integrated circuit. Figure 2B An example superheterodyne architecture is illustrated in .

[0053] Figure 2B is a block diagram illustrating a wireless device in which example techniques of this disclosure may be implemented. Figure 2B Certain components (eg, which may be indicated by the same reference numerals) of the wireless device 200a in FIG. Figure 2A The components of the wireless device 200 shown in FIG. 1 are configured as described above, and the detailed description will not be repeated. Figure 2B Description of the item with the same number in .

[0054] Wireless device 200a is an example of a heterodyne (or superheterodyne) architecture, in which upconverter 240 and downconverter 260 are configured to process communication signals between baseband and an intermediate frequency (IF). For example, upconverter 240 may be configured to provide an IF signal to upconverter 275. In an exemplary embodiment, upconverter 275 may include an upconverter mixer 276. Summing function 278 of upconverter 240 combines the I output and the Q output and provides the combined signal to mixer 276. The combined signal may be single-ended or differential. Mixer 276 is configured to receive the IF signal from upconverter 240 and the TX RF LO signal from TX RFLO signal generator 277, and provide the upconverted RF signal to phase shift circuit 281. Although PLL 292 is in Figure 2B 277, but a corresponding PLL for each signal generator may be implemented.

[0055] In an exemplary embodiment, the components in the phase shift circuit 281 may include one or more adjustable or variable phased array elements and may receive one or more control signals from the data processor 210 via connection 294 and operate the adjustable or variable phased array elements based on the received control signals.

[0056] In an exemplary embodiment, phase shift circuit 281 includes phase shifters 283 and phased array elements 287. Although three phase shifters 283 and three phased array elements 287 are shown for ease of illustration, phase shift circuit 281 may include more or fewer phase shifters 283 and phased array elements 287.

[0057] Each phase shifter 283 can be configured to receive an RF transmit signal from the upconverter 275, change the phase by a certain amount, and provide an RF signal to a corresponding phased array element 287. Each phased array element 287 can include transmit and receive circuits including one or more filters, amplifiers, driver amplifiers, and power amplifiers. In some embodiments, the phase shifter 283 can be incorporated into the corresponding phased array element 287.

[0058] The output of the phase shift circuit 281 is provided to the antenna array 248. In an exemplary embodiment, the antenna array 248 includes a number of antennas that generally corresponds to the number of phase shifters 283 and phased array elements 287, e.g., such that each antenna element is coupled to a respective phased array element 287. In an exemplary embodiment, the phase shift circuit 281 and the antenna array 248 may be referred to as a phased array.

[0059] In the receive direction, the output of the phase shift circuit 281 is provided to a downconverter 285. In an exemplary embodiment, the downconverter 285 may include a downconverting mixer 286. In an exemplary embodiment, the mixer 286 downconverts the received RF signal provided by the phase shift circuit 281 to an IF signal based on the RX RF LO signal provided by the RX RF LO signal generator 279. The I / Q generation function 291 of the downconverter 260 receives the IF signal from the mixer 286 and generates an I signal and a Q signal in the downconverter 260, which downconverts the IF signal to baseband as described above. Although the PLL 282 is in Figure 2B 279, but a respective PLL for each signal generator may be implemented.

[0060] In some embodiments, the upconverter 275, the downconverter 285, and the phase shift circuit 281 are implemented on a common IC. In some embodiments, while the summing function 278 and the I / Q generation function 291 are implemented separately from the mixers 276 and 286, so that the mixers 276, 286, and the phase shift circuit 281 are implemented on a common IC, the summing function 278 and the I / Q generation function 291 are not implemented on a common IC (e.g., the summing function 278 and the I / Q generation function 291 are implemented in another IC coupled to the IC with the mixers 276, 286). In some embodiments, the LO signal generators 277, 279 are included in a common IC. In some embodiments in which the phase shift circuit is implemented on a common IC with 276, 286, 277, 278, 279, and / or 291, the common IC and the antenna array 248 are included in a module that can be coupled to other components of the transceiver 220 via a connector. In some embodiments, the phase shift circuit 281 (e.g., a chip on which the phase shift circuit 281 is implemented) is coupled to the antenna array 248 via an interconnect. For example, the components of the antenna array 248 can be implemented on a substrate and coupled to an integrated circuit implementing the phase shift circuit 281 via a flexible printed circuit board, or the chip can be mounted on the substrate.

[0061] In some embodiments, Figure 2A The illustrated architecture and Figure 2B The illustrated architecture is implemented in the same device. For example, wireless device 110 or 200 may be configured to use Figure 2A The architecture illustrated in FIG. 1 communicates with signals having frequencies below about 7 GHz (e.g., the FR1 band) and uses Figure 2B The architecture illustrated in FIG. 1 communicates with signals having frequencies above about 24 GHz. In devices implementing both architectures, Figure 2A and Figure 2B One or more components with the same number may be shared between the two architectures. For example, a signal that has been directly down-converted from RF to baseband and a signal that has been down-converted from RF to baseband by an IF stage may both be filtered by the same baseband filter 264. In other embodiments, a first version of filter 264 is included in an implementation of the device. Figure 2A and a second version of the filter 264 is included in the implementation of the device Figure 2B section of the architecture.

[0062] Figure 3 is a block diagram of a balun circuit 300 according to an exemplary embodiment of the present disclosure. In an exemplary embodiment, the balun circuit 300 includes an unbalanced side 310 and a balanced side 340. The unbalanced side 310 is typically connected to a single-ended signal, and the balanced side 340 is typically connected to a differential signal. A single-ended signal is a signal in which an electrical signal is transmitted on one electrical conductor (also called a line or wire), and the voltage on the line is referenced to a reference voltage level (usually defined by the system ground). A differential signal is a signal in which two lines transmit the same electrical signal but with opposite polarity.

[0063] In an exemplary embodiment, the unbalanced side 310 includes a terminal or port 312, and a system ground at connection 313. Port 312 is configured to transmit a single-ended signal. The balanced side 340 generally includes a terminal or port 342 configured to transmit a differential signal and a terminal or port 348. In an exemplary embodiment, port 342 may be referred to as transmitting a positive (p) polarity signal and may be referred to as "bp", and port 348 may be referred to as transmitting a negative (m) polarity signal and may be referred to as "bm", where the signal polarity at port 342 is opposite to the signal polarity at port 348.

[0064] In an exemplary embodiment, the balun circuit also includes a first transformer 316 and a second transformer 324 .

[0065] In an exemplary embodiment, the first transformer 316 includes a first inductor 319 (Lbp) and a second inductor 318 (Lu / 2). In an exemplary embodiment, the second transformer 324 includes a third inductor 327 (Lbm) and a fourth inductor 326 (Lu / 2). Exemplary values ​​of the first inductor 319 (Lbp) and the third inductor 327 (Lbm) refer to the inductance of the balanced side 340. Exemplary values ​​of the second inductor 318 (Lu / 2) and the fourth inductor 326 (Lu / 2) refer to the inductance of the unbalanced side 310, where the total inductance of the second inductor 318 (Lu / 2) and the fourth inductor 326 (Lu / 2) is Lu. For example, in an exemplary embodiment, the total inductance of the second inductor 318 and the fourth inductor 326 may include an inductance Lu, where the second inductor 318 and the fourth inductor 326 each have a value of Lu / 2. Other values ​​of the second inductor 318 and the fourth inductor 326 are possible, where the total inductance of the second inductor 318 and the fourth inductor 326 is Lu.

[0066] In an exemplary embodiment, the balanced side 340 also includes a capacitor (Cbp) 344 connected across the first inductor 319 and a capacitor (Cbm) 346 connected across the third inductor 319 .

[0067] In an exemplary embodiment, the unbalanced side 310 may also include one or more capacitors. In an exemplary embodiment, the capacitors on the unbalanced side are shown in dashed lines to indicate that they may be optional, they may include parasitic capacitance, or they may be physical devices. In an exemplary embodiment, the unbalanced side may include a capacitor (Cuct) 322, which may be connected between the center tap 329 and the system ground. In an exemplary embodiment, the unbalanced side 310 may also include a capacitor (Cut 314) connected to one side of the second inductor 318 (i.e., port 312) and the system ground. In an exemplary embodiment, the unbalanced side 310 may also include a capacitor (Cum) 328 connected to one side of the fourth inductor 326 (i.e., node 335) and the system ground.

[0068] In an exemplary embodiment, either or both of capacitance (Cut) 322 and capacitance (Cum) 328 may be included in balun circuit 300. In an exemplary embodiment, capacitance (Cuct) may be implemented to improve the performance of balun circuit 300 in specific frequency bands, such as those in the D-band (110 GHz-170 GHz).

[0069] Transformer 316 and transformer 324 each have a coupling factor (k). For example, transformers with separate winding inductances, such as transformer 316 and transformer 324, have a mutual inductance M between the windings. The coupling factor k is a measure of this mutual coupling, where there is a coupling factor k1 between the first inductor 319 and the third inductor 318; and there is a coupling factor k2 between the second inductor 327 and the fourth inductor 326. The value of k1 and the value of k2 can be the same or different.

[0070] Transformers 316 and 324 are also referenced using a so-called "dot convention." The dot convention is a polarity marking of a transformer winding that is used to indicate the relationship between the ends of a winding and the other windings. The dot convention is used to indicate phase relationships in transformer schematics and involves the placement of dots on the primary and secondary terminals. When the dots are placed near the top of the primary and secondary windings, it indicates that the instantaneous voltage polarity across the primary winding is the same as the instantaneous voltage polarity across the secondary winding. The convention also stipulates that the phase shift between the primary and secondary windings will be zero (in phase), and the direction of the secondary current and the primary current will be the same. However, if the dots are placed in opposite positions (for example, one at the top of the primary winding and one at the bottom of the secondary winding, or vice versa), it indicates that the phases of the primary and secondary currents, the primary and secondary voltages are 180° different, and the directions of the primary and secondary currents are opposite.

[0071] In an exemplary embodiment, the inductance value (also referred to as the electrical length) of the first inductor 319 (Lbp) is different from the inductance value or electrical length of the second inductor 318 (Lu / 2). Similarly, the inductance value (also referred to as the electrical length) of the third inductor 327 (Lbm) is different from the inductance value or electrical length of the fourth inductor 326 (Lu / 2). In this way, the first inductor 319 (Lbp) and the second inductor 318 (Lu / 2) are considered to be asymmetric inductors. Similarly, the third inductor 327 (Lbm) and the fourth inductor (Lu / 2) 326 are considered to be asymmetric inductors. In an exemplary embodiment, Figure 3 The structure shown using the first inductor 319, the second inductor 318, the third inductor 327, and the fourth inductor 326 may be referred to as a dual asymmetric inductor architecture. The inductance value of the first inductor 319 (Lbp) may be different from the inductance value of the third inductor 327 (Lbm), or the inductance value of the first inductor 319 (Lbp) may be the same as the inductance value of the third inductor 327 (Lbm).

[0072] In an exemplary embodiment, the values ​​of the first inductor 319 and the second inductor 318, the values ​​of the third inductor 327 and the fourth inductor 326, and the values ​​of the capacitors 314, 322, 328, 344, and 346 are such that the transformers 316 and 324 have non-quarter wavelength electrical dimensions, which reduces the overall physical size of the balun circuit 300. In an exemplary embodiment, the non-quarter wavelength electrical dimensions can be characterized by: the magnitude of the reactance of the first inductor 319, the second inductor 318, the third inductor 327, or the fourth inductor 326; or one or more of the capacitances of the capacitors 314, 322, 328, 344, or 346 (i.e., |j*ω*L| or |1 / (j*ω*C)|) being less than Z o , the Z o Refers to the characteristic impedance that would be used for a quarter-wavelength transmission line to achieve the same or similar impedance transformation ratio.

[0073] In an exemplary embodiment, making the inductance Lu on the unbalanced side 310 (inductors 318 and 326) and the inductance Lbp and Lbm (inductors 319 and 327) on the balanced side 340 unequal together with the selected values ​​of the capacitances 314, 322, 328, 344, and 346 enables a smaller overall transformer size and a balun operation that can achieve a high impedance transformation ratio (ITR). Adding one or more of the capacitances 314, 322, 328, 344, and 346 to the balun circuit 300 effectively increases the electrical length of the coupled inductors (the first and second inductors 319 and 318 in the transformer 316 and the third and fourth inductors 327 and 326 in the transformer 324) such that the phase transfer function of the first transformer 316 and the second transformer 324 can be less than a quarter wavelength. Effectively increasing the electrical length of the coupled inductors (first inductor 319 and second inductor 318 in transformer 316 and third inductor 327 and fourth inductor 326 in transformer 324) also enables the overall size of the balun circuit 300 as described herein to be reduced. Exemplary embodiments of the balun circuits described herein can provide 2:1, 5:1, 8:1, or other impedance transformation ratios.

[0074] When referring to inductor transformers, the terms "primary" and "secondary" are sometimes used to indicate signal direction. For example, an "input" signal is typically provided to the primary side (or coil) of a transformer, while an "output" signal is typically provided by the secondary side of the transformer. Applicants herein generally use arbitrary non-directional references to refer to the inductors of transformers 316 and 324.

[0075] Despite any non-directional references mentioned above, in some embodiments, the "primary" and "secondary" nomenclature may be used to refer to transformers. For example, if an input signal is provided to ports 342 and 348 and an output signal is taken from port 312, the first inductor 319 and the third inductor 327 will be the "primary" side of the respective transformers 316 and 324; and the second inductor 318 and the fourth inductor 326 will be the "secondary" side of the respective transformers 316 and 324.

[0076] Similarly, if an input signal is provided to port 312 and output signals are taken from ports 342 and 348, the second inductor 318 and the fourth inductor 326 will be the "primary" side of the respective transformers 316 and 324; and the first inductor 319 and the third inductor 327 will be the "secondary" side of the respective transformers 316 and 324.

[0077] When designing a balun circuit, there are certain challenges with using an asymmetrical transformer architecture. Therefore, given an electromagnetic (EM) structure (i.e., a transformer) designed to operate within a specific frequency range, it is useful to determine the achievable ITR range that can be achieved by assuming a reasonable range of capacitance adjustability for capacitors 314, 322, 328, 344, and 346.

[0078] For example, to develop a target impedance conversion ratio, the initial values ​​of inductance Lu (inductors 318 and 326), inductance Lbp and Lbm (inductors 319 and 327), and capacitances 314, 322, 328, 344, and 346 are determined. This can be accomplished using, for example, circuit simulation or design tools known to those of ordinary skill in the art. This determination can lead to a physical design of transformers 316 and 324 for determining coupling factor k. Using the resulting physical design of transformers 316 and 324, the values ​​of capacitances 314, 322, 328, 344, and 346 can be determined to optimize gain and phase balance, bandwidth, input return loss, output return loss, etc., thereby maximizing the performance of the balun circuit.

[0079] The extracted transformer design may not bring about a set of capacitance values ​​that can actually be realized. The solution for a given ITR may also be suboptimal, i.e., there may be another transformer candidate and capacitance set that achieves better performance. Therefore, the adjusted inductance and capacitance values ​​can be used to iterate the process until performance is optimized, thereby bringing about a physical design of the transformer structure and a set of capacitance values ​​that achieve the desired ITR. The ITR can be adjusted by selecting component values ​​to compensate for impedance mismatches at port 312 or between ports 342 and 348.

[0080] In an exemplary embodiment, the value of capacitor 344 (Cbp) and the value of capacitor 346 (Cbm) may also be unequal to further adjust and improve the phase balance of balun circuit 300 on balanced side 340 .

[0081] In an exemplary embodiment, the value of capacitor 314 (Cut), the value of capacitor 328 (Cum), and the value of capacitor 322 (Cuct) may also be unequal to further improve the gain and phase balance on the unbalanced side 310 .

[0082] In an exemplary embodiment, the capacitor 322 (Cuct) can improve the performance in the D-band (110 GHz-170 GHz), thereby allowing the primary inductor (e.g., the first inductor 319 and the third inductor 327 when a balanced signal is converted to an unbalanced signal) to be better close to the distributed transmission line (TL). The close proximity to the distributed transmission line is achieved by adding the capacitor 322 (Cuct) between the second inductor 318 and the fourth inductor 326 to form a CLCLC structure on the unbalanced side 310 of the balun, rather than relying solely on the CLC structure to provide a distributed transmission line.

[0083] In an exemplary embodiment, the values ​​of the first inductor 319 and the second inductor 318 and the values ​​of the third inductor 327 and the fourth inductor 326 and the values ​​of the capacitors 314, 322, 328, 344 and 346 can be selected to create a selected impedance transformation ratio (ITR), as described above. For example, the ITR can be selected for the receiver front end to match the best noise figure and provide a wide input power matching bandwidth. For example, a practical 2-port network will have a minimum noise figure (called NFmin) that occurs at a source impedance that is usually different from Zin* (also called Zin conjugate), which is the source impedance that leads to maximum power transfer according to the maximum power transfer theorem. Selecting the ITR for the receiver front end to match the best noise figure and provide a wide input power matching bandwidth can be achieved by having a consistent impedance transformation ratio over a wide bandwidth. This can help to balance the goals of low noise and high gain over a wide bandwidth at the same time. In a receiving application, the selected ITR may be required to allow a down-conversion mixer (e.g., Figure 2B The output impedance of the mixer 286 in the amplifier (which is usually higher than 50 ohms) is broadband matched to the input impedance of the transimpedance amplifier (which is usually lower than 50 ohms). An example of a transimpedance amplifier (TIA) may be Figure 2A or Figure 2B262a and amplifier 262b in FIG. 262b. In some such examples, the balanced side of the balun is coupled to the mixer and the unbalanced side is coupled to the TIA. A transimpedance amplifier may also be located between mixer 286 and I / Q generator function 291. In some such examples, balun circuit 300 may be disposed between the output of the transimpedance amplifier and I / Q generator function 291. In some such examples, the balanced side of the balun is coupled to the mixer and the unbalanced side is coupled to the I / Q generator function.

[0084] In an exemplary embodiment, the balun circuit 300 provides an impedance agnostic interface at an RF or IF input / output (IO) such that gain is not compromised despite unpredictable parasitic effects. The RF or IF input / output (IO) may generally refer to any of an RF input, an RF output, an IF input, or an IF output. Exemplary embodiments of balun circuits with adjustable impedance conversion ratios provide a high degree of flexibility in designing impedance matching circuits placed at either the RF interface or the IF interface to an RFIC.

[0085] In an exemplary embodiment, an exemplary embodiment of a balun circuit with an adjustable impedance transformation ratio can provide a very wide bandwidth (approximately 10 GHz at a center frequency of approximately 15 GHz) when used at an intermediate frequency (IF).

[0086] In an exemplary embodiment, the balun 300 can provide selectable impedance in a compact footprint.

[0087] In an exemplary embodiment, the balun circuit 300 can provide a well-balanced local oscillator (LO) signal to the mixer LO port, which will improve LO feedthrough. For example, an embodiment of a balun circuit with an adjustable impedance conversion ratio can be used in Figure 2B The balanced side of the balun circuit can be connected to the mixer 276 or the mixer 286, and the unbalanced side of the balun circuit can be connected to the TX RF LO signal generator 277 or the RX RF LO signal generator 279.

[0088] exist Figure 2A or Figure 2B, an exemplary embodiment of the balun circuit may also be located between the TX LO signal generator 290 and the mixer 241a, and another embodiment of the balun circuit may be located between the TX LO signal generator 290 and the mixer 241b. Two more instances of the balun circuit may also be located between the RX LO signal generator 280 and the mixer 261a and between the RX LO signal generator 280 and the mixer 261b. In these embodiments, the balanced side of the balun circuit will be connected to the mixers 261a and 261b, and the unbalanced side of the balun circuit may be connected to the RX LO signal generator 280. In another exemplary embodiment, the balun circuit may be located inside the TX LO signal generator 290 and the RX LO signal generator 280 to convert the single-ended signal from the respective LO signal generators to a differential signal, and a differential quadrature mixer (such as the I / Q generator function 291) may be used to generate Figure 2A The differential I and Q LO signals in the .

[0089] Figure 4 is a block diagram of a balun circuit 400 according to an alternative exemplary embodiment of the present disclosure. Figure 3 Elements that are identical to the elements in FIG. 1 are labeled identically. Figure 4 Components marked 4XX in the Figure 3 For example, capacitors 414, 422, and 428 are similar to Figure 3 314, 322, and 328 in the balun circuit 400, but may be optional, may include parasitic capacitance, or may be a physical device as mentioned above in some exemplary embodiments. In an exemplary embodiment, the balun circuit 400 includes an electrostatic discharge (ESD) protection circuit 460. The ESD protection circuit 460 may include a diode 462 and a diode 464, and may be connected across the capacitor 428 (Cum).

[0090] In an exemplary embodiment, ESD protection circuit 460 allows balun circuit 400 to absorb electrostatic discharge applied to port 312. In an exemplary embodiment, the total capacitance at node 335 includes capacitor 428 (Cum) and the capacitance of diodes 462 and 464. In this way, ESD protection circuit 460 increases the total capacitance connected to node 335 and provides additional ESD protection. When ESD diodes 462 and 464 are connected to node 335, capacitor 428 (Cum) can reduce the capacitance added by ESD diodes 462 and 464.

[0091] Node 345 at the center tap of balanced side 340 is optional and, if implemented, can provide a node to inject a common mode bias voltage for subsequent stages such as amplifiers when ports 342 and 348 are connected to the gate terminals of a differential amplifier.

[0092] Figure 5 is a block diagram of a balun circuit according to an alternative exemplary embodiment of the present disclosure. In an exemplary embodiment, the balun circuit 500 includes variable capacitance for at least some of the capacitances associated with the balun circuit 500 .

[0093] For example, capacitors 514 (Cut), 528 (Cum), 544 (Cbp), and 546 (Cbm) may be implemented using adjustable capacitors. Adjustable capacitors 514 (Cut), 528 (Cum), 544 (Cbp), and 546 (Cbm) enable balun circuit 500 to provide adjustable ITR. In an exemplary embodiment, the ITR may be adjusted using the ITR from data processor 210 ( Figure 2A , Figure 2B ) or a control signal from another controller to set the corresponding values ​​of the adjustable capacitors 514 (Cut), 528 (Cum), 544 (Cbp) and 546 (Cbm).

[0094] In an exemplary embodiment, balun 500 may be used as an antenna tuner in a PA / antenna or a low noise amplifier (LNA) / antenna application.

[0095] For example, in a transmit application, the ITR of the balun circuit 500 may be selected to match the impedance of the power amplifier (PA) to the antenna, such as to match the impedance of the PA 244 ( Figure 2A ) matches the antenna 248 or makes the phase shift circuit 281 ( Figure 2B ) is matched to the antenna 248. The antenna impedance or voltage standing wave ratio (VSWR) can vary, which creates a variable load line for the power amplifier, resulting in variations in the voltage swing experienced by the terminals of the transistors forming the power amplifier. If the voltage swing is too large, the power amplifier may be damaged. In some exemplary embodiments, the adjustable impedance provided by the balun circuit 500 can be dynamically tuned during device operation to protect the power amplifier by preventing the power amplifier load line from reaching a value that permits an excessive voltage swing at the terminals of the transistors forming the power amplifier.

[0096] Figure 6 is a block diagram of a balun circuit according to an alternative exemplary embodiment of the present disclosure. In an exemplary embodiment, the balun circuit 600 includes Figure 4The ESD protection circuit 460 includes Figure 5 The adjustable capacitors 514 (Cut), 528 (Cum), 544 (Cbp), and 546 (Cbm) of the balun circuit 500.

[0097] Figure 7 It is shown Figure 3 , Figure 4 , Figure 5 and Figure 6 FIG. 700 is a schematic diagram of an exemplary embodiment of transformers 316 and 324. Graph 700 illustrates the asymmetry of the inductors in transformers 316 and 324.

[0098] Transformer 316 has windings corresponding to first inductor 319 and second inductor 318. Transformer 324 has windings corresponding to third inductor 327 and fourth inductor 326. In order to maintain the asymmetry of transformers 316 and 324, first inductor 319 and second inductor 318 have different electrical lengths corresponding to different inductance values. Similarly, third inductor 327 and fourth inductor 326 have different electrical lengths corresponding to different inductance values. For example, the value of first inductor 319 may be Lbp and the value of second inductor 318 may be Lu / 2, where Lbp is different from Lu / 2. Similarly, the value of third inductor 327 may be Lbm and the value of fourth inductor 326 may be Lu / 2, where Lbm is different from Lu / 2. In addition, the value of first inductor 319 (Lbp) may be different from the value of third inductor 327 (Lbp). The asymmetry of inductors 319 and 318 and the asymmetry of inductors 327 and 326 together with the Figure 6 The addition of capacitors 514, 322, 528, 544 and 546 provides adjustable and selectable ITR as well as small circuit area.

[0099] Figure 8 8 is a flowchart 800 describing an example of the operation of a method for signal conversion. The blocks in the method 800 may or may not be performed in the order shown, and in some embodiments, may be performed at least partially in parallel.

[0100] In block 802, an impedance transformation ratio (ITR) of a balun circuit is adjusted by selecting inductor values. For example, the values ​​of inductors 319, 318, 327, and 326 in transformer 316 and transformer 324 may be adjusted to provide a desired or selected ITR. In one example, inductors 319 and 318 of transformer 316 and inductors 327 and 326 of transformer 324 are selected to have different values ​​so that an inductor (e.g., inductor 319 or inductor 327) on a balanced side 340 of the balun circuit 300 has an asymmetric value with an inductor (e.g., inductor 318 or inductor 326) on an unbalanced side 310 of the balun circuit 300.

[0101] The impedance transformation ratio (ITR) of the balun circuit is optionally adjusted by selecting capacitance values ​​in block 804. For example, capacitances 344 (Cbp) and 346 (Cbm) associated with the balanced side 340 of the balun circuit 300 and capacitances 314 (Cut), 322 (Cuct), and 328 (Cum) associated with the unbalanced side 310 of the balun circuit 300 are selected to provide a desired or selected ITR.

[0102] In block 806, the signal is converted between being an unbalanced signal and being a balanced signal. For example, Figure 3 , Figure 4 , Figure 5 or Figure 6 The balun circuit can convert a signal from a balanced signal to an unbalanced signal; or can convert a signal from an unbalanced signal to a balanced signal.

[0103] Fig. 9 is a functional block diagram of an apparatus 900 for signal conversion.

[0104] The apparatus 900 includes a component 902 for adjusting an impedance transformation ratio (ITR) of a balun circuit by selecting a capacitance value. In some embodiments, the component 902 for adjusting an impedance transformation ratio (ITR) of a balun circuit by selecting a capacitance value may be configured to perform the method 800 ( Figure 8). In an exemplary embodiment, the component 902 for adjusting the impedance transformation ratio (ITR) of the balun circuit by selecting capacitance values ​​may include the digital processor 210, which may be configured, for example, to select values ​​of the capacitances 344 (Cbp) and 346 (Cbm) associated with the balanced side 340 of the balun circuit 300 and the capacitances 314 (Cut), 322 (Cuct), and 328 (Cum) associated with the unbalanced side 310 of the balun circuit 300 to provide a desired or selected ITR, or to dynamically adjust the values ​​of the capacitances 514 (Cut), 528 (Cum), 544 (Cbp), and 546 (Cbm).

[0105] The apparatus 900 may also include a component 904 for converting a signal between balanced and unbalanced. In some embodiments, the component 904 for converting a signal between balanced and unbalanced may be configured to perform the method 800 ( Figure 8 ) of the operation block 806. In an exemplary embodiment, the component 904 for converting the signal between balanced and unbalanced may include Figure 3 , Figure 4 , Figure 5 or Figure 6 A balanced-to-unbalanced converter circuit is provided, which converts a signal from a balanced signal to an unbalanced signal; or converts a signal from an unbalanced signal to a balanced signal.

[0106] Specific implementation examples are described in the following numbered clauses:

[0107] 1. A balun circuit, the balun circuit comprising a first transformer, the first transformer comprising a first inductor and a second inductor, the first inductor having an electrical value different from that of the second inductor; a second transformer, the second transformer comprising a third inductor and a fourth inductor, the third inductor having an electrical value different from that of the fourth inductor, the first inductor being connected to a positive terminal of a balanced port, the third inductor being connected to a negative terminal of the balanced port, the second inductor being connected to an unbalanced port and the fourth inductor being connected to a node; a first capacitor connected across the first inductor; and a second capacitor connected across the third inductor.

[0108] 2. The balun circuit of clause 1, further comprising a third capacitor connected between the unbalanced port and system ground;

[0109] a fourth capacitor connected between the node and the system ground; a first center tap between the second inductor and the fourth inductor; and a fifth capacitor connected between the first center tap and the system ground.

[0110] 3. The balun circuit of clause 2, wherein the first to fourth capacitors are adjustable.

[0111] 4. A balun circuit according to any one of clauses 2 to 3, wherein the first transformer and the second transformer provide impedance transformation, and one or more of the first capacitor, the second capacitor, the third capacitor, the fourth capacitor and the fifth capacitor are configured to increase the electrical length of the first inductor, the second inductor, the third inductor and the fourth inductor so that the phase transfer function of the first transformer and the second transformer is less than a quarter wavelength.

[0112] 5. The balun circuit of any one of clauses 2 to 4, further comprising a diode coupled to the fourth inductor to provide electrostatic discharge (ESD) protection.

[0113] 6. A balun circuit according to any of clauses 2 to 5, wherein the balun circuit provides an adjustable impedance transformation ratio.

[0114] 7. A balun circuit according to any of clauses 2 to 6, wherein the balun circuit provides a variable impedance transformation ratio that can be adjusted during calibration.

[0115] 8. A balun circuit according to any of clauses 2 to 7, wherein the balun circuit provides a tunable impedance transformation ratio which can be adjusted during operation.

[0116] 9. The balun circuit of any one of clauses 2 to 8, further comprising a second center tap between the first inductor and the third inductor, the second center tap being configured to receive a common-mode bias voltage.

[0117] 10. The balun circuit of any of clauses 2 to 9, further comprising a diode coupled to the fourth inductor to provide electrostatic discharge (ESD) protection.

[0118] 11. A method for signal conversion, the method comprising: adjusting an impedance transformation ratio (ITR) of a balun circuit by selecting a capacitance value, the balun circuit comprising two asymmetrical transformers, and the capacitance value being used for a capacitor coupled to a balanced node or an unbalanced node of the balun circuit; and using the balun circuit to convert a signal between balanced and unbalanced.

[0119] 12. The method of clause 11, wherein said selecting a capacitance value comprises selecting a variable capacitance value.

[0120] 13. A method according to any of clauses 11 to 12, wherein said selecting a capacitance value comprises selecting a tunable capacitance value.

[0121] 14. A method according to any of clauses 11 to 13, wherein the selected impedance transformation ratio (ITR) provides a non-quarter wavelength impedance transformation.

[0122] 15. The method of any of clauses 11 to 14, further comprising providing electrostatic discharge (ESD) protection.

[0123] 16. A method according to any of clauses 11 to 15, further comprising providing a variable impedance transformation ratio that can be adjusted during calibration.

[0124] 17. A method according to any of clauses 11 to 16, further comprising providing a tunable impedance transformation ratio which can be adjusted during operation.

[0125] 18. A method according to any of clauses 11 to 17, further comprising providing a common mode bias voltage to a node on a balanced side of the balun circuit coupling the two transformers together.

[0126] 19. A balun circuit, the balun circuit comprising:

[0127] A pair of asymmetric transformers coupled together, wherein the inductors on the unbalanced sides of the asymmetric transformers have approximately equal inductances.

[0128] 20. The balun circuit of clause 19, further comprising a pair of capacitors respectively coupled across the inductor on the balanced side of the asymmetrical transformer.

[0129] 21. The balun circuit of any of clauses 19 to 20, further comprising a capacitor coupled to a node between the asymmetric transformer and ground on the unbalanced side.

[0130] 22. A balun circuit according to any one of clauses 19 to 21, wherein

[0131] The pair of asymmetric transformers, a pair of capacitors respectively coupled across inductors on balanced sides of the asymmetric transformers, and the capacitor coupled to a node between the asymmetric transformer and ground on the unbalanced side are configured to provide an adjustable impedance conversion ratio.

[0132] 23. The balun circuit of any of clauses 19 to 22, further comprising a diode coupled to the unbalanced side of the asymmetric transformer to provide electrostatic discharge (ESD) protection.

[0133] 24. A balun circuit according to any one of clauses 19 to 23, wherein

[0134] The balun circuit provides a variable impedance transformation ratio that can be adjusted during calibration.

[0135] 25. A balun circuit according to any one of clauses 19 to 24, wherein

[0136] The balun circuit provides a tunable impedance transformation ratio that can be adjusted during operation.

[0137] 26. A balun circuit as claimed in any of clauses 19 to 25, further comprising a node between the inductors on the balanced side of the asymmetric transformer, the node being configured to receive a common mode bias voltage.

[0138] The circuit architecture described herein may be implemented on one or more ICs, analog ICs, RFICs, mixed-signal ICs, ASICs, printed circuit boards (PCBs), electronic devices, etc. The circuit architecture described herein may also be manufactured using various IC process technologies, such as complementary metal oxide semiconductor (CMOS), N-channel MOS (NMOS), P-channel MOS (PMOS), bipolar junction transistor (BJT), bipolar CMOS (BiCMOS), silicon germanium (SiGe), gallium arsenide (GaAs), heterojunction bipolar transistor (HBT), high electron mobility transistor (HEMT), silicon on insulator (SOI), etc.

[0139] The apparatus implementing the circuits described herein may be a stand-alone device or may be part of a larger device. The device may be (i) a stand-alone IC, (ii) a collection of one or more ICs that may include a memory IC for storing data and / or instructions, (iii) an RFIC such as an RF receiver (RFR) or an RF transmitter / receiver (RTR), (iv) an ASIC such as a mobile station modem (MSM), (v) a module that may be embedded in other devices, (vi) a receiver, a cellular phone, a wireless device, a handset or a mobile unit, (vii) and the like.

[0140] While selected aspects have been illustrated and described in detail, it should be understood that various substitutions and changes may be made therein without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A balun circuit, the balun circuit comprising: a first transformer comprising a first inductor and a second inductor, the first inductor having a different electrical value than the second inductor; a second transformer including a third inductor and a fourth inductor, the third inductor having a different electrical value than the fourth inductor, the first inductor being connected to a positive terminal of the balanced port, the third inductor being connected to a negative terminal of the balanced port, the second inductor being connected to an unbalanced port and the fourth inductor being connected to a node; a first capacitor connected across the first inductor; and A second capacitor is connected across the third inductor.

2. The balun circuit according to claim 1 , further comprising: a third capacitor connected between the unbalanced port and system ground; a fourth capacitor connected between the node and the system ground; a first center tap between the second inductor and the fourth inductor; and A fifth capacitor is connected between the first center tap and the system ground. 3 . The balun circuit according to claim 2 , wherein the first to fourth capacitors are adjustable.

4. The balun circuit of claim 2 , wherein the first transformer and the second transformer provide impedance transformation, and one or more of the first capacitor, the second capacitor, the third capacitor, the fourth capacitor, and the fifth capacitor are configured to increase the electrical length of the first inductor, the second inductor, the third inductor, and the fourth inductor so that a phase transfer function of the first transformer and the second transformer is less than a quarter wavelength.

5. The balun circuit of claim 1, further comprising a diode coupled to the fourth inductor to provide electrostatic discharge (ESD) protection.

6. The balun circuit of claim 1, wherein the balun circuit provides an adjustable impedance transformation ratio.

7. The balun circuit of claim 6, wherein the balun circuit provides a variable impedance transformation ratio that can be adjusted during calibration.

8. The balun circuit of claim 6, wherein the balun circuit provides a tunable impedance transformation ratio that can be adjusted during operation.

9. The balun circuit of claim 1, further comprising a second center tap between the first inductor and the third inductor, the second center tap being configured to receive a common mode bias voltage.

10. The balun circuit of claim 3, further comprising a diode coupled to the fourth inductor to provide electrostatic discharge (ESD) protection.

11. A method for signal conversion, the method comprising: adjusting an impedance transformation ratio (ITR) of a balun circuit comprising two asymmetrical transformers by selecting a capacitance value for a capacitor coupled to a balanced node or an unbalanced node of the balun circuit; as well as The balun circuit is used to convert a signal between balanced and unbalanced.

12. The method of claim 11, wherein said selecting a capacitance value comprises selecting a variable capacitance value.

13. The method of claim 11, wherein said selecting a capacitance value comprises selecting a tunable capacitance value.

14. The method of claim 11, wherein the selected impedance transformation ratio (ITR) provides a non-quarter wavelength impedance transformation.

15. The method of claim 11, further comprising providing electrostatic discharge (ESD) protection.

16. The method of claim 11, further comprising providing a variable impedance transformation ratio that is adjustable during calibration.

17. The method of claim 11, further comprising providing a tunable impedance transformation ratio that can be adjusted during operation.

18. The method of claim 11, further comprising providing a common mode bias voltage to a node on a balanced side of the balun circuit coupling the two transformers together.

19. A balun circuit, the balun circuit comprising: A pair of asymmetrical transformers coupled together, The inductors on the unbalanced side of the asymmetrical transformer have approximately equal inductances.

20. The balun circuit of claim 19, further comprising a pair of capacitors respectively coupled across the inductor on the balanced side of the asymmetrical transformer.

21. The balun circuit of claim 19, further comprising a capacitor coupled to a node between the asymmetric transformer and ground on the unbalanced side.

22. The balun circuit of claim 21 , wherein the pair of asymmetric transformers, a pair of capacitors respectively coupled across inductors on balanced sides of the asymmetric transformers, and the capacitor coupled to a node between the asymmetric transformer and ground on the unbalanced side are configured to provide an adjustable impedance conversion ratio.

23. The balun circuit of claim 19, further comprising a diode coupled to the unbalanced side of the asymmetric transformer to provide electrostatic discharge (ESD) protection.

24. The balun circuit of claim 19, wherein the balun circuit provides a variable impedance transformation ratio that is adjustable during calibration.

25. The balun circuit of claim 19, wherein the balun circuit provides a tunable impedance transformation ratio that can be adjusted during operation.

26. The balun circuit of claim 19, further comprising a node between the inductors on the balanced side of the asymmetric transformer, the node being configured to receive a common-mode bias voltage.

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