Heterogeneous hardware-oriented high-throughput computing framework and self-adaptive compiling method

Abstract

The invention discloses a heterogeneous hardware-oriented high-throughput computing framework and a self-adaptive compiling method, and relates to the technical field of high-throughput computing and computer system structure.The heterogeneous hardware-oriented high-throughput computing framework specifically comprises a unified computing framework module, a self-adaptive compiling module and a runtime support module, the unified computing framework module provides an abstract high-level computing interface, and the self-adaptive compiling module is connected with the unified computing framework module; a developer compiles high-throughput calculation codes according to a unified interface specification, decomposes calculation tasks and performs task scheduling and data management; the self-adaptive compiling module is used for compiling the compiled high-throughput calculation codes and automatically optimizing the codes according to heterogeneous hardware characteristics; and the runtime support module monitors the system state and performs dynamic adjustment when the task is executed. According to the method, a unified heterogeneous hardware-oriented computing framework and a self-adaptive compiling method are constructed, and efficient execution of high-throughput computing in a heterogeneous hardware environment is realized by abstracting hardware differences, automatically optimizing codes and dynamically adjusting during operation.

Description

Technical Field

[0001] The present invention relates to the cross-technical field of high-throughput computing and computer architecture, and in particular to a high-throughput computing framework and an adaptive compilation method for heterogeneous hardware. Background Art

[0002] With the development of computer hardware technology, heterogeneous hardware such as GPU and FPGA has been widely used in high-throughput computing. However, these heterogeneous hardware have different programming models and architectural characteristics. Developers need to write specific code for different hardware, which increases programming difficulty and development costs. At the same time, traditional compilation technology is difficult to give full play to the performance advantages of heterogeneous hardware and cannot automatically optimize the code according to hardware characteristics and computing task requirements. Therefore, a unified computing framework and adaptive compilation method for heterogeneous hardware are needed to simplify programming and improve computing efficiency. Summary of the invention

[0003] The present invention provides a high-throughput computing framework and an adaptive compilation method for heterogeneous hardware, aiming to solve the problems of complex programming and difficult performance optimization of high-throughput computing in a heterogeneous hardware environment.

[0004] The present invention provides the following technical solutions: a high-throughput computing framework and an adaptive compilation method for heterogeneous hardware, comprising a unified computing framework module, an adaptive compilation module and a runtime support module, wherein the unified computing framework module provides an abstract high-level computing interface, shields the differences of underlying heterogeneous hardware, and enables developers to write high-throughput computing codes according to a unified interface specification, and the unified computing framework module internally decomposes computing tasks into subtasks suitable for processing by different heterogeneous hardware, and performs task scheduling and data management;

[0005] The adaptive compilation module is used to compile the written high-throughput computing code and automatically optimize the code according to the characteristics of heterogeneous hardware; the adaptive compilation module includes a hardware feature analysis submodule, a code optimization submodule and a compilation generation submodule; the hardware feature analysis submodule is used to perform performance testing and architecture feature extraction on the target heterogeneous hardware before compilation; the code optimization submodule automatically optimizes the written code according to the hardware characteristics and computing task requirements; the compilation generation submodule compiles the optimized code to generate a binary file executed on the target heterogeneous hardware;

[0006] The runtime support module is responsible for monitoring the usage of hardware resources and dynamically adjusting task allocation and data transmission strategies during the execution of computing tasks.

[0007] Preferably, the unified computing framework module uses a task decomposition algorithm formula to decompose the computing task into subtasks suitable for processing by different heterogeneous hardware, and the formula is:

[0008]

[0009] Where: T i is the amount of subtasks assigned to the i-th hardware device, T is the total high-throughput computing tasks, and w i is the computing power weight of the i-th hardware device, w i Determined comprehensively based on the hardware performance indicators.

[0010] Preferably, the unified computing framework module uses a data layout adjustment algorithm and a parallel processing algorithm to perform task scheduling and data management.

[0011] Preferably, the input of the adaptive compilation module is the high-throughput computing code written by the developer and the target heterogeneous hardware information.

[0012] A system of a high-throughput computing framework and an adaptive compilation method for heterogeneous hardware includes the following steps:

[0013] Step 1: Code writing

[0014] Developers use the high-level computing interface provided by the unified computing framework module to write high-throughput computing code;

[0015] Step 2: Compilation process

[0016] The hardware feature analysis submodule in the adaptive compilation module performs performance testing and architecture feature extraction on the target heterogeneous hardware, and extracts the architecture features of the target heterogeneous hardware;

[0017] The code optimization submodule performs optimization operations such as data layout adjustment and parallel processing according to hardware characteristics and code requirements;

[0018] The compilation and generation submodule compiles the optimized code into a binary file that can be executed on the target heterogeneous hardware;

[0019] Step 3: Task execution and monitoring

[0020] During the execution of computing tasks, the runtime support module monitors the usage of hardware resources and dynamically adjusts task allocation and data transmission strategies.

[0021] Preferably, the code optimization steps of the code optimization submodule are:

[0022] 1. Adjust data layout according to the hardware's memory access bandwidth and data type;

[0023] 2. Based on the parallel processing capability of the hardware, parallelize the parallel processing parts and determine the degree of parallelism;

[0024] 3. According to the characteristics of the hardware instruction set, select the appropriate instruction sequence to replace the instructions in the original code.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] 1. This high-throughput computing framework and adaptive compilation method for heterogeneous hardware achieves efficient execution of computing codes on different heterogeneous hardware by building a unified computing framework and adaptive compilation technology, thereby improving the versatility and performance of high-throughput computing.

[0027] 2. This high-throughput computing framework and adaptive compilation method for heterogeneous hardware builds adaptive compilation technology, which can automatically optimize the code according to the hardware characteristics, give full play to the performance advantages of heterogeneous hardware, and improve the execution efficiency and system throughput of high-throughput computing. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of the high-throughput computing framework and adaptive compilation method for heterogeneous hardware provided by the present invention;

[0029] Figure 2 A block diagram of a high-throughput computing framework and an adaptive compilation method for heterogeneous hardware provided by the present invention. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0031] The present invention provides a high-throughput computing framework and adaptive compilation method for heterogeneous hardware, including a unified computing framework module, an adaptive compilation module and a runtime support module. The unified computing framework module provides an abstract high-level computing interface, shields the differences of underlying heterogeneous hardware, and enables developers to write high-throughput computing codes according to a unified interface specification. The unified computing framework reduces the programming difficulty in a heterogeneous hardware environment, improves development efficiency, and enables developers to focus on the implementation of computing logic. The unified computing framework module decomposes computing tasks into subtasks suitable for processing by different heterogeneous hardware, and performs task scheduling and data management.

[0032] The unified computing framework module uses the task decomposition algorithm formula to decompose the computing task into subtasks suitable for different heterogeneous hardware processing. The formula is:

[0033]

[0034] where: T i is the amount of subtasks assigned to the i-th type of hardware device, T is the total high-throughput computing task, wi is the computing power weight of the i-th type of hardware device, and wi is comprehensively determined according to the performance indicators of the hardware.

[0035] The unified computing framework module uses data layout adjustment algorithms and parallel processing algorithms for task scheduling and data management.

[0036] Taking loop parallelization as an example, for the for(i = 0; i < N; i++) loop, if it is to be parallelized on heterogeneous hardware with P processing units, the loop iteration space can be divided into P parts, and the iteration range [i start , i end for each processing unit to be responsible for processing is, where:

[0037]

[0038]

[0039] The unified computing framework module uses data layout adjustment algorithms to optimize the storage layout of the data matrix A(m×n) in heterogeneous hardware to adapt to the memory access patterns of different hardware. For example, if the hardware is a GPU that accesses memory in row-major order, assuming the original data is stored column-wise in memory, the matrix A new elements of and the elements a of the original matrix A ij have the following relationship:

[0040]

[0041] The adaptive compilation module is used to compile the written high-throughput computing code and automatically optimize the code according to the hardware characteristics; the adaptive compilation module includes a hardware feature analysis sub-module, a code optimization sub-module, and a compilation generation sub-module; the hardware feature analysis sub-module is used to perform performance testing and architecture feature extraction on the target heterogeneous hardware before compilation, test the performance parameters of the target heterogeneous hardware, such as the core frequency of the GPU, the memory bandwidth, the logic resources of the FPGA, etc., extract the architecture features of the hardware, such as the characteristics of the instruction set architecture, the storage hierarchy, etc., and abstract the hardware differences.

[0042] The code optimization sub-module automatically optimizes the written code according to the hardware characteristics and computing task requirements, such as data layout adjustment, parallel processing, instruction selection, etc.; the compilation generation sub-module compiles the optimized code into a binary file that can be executed on the target heterogeneous hardware.

[0043] Adaptive compilation technology can automatically optimize code according to hardware characteristics, give full play to the performance advantages of heterogeneous hardware, and improve the execution efficiency and system throughput of high-throughput computing.

[0044] The runtime support module is responsible for monitoring the usage of hardware resources during the execution of computing tasks, and dynamically adjusting task allocation and data transmission strategies to adapt to changes in hardware status and improve the overall performance of the system.

[0045] From the above description, it can be seen that the present invention improves a high-throughput computing framework and adaptive compilation method for heterogeneous hardware, constructs a unified computing framework and adaptive compilation method for heterogeneous hardware, and realizes efficient execution of high-throughput computing in a heterogeneous hardware environment by abstracting hardware differences, automatic code optimization and dynamic adjustment at runtime.

[0046] The present invention provides a system of a high-throughput computing framework and an adaptive compilation method for heterogeneous hardware, comprising the following steps:

[0047] Step 1: Code writing

[0048] Developers use the high-level computing interface provided by the unified computing framework module to write high-throughput computing code;

[0049] Step 2: Compilation process

[0050] The hardware feature analysis submodule in the adaptive compilation module performs performance testing and architecture feature extraction on the target heterogeneous hardware, and extracts the architecture features of the target heterogeneous hardware; the code optimization submodule performs optimization operations such as data layout adjustment and parallel processing according to the hardware features and code requirements; the compilation generation submodule compiles the optimized code to generate a binary file that can be executed on the target heterogeneous hardware;

[0051] The specific operations are:

[0052] 1. Input: high-throughput computing code written by developers and target heterogeneous hardware information;

[0053] 2. Hardware feature analysis:

[0054] 1. Test the performance parameters of the target heterogeneous hardware, such as the core frequency and memory bandwidth of the GPU, the logic resources of the FPGA, etc.

[0055] 2. Extract the architectural features of the hardware, such as instruction set architecture characteristics, storage hierarchy, etc.;

[0056] 3. Code optimization:

[0057] 1. Adjust the data layout according to the hardware's memory access bandwidth and data type, such as rearranging array elements according to the hardware's optimal access mode;

[0058] 2. According to the parallel processing capability of the hardware, parallelize the loop and other parallel parts to determine the degree of parallelism;

[0059] 3. According to the characteristics of the hardware instruction set, select the appropriate instruction sequence and replace the instructions in the original code to improve execution efficiency;

[0060] 4. Compile and generate: compile the optimized code into a binary file format executable by the target heterogeneous hardware;

[0061] Step 3: Task execution and monitoring

[0062] During the execution of computing tasks, the runtime support module monitors the usage of hardware resources and dynamically adjusts task allocation and data transmission strategies.

[0063] In summary: when using this high-throughput computing framework and adaptive compilation method for heterogeneous hardware, developers only need to write high-throughput computing code according to a unified interface specification, which reduces the programming difficulty in a heterogeneous hardware environment, improves development efficiency, and enables developers to focus on the implementation of computing logic. Then, the adaptive compilation module compiles the code, the hardware feature analysis submodule first obtains the target heterogeneous hardware features, the code optimization submodule optimizes based on these features and code requirements, and the compilation generation submodule generates executable files, giving full play to the performance advantages of heterogeneous hardware and improving the execution efficiency and system throughput of high-throughput computing. Finally, the runtime support module monitors the system status and makes dynamic adjustments during task execution to ensure efficient execution of computing tasks.

[0064] The contents not described in detail in this specification belong to the prior art known to professional and technical personnel in the field. Although the embodiments of the present invention have been shown and described, it is understood by ordinary technicians in the field that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principle and spirit of the present invention. The scope of the present invention is defined by the attached claims and their equivalents.

Claims

1. A high-throughput computing framework and adaptive compilation method for heterogeneous hardware, including a unified computing framework module, an adaptive compilation module and a runtime support module, characterized in that: The unified computing framework module provides an abstract high-level computing interface, shielding the differences of underlying heterogeneous hardware, allowing developers to write high-throughput computing codes according to unified interface specifications. The unified computing framework module decomposes computing tasks into subtasks suitable for processing by different heterogeneous hardware, and performs task scheduling and data management. The adaptive compilation module is used to compile the written high-throughput computing code and automatically optimize the code according to the characteristics of heterogeneous hardware; the adaptive compilation module includes a hardware feature analysis submodule, a code optimization submodule and a compilation generation submodule; the hardware feature analysis submodule is used to perform performance testing and architecture feature extraction on the target heterogeneous hardware before compilation; The code optimization submodule automatically optimizes the written code according to the hardware characteristics and computing task requirements; the compilation generation submodule compiles the optimized code to generate a binary file executed on the target heterogeneous hardware; The runtime support module is responsible for monitoring the usage of hardware resources and dynamically adjusting task allocation and data transmission strategies during the execution of computing tasks.

2. The high-throughput computing framework and adaptive compilation method for heterogeneous hardware according to claim 1, characterized in that: The unified computing framework module uses a task decomposition algorithm formula to decompose the computing task into subtasks suitable for processing by different heterogeneous hardware. The formula is: Where: T i is the amount of subtasks assigned to the i-th hardware device, T is the total high-throughput computing tasks, and w i is the computing power weight of the i-th hardware device, w i Determined comprehensively based on the hardware performance indicators.

3. The high-throughput computing framework and adaptive compilation method for heterogeneous hardware according to claim 1, characterized in that: The unified computing framework module uses a data layout adjustment algorithm and a parallel processing algorithm to perform task scheduling and data management.

4. The high-throughput computing framework and adaptive compilation method for heterogeneous hardware according to claim 1, characterized in that: The input of the adaptive compilation module is the high-throughput computing code written by the developer and the target heterogeneous hardware information.

5. The system of high-throughput computing framework and adaptive compilation method for heterogeneous hardware according to any one of claims 1 to 4, characterized in that: The following steps are involved: Step 1: Code writing Developers use the high-level computing interface provided by the unified computing framework module to write high-throughput computing code; Step 2: Compilation process The hardware feature analysis submodule in the adaptive compilation module performs performance testing and architecture feature extraction on the target heterogeneous hardware, and extracts the architecture features of the target heterogeneous hardware; The code optimization submodule performs optimization operations such as data layout adjustment and parallel processing according to hardware characteristics and code requirements; The compilation and generation submodule compiles the optimized code into a binary file that can be executed on the target heterogeneous hardware; Step 3: Task execution and monitoring During the execution of computing tasks, the runtime support module monitors the usage of hardware resources and dynamically adjusts task allocation and data transmission strategies.

6. The system of high-throughput computing framework and adaptive compilation method for heterogeneous hardware according to claim 5, characterized in that: The code optimization steps of the code optimization submodule are as follows:

1. Adjust data layout according to the hardware's memory access bandwidth and data type; 2. Based on the parallel processing capability of the hardware, parallelize the parallel processing parts and determine the degree of parallelism; 3. According to the characteristics of the hardware instruction set, select the appropriate instruction sequence to replace the instructions in the original code.

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