Protocol conversion method and device for TileLink bus and AHB bus
By designing a protocol conversion method and device, the problem that the TileLink bus and the AHB bus cannot communicate directly is solved, and the message interoperability between the two protocols is realized, the flexibility and compatibility of SoC design is improved, and the development cost and cycle are reduced.
Patent Information
- Application Number
- CN202411862673.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-17
- Publication Date
- 2025-04-29
AI Technical Summary
In SoC design, there are significant differences between TileLink bus and AHB bus in terms of signal definition, transmission timing, mobile phone system and data transmission format, so it is impossible to communicate and interact directly, resulting in difficult to achieve device collaborative work and system compatibility.
By designing a protocol conversion method and device, it receives the target operation request sent by the TileLink bus terminal, parses and formats the conversion request information, generates the target control signal set, and sends it to the AHB bus terminal, so that the AHB bus terminal adjusts according to the target control signal set, and executes the target operation request. At the same time, the response signal from the AHB bus end is received, the format conversion is performed, and the message communication is sent to the TileLink bus end to ensure that the two protocols are communicated.
The message interoperability between the TileLink bus and the AHB bus is realized, allowing devices of different protocols to work together, improve the flexibility and compatibility of SoC design, reduce development costs and cycles, and meet complex and changeable system design needs.
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Figure CN119903005A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the technical field of data processing, and in particular to a protocol conversion method and device for a TileLink bus and an AHB bus. Background Art
[0002] At present, it is common for multiple bus protocols to coexist in the field of system-on-chip (SoC) design. The TileLink bus protocol has the characteristics of high performance, high flexibility and good scalability, and is widely used in many new processor architectures and complex SoC designs. It can support efficient on-chip data transmission and interaction, especially for multi-core processors and systems with complex storage hierarchies. It can realize functions such as cache consistency maintenance and data burst transmission, which helps to improve the overall performance of the system.
[0003] The AHB bus protocol is a mature and widely used on-chip bus standard, and a large number of peripherals and IP cores are designed and developed based on the AHB protocol. These modules based on the AHB protocol have built a huge ecosystem in traditional SoC design, with rich functions and reliable stability. For example, common UART controllers, timers, interrupt controllers and other peripherals all have corresponding AHB interface versions.
[0004] As the system functional integration continues to increase, SoC will include both new processor cores or high-speed modules using the TileLink protocol and many existing peripherals and functional modules based on the AHB protocol. Since the two protocols have significant differences in signal definition, transmission timing, handshake mechanism, and data transmission format, they cannot communicate and exchange data directly.
[0005] Therefore, how to achieve message communication between the TileLink bus and the AHB bus so that devices with different protocols can work together and improve the flexibility and compatibility of SoC design has become an urgent problem to be solved. Summary of the invention
[0006] In view of this, an embodiment of the present application provides a protocol conversion method and device for a TileLink bus and an AHB bus, which can realize the conversion between the protocols of the TileLink bus and the AHB bus, and achieve message intercommunication between the TileLink bus and the AHB bus.
[0007] In a first aspect, an embodiment of the present application provides a protocol conversion method for a TileLink bus and an AHB bus, comprising:
[0008] Receive target operation requests sent by the TileLink bus end;
[0009] Parsing the target operation request to obtain multiple request information carried by the target operation request;
[0010] Performing operation request format conversion on multiple request information carried by the target operation request to generate a target control signal set;
[0011] The target control signal set is sent to the AHB bus end, so that the AHB bus end is adjusted according to a plurality of signals corresponding to the target control signal set to execute the target operation request.
[0012] As an optional implementation of the embodiment of the present application, after sending the target control signal set to the AHB bus end so that the AHB bus end is adjusted according to the corresponding multiple signals in the target control signal set to execute the target operation request, the method further includes:
[0013] receiving a first response control signal set; the first response control signal set is made by the AHB bus end in response to the target operation request;
[0014] Performing format conversion on a plurality of response control signals in the first response control signal set to generate first response signal state change information;
[0015] The first response signal state change information is sent to the TileLink bus terminal to instruct the TileLink bus terminal to change the response signal corresponding to the first response signal state change information.
[0016] As an optional implementation of the embodiment of the present application, after receiving the first response control signal set, the method further includes:
[0017] The d-valid signal state of the TileLink bus end is obtained, and the d-valid signal state of the TileLink bus end is updated to a valid state.
[0018] As an optional implementation of the embodiment of the present application, the method further includes:
[0019] monitoring a first duration of sending the target control signal set to the AHB bus terminal and a second duration of receiving a first response control signal set;
[0020] When the first duration is longer than a first preset duration, and the second duration is longer than the first preset duration, generating an AHB bus terminal abnormal state message;
[0021] The AHB bus end abnormal status message is sent to the TileLink bus end.
[0022] As an optional implementation of the embodiment of the present application, the sending of the AHB bus end abnormal status message to the TileLink bus end includes:
[0023] Based on the AHB bus terminal abnormal state message, generating second response signal state change information;
[0024] The second response signal state change information is sent to the TileLink bus terminal to instruct the TileLink bus terminal to change the state of the d-error signal to a valid state according to the second response signal state change information.
[0025] As an optional implementation of the embodiment of the present application, after receiving the target operation request sent by the TileLink bus terminal, the method further includes:
[0026] A target transmission state of current data transmission is determined according to multiple request information carried by the target operation request; the target transmission state is non-sequential transmission or sequential transmission.
[0027] In a second aspect, an embodiment of the present application provides a protocol conversion device for a TileLink bus and an AHB bus, including:
[0028] A receiving unit, used for receiving a target operation request sent by a TileLink bus terminal;
[0029] A parsing unit, configured to parse the target operation request and obtain multiple request information carried by the target operation request;
[0030] A generating unit, configured to convert the multiple request information carried by the target operation request into an operation request format, and generate a target control signal set;
[0031] The sending unit is used to send the target control signal set to the AHB bus end, so that the AHB bus end is adjusted according to the corresponding multiple signals in the target control signal set to execute the target operation request.
[0032] As an optional implementation of the embodiment of the present application, the receiving unit is also used to receive a first response control signal set; the first response control signal set is made by the AHB bus end in response to the target operation request; the generating unit also performs format conversion on multiple response control signals in the first response control signal set to generate first response signal state change information; the sending unit is also used to send the first response signal state change information to the TileLink bus end to instruct the TileLink bus end to change the response signal corresponding to the first response signal state change information.
[0033] As an optional implementation of the embodiment of the present application, the receiving unit is further used to obtain the d-valid signal state of the TileLink bus end, and update the d-valid signal state of the TileLink bus end to a valid state.
[0034] As an optional implementation of an embodiment of the present application, the protocol conversion device for the TileLink bus and the AHB bus also includes a monitoring unit, which is specifically used to monitor a first duration of sending the target control signal set to the AHB bus end and a second duration of receiving a first response control signal set; when the first duration is greater than a first preset duration, and the second duration is greater than the first preset duration, an AHB bus end abnormal status message is generated; and the AHB bus end abnormal status message is sent to the TileLink bus end.
[0035] As an optional implementation of the embodiment of the present application, the monitoring unit is specifically used to generate a second response signal state change information based on the abnormal status message of the AHB bus end; and send the second response signal state change information to the TileLink bus end to instruct the TileLink bus end to change the state of the d-error signal to a valid state according to the second response signal state change information.
[0036] As an optional implementation of the embodiment of the present application, the receiving unit is also used to determine the target transmission state of the current data transmission according to multiple request information carried by the target operation request; the target transmission state is non-sequential transmission or sequential transmission.
[0037] In a third aspect, an embodiment of the present application provides an electronic device, comprising: a memory and a processor, wherein the memory is used to store a computer program; and the processor is used to enable the electronic device to implement the protocol conversion method for the TileLink bus and the AHB bus described in any of the above embodiments when executing the computer program.
[0038] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a computing device, the computing device implements the protocol conversion method for the TileLink bus and the AHB bus described in any of the above embodiments.
[0039] The protocol conversion method for TileLink bus and AHB bus provided in the embodiment of the present application is specifically as follows: receiving a target operation request sent by the TileLink bus end; parsing the target operation request to obtain multiple request information carried by the target operation request; performing operation request format conversion on the multiple request information carried by the target operation request to generate a target control signal set; sending the target control signal set to the AHB bus end, so that the AHB bus end adjusts according to the multiple signals corresponding to the target control signal set to execute the target operation request. The embodiment of the present application converts the multiple request information of the target operation request sent by the TileLink bus end in a format conversion so that the target control signal set obtained after the format conversion can be recognized by the AHB bus end, and then the AHB bus end adjusts according to the multiple signals corresponding to the target control signal set to execute the target operation request, thereby breaking the barrier between the two protocols, realizing the message intercommunication between the TileLink bus and the AHB bus, enabling devices with different protocols to work together, improving the flexibility and compatibility of SoC design, reducing development costs and cycles, and meeting the increasingly complex and changing system design requirements. BRIEF DESCRIPTION OF THE DRAWINGS
[0040] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.
[0041] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings required in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
[0042] Figure 1 A schematic diagram of a framework of a protocol conversion method for a TileLink bus and an AHB bus provided in an embodiment of the present application;
[0043] Figure 2 One of the step flow charts of the protocol conversion method for TileLink bus and AHB bus provided in the embodiment of the present application;
[0044] Figure 3 The second step flow chart of the protocol conversion method for TileLink bus and AHB bus provided in the embodiment of the present application;
[0045] Figure 4 The third step flow chart of the protocol conversion method for TileLink bus and AHB bus provided in the embodiment of the present application;
[0046] Figure 5 A timing diagram of a protocol conversion method for a TileLink bus and an AHB bus provided in an embodiment of the present application;
[0047] Figure 6 A schematic diagram of the structure of a protocol conversion device for a TileLink bus and an AHB bus provided in an embodiment of the present application;
[0048] Figure 7 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0049] In order to more clearly understand the above-mentioned objectives, features and advantages of the present disclosure, the scheme of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.
[0050] In the following description, many specific details are set forth to facilitate a full understanding of the present disclosure, but the present disclosure may also be implemented in other ways different from those described herein; it is obvious that the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.
[0051] In the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete way. In addition, in the description of the embodiments of the present application, unless otherwise specified, the meaning of "multiple" refers to two or more.
[0052] It should be noted that, in this article, the term "comprises" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.
[0053] Reference Figure 1As shown, it is an overall architecture diagram of a protocol conversion method for TileLink bus and AHB bus provided by an embodiment of the present application, which includes a TileLink bus terminal 11, a protocol converter 12, and an AHB bus terminal 13; specifically, the TileLink bus terminal can be understood as a device that uses the TileLink bus protocol for communication; TileLink is an open standard chip-level interconnect protocol, mainly used in a system on a chip (SoC), providing multiple master devices with consistent memory mapping access to memory and other slave devices, and can connect general multiprocessors, coprocessors, accelerators, DMA engines, and simple or complex devices, etc., using fast and scalable interconnection to provide low latency and high throughput data handling; illustratively, the TileLink bus terminal 11 can be deployed in a general multiprocessor, a coprocessor, an accelerator, a DMA engine, an on-chip storage device, etc.; the AHB bus terminal 13 can be a component that responds to requests including a memory, a peripheral, etc. AHB (Advanced High-performance Bus) is a high-performance on-chip bus, mainly used to connect multiple master devices (Master) and slave devices (Slave) in a system on a chip (SoC). The master device can be the TileLink bus end; the slave device is the AHB bus end. The protocol converter 12 is a protocol converter from the TileLink bus to the AHB bus. The normal operation of the TileLink bus to the AHB bus protocol converter requires that: the protocol converter receives the operation request initiated by the TileLink master device, and the AHB works as a slave device; and the working clock of the TileLink master device must be consistent with the working clock of the AHB slave device.
[0054] The present application embodiment provides a protocol conversion method for TileLink bus and AHB bus, referring to Figure 1 As shown, the protocol conversion method for the TileLink bus and the AHB bus includes the following steps S201-S204:
[0055] S201: Receive a target operation request sent by a TileLink bus terminal.
[0056] In some embodiments, TileLink supports multiple types of communication agent modules (Agent) and defines three protocol extension levels from simple to complex. Each level defines a subset of protocol extensions that a communication agent module compatible with that level needs to support; these three levels are the lightweight uncached level TL-UL (TileLink UncachedLightweight), the uncached heavyweight level TL-UH (TileLink Uncached Heavyweight), and the cache level TL-C (TileLink Cached); in the embodiment of the present application, considering that the TileLink bus end as the master device and the AHB bus end of the slave device can be compatible to the greatest extent and exert the best data transmission performance, the TileLink bus end in the embodiment of the present application selects the TL-UH level protocol, because the TL-UH level bus protocol and the AHB bus protocol are both compatible with the burst transmission format, and support a variety of data formats, and the operation types match,
[0057] At the same time, the TileLink protocol defines five logically independent channels through which agents can pass messages. In order to avoid deadlock, TileLink enforces the priority of message transmission on these five channels. Most channels contain signals that control transmission and copies of actual data. The transmission of messages on the channel is unidirectional, with the master transmitting messages to the slave interface, or the slave transmitting messages to the master. The five channels are channel A, channel B, channel C, channel D, and channel E; since the TL-UH protocol level is adopted in the embodiment of the present application, only channel A and channel D are used in the embodiment of the present application; wherein channel A is a channel flowing from the master device (i.e., the TileLink bus end) to the slave device (i.e., the AHB bus end), and is mainly used to transmit requests for performing operations, accessing or caching data in a specified address range. Channel D is a channel flowing from the slave device (i.e., the AHB bus end) to the master device (i.e., the TileLink bus end), and is a channel that is mandatory for all TileLink levels. It is mainly used to send data responses or confirmation messages to the original requester, and is one of the basic channels required to perform memory access operations. Whether it is a read data operation or other operation that requires information to be returned from the device, the D channel is used to transmit this data or confirmation information.
[0058] Specifically, the target operation request is a request generated by the TileLink bus end, which can be a data read request, a data write request, etc.; for example, when the target operation request is a data read request, the master device (i.e., the TileLink bus end) needs to read data at a specific address of the slave device (i.e., the AHB bus end); for another example, when the target operation request is a data write request, the slave device (i.e., the TileLink bus end) needs to write data to a specific address of the slave device (i.e., the TileLink bus end).
[0059] Then, due to the protocol differences between the master device (i.e., the TileLink bus end) and the slave device (i.e., the AHB bus end), the message format and signal definition are different, and thus the message cannot be directly transmitted. Therefore, in the embodiment of the present application, the protocol converter is set between the master device (i.e., the TileLink bus end) and the slave device (i.e., the AHB bus end). After the TileLink bus end generates a target operation request, it will be sent to the protocol converter through channel A. After receiving the target operation request, the protocol converter converts the target operation request into a format that can be recognized by the AHB bus end, i.e., the target operation request, thereby realizing message communication between the master device (i.e., the TileLink bus end) and the slave device (i.e., the AHB bus end).
[0060] It should be noted that, in the above S201, after receiving the target operation request sent by the TileLink bus end, the embodiment of the present application also needs to determine the target transmission state of the current data transmission according to the multiple request information carried by the target operation request.
[0061] The target transmission state is non-sequential transmission or sequential transmission.
[0062] Specifically, since the AHB bus protocol has four data transmission states, IDLE (idle) state, BUSY (busy) state, NONSEQ (non-sequential) state, and SEQ (sequential) state, only the two data transmission states of NONSEQ (non-sequential) state and SEQ (sequential) state are considered in the embodiment of the present application. Therefore, when the embodiment of the present application transmits data to the slave device (i.e., the AHB bus end) through the master device (i.e., the TileLink bus end), it is also necessary to determine the data transmission state of the AHB bus end, that is, non-sequential transmission and sequential state.
[0063] In the AHB bus protocol, the NONSEQ instruction is mainly used to indicate non-sequential data transfer operations. This usually means that the transfer request initiated by the master device (Master) has no direct sequential association with the previous transfer. For example, the master device may jump to a new address for read or write operations at any time, instead of transmitting in a continuously increasing or decreasing address order.
[0064] For example, in a complex system on chip (SoC), when the processor as the master device needs to access the control registers of different peripherals, the addresses of these registers may be scattered and have no fixed order. At this time, the processor can use the NONSEQ instruction to initiate access requests to these different addresses. For example, first access the control register of a timer, and then immediately access the configuration register of a UART interface. There is no order dependency between these two operations, which can be achieved through the NONSEQ instruction.
[0065] In contrast to the NONSEQ instruction, the SEQ instruction is used to indicate a sequential data transfer operation. This means that the transfer request initiated by the master device is performed in a continuous address sequence. The SEQ instruction is usually used when accessing continuous memory units (such as reading a continuously stored program code or data buffer). It takes advantage of the address continuity feature and helps improve the efficiency of data transfer.
[0066] For example, when the processor needs to read the data of an array from the memory, since the array is stored continuously in the memory, the processor can use the SEQ instruction to initiate a continuous read operation. Assuming that the array element is 32-bit word length and the starting address is 0x1000, the processor can send the SEQ instruction to read the array elements in order of increasing address starting from 0x1000. This sequential transmission method can make full use of the pipeline characteristics of the AHB bus and the continuous reading advantage of the memory to speed up data transmission.
[0067] Specifically, a specific method for determining the target transmission state of the current data transmission according to the multiple request information carried by the target operation request is as follows:
[0068] Obtain an a-size signal and an a_address signal from among the multiple request information carried by the target operation request.
[0069] In the TileLink protocol, the a-size signal is used to indicate the granularity of the address space. It determines the address counting unit, which can be different size units such as bytes, half words, and words, which is related to the smallest addressable unit of data transmission. The a_address signal is used to indicate the target address for byte addressing and must be aligned with size.
[0070] When the address difference between the a_address signal and the previous a_address signal is exactly the unit size defined by the a-size signal, it is usually a sequential transmission. For example, if the a-size signal is in words (assuming 4 bytes), the last transmission address is 0x1000, and the current transmission address is 0x1004, which meets the characteristics of sequential transmission. Because according to the A-size specification, the address is continuously increased in units of 4 bytes.
[0071] During a burst transfer, sequential transfers will continue to increment the address in units specified by the a-size signal. For example, for a burst transfer a-size of length 8, which is a half word (assuming 2 bytes), and the starting address is 0x1000, the address sequence of the transfer should be 0x1000, 0x1002, 0x1004, 0x1006, 0x1008, 0x100A, 0x100C, 0x100E. This regular address increment is consistent with sequential transfer.
[0072] When the address change a-size of the a_address signal does not match the defined unit size, it is a non-sequential transmission. For example, a-size is in bytes, the last transmission address is 0x1000, and this transmission address is 0x1010. This jump-like address change does not conform to the incremental rule of bytes, so it can be judged as a non-sequential transmission.
[0073] S202: Parse the target operation request to obtain multiple request information carried by the target operation request.
[0074] Specifically, after obtaining the target operation request, the target operation request is parsed to obtain multiple request information in the target operation request; for example, when the target operation request is a data read request, the multiple request information carried by the target operation request may include: operation request type (read request), target address of data to be read, and operation data size (for example, whether to read by byte or word). The combination of the above multiple information constitutes a complete read request, which is used to perform the corresponding operation on the slave device (i.e., AHB bus end).
[0075] Furthermore, the protocol converter can perform format conversion according to the multiple request information carried by the target operation request to generate a request format recognizable by the slave device (ie, the AHB bus end), so as to facilitate the slave device (ie, the AHB bus end) to perform the corresponding operation.
[0076] S203: Perform operation request format conversion on multiple request information carried by the target operation request to generate a target control signal set.
[0077] It should be noted that the multiple request information carried by the target operation request can be represented in a signal format, and the signals included in channel A of the TileLink bus end are shown in the following Table 1:
[0078] Table 1. Signal list of TileLink bus channel A
[0079]
[0080] Among them, when the a_opcode operation code of channel A on the TileLink bus end is 4, it indicates a read data operation, which is represented by Get; when the operation code is 0, it indicates a write data operation, which is represented by PutFullData; when the operation code is 1, it indicates a write data operation, which is represented by PutPartialData.
[0081] Exemplarily, when the master device (i.e., the TileLink bus end) sends a data read request through channel A, the multiple request information included in the target operation request instruction may be a_opcode signal corresponding to the read operation type, a_address signal corresponding to the target address, and a_size signal corresponding to the operation data size.
[0082] Then, these signals are converted into control signals that can be recognized by the AHB bus end. The AHB bus end control signals can be referred to as shown in the following Table 2:
[0083] Table 2. AHB bus control signal list
[0084]
[0085]
[0086] Furthermore, when the target operation request carries multiple signals such as an a_opcode signal corresponding to the read operation type, an a_address signal corresponding to the target address, and an a_size signal corresponding to the operation data size, the a_opcode signal corresponding to the read operation type is converted into a read control signal HRDATA of the AHB bus end, that is, it is clear that the HRDATA signal of the AHB bus needs to be pulled high at present, the target address a_address signal is converted into the address signal HADDR of the AHB bus end, and the transmission mode corresponding to the transmission type signal HTRANS of the AHB bus end is obtained according to the a_size signal corresponding to the operation data size; and then the target control signal set is generated based on the AHB bus end read control signal HRDATA, address signal HADDR, transmission type signal HTRANS, etc. obtained after the conversion to control the AHB bus end, so as to enable the AHB bus end to execute the target operation request.
[0087] It should be noted that when the protocol converter obtains that the HVALID and HREADY signals of the AHB bus end are valid at the same time, it can be known that a data transmission from the TileLink bus to the AHB bus is completed.
[0088] S204: Send the target control signal set to the AHB bus end, so that the AHB bus end is adjusted according to a plurality of signals corresponding to the target control signal set to execute the target operation request.
[0089] In an embodiment of the present application, the target control signal set includes multiple control signals that can be recognized by the AHB bus end corresponding to the target operation request, and after the protocol converter obtains the target control signal set, it can control and adjust the corresponding signal according to the control signal in the target control signal set so that the AHB bus end executes the target operation request.
[0090] The protocol conversion method for TileLink bus and AHB bus provided in the embodiment of the present application is specifically as follows: receiving a target operation request sent by the TileLink bus end; parsing the target operation request to obtain multiple request information carried by the target operation request; performing operation request format conversion on the multiple request information carried by the target operation request to generate a target control signal set; sending the target control signal set to the AHB bus end, so that the AHB bus end adjusts according to the multiple signals corresponding to the target control signal set to execute the target operation request. The embodiment of the present application converts the multiple request information of the target operation request sent by the TileLink bus end in a format conversion so that the target control signal set obtained after the format conversion can be recognized by the AHB bus end, and then the AHB bus end adjusts according to the multiple signals corresponding to the target control signal set to execute the target operation request, thereby breaking the barrier between the two protocols, realizing the message intercommunication between the TileLink bus and the AHB bus, enabling devices with different protocols to work together, improving the flexibility and compatibility of SoC design, reducing development costs and cycles, and meeting the increasingly complex and changing system design requirements.
[0091] As an extension and refinement of the above embodiment, after the execution of S204 (sending the target control signal set to the AHB bus end so that the AHB bus end is adjusted according to the multiple signals corresponding to the target control signal set to execute the target operation request), the method further includes the following steps S301 to S303:
[0092] S301. Receive a first response control signal set.
[0093] In some embodiments, after the AHB bus end executes the target operation request through the target control signal set, it will feedback a corresponding response message to the master device. For example, when the target operation request is a data read request, after the AHB bus end reads the data, it needs to return the data to the master device through channel D of the TileLink bus end. After the master device receives the data, the entire read request process is completed.
[0094] Therefore, when the AHB bus end prepares and returns data from the corresponding device, the protocol converter also needs to convert the signal of the AHB bus end into the format corresponding to TileLinkD. Furthermore, the protocol converter needs to first receive a first response control signal set, in which the AHB bus end may obtain multiple response signals, such as the read data signal HRDATA and the operation response type signal HRESP in Table 2 above.
[0095] Specifically, the signal HRDATA is used to transmit the read data from the slave device to the master device. The slave device will place the data on the bus corresponding to the HRDATA signal, and the master device obtains the data in the slave device by reading this signal. The signal HRESP is used to indicate whether the AHB bus end has read data from the corresponding slave device. Then, the first response control signal set is formed through multiple response signals of the AHB bus end.
[0096] S302: Perform format conversion on multiple response control signals in the first response control signal set to generate first response signal state change information.
[0097] In some embodiments, after the response control signal set is generated, it indicates that the AHB bus end is ready to return response data, and then, the protocol converter can generate first response signal state change information according to multiple response control signals in the first response control signal set of the AHB bus end, and then give the first response signal state change information to the TileLink bus end through channel D of the TileLink bus end, so that the TileLink bus end will change the corresponding response signal according to the first response signal state change information.
[0098] Specifically, the signals included in the TileLink bus end channel D are shown in Table 3 below:
[0099] Table 3. Signal list of TileLink bus channel D
[0100]
[0101]
[0102] Among them, when the d_opcode operation code of the channel D at the TileLink bus end is 0, it indicates a response operation of a write data operation, the response does not contain data, and is represented by AccessAck; when the operation code is 1, it indicates a response operation of a read data operation, the response contains data, and is represented by AccessAckData.
[0103] Exemplarily, when performing format conversion on the multiple response control signals in the first response control signal set, the HSIZE signal of the AHB bus end is converted into whether the corresponding d_size data in the TileLink bus end is valid, so that the master device can correctly judge the status of the slave device.
[0104] It should be noted that after the above S301 (receiving the first response control signal set) is executed, the method further includes the following steps:
[0105] The d-valid signal state of the TileLink bus end is obtained, and the d-valid signal state of the TileLink bus end is updated to a valid state.
[0106] In some embodiments, after the response control signal set is generated, it indicates that the AHB bus end is ready to return response data, and then it is necessary to determine that the d-valid signal state of channel D of the TileLink bus end is a valid state, so as to ensure that the data received by channel D of the TileLink bus end is valid and avoid data loss; specifically, the method of updating the d-valid signal state of the TileLink bus end to a valid state can be: raising the level of the d-valid signal of the TileLink bus end, because in most cases a low level indicates that the signal is invalid, and a high level indicates that the signal is valid.
[0107] S303: Send the first response signal state change information to the TileLink bus terminal to instruct the TileLink bus terminal to change the response signal corresponding to the first response signal state change information.
[0108] In some embodiments, according to the first response signal state change information, for example, change information corresponding to response signals such as d_szie, d_source, d_error, etc., the signals corresponding to d_szie, d_source, d_error are changed respectively.
[0109] As an extension and refinement of the above embodiment, the protocol conversion method for the TileLink bus and the AHB bus further includes the following steps S401 to S403:
[0110] S401 , monitoring a first duration of sending the target control signal set to the AHB bus terminal and a second duration of receiving a first response control signal set.
[0111] Specifically, by monitoring the first duration of the target control signal set being sent to the AHB bus end, when the first duration exceeds the first preset duration, it indicates that the AHB bus end cannot receive the target control signal set, and further indicates that the AHB bus end may be abnormal and cannot operate normally.
[0112] At the same time, by monitoring the second duration of receiving the first response control signal set, when the second duration is greater than the second preset duration, it means that the AHB bus end has not provided the corresponding response information to the protocol converter, which further indicates that the AHB bus end may be abnormal and cannot operate normally.
[0113] S402: When the first duration is longer than a first preset duration, and the second duration is longer than the first preset duration, generate an AHB bus terminal abnormal status message.
[0114] Specifically, in an embodiment of the present application, when the first duration is greater than the first preset duration, and the second duration is greater than the first preset duration, it means that the AHB bus end may have an abnormality and cannot operate normally. At this time, it is necessary to generate an AHB bus end abnormal status message and synchronize the AHB bus end abnormal status message to the TileLink bus end.
[0115] It should be noted that the first preset duration and the second preset duration can be set according to actual conditions, and the embodiment of the present application does not make specific limitations.
[0116] S403: Send the AHB bus terminal abnormal status message to the TileLink bus terminal.
[0117] In some embodiments, the detailed steps of sending the AHB bus terminal abnormal status message to the TileLink bus terminal include the following steps 1 and 2:
[0118] Step 1: Based on the AHB bus terminal abnormal status message, generate second response signal state change information.
[0119] In some embodiments, according to the abnormal state message of the AHB bus end, the message needs to be synchronized to the TileLink bus end, so that the master device of the TileLink bus end obtains that the AHB bus end is in an abnormal state and cannot perform data transmission. Specifically, it is necessary to generate a second response signal state change information to change the state of the d-error signal of the TileLink bus end to a valid state, so as to indicate to the master device that the device has an error and data transmission has been stopped.
[0120] It should be noted that before executing step 1, since it is necessary to send a message to the TileLink bus end, it is also necessary to execute the steps of obtaining the d-valid signal status of the TileLink bus end and updating the d-valid signal status of the TileLink bus end to a valid state to ensure that the subsequent messages received through channel D are valid.
[0121] Step 2: Send the second response signal state change information to the TileLink bus terminal to instruct the TileLink bus terminal to change the state of the d-error signal to a valid state according to the second response signal state change information.
[0122] Furthermore, after sending the second response signal state change information to the TileLink bus end, the TileLink bus end will change the state of the d-error signal to a valid state according to the second response signal state change information to indicate that the TileLink bus end is in an error state and cannot operate normally.
[0123] It should be noted that the second response signal state change information also includes other signals, such as d_szie, d_source and other signals, to display more information of the AHB bus end.
[0124] As an extension and refinement of the above embodiment, in combination with the above embodiment, the protocol converter has five working states, specifically: receiving TileLink bus end request state; sending request state to AHB bus end; receiving AHB bus end response state; sending response state to TileLink bus end; transmitting AHB bus end abnormal state.
[0125] In combination with the above embodiments, the embodiment of the present application takes the TileLink bus end sending a data write instruction to the AHB bus end as an example to describe the specific conversion process in detail. Figure 5 As shown, the cycle is divided based on the clock signal a_clk of the A channel of the TileLink bus end.
[0126] The first cycle: the valid signal a_valid in channel A of the TileLink bus end is 1. At the same time, according to the operation code a_opcode, it is obtained that channel A of the TileLink bus end currently issues a PutFullData operation, and it is necessary to write the complete data block to the storage medium or transfer it to the target location; a_size is 2, which means that 2 units of data need to be written. When each unit is 2 bytes, 4 bytes of data need to be written. According to the address signal a_address, the address of the write data is a hexadecimal address, for example 0x10000020, 0x represents the prefix of the base, that is, hexadecimal, and 10000020 is the address of the current write data.
[0127] The second cycle: In this cycle, the protocol converter pulls up the signal a_ready, indicating that the instruction issued by the A channel of TileLink has been received. At this time, the protocol converter will save the information related to the instruction, such as a_address (the address of the write data), a_source (the link master device, that is, the device ID of the current TileLink bus end), and a_data (5a5a_1234 as shown in the figure, which can be understood as the data carried by the current instruction with the message, that is, the data to be written to the address 0x10000020) and other information.
[0128] The third cycle: the HSELx signal and HVALID signal of the AHB bus end need to be enabled to indicate that an instruction is initiated to the AHB bus end; among them, HTRANS is 2, indicating that the type of AHB transmission is NONSEQ; HWRITE is 1, indicating that the current instruction is a write operation; HSIZE is 2, indicating that the amount of data operated is 2 units of data, that is, 4 bytes; HADDR is the address of the current write data, that is, 0x10000020, and HWDATA is the data to be written, that is, 5a5a_1234; it should be noted that in this cycle, the AHB bus end will read the data in the current address from the address 0x10000020 of the write data transmitted from the TileLink bus end, for example: HRDATA is 53fe_73a3; and then write the new data 5a5a_1234 to be written.
[0129] The fourth cycle: In this cycle, HREADY of the AHB bus end in the figure is at a high level, indicating that the current AHB bus end is ready and has received instructions.
[0130] The fifth cycle: In this cycle, HREADY of the AHB bus end is still at a high level, indicating that the AHB bus end has received the data to be written from the protocol converter, and will then feedback the response data; when HRESP is 0, it means that the data has been received correctly.
[0131] The sixth cycle: In this cycle, as the AHB bus starts to feedback the response signal, the protocol converter needs to pull up the d_valid signal of the D channel of the TileLink bus to indicate that the response data fed back by the AHB bus is sent to the TileLink bus; d_opcode is 0, indicating that the response type is AccessAck. It should be noted that since the AHB bus will also read the original data 53fe_73a3 at address 0x10000020, when the response data is fed back, the data 53fe_73a3 will be used as d_data, that is, the data carried by the response message will be given to the TileLink bus.
[0132] The seventh cycle: When the d_ready signal of the D channel of the TileLink bus is pulled up, it indicates that the TileLink bus has received the response data fed back from the AHB bus. Then, observe the d_denied signal and d_corrupt of the TileLink bus. When they are both 0, it means that the current data write instruction has been successfully completed.
[0133] Based on the same inventive concept, as an implementation of the above method, an embodiment of the present application also provides a protocol conversion device for TileLink bus and AHB bus. This embodiment corresponds to the above method embodiment. For ease of reading, this embodiment will no longer repeat the details of the above method embodiment one by one, but it should be clear that a protocol conversion device for TileLink bus and AHB bus in this embodiment can correspond to the implementation of all the contents in the above method embodiment.
[0134] The embodiment of the present application provides a protocol conversion device for a TileLink bus and an AHB bus. Figure 6 FIG. 1 is a schematic diagram of the structure of the protocol conversion device for the TileLink bus and the AHB bus, as shown in FIG. Figure 6 As shown, the protocol conversion device 600 for the TileLink bus and the AHB bus includes:
[0135] The receiving unit 601 is used to receive a target operation request sent by the TileLink bus terminal;
[0136] The parsing unit 602 is used to parse the target operation request and obtain multiple request information carried by the target operation request;
[0137] A generating unit 603 is used to convert the multiple request information carried by the target operation request into an operation request format to generate a target control signal set;
[0138] The sending unit 604 is used to send the target control signal set to the AHB bus end, so that the AHB bus end is adjusted according to the corresponding multiple signals in the target control signal set to execute the target operation request.
[0139] As an optional implementation of the embodiment of the present application, the receiving unit 601 is also used to receive a first response control signal set; the first response control signal set is made by the AHB bus end in response to the target operation request; the generating unit also performs format conversion on multiple response control signals in the first response control signal set to generate first response signal state change information; the sending unit is also used to send the first response signal state change information to the TileLink bus end to instruct the TileLink bus end to change the response signal corresponding to the first response signal state change information.
[0140] As an optional implementation of the embodiment of the present application, the receiving unit 601 is further used to obtain the d-valid signal state of the TileLink bus end, and update the d-valid signal state of the TileLink bus end to a valid state.
[0141] As an optional implementation of an embodiment of the present application, the protocol conversion device for the TileLink bus and the AHB bus also includes a monitoring unit, which is specifically used to monitor a first duration of sending the target control signal set to the AHB bus end and a second duration of receiving a first response control signal set; when the first duration is greater than a first preset duration, and the second duration is greater than the first preset duration, an AHB bus end abnormal status message is generated; and the AHB bus end abnormal status message is sent to the TileLink bus end.
[0142] As an optional implementation of the embodiment of the present application, the monitoring unit is specifically used to generate a second response signal state change information based on the abnormal status message of the AHB bus end; and send the second response signal state change information to the TileLink bus end to instruct the TileLink bus end to change the state of the d-error signal to a valid state according to the second response signal state change information.
[0143] As an optional implementation of the embodiment of the present application, the receiving unit 601 is also used to determine the target transmission state of the current data transmission according to multiple request information carried by the target operation request; the target transmission state is non-sequential transmission or sequential transmission.
[0144] Based on the same inventive concept, an embodiment of the present disclosure also provides an electronic device. Figure 7 A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure, such as Figure 7 As shown, the electronic device provided in this embodiment includes: a memory 701 and a processor 702, wherein the memory 701 is used to store a computer program; and the processor 702 is used to execute the audio data processing method provided in the above embodiment when executing the computer program.
[0145] Based on the same inventive concept, an embodiment of the present application also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the computing device implements the protocol conversion method for the TileLink bus and the AHB bus provided in the above embodiment.
[0146] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media that include computer-usable program code.
[0147] The processor may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc.
[0148] The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.
[0149] Computer readable media include permanent and non-permanent, removable and non-removable storage media. Storage media can be implemented by any method or technology to store information, and the information can be computer-readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, read-only compact disk read-only memory (Cd-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.
[0150] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A protocol conversion method for TileLink bus and AHB bus, characterized in that: The method is applied to a protocol converter, comprising: Receive target operation requests sent by the TileLink bus end; Parsing the target operation request to obtain multiple request information carried by the target operation request; Performing operation request format conversion on multiple request information carried by the target operation request to generate a target control signal set; The target control signal set is sent to the AHB bus end, so that the AHB bus end is adjusted according to a plurality of signals corresponding to the target control signal set to execute the target operation request.
2. The method according to claim 1, characterized in that After sending the target control signal set to the AHB bus end so that the AHB bus end is adjusted according to a plurality of signals corresponding to the target control signal set to execute the target operation request, the method further includes: receiving a first response control signal set; the first response control signal set is made by the AHB bus end in response to the target operation request; Performing format conversion on a plurality of response control signals in the first response control signal set to generate first response signal state change information; The first response signal state change information is sent to the TileLink bus terminal to instruct the TileLink bus terminal to change the response signal corresponding to the first response signal state change information.
3. The method according to claim 2, characterized in that After receiving the first response control signal set, the method further includes: The d-valid signal state of the TileLink bus end is obtained, and the d-valid signal state of the TileLink bus end is updated to a valid state.
4. The method according to any one of claims 1 and 2, characterized in that The method further comprises: monitoring a first duration of sending the target control signal set to the AHB bus terminal and a second duration of receiving a first response control signal set; When the first duration is longer than a first preset duration, and the second duration is longer than the first preset duration, generating an AHB bus terminal abnormal state message; The AHB bus end abnormal status message is sent to the TileLink bus end.
5. The method according to claim 4, characterized in that The sending of the AHB bus end abnormal status message to the TileLink bus end includes: Based on the AHB bus terminal abnormal state message, generating second response signal state change information; The second response signal state change information is sent to the TileLink bus terminal to instruct the TileLink bus terminal to change the state of the d-error signal to a valid state according to the second response signal state change information.
6. The method according to claim 1, characterized in that After receiving the target operation request sent by the TileLink bus terminal, the method further includes: A target transmission state of current data transmission is determined according to multiple request information carried by the target operation request; the target transmission state is non-sequential transmission or sequential transmission.
7. A protocol conversion device for TileLink bus and AHB bus, characterized in that: include: A receiving unit, used for receiving a target operation request sent by a TileLink bus terminal; A parsing unit, configured to parse the target operation request and obtain multiple request information carried by the target operation request; A generating unit, configured to convert the multiple request information carried by the target operation request into an operation request format, and generate a target control signal set; The sending unit is used to send the target control signal set to the AHB bus end, so that the AHB bus end is adjusted according to the corresponding multiple signals in the target control signal set to execute the target operation request.
8. The device according to claim 7, characterized in that include: The receiving unit is further configured to receive a first response control signal set; The first response control signal set is made by the AHB bus terminal in response to the target operation request; The generating unit further performs format conversion on a plurality of response control signals in the first response control signal set to generate first response signal state change information; The sending unit is further configured to send the first response signal state change information to the TileLink bus terminal to instruct the TileLink bus terminal to change the response signal corresponding to the first response signal state change information.
9. An electronic device, characterized in that: include: A memory and a processor, wherein the memory is used to store a computer program; and the processor is used to enable the electronic device to implement the protocol conversion method for the TileLink bus and the AHB bus as described in any one of claims 1 to 6 when executing the computer program.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a computing device, the computing device implements the protocol conversion method for the TileLink bus and the AHB bus as described in any one of claims 1 to 6.