Radio frequency power assembly and electronic equipment

Abstract

The embodiment of the invention provides a radio frequency power assembly and electronic equipment, and relates to the technical field of communication equipment. The radio frequency power assembly comprises a substrate, a first chip, a second chip, an insulating layer, at least three conductive blocks, a first connecting part and a second connecting part. At least part of the insulating layer is arranged on the sides, away from the substrate, of the first chip and the second chip. The at least three conductive blocks are arranged on one side, far away from the substrate, of the insulating layer; the at least three conductive blocks are arranged at intervals along the second direction. One end of the first connecting part penetrates through the insulating layer and is connected with the first chip, and the other end is connected with one end of the conductive block; one end of the second connecting part penetrates through the insulating layer and is electrically connected with the second chip, and the other end is electrically connected with the other end of the conductive block. Among the at least three conductive blocks, the areas of the surfaces, away from the substrate, of at least two conductive blocks are different. According to the structural design of the radio frequency power assembly, a three-dimensional binding wire group structure is avoided, so that the preparation difficulty of the radio frequency power assembly can be effectively reduced.

Description

Technical Field

[0001] The present application relates to the technical field of communication equipment, and in particular to a radio frequency power component and an electronic device. Background Art

[0002] The power amplifier (PA) is an important component of the mobile communication system. As the last amplification unit in the transmission channel, it is used to amplify the low-power radio frequency signal and send it to the antenna for transmission.

[0003] With the advent of the fifth generation mobile communication technology (5G), terminal devices have placed increasingly higher performance requirements on power amplifiers in recent years. However, due to the spatial distribution characteristics of the phase and amplitude of RF signals, differences in the phase and amplitude of RF current and voltage in the power amplifier are prone to occur, resulting in deterioration of the RF performance, robustness, and stability of the power amplifier.

[0004] How to improve the uniformity of the phase amplitude of the RF current and voltage in the power amplifier without increasing the difficulty of preparing the power amplifier has become one of the problems that need to be solved urgently. Summary of the invention

[0005] The embodiments of the present application provide a radio frequency power component and an electronic device, the purpose of which is to adopt a planar structure design to achieve the interconnection of chips in the radio frequency power component and effectively reduce the difficulty of preparing the radio frequency power component.

[0006] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, a radio frequency power component is provided. The radio frequency power component includes a substrate, a first chip, a second chip, an insulating layer, at least three conductive blocks, a first connecting portion, and a second connecting portion.

[0008] The first chip and the second chip are arranged on the same side of the substrate; the first chip and the second chip are arranged in a first direction, and the first direction is parallel to the substrate. At least part of the insulating layer is arranged on the side of the first chip and the second chip away from the substrate. At least three conductive blocks are arranged on the side of the insulating layer away from the substrate; at least three conductive blocks are spaced and arranged in a second direction, which is parallel to the substrate and intersects with the first direction. One end of the first connecting portion passes through the insulating layer and is electrically connected to the first chip, and the other end is electrically connected to one end of the conductive block; one end of the second connecting portion passes through the insulating layer and is electrically connected to the second chip, and the other end is electrically connected to the other end of the conductive block. Among the at least three conductive blocks, the areas of the surfaces away from the substrate of at least two conductive blocks are different.

[0009] In the RF power component provided in the embodiment of the present application, an insulating layer is set on the first chip and the second chip, a conductive block is set on the insulating layer, and an electrical connection between the first chip and the second chip is achieved through the conductive block. When the electrical connection between the first chip and the second chip is achieved, a planar RF power component is provided. The multiple conductive blocks can be formed at one time without the need for additional processing steps (such as a refined design step for the arc height of the signal line, etc.), thereby reducing the difficulty of preparing the RF power component. At the same time, the equivalent inductance of the RF power component can be adjusted through the area design of the conductive block.

[0010] By setting at least two of the at least three conductive blocks to have different areas, the equivalent inductances (especially self-inductance) corresponding to different conductive blocks are controlled to be different, so as to adjust the unevenly distributed current. For example, the area of ​​the conductive block is reduced at the position where the RF current is large, and the area of ​​the conductive block is increased at the position where the RF current is small, so that the RF current output by at least three conductive blocks tends to be consistent, achieving uniform distribution, making the phase and amplitude of signals at different positions synchronized, reducing the signal convection inside the RF power component, and improving the electrical performance of the RF power component.

[0011] In a possible implementation of the first aspect, the conductive block extends from the first connection portion to the second connection portion, and the width of the conductive block is the dimension of the conductive block in a direction perpendicular to the extension path and parallel to the substrate. Among the at least three conductive blocks, at least two conductive blocks have different widths.

[0012] The design width of each conductive block is determined by the spatial distribution of the signal voltage and current at the location of the conductive block. The width of the conductive block is reduced where the current is large, thereby increasing the equivalent inductance (especially the self-inductance) generated by the conductive block, thereby reducing the current transmitted by the conductive block. Similarly, the width of the conductive block is increased where the current is small, so that the current output by each conductive block 4 can be the same.

[0013] In a possible implementation of the first aspect, the conductive block extends from the first connection portion to the second connection portion, and the length of the conductive block is the maximum dimension of the conductive block on the extension path. Among the at least three conductive blocks, at least two conductive blocks have different lengths.

[0014] By increasing the length of the conductive block in places with large current, the equivalent inductance (especially self-inductance) generated by the conductive block is increased, thereby reducing the current transmitted by the conductive block. Similarly, the length of the conductive block is reduced in places with small current so that the current output by each conductive block is the same.

[0015] In a possible implementation of the first aspect, the conductive block is in a rectangular shape extending along the first direction. Or, among the at least three conductive blocks, at least one conductive block is in a folded line shape. That is, the conductive block can include multiple deformation modes.

[0016] In a possible implementation manner of the first aspect, among the at least three conductive blocks, at least one conductive block is in an arc shape; wherein at least two conductive blocks have different curvatures.

[0017] By setting the curvatures of at least two conductive blocks to be different, the total lengths of at least two conductive blocks can also be different. For example, when the distance between the two ends of the conductive block is the same, the greater the curvature, the longer the total length of the conductive block, and the smaller the equivalent inductance (especially self-inductance) corresponding to the conductive block.

[0018] It can be understood that the technical effect brought about by adjusting the curvature of the conductive block is the same as the technical effect brought about by adjusting the length of the conductive block, and will not be elaborated here.

[0019] In a possible implementation of the first aspect, the conductive block includes a first sub-portion and a second sub-portion connected in sequence along a first direction, the widths and / or lengths of the multiple first sub-portions corresponding to at least three conductive blocks are the same, and the widths and / or lengths of the second sub-portions corresponding to at least two conductive blocks among the at least three conductive blocks are different. That is, only a part of a single conductive block can be deformed, thereby providing more deformation modes for the conductive block.

[0020] In a possible implementation of the first aspect, among the at least three conductive blocks, at least two conductive blocks have different thicknesses; the thickness of the conductive block is the dimension of the conductive block in a third direction; and the third direction is perpendicular to the surface of the insulating layer away from the substrate.

[0021] The thicker the conductive block is, the larger the cross-sectional area of ​​the current passing through the conductive block is, so that the equivalent inductance (especially the self-inductance) of the conductive block can be reduced, so that the current passing through the conductive block is increased.

[0022] It can be understood that the technical effect brought about by adjusting the thickness of the conductive block is the same as the technical effect brought about by adjusting the width of the conductive block, and will not be elaborated here.

[0023] In a possible implementation manner of the first aspect, among the at least three conductive blocks, a spacing between at least one pair of adjacent conductive blocks is different from a spacing between another pair of adjacent conductive blocks.

[0024] The spacing between each pair of adjacent conductive blocks is determined by the spatial distribution of the signal voltage and current at the location of the conductive block. Where the current is large, the spacing between two adjacent conductive blocks is reduced, thereby increasing the equivalent inductance (especially the mutual inductance) generated between the two adjacent conductive blocks, thereby reducing the current transmitted by the two adjacent conductive blocks. Similarly, where the current is small, the spacing between two adjacent conductive blocks is increased, so that the current output by each conductive block is roughly the same.

[0025] In a possible implementation manner of the first aspect, at least three conductive blocks are symmetrically arranged with a reference line as a symmetry axis; the reference line is parallel to the substrate and parallel to the first direction.

[0026] By arranging at least three conductive blocks symmetrically with the reference line as the symmetry axis, the equivalent inductance generated at different positions in the at least three conductive blocks can be further made substantially the same, thereby further improving the uniformity of the phase amplitude of the RF current and voltage corresponding to each conductive block.

[0027] In a possible implementation of the first aspect, the first chip and the first connecting portion are integrally provided, and the second chip and the second connecting portion are integrally provided; or, the conductive block, the first connecting portion, and the second connecting portion are integrally provided.

[0028] In a possible implementation of the first aspect, the RF power assembly further includes at least one electronic component disposed on a side of the insulating layer away from the substrate, wherein the conductive block is electrically connected to the first connecting portion via the electronic component, and / or the conductive block is electrically connected to the second connecting portion via the electronic component.

[0029] That is, the electronic components and the conductive blocks can be used together as a medium for transmitting the radio frequency current, so that the radio frequency current can be adjusted by adjusting the electronic components.

[0030] In a possible implementation manner of the first aspect, the RF power component includes a plurality of second chips, and the plurality of second chips are disposed on different sides of the first chip.

[0031] That is, the RF power component provided in the embodiment of the present application is not limited to one or two chips. The RF power component may include multiple chips. Any two chips that need to be electrically connected can be interconnected through the conductive blocks provided in the aforementioned embodiments, and the control and adjustment of the equivalent inductance can be achieved.

[0032] In a possible implementation of the first aspect, the RF power component includes a plurality of unit modules, each of which includes a first chip, a second chip, an insulating layer, a conductive block, a first connecting portion, and a second connecting portion, wherein the plurality of unit modules are arranged along the first direction and / or the second direction.

[0033] That is, the devices in the RF power component provided in the embodiment of the present application can be accumulated along the first direction X or the second direction Y, so that the RF power component can be flexibly applied to a variety of different application scenarios.

[0034] In a second aspect, a radio frequency power component is provided. The radio frequency power component includes a substrate, a first chip, a second chip, an insulating layer, at least three conductive blocks, a first connecting portion, and a second connecting portion.

[0035] The first chip and the second chip are arranged on the same side of the substrate; the first chip and the second chip are arranged in a first direction, and the first direction is parallel to the substrate. At least part of the insulating layer is arranged on the side of the first chip and the second chip away from the substrate. At least three conductive blocks are arranged on the side of the insulating layer away from the substrate; at least three conductive blocks are arranged and spaced apart in a second direction, which is parallel to the substrate and intersects with the first direction. One end of the first connecting portion passes through the insulating layer and is electrically connected to the first chip, and the other end is electrically connected to one end of the conductive block; one end of the second connecting portion passes through the insulating layer and is electrically connected to the second chip, and the other end is electrically connected to the other end of the conductive block. Among the at least three conductive blocks, the spacing between at least one pair of adjacent conductive blocks is different from the spacing between another pair of adjacent conductive blocks.

[0036] Similar to the RF power component provided in the first aspect, the RF power component provided in the second aspect is also less difficult to prepare, and by setting the spacing between at least one pair of adjacent conductive blocks to be different from the spacing between another pair of adjacent conductive blocks, control and adjustment of the equivalent inductance (especially mutual inductance) corresponding to different conductive blocks is achieved, so that the phase and amplitude of the RF signals output by at least three conductive blocks tend to be consistent, achieving uniform distribution, reducing signal convection inside the RF power component, and improving the electrical performance of the RF power component.

[0037] In a third aspect, an electronic device is provided, the electronic device comprising an antenna and a radio frequency power component provided by any one of the embodiments in the first aspect, wherein the antenna is coupled to the radio frequency power component.

[0038] The technical effects brought about by the method for preparing the electronic device in the third aspect can be referred to the technical effects brought about by the design methods of the RF power components in the first and second aspects, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application;

[0040] Figure 2 A schematic diagram of the structure of a radio frequency power component provided in an embodiment of the present application;

[0041] Figure 3 For along Figure 2 A cross-sectional view of the section line AA' in;

[0042] Figure 4 A top view of a radio frequency power component provided in an embodiment of the present application;

[0043] Figure 5 For along Figure 2 Another cross-sectional view of the section line AA' in FIG.

[0044] Figure 6 Another top view of the radio frequency power component provided in the embodiment of the present application;

[0045] Figure 7 Another top view of the radio frequency power component provided in the embodiment of the present application;

[0046] Figure 8 Another top view of the radio frequency power component provided in the embodiment of the present application;

[0047] Fig. 9 Another top view of the radio frequency power component provided in the embodiment of the present application;

[0048] Fig.10 For along Figure 2 A cross-sectional view of the section line BB' in FIG.

[0049] Fig.11 Another top view of the radio frequency power component provided in the embodiment of the present application;

[0050] Fig.12 Another top view of the radio frequency power component provided in the embodiment of the present application;

[0051] Fig.13 Another top view of the radio frequency power component provided in the embodiment of the present application;

[0052] Fig.14 For along Figure 2 Another cross-sectional view of the section line AA' in FIG.

[0053] Fig.15 Another top view of the radio frequency power component provided in the embodiment of the present application;

[0054] Fig.16 For along Figure 2 Another cross-sectional view of the section line AA' in FIG.

[0055] Fig.17 For along Figure 2 Another cross-sectional view of the section line AA' in FIG.

[0056] Fig.18Another top view of the radio frequency power component provided in the embodiment of the present application;

[0057] Fig.19 Another top view of the RF power component provided in an embodiment of the present application. DETAILED DESCRIPTION

[0058] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in some embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments provided by the present application, all other embodiments obtained by ordinary technicians in this field belong to the scope of protection of the present application.

[0059] In the description of the present application, it should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0060] Unless the context requires otherwise, throughout the specification and claims, the term "including" is interpreted as an open, inclusive meaning, that is, "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "exemplarily" or "some examples" and the like are intended to indicate that specific features, structures, materials or characteristics associated with the embodiment or example are included in at least one embodiment or example of the present application. The schematic representation of the above terms does not necessarily refer to the same embodiment or example. In addition, the specific features, structures, materials or characteristics may be included in any one or more embodiments or examples in any appropriate manner.

[0061] In the following, the terms "first", "second", etc. are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present application, unless otherwise specified, "multiple" means two or more.

[0062] When describing some embodiments, the expressions "coupled", "connected" and their derivatives may be used. The terms "coupled" and "connected" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0063] “At least one of A, B, and C” has the same meaning as “at least one of A, B, or C” and both include the following combinations of A, B, and C: A only, B only, C only, the combination of A and B, the combination of A and C, the combination of B and C, and the combination of A, B, and C.

[0064] “A and / or B” includes the following three combinations: A only, B only, and a combination of A and B.

[0065] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within the acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism may be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity may also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality may be, for example, the difference between the two equalities is less than or equal to 5% of either one.

[0066] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include deviations in shape due to, for example, manufacturing. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shapes of regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0067] In addition, the scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. A person of ordinary skill in the art can appreciate that, with the emergence of new scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0068] The embodiment of the present application provides an electronic device, and the technical solution of the present application can be applied to various electronic devices including a radio frequency power amplifier. The electronic device can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted. It can also be deployed on the water surface (such as a ship, etc.). It can also be deployed in the air (for example, on an airplane, a balloon, and a satellite, etc.). For example, the electronic device can be a terminal or a base station. For example, the terminal includes but is not limited to: mobile phones, tablet computers, laptop computers, PDAs, mobile Internet devices (MID), wearable devices (such as smart watches, smart bracelets, pedometers, etc.), vehicle-mounted devices (such as cars, bicycles, electric vehicles, airplanes, ships, trains, high-speed railways, etc.), virtual reality (VR) equipment, augmented reality (AR) equipment, wireless terminals in industrial control, smart home devices (such as refrigerators, televisions, air conditioners, electric meters, etc.), intelligent robots, workshop equipment, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, or wireless terminals in smart homes, flight equipment (such as intelligent robots, hot air balloons, drones, airplanes), RF front-end modules, etc.

[0069] Figure 1 The following is a schematic diagram of the structure of an electronic device provided by way of example in an embodiment of the present application. Figure 1 As shown, the electronic device 1000 includes a radio frequency power component 100 and an antenna 200 .

[0070] The RF power component 100 and the antenna 200 are coupled.

[0071] It should be noted that the "coupling" here may refer to a direct connection between the RF power component 100 and the antenna 200, or may refer to an indirect connection between the RF power component 100 and the antenna 200, or may refer to a non-contact but mutual influence between the RF power component 100 and the antenna 200. The embodiments of the present application do not limit the specific coupling method between the RF power component 100 and the antenna 200.

[0072] The RF power component 100 is used to amplify the RF signal and transmit it to the antenna 200, and the antenna 200 is used to radiate the amplified RF signal to the outside.

[0073] It can be understood that the electronic device 1000 may include one or more antennas 200 .

[0074] When the electronic device 1000 includes multiple antennas 200, one antenna 200 may correspond to one RF power component 100, one antenna 200 may correspond to multiple RF power components 100, or multiple antennas 200 may share one RF power component 100. Application scenarios in related technologies are all applicable to the embodiments of the present application.

[0075] Understandably, Figure 1 The structure of the electronic device 1000 shown in the figure does not constitute a specific limitation on the electronic device 1000. The electronic device 1000 may include, for example, Figure 1 The components shown in the figure may include more components, for example, a packaging structure and auxiliary components (such as passive devices IPD or transmission lines) (not shown in the figure), or may be combined as shown in the figure. Figure 1 Some of the components shown, or may be combined with Figure 1 The components shown are arranged differently.

[0076] The embodiment of the present application also provides a radio frequency power component 100 .

[0077] The RF power component 100 can be integrated in any of the aforementioned electronic devices 1000, for example, it can be integrated in any network element device such as a base station that requires signal power amplification. Specifically, the RF power component 100 provided in the embodiment of the present application can work in the RF part of the base station, for example, it can be arranged in the Radio Remote Unit (RRU) of the base station. Among them, the base station can be a base transceiver station (Base TransceiverStation, referred to as BTS) in a GSM system or a CDMA system, or a Node B (Node B) in a WCDMA system, or an evolved Node B (e-NodeB, evolved NodeB) in an LTE system, or a similar device in a communication system that is subsequently evolved from LTE.

[0078] Figure 2 A schematic diagram of the structure of the radio frequency power component 100 provided in an embodiment of the present application is shown in FIG. Figure 3 For along Figure 2 A cross-sectional view of the section line A-A' in FIG. Figure 4 A top view of the RF power component 100 provided in an embodiment of the present application.

[0079] In some embodiments, Figure 2 , Figure 3 and Figure 4As shown, the RF power component 100 may include a substrate 10 , a first chip 1 , a second chip 2 , an insulating layer 3 , at least three conductive blocks 4 , a first connecting portion 51 and a second connecting portion 52 .

[0080] Exemplarily, the substrate 10 may be a flange, so as to serve as a carrier to provide support for the preparation of structures such as the first chip 1 , the second chip 2 , and the insulating layer 3 .

[0081] It is understandable that the substrate 10 may also be other structures, such as a wafer substrate, or other carriers capable of carrying, bonding or fixing the first chip 1 and the second chip 2 on the surface, and the embodiments of the present application are not limited to this.

[0082] Exemplarily, the material of the substrate 10 may include metal material, semiconductor material or other material that can provide a certain supporting force, etc., which is not limited in the embodiment of the present application.

[0083] Exemplarily, the substrate 10 may have electrical conductivity and / or thermal conductivity so as to reduce the probability of electrostatic breakdown, or improve heat dissipation capability, thereby improving the electrical performance of the RF power component 100 .

[0084] Understandably, see Figure 2 and Figure 3 The surface of the substrate 10 on which the first chip 1 and the second chip 2 are arranged is substantially flat, thereby reducing the difficulty of preparing structures such as the first chip 1, the second chip 2 and the insulating layer 3.

[0085] See also Figure 2 , Figure 3 and Figure 4 The first chip 1 and the second chip 2 are arranged on the same side of the substrate 10, and the first chip 1 and the second chip 2 are arranged along the first direction X.

[0086] The first direction X is parallel to the substrate 10 .

[0087] Exemplarily, the first chip 1 and the second chip 2 can both be power amplifier chips. The power amplifier chip can be an active device. Exemplarily, the power amplifier chip can include structures such as field effect transistors. The power amplifier chip is used as a core device for power amplification to achieve radio frequency power amplification so as to obtain sufficiently large radio frequency output power.

[0088] Alternatively, illustratively, both the first chip 1 and the second chip 2 may be capacitor chips. The capacitor chip may be a passive device, which may be equivalent to a capacitor.

[0089] Exemplarily, the capacitor chip may include a single layer ceramic capacitor (Single Layer Ceramic Capacitor, referred to as SLCC), a multilayer ceramic capacitor (Multi Layer Ceramic Capacitor, referred to as MLCC) and a semiconductor capacitor (Metal-Oxide-Semiconductor Capacitor, referred to as MOSCAP), etc.

[0090] Alternatively, illustratively, one of the first chip 1 and the second chip 2 is a power amplifier chip, and the other is a capacitor chip.

[0091] For example, see Figure 4 The first chip 1 may include a first binding area P1, and the second chip 2 may include a second binding area P2, wherein the first binding area P1 is used to realize the binding connection between the first chip 1 and an external device. Similarly, the second binding area P2 is used to realize the binding connection between the second chip 2 and an external device.

[0092] Exemplarily, the first chip 1 may include a plurality of first binding regions P1. For example, four first binding regions P1 are sequentially arranged along four sides of the first chip 1 (not shown in the figure, Figure 4 In the figure, only one first binding area P1 is used as an example for illustration. Similarly, the second chip 2 may also include a plurality of second binding areas P2.

[0093] Exemplarily, a plurality of pads may be included in the first bonding region P1 and the second bonding region P2 .

[0094] It can be understood that the pad refers to the portion of the conductive structure of the first chip 1 exposed in the first binding area P1, or the portion of the conductive structure of the second chip 2 exposed in the second binding area P2. Exemplarily, the pad may refer to at least a portion of a pin, a capacitor plate, a microstrip transmission line or other conductive structure exposed in the first binding area P1 or the second binding area P2.

[0095] For example, the first chip 1 may include a plurality of first pins disposed in the first binding region P1, and the first pins are used to realize electrical connection between the first chip 1 and other structures. Similarly, the second chip 2 may include a plurality of second pins disposed in the second binding region P2, and the second pins are used to realize electrical connection between the second chip 2 and other structures.

[0096] Exemplarily, the plurality of first pins and the plurality of second pins correspond one to one, so that electrical connection between the first chip 1 and the second chip 2 can be achieved later through the first pins and the second pins.

[0097] See also Figure 2 and Figure 3At least part of the insulating layer 3 is disposed on a side of the first chip 1 and the second chip 2 away from the substrate 10 .

[0098] For example, see Figure 2 and Figure 3 At least part of the insulating layer 3 is also disposed on the side surfaces of the first chip 1 and the second chip 2 that are perpendicular to the substrate 10. For example, at least part of the insulating layer 3 is also disposed between the first chip 1 and the second chip 2. That is, the insulating layer 3 surrounds the first chip 1 and the second chip 2, thereby protecting the first chip 1 and the second chip 2 and preventing them from having unexpected electrical connections with other conductive structures.

[0099] For example, see Figure 5 The extension direction of the insulating layer 3 away from the surface of the substrate 10 may intersect with the extension direction of the substrate 10 , that is, the insulating layer 3 may be designed to be inclined so as to be flexibly adapted to different application scenarios.

[0100] See also Figure 2 , Figure 3 and Figure 4 , multiple (at least three, the same applies later) conductive blocks 4 are arranged on the side of the insulating layer 3 away from the substrate 10, and the multiple conductive blocks 4 are arranged in an interval and arranged along the second direction Y.

[0101] The second direction Y is parallel to the substrate 10 and intersects with the first direction X. For example, the second direction Y and the first direction X are perpendicular to each other.

[0102] For example, see Figure 2 and Figure 4 , the conductive block 4 is in a strip shape.

[0103] Exemplarily, the conductive block 4 may be in a rectangular, folded-line, arc-shaped or other shape, or may be other shapes that can realize the interconnection between the first chip 1 and the second chip 2 , which is not limited in the embodiment of the present application.

[0104] It can be understood that one end of the conductive block 4 is used to be electrically connected to the first chip 1 (for example, the first pin), and the other end is electrically connected to the second chip 2 (for example, the second pin), thereby realizing the electrical connection between the first chip 1 and the second chip 2, facilitating the purposes of impedance matching, transmission of DC and transmission of RF signals, etc.

[0105] Exemplarily, the conductive block 4 may be a coating or a thin film.

[0106] Exemplarily, the conductive block 4 may be prepared by a patterning process, for example, by a photolithography process, or by an electroplating process or a sputtering process.

[0107] It is understandable that when current flows in the conductive block 4, the conductive block 4 will generate self-inductance, and mutual inductance will be generated between different conductive blocks 4. In the equivalent circuit topology (lumped parameters) of the RF power component 100, the conductive block 4 can be equivalent to a matching inductor, and the equivalent inductance depends on the self-inductance of the conductive block 4 and the mutual inductance between the conductive blocks 4.

[0108] See also Figure 2 , Figure 3 and Figure 4 One end of the first connecting portion 51 passes through the insulating layer 3 and is electrically connected to the first chip 1 , and the other end is electrically connected to one end of the conductive block 4 .

[0109] Similarly, see Figure 2 , Figure 3 and Figure 4 One end of the second connection portion 52 passes through the insulating layer 3 and is electrically connected to the second chip 2 , and the other end is electrically connected to the other end of the conductive block 4 .

[0110] That is, one end of the conductive block 4 is electrically connected to the first chip 1 through the first connection portion 51 , and the other end of the conductive block 4 is electrically connected to the second chip 2 through the second connection portion 52 , thereby achieving electrical connection between the first chip 1 and the second chip 2 .

[0111] Exemplarily, the first connection portion 51 can be integrally provided with the first chip 1. For example, the first connection portion 51 is integrally provided with the first pin in the first chip 1. That is, the first pin of the first chip 1 passes through the insulating layer 3 and is led out, and is electrically connected to the conductive block 4, wherein the portion of the first pin embedded in the insulating layer 3 serves as the first connection portion 51.

[0112] Similarly, the second connection portion 52 can be integrally provided with the second chip 2 , similar to the first connection portion 51 , and will not be described again here.

[0113] Exemplarily, the first connection part 51 and the second connection part 52 can also be provided integrally with the conductive block 4. For example, during the preparation process, a hole is opened in the insulating layer 3, and a conductive material is deposited on the insulating layer 3, so that the conductive material filled in the hole of the insulating layer 3 and the conductive material deposited on the insulating layer 3 are integrally formed. The conductive material filled in the hole of the insulating layer 3 serves as the first connection part 51 and the second connection part 52, and the conductive material deposited on the insulating layer 3 serves as the conductive block 4.

[0114] In the related art, the first chip and the second chip are connected through multiple signal lines. Since the phase and amplitude of the RF signal of the RF power component have spatial distribution characteristics, and the relative position relationship (i.e., spatial distribution) between the multiple signal lines is different, the equivalent inductance (including self-inductance and mutual inductance) between the multiple signal lines is also different, resulting in differences in the phase and amplitude of the RF current and voltage on the multiple signal lines. This difference will affect the RF performance, robustness and stability of the RF power component.

[0115] In the related art, the self-inductance of the signal line and the mutual inductance between multiple signal lines are adjusted by adjusting the arc height of the signal line (the height of the signal line arched in the direction away from the substrate) or the tilt angle of the signal line after arching, so as to make the RF current, voltage phase amplitude, etc. corresponding to the multiple signal lines evenly distributed.

[0116] However, the arched signal line is set in three dimensions, which reduces the structural stability of the RF power component on the one hand, and increases the difficulty of packaging the RF power component on the other hand, which is not conducive to the evolution of the packaging form.

[0117] In the RF power component 100 provided in the embodiment of the present application, an insulating layer 3 is set on the first chip 1 and the second chip 2, a conductive block 4 is set on the insulating layer 3, and an electrical connection between the first chip 1 and the second chip 2 is achieved through the conductive block 4. When the electrical connection between the first chip 1 and the second chip 2 is achieved, a planar-designed RF power component 100 is provided. The at least three conductive blocks 4 can be formed at one time without the need for additional processing steps (such as a refined design step for the arc height of the signal line, etc.), thereby reducing the difficulty of preparing the RF power component 100. Compared with the three-dimensionally designed signal line structure, the structural design of the RF power component 100 in the embodiment of the present application reduces the difficulty of subsequent packaging.

[0118] The RF power component 100 provided in the embodiment of the present application can also achieve uniform distribution of RF current, voltage phase and amplitude, etc., and the specific implementation method is as follows.

[0119] Figure 6 to Figure 12 Some other structural schematic diagrams of the RF power component 100 provided in the embodiments of the present application.

[0120] In some embodiments, Figure 6 , Figure 7 and Figure 8 As shown, among the multiple (at least three, the same applies to the following) conductive blocks 4, at least two conductive blocks 4 have different areas parallel to the surface of the substrate 10.

[0121] By setting the areas of at least two conductive blocks 4 among the multiple conductive blocks 4 to be different, the equivalent inductance (especially self-inductance) corresponding to different conductive blocks 4 is controlled to be different, so as to adjust the unevenly distributed current. For example, the area of ​​the conductive block 4 is reduced at the position where the RF current is large, and the area of ​​the conductive block 4 is increased at the position where the RF current is small, so that the RF current output by the multiple conductive blocks 4 is the same, and a uniform distribution is achieved, so that the phase and amplitude of the signals at different positions are synchronized, the signal convection is reduced, and the electrical performance of the RF power component 100 is improved.

[0122] In some embodiments, Figure 6 As shown, the conductive block 4 extends from the first connecting portion 51 to the second connecting portion 52 , and the width d1 of the conductive block 4 is the dimension of the conductive block 4 in a direction perpendicular to the extension path and parallel to the substrate 10 .

[0123] Here, "extension path" refers to the length extension direction of the conductive block 4. For example, when the conductive block 4 is rectangular, the extension path of the conductive block 4 is parallel to the first direction X, or for example, when the conductive block 4 is arc-shaped, the extension path of the conductive block 4 is arc-shaped. In this case, the corresponding tangent extension directions at different positions of the extension path are different.

[0124] See also Figure 6 Among the multiple conductive blocks 4, the widths d1 of at least two conductive blocks 4 are different.

[0125] For example, see Figure 6 When the conductive block 4 is in a rectangular shape extending along the first direction X, the width d1 of the conductive block 4 is the size of the conductive block 4 in the second direction Y (perpendicular to the first direction X).

[0126] Or, for example, see the following Fig.13 The conductive block 4 may include a first sub-portion 41 and a second sub-portion 42, and the first sub-portion 41 and the second sub-portion 42 are sequentially connected along the first direction X. The width d1 of the first sub-portions 41 corresponding to the plurality of conductive blocks 4 is the same, and the width d1 of the second sub-portions 42 corresponding to at least two conductive blocks 4 in the plurality of conductive blocks 4 is different ( Fig.13 The width variation is not shown).

[0127] That is, the width d1 at different positions on a single conductive block 4 is the same (when the conductive block 4 is rectangular), or the width d1 of part of the conductive block 4 may not change (for example, the width d1 of the first sub-portion 41 does not change), and only the width d1 of other parts of the conductive block 4 (for example, the second sub-portion 42) is deformed, thereby providing a variety of deformation methods for the conductive block 4.

[0128] It can be understood that the design width d1 of each conductive block 4 is determined by the spatial distribution of the signal voltage and current at the location of the conductive block 4. The width d1 of the conductive block 4 is reduced where the current is large, thereby increasing the equivalent inductance (especially the self-inductance) generated by the conductive block 4, thereby reducing the current transmitted by the conductive block 4. Similarly, the width d1 of the conductive block 4 is increased where the current is small, so that the current output by each conductive block 4 is the same.

[0129] For example, see Figure 6 In the region where the multiple conductive blocks 4 are located, the width d1 of the conductive block 4 gradually decreases from the center of the region to the two ends of the region distributed along the second direction Y.

[0130] In the region where multiple conductive blocks 4 are located, the equivalent inductance (especially mutual inductance) between the conductive blocks 4 located in the middle part of the region is larger, resulting in a smaller current corresponding to this position, while the equivalent inductance (especially mutual inductance) between the conductive blocks 4 located at both ends of the region along the second direction Y is smaller, resulting in a larger current corresponding to the two end positions. By setting the width d1 of the conductive block 4 gradually decreasing from the center of the region to the two ends of the region distributed along the second direction Y, the equivalent inductance (especially self-inductance) of the conductive block 4 located in the middle part of the region can be smaller, and the equivalent inductance (especially self-inductance) of the conductive blocks 4 located at both ends of the region along the second direction Y can be larger, so that the corresponding current at the middle position of the region is adaptively increased, and the corresponding current at the two end positions of the region is adaptively reduced, that is, the magnitude of the current corresponding to each conductive block 4 is approached to be uniform.

[0131] In some embodiments, see Figure 7 The conductive block 4 extends from the first connecting portion 51 to the second connecting portion 52 , and the length d3 of the conductive block 4 is the maximum dimension of the conductive block 4 on the extension path.

[0132] The “maximum dimension of the conductive block 4 on the extension path” refers to the sum of the lengths of the conductive block 4 at different positions along the extension path. For example, when the conductive block 4 is a rectangle extending along the first direction X, the maximum dimension of the conductive block 4 on the extension path (the length d3 of the conductive block 4) is the dimension of the conductive block 4 in the first direction X. Or, for example, when part of the conductive block 4 extends along the first direction X and the other part extends along the second direction Y, the length d3 of the conductive block 4 is the sum of the dimension of the part of the conductive block 4 extending along the first direction X in the first direction X and the dimension of the part of the conductive block 4 extending along the second direction Y in the second direction Y. When the conductive block 4 is in an arc shape, refer to Fig. 9 , the length d3 of the conductive block 4 is substantially the arc length of the conductive block 4 .

[0133] See also Figure 7Among the multiple conductive blocks 4, the lengths d3 of at least two conductive blocks 4 are different.

[0134] For example, see Figure 7 When the conductive block 4 is in a rectangular shape extending along the first direction X, the length d3 of the conductive block 4 is the size of the conductive block 4 in the first direction X.

[0135] Or, for example, see the following Fig.13 The lengths d3 of the multiple first sub-portions 41 corresponding to the multiple conductive blocks 4 are the same, and the lengths d3 of the second sub-portions 42 corresponding to at least two of the multiple conductive blocks 4 are different.

[0136] That is, only the length d3 of a portion (eg, the second sub-portion 42 ) of the conductive block 4 may be deformed, so as to provide a variety of deformation modes of the conductive block 4 .

[0137] It can be understood that the design length d3 of each conductive block 4 is determined by the spatial distribution of the signal voltage and current at the location of the conductive block 4. The length d3 of the conductive block 4 is increased in places where the current is large, thereby increasing the self-inductance generated by the conductive block 4 and reducing the current transmitted by the conductive block 4. Similarly, the length d3 of the conductive block 4 is reduced in places where the current is small, so that the current output by each conductive block 4 is the same.

[0138] For example, see Figure 7 In the region where the multiple conductive blocks 4 are located, the length d3 of the conductive blocks 4 gradually increases from the center of the region to the two ends of the region distributed along the second direction Y.

[0139] In the region where multiple conductive blocks 4 are located, the equivalent inductance (especially mutual inductance) between the conductive blocks 4 located in the middle part of the region is larger, resulting in a smaller current corresponding to this position, while the equivalent inductance (especially mutual inductance) between the conductive blocks 4 located at both ends of the region along the second direction Y is smaller, resulting in a larger current corresponding to the two end positions. By setting the length d3 of the conductive block 4 gradually increasing from the center of the region to the two ends of the region distributed along the second direction Y, the equivalent inductance (especially self-inductance) of the conductive block 4 located in the middle part of the region can be smaller, and the equivalent inductance (especially self-inductance) of the conductive blocks 4 located at both ends of the region along the second direction Y can be larger, so that the corresponding current at the middle position of the region is adaptively increased, and the corresponding current at the two end positions of the region is adaptively reduced, that is, the magnitude of the current corresponding to each conductive block 4 is approached to be uniform.

[0140] For example, see Figure 6 and Figure 7 The conductive block 4 may be in the shape of a regular long strip, that is, the width d1 of the conductive block 4 at different positions is substantially equal, or the length d3 of the conductive block 4 at different positions is substantially equal.

[0141] Or, for example, see Figure 8 and Fig. 9 The conductive block 4 may also be in a zigzag, arc, or other shapes.

[0142] In some embodiments, see Figure 8 Among the multiple conductive blocks 4, at least one conductive block 4 is in a broken line shape.

[0143] For example, see Figure 8 , at least one conductive block 4 partially extends along the first direction X, and the other partially extends along the second direction Y. Or in other embodiments, at least a portion of the conductive block 4 extends in a direction that intersects the first direction X or the second direction Y, that is, the embodiment of the present application does not limit the folding direction of the folded-line conductive block 4, and any folding method that can extend the length d3 of the conductive block 4 is within the protection scope of the embodiment of the present application.

[0144] See also Figure 8 , by arranging in a zigzag shape, the lengths d3 of at least two conductive blocks 4 are different.

[0145] In some embodiments, see Fig. 9 Among the plurality of conductive blocks 4, at least one conductive block 4 is in an arc shape. At least two conductive blocks 4 have different curvatures.

[0146] By setting the curvatures of at least two conductive blocks 4 to be different, the total lengths d3 of at least two conductive blocks 4 can also be different. For example, when the distance between the two ends of the conductive block 4 is the same, the greater the curvature, the longer the total length d3 of the conductive block 4, and the smaller the equivalent inductance (especially self-inductance) corresponding to the conductive block 4.

[0147] It can be understood that the technical effect brought about by adjusting the curvature of the conductive block 4 is the same as the technical effect brought about by adjusting the length d3 of the conductive block 4, and will not be described in detail here.

[0148] Exemplarily, the width d1 of a single arc-shaped conductive block 4 at different positions may be the same or different.

[0149] Exemplarily, the widths d1 of two arc-shaped conductive blocks 4 with different curvatures may also be different, that is, the deformation design of the curvature and the deformation design of the width d1 may be combined.

[0150] In some embodiments, see Fig.10 Among the multiple conductive blocks 4, the thickness d4 of at least two conductive blocks 4 are different.

[0151] See also Fig.10 The thickness d4 of the conductive block 4 is the dimension of the conductive block 4 in the third direction Z.

[0152] Among them, see Fig.10 , the third direction Z is perpendicular to the surface of the insulating layer 3 away from the substrate 10 .

[0153] It is understandable that the greater the thickness d4 of the conductive block 4 is, the greater the cross-sectional area of ​​the current passing through the conductive block 4 is, thereby reducing the equivalent inductance (especially the self-inductance) of the conductive block 4 and increasing the current passing through.

[0154] It can be understood that the technical effect brought about by adjusting the thickness d4 of the conductive block 4 is the same as the technical effect brought about by adjusting the width d1 of the conductive block 4 , and will not be described in detail here.

[0155] Exemplarily, the thickness d4 of the conductive block 4 can be adjusted by multiple photolithography processes. For example, multiple depositions of conductive materials can be performed at locations where the conductive block 4 with a thicker thickness d4 is required. Alternatively, multiple electroplating or sputtering processes can be performed at locations where the conductive block 4 with a thicker thickness d4 is required.

[0156] In some embodiments, see Fig.11 Among the plurality of conductive blocks 4 , a spacing d5 between at least one pair of adjacent conductive blocks 4 is different from a spacing d5 between another pair of adjacent conductive blocks 4 .

[0157] It can be understood that the spacing d5 between each pair of adjacent conductive blocks 4 is determined by the spatial distribution of the signal voltage and current at the location of the conductive block 4. Where the current is large, the spacing d5 between two adjacent conductive blocks 4 is reduced, thereby increasing the equivalent inductance (especially the mutual inductance) generated between any two conductive blocks 4, thereby reducing the current transmitted by the two adjacent conductive blocks 4. Similarly, where the current is small, the spacing d5 between two adjacent conductive blocks 4 is increased, so that the current output by each conductive block 4 is roughly the same.

[0158] For example, see Fig.11 In the area where the multiple conductive blocks 4 are located, the distance d5 between two adjacent conductive blocks 4 gradually decreases from the center of the area to the two ends of the area distributed along the second direction Y, so that the equivalent inductance (especially the mutual inductance) at the corresponding position of each conductive block 4 is roughly the same, so that the magnitude of the current corresponding to each conductive block 4 can also be made to be uniform.

[0159] In some embodiments, the multiple embodiments provided in this application can be combined at will. For example, see Fig.12 By deforming the shape of the conductive block 4, the spacing d5 between at least two pairs of adjacent conductive blocks 4 can be made different, and the total length d3 of at least two conductive blocks 4 can be made different.

[0160] In some embodiments, relevant parameters of the conductive block 4 in the aforementioned embodiments (such as width d1, length d3, thickness d4, etc.) can be changed sequentially along the second direction Y (for example, decrease sequentially or increase sequentially), or can be changed in stages along the second direction Y (for example, the parameters are changed once every two conductive blocks 4).

[0161] In the related art, in order to improve the uniformity of the phase amplitude of the RF current and voltage corresponding to multiple signal lines, it is necessary to adaptively and finely adjust the equivalent inductance (i.e., the combination of self-inductance and mutual inductance) generated by the signal lines, for example, adjusting the arc height and angle of the signal lines, etc. The degree of refinement required is very high. Especially with the increase in chip size and the increase in the number of signal lines, more corresponding parameters need to be adjusted. In addition, since the signal lines in the related art are designed as three-dimensional structures, they need to be adjusted one by one with high precision, and the adjustment complexity is high.

[0162] In the RF power component 100 provided in the embodiment of the present application, the structural design of the conductive block 4 allows the conductive block 4 to be prepared in a planar manner and can be formed in an integrated manner with low preparation difficulty. In addition, the planar conductive block 4 in the embodiment of the present application can relatively easily adjust the equivalent inductance in the RF power component 100, thereby adjusting the RF current and voltage phase amplitude corresponding to each conductive block 4, achieving voltage balance at various positions in the area corresponding to multiple conductive blocks 4, reducing signal convection between nodes, and improving the performance and robustness of the RF power component 100.

[0163] In some embodiments, see Figure 6 , Figure 7 , Figure 8 , Fig. 9 , Fig.12 All positions of the conductive block 4 can be deformed to achieve the adjustment of the phase amplitude of the RF current and voltage.

[0164] Or, in other embodiments, Fig.13 As shown, only a part of the conductive block 4 (such as the second sub-portion 42) may be deformed. For example, see Fig.13 , only the portion of the conductive block 4 located between the first chip 1 and the second chip 2 is deformed, thereby achieving flexible regulation of the area of ​​the corresponding conductive block 4.

[0165] Understandably, Figure 6 to Figure 13 Only some possible deformation modes of the conductive block 4 are provided as examples, and other deformation positions and deformation modes that can adjust the self-inductance or mutual inductance of the conductive block 4 are within the protection scope of the device embodiment.

[0166] In some embodiments, Fig. 9 As shown, a plurality of conductive blocks 4 are symmetrically arranged with reference line Li as a symmetry axis.

[0167] Among them, see Fig. 9 , the reference line Li is parallel to the substrate 10 and parallel to the first direction X.

[0168] By arranging the multiple conductive blocks 4 symmetrically with the reference line Li as the symmetry axis, the equivalent inductance generated at different positions in the multiple conductive blocks 4 can be further made substantially the same, thereby further improving the uniformity of the phase amplitude of the RF current and voltage corresponding to each conductive block 4.

[0169] In some embodiments, Fig.14 , Fig.15 and Fig.16 As shown, the RF power assembly 100 further includes at least one electronic component 8 , which is disposed on a side of the insulating layer 3 away from the substrate 10 .

[0170] For example, see Fig.14 , Fig.15 and Fig.16 The electronic component 8 may include one or more of a resistor, an inductor, a capacitor or a sub-circuit, etc.

[0171] In some embodiments, Fig.14 and Fig.15 As shown, the electronic component 8 may be disposed on a side of the conductive block 4 away from the substrate 10 .

[0172] In some embodiments, Fig.16 As shown, the conductive block 4 can be electrically connected to the first connection portion 51 through the electronic component 8, and / or the conductive block 4 can be electrically connected to the second connection portion 52 through the electronic component 8. That is, the electronic component 8 and the conductive block 4 can be used together as a medium for transmitting radio frequency current, so that the amplitude and phase of the radio frequency signal can be adjusted by adjusting part of the electronic component 8.

[0173] Exemplarily, the equivalent inductance at the corresponding position can be adjusted by adjusting the setting position of the electronic component 8. For example, an electronic component 8 with larger inductance is set at a location with larger current to reduce the current at that location and achieve the purpose of current regulation.

[0174] In some embodiments, Fig.17 As shown, the RF power component 100 includes a plurality of second chips 2 , and the plurality of second chips 2 can be disposed on different sides of the first chip 1 .

[0175] For example, see Fig.17 , and with Fig.17Taking the illustrated orientation as an example, the two second chips 2 can be disposed on the left and right sides of the first chip 1 .

[0176] That is, the RF power component 100 provided in the embodiment of the present application is not limited to one or two chips. The RF power component 100 may include multiple chips. Any two chips that need to be electrically connected can be interconnected through the conductive block 4 provided in the aforementioned embodiment, and the control and adjustment of the equivalent inductance can be achieved.

[0177] In RF power components, as the power increases, a multi-cell design can be adopted: a chip (such as the first chip 1 or the second chip 2) is divided into multiple sub-cells, which are then combined.

[0178] In some embodiments, see Fig.18 In the RF power component 100, each pair of connected chips (such as the first chip 1 and the second chip 2) may include a plurality of subcells N, each subcell N includes a plurality of (at least three) conductive blocks 4 spaced and arranged along the second direction Y, see Fig.19 , the multiple subcells N can be arranged along the second direction Y.

[0179] For example, see Fig.18 The first chip 1 may include a plurality of pads U that are isolated from each other (in the figure, one chip includes two pads U as an example), and each subcell N may be provided with at least one pad U. It is understandable that the pads U in the second chip 2 are the same.

[0180] For RF power components with higher power levels, Fig.18 It is shown that multiple chips are combined to further increase the power of the RF power components.

[0181] For example, see Fig.18 The conductive blocks 4 in the subcells N corresponding to each pair of connected chips can be symmetrically arranged with the first reference line L1 as the symmetry axis. The first reference line L1 is the center line between the two subcells N, and the first reference line L1 is parallel to the first direction X.

[0182] In some embodiments, see Fig.19 The RF power component 100 includes a plurality of unit modules K, each of which includes the aforementioned first chip 1, a second chip 2, an insulating layer 3, a conductive block 4, a first connecting portion 51 and a second connecting portion 52.

[0183] Among them, see Fig.19 , a plurality of unit modules K may be arranged along a first direction X (not shown in the figure) and / or a second direction Y.

[0184] That is, the components in the RF power component 100 provided in the embodiment of the present application can be accumulated along the first direction X or the second direction Y, so that the RF power component 100 can be flexibly applied to a variety of different application scenarios.

[0185] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that a person skilled in the art can think of within the technical scope disclosed in the present disclosure should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A radio frequency power component, characterized in that: include: substrate; A first chip and a second chip are arranged on the same side of the substrate; the first chip and the second chip are arranged along a first direction, and the first direction is parallel to the substrate; an insulating layer, at least partially disposed on a side of the first chip and the second chip away from the substrate; At least three conductive blocks are arranged on a side of the insulating layer away from the substrate; the at least three conductive blocks are arranged in an interval along a second direction, the second direction is parallel to the substrate and intersects with the first direction; a first connection portion and a second connection portion, wherein one end of the first connection portion passes through the insulating layer and is electrically connected to the first chip, and the other end of the first connection portion is electrically connected to one end of the conductive block; one end of the second connection portion passes through the insulating layer and is electrically connected to the second chip, and the other end of the second connection portion is electrically connected to the other end of the conductive block; Among the at least three conductive blocks, at least two conductive blocks have different areas of surfaces away from the substrate.

2. The radio frequency power assembly according to claim 1, characterized in that: The conductive block extends from the first connecting portion to the second connecting portion, and the width of the conductive block is a dimension of the conductive block in a direction perpendicular to the extension path and parallel to the substrate; Among the at least three conductive blocks, at least two conductive blocks have different widths.

3. The radio frequency power component according to claim 1 or 2, characterized in that: The conductive block extends from the first connecting portion to the second connecting portion, and the length of the conductive block is the maximum dimension of the conductive block on the extending path; Among the at least three conductive blocks, at least two conductive blocks have different lengths.

4. The radio frequency power assembly according to any one of claims 1 to 3, characterized in that: The conductive block comprises a first sub-portion and a second sub-portion connected in sequence along the first direction, and the widths and / or lengths of the multiple first sub-portions corresponding to the at least three conductive blocks are the same, and the widths and / or lengths of the second sub-portions corresponding to at least two of the at least three conductive blocks are different.

5. The radio frequency power assembly according to any one of claims 1 to 4, characterized in that: Among the at least three conductive blocks, at least two conductive blocks have different thicknesses; the thickness of the conductive block is the dimension of the conductive block in a third direction; the third direction is perpendicular to the surface of the insulating layer away from the substrate.

6. The radio frequency power assembly according to any one of claims 1 to 5, characterized in that: Among the at least three conductive blocks, a spacing between at least one pair of adjacent conductive blocks is different from a spacing between another pair of adjacent conductive blocks.

7. The radio frequency power assembly according to any one of claims 1 to 6, characterized in that: The at least three conductive blocks are symmetrically arranged with a reference line as a symmetry axis; the reference line is parallel to the substrate and parallel to the first direction.

8. The radio frequency power assembly according to any one of claims 1 to 7, characterized in that: The first chip is integrally provided with the first connection portion, and the second chip is integrally provided with the second connection portion; or, The conductive block, the first connecting portion and the second connecting portion are integrally arranged.

9. The radio frequency power assembly according to any one of claims 1 to 8, characterized in that: Also includes: at least one electronic component, disposed on a side of the insulating layer away from the substrate; The conductive block is electrically connected to the first connection portion via the electronic component, and / or the conductive block is electrically connected to the second connection portion via the electronic component.

10. The radio frequency power assembly according to any one of claims 1 to 9, characterized in that: The radio frequency power component includes a plurality of second chips, and the plurality of second chips are arranged on different sides of the first chip.

11. The radio frequency power assembly according to any one of claims 1 to 10, characterized in that: The radio frequency power component comprises: A plurality of unit modules, each unit module comprising the first chip, the second chip, the insulating layer, the conductive block, the first connecting portion and the second connecting portion; Wherein, the plurality of unit modules are arranged along the first direction and / or the second direction.

12. A radio frequency power component, characterized in that: include: substrate; A first chip and a second chip are arranged on the same side of the substrate; the first chip and the second chip are arranged along a first direction, and the first direction is parallel to the substrate; an insulating layer, at least partially disposed on a side of the first chip and the second chip away from the substrate; At least three conductive blocks are arranged on a side of the insulating layer away from the substrate; the at least three conductive blocks are arranged in an interval along a second direction, the second direction is parallel to the substrate and intersects with the first direction; a first connection portion and a second connection portion, wherein one end of the first connection portion passes through the insulating layer and is electrically connected to the first chip, and the other end of the first connection portion is electrically connected to one end of the conductive block; one end of the second connection portion passes through the insulating layer and is electrically connected to the second chip, and the other end of the second connection portion is electrically connected to the other end of the conductive block; Among the at least three conductive blocks, a spacing between at least one pair of adjacent conductive blocks is different from a spacing between another pair of adjacent conductive blocks.

13. An electronic device, characterized in that: include: The radio frequency power component according to any one of claims 1 to 12; An antenna is coupled to the radio frequency power component.

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