Driving circuit, plasma power supply circuit and plasma system

Abstract

The embodiment of the invention provides a driving circuit, a plasma power supply circuit and a plasma system. The driving circuit comprises a driving branch; the driving branch comprises a driving module, a filtering module and a power conversion module; the first end of the driving module receives a first control signal, the second end of the driving module is electrically connected with the first end of the power conversion module, the third end of the driving module is electrically connected with the second end of the power conversion module, the fourth end of the driving module receives a first power signal, and the output end of the driving module is electrically connected with the filtering module; the driving module is used for generating a second control signal according to the first control signal and the first power supply signal, and outputting a driving signal according to the second control signal; the filtering module is used for filtering the driving signal; the third end of the power conversion module is used for receiving the second power signal, and the power conversion module is used for converting the second power signal into a third power signal and outputting the third power signal. The common-mode transient immunity of the driving circuit is improved.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and specifically to a driving circuit, a plasma power supply circuit and a plasma system. Background Art

[0002] With the rapid development of modern power electronics technology, inverters, as key equipment for energy conversion and control, play a vital role in power systems. Especially in the application field of plasma generators, the performance and efficiency of inverters directly affect the stability and efficiency of the entire system.

[0003] See also Figure 1 In the schematic diagram of the topology block diagram of the three-level inverter shown in FIG. 1 , the first bus capacitor Cbus1 and the second bus capacitor Cbus2 are connected in series between the positive DC bus BUS+ and the negative DC bus BUS-, the common node of the first bus capacitor Cbus1 and the second bus capacitor Cbus2 forms the DC bus midpoint b, the first switch unit 110 is connected between the first end a and the positive DC bus BUS+, the second switch unit 120 is connected between the first end a and the negative DC bus BUS-, the third switch unit 130 is connected between the first end a and the DC bus midpoint b, the first end a is used to form the output end of the three-level inverter to output AC power Vac, and a DC voltage source can be connected between the positive DC bus BUS+ and the negative DC bus BUS-.

[0004] Typically, the inverter system also includes a switch control circuit and a switch drive circuit. The switch control circuit is used to output a PWM control signal according to a sampling and / or given signal. The PWM control signal is output through the switch drive circuit to control the switch tube in the three-level inverter to turn on or off, so that the three-level inverter can achieve the desired inverter function. In some technologies, the drive circuit is a non-isolated topology. The common-mode transient immunity of this drive circuit is low, and it is easy to cause errors of false start and false shutdown, which reduces the reliability of the circuit. Summary of the invention

[0005] In view of this, the present application provides a driving circuit, a plasma power circuit and a plasma system, so as to solve the problem of low common-mode transient immunity of the driving circuit in the prior art.

[0006] In a first aspect, an embodiment of the present application provides a driving circuit, including:

[0007] At least two driving branches; for each driving branch, the driving branch includes a driving module, a filtering module and a power conversion module;

[0008] The first end of the driving module is used to receive a first control signal, the second end of the driving module is electrically connected to the first end of the power conversion module, the third end of the driving module is electrically connected to the second end of the power conversion module, the fourth end of the driving module is used to receive a first power signal, and the output end of the driving module is electrically connected to the filtering module; the driving module is used to generate a second control signal according to the first power signal under the control of the first control signal, and output the signal obtained by the second end of the driving module as a driving signal under the control of the second control signal;

[0009] The filtering module is used to filter the driving signal and output the filtered driving signal;

[0010] The third end of the power conversion module is used to receive a second power signal, and the power conversion module is used to convert the second power signal into a third power signal and output it through the first end of the power conversion module, and the power conversion module provides the driving module with a reference ground signal of the third power signal through the second end of the power conversion module.

[0011] In a possible implementation manner of the first aspect, the driving module includes a first switch submodule and a driving submodule;

[0012] The first end of the first switch submodule is electrically connected to the first end of the driving submodule, the second end of the first switch submodule is electrically connected to the first ground end, and the control end of the first switch submodule is used to receive a first control signal; the first switch submodule is used to be turned on and off under the control of the first control signal;

[0013] The second end of the driving submodule is electrically connected to the first end of the power conversion module, and the third end of the driving submodule is electrically connected to the second end of the power conversion module; the fourth end of the driving submodule is used to receive a first power signal, and the driving submodule is used to sense and generate second control information according to the first power signal when the first switch submodule is in an on state, and output a driving signal under the control of the second control signal.

[0014] In a possible implementation of the first aspect, the power conversion module includes a power conversion submodule and a first isolation submodule;

[0015] The first end of the power conversion submodule is electrically connected to the second end of the driver submodule, the second end of the power conversion submodule is electrically connected to the third end of the driver submodule, the third end of the power conversion submodule is used to receive a second power signal, and the fourth end of the power conversion submodule is used to receive a reference ground signal of the second power signal; the power conversion submodule is used to convert the second power signal into a third power signal, and output the third power signal through the first end of the power conversion submodule, and output the reference ground signal of the third power signal through the second end of the power conversion submodule;

[0016] One end of the first isolation submodule is electrically connected to the fourth end of the power conversion submodule, and the other end of the first isolation submodule is electrically connected to the second end of the power conversion submodule; the first isolation submodule is used to isolate the reference ground signal of the second power signal from the reference ground signal of the third power signal.

[0017] In a possible implementation manner of the first aspect, the first isolation submodule includes a first capacitor.

[0018] In a possible implementation of the first aspect, the power conversion module also includes a second capacitor, a third capacitor, a fourth capacitor and a first inductor; the first end of the first inductor is electrically connected to the first end of the second capacitor, the second end of the first inductor and the first end of the third capacitor are electrically connected to the third end of the power conversion submodule, the second end of the second capacitor and the second end of the third capacitor are electrically connected to the fourth end of the power conversion submodule; one end of the fourth capacitor is electrically connected to the first end of the power conversion submodule, and the other end of the fourth capacitor is electrically connected to the second end of the power conversion submodule.

[0019] In a possible implementation manner of the first aspect, the driving module further includes: a first resistor, a fifth capacitor, a sixth capacitor, and a second resistor;

[0020] One end of the first resistor is electrically connected to the control end of the first switch submodule, and the other end of the first resistor is electrically connected to the second end of the first switch submodule;

[0021] The fifth capacitor and the sixth capacitor are connected in parallel, one end of the fifth capacitor and the sixth capacitor is electrically connected to the second end of the driving submodule, and the other end of the fifth capacitor and the sixth capacitor is electrically connected to the second end of the power conversion submodule;

[0022] One end of the second resistor is electrically connected to the output end of the driving submodule, and the other end of the second resistor is electrically connected to the filtering module.

[0023] In a possible implementation of the first aspect, the filtering module includes a seventh capacitor and a third resistor; the seventh capacitor and the third resistor are connected in parallel, and one end of the seventh capacitor and the third resistor is electrically connected to the output end of the driving sub-module, and the other end of the seventh capacitor and the third resistor is electrically connected to the second end of the power conversion sub-module.

[0024] In a second aspect, an embodiment of the present application provides a plasma power supply circuit, comprising the driving circuit described in any one of the first aspects, a three-level high-frequency inverter circuit and a high-frequency voltage conversion circuit;

[0025] The driving circuit is electrically connected to a first end of the three-level high-frequency inverter circuit, and a second end of the three-level high-frequency inverter circuit is electrically connected to an input end of the high-frequency voltage conversion circuit; a third end of the three-level high-frequency inverter circuit is used to receive a DC power supply; an output end of the high-frequency voltage conversion circuit is used to connect a plasma load;

[0026] The driving circuit is used to send a driving signal to the three-level high-frequency inverter circuit;

[0027] The three-level high-frequency inverter circuit is used to convert the DC power supply into power supply signals of three levels under the action of the driving signal and output them;

[0028] The high-frequency voltage conversion circuit is used to boost the power signal output by the three-level high-frequency inverter circuit and output the boosted power signal to the plasma load.

[0029] In a possible implementation manner of the second aspect, the switching device in the three-level high-frequency inverter circuit is a SiC switching device.

[0030] In a possible implementation manner of the second aspect, the high-frequency voltage conversion circuit includes a high-frequency transformer; the high-frequency transformer meets a preset condition;

[0031] The preset conditions include: the wire diameter of the high-frequency transformer is 0.015 cm 2 (square centimeters)-0.02cm 2 The window utilization rate of the high-frequency transformer is within the range of 80%-85%, and the area of ​​the high-frequency transformer is within the range of 19cm 2 -21cm 2 The operating frequency of the high-frequency transformer is 25KHz (kilohertz), the magnetic flux density of the high-frequency transformer is in the range of 0.35-0.45, the voltage adjustment rate is in the range of 1-5, and the core cross-sectional area of ​​the high-frequency transformer is 3.4cm 2 -3.6cm 2At least one of the range of 14-18 and the number of primary turns is within the range of 14-18; wherein the area product of the high-frequency transformer includes the product of the maximum cross-sectional area of ​​the transformer core and the window area.

[0032] In a third aspect, an embodiment of the present application provides a plasma system, comprising: a plasma power supply circuit and a plasma load as described in any one of the second aspects above.

[0033] In a possible implementation manner of the third aspect, the plasma load includes at least one of a plasma rotary spray gun and a load plasma direct spray gun.

[0034] According to the scheme provided in the embodiment of the present application, the driving circuit includes at least two driving branches. For each driving branch, the driving branch includes a driving module, a filtering module and a power conversion module; the first end of the driving module is used to receive a first control signal, the second end of the driving module is electrically connected to the first end of the power conversion module, the third end of the driving module is electrically connected to the second end of the power conversion module, the fourth end of the driving module is used to receive a first power signal, and the output end of the driving module is electrically connected to the filtering module; the driving module is used to generate a second control signal according to the first power signal under the control of the first control signal, and output the signal obtained by the second end of the driving module as a driving signal under the control of the second control signal. The filtering module is used to filter the driving signal and output the filtered driving signal. The third end of the power conversion module is used to receive the second power signal, the power conversion module is used to convert the second power signal into a third power signal, and output it through the first end of the power conversion module, and the power conversion module provides the driving module with a first reference ground signal through the second end of the power conversion module; the first reference ground signal is the reference ground signal of the third power signal. Thus, in the embodiment of the present application, the driving module in each driving branch in the driving circuit can sense and generate the second control signal according to the first power signal under the control of the first control signal, and output the driving signal according to the second control signal. That is, the driving circuit does not directly output the driving signal according to the received first control signal, but senses and generates the second control signal under the control of the first control signal, and outputs the driving signal according to the second control signal. In this way, the isolation between the driving signal output by the driving circuit and the first control signal can be achieved, and the influence of the first control signal on the driving signal can be reduced, thereby improving the common-mode transient immunity of the driving circuit. Moreover, in the embodiment of the present application, the power conversion module can achieve the isolation between the actual driving signal and the reference ground signal of the driving signal between at least two driving sub-modules, reduce the interference between at least two driving sub-modules, thereby further improving the common-mode transient immunity of the driving circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0036] Figure 1 A schematic diagram of a three-level inverter topology block diagram provided in the prior art;

[0037] Figure 2 A schematic diagram of the structure of a driving circuit provided in an embodiment of the present application;

[0038] Figure 3 for Figure 2 A schematic diagram of the structure of a driving circuit of a driving branch in the driving circuit shown;

[0039] Figure 4 A schematic diagram of the structure of another driving branch provided in an embodiment of the present application;

[0040] Figure 5 Provided in the embodiments of this application Figure 4 The structural schematic diagram of the power conversion module in the driving branch shown;

[0041] Figure 6 A schematic diagram of the structure of another driving branch provided in an embodiment of the present application;

[0042] Figure 7 A schematic diagram of the structure of another driving branch provided in an embodiment of the present application;

[0043] Figure 8 A schematic diagram of the structure of another driving branch provided in an embodiment of the present application;

[0044] Figure 9a A schematic diagram of the structure of another driving branch provided in an embodiment of the present application;

[0045] Figure 9b A schematic diagram of the structure of a driving submodule provided in an embodiment of the present application;

[0046] Fig.10 A schematic diagram of the structure of a plasma power supply circuit provided in an embodiment of the present application;

[0047] Fig.11a for Fig.10 A structural schematic diagram of a three-level high-frequency inverter circuit in the plasma power supply circuit;

[0048] Fig.11b for Fig.10Another structural schematic diagram of a three-level high-frequency inverter circuit in the plasma power supply circuit;

[0049] Fig.12 Schematic diagram of simulation model of some high-frequency transformers provided in the embodiments of the present application;

[0050] Fig.13 A schematic diagram of bus current simulation results of a high-frequency transformer provided in an embodiment of the present application;

[0051] Fig.14 A schematic diagram of a bus voltage simulation result of a high-frequency transformer provided in an embodiment of the present application;

[0052] Fig.15 A schematic diagram of the structure of another plasma power supply circuit provided in an embodiment of the present application;

[0053] Fig.16 A schematic diagram of generating a driving signal for a three-level high-frequency inverter circuit provided in an embodiment of the present application;

[0054] Fig.17 A schematic diagram of a driving signal of a three-level high-frequency inverter circuit provided in an embodiment of the present application;

[0055] Fig.18 A schematic diagram of a driving signal of another three-level high-frequency inverter circuit provided in an embodiment of the present application;

[0056] Fig.19 The bus voltage U of a high-frequency transformer provided in the embodiment of the present application is P-P Simulation diagram of

[0057] Fig. 20 A schematic diagram of voltage simulation at a midpoint b of a three-level high-frequency inverter circuit provided in an embodiment of the present application;

[0058] Fig.21 A bus current I of a high frequency transformer provided in an embodiment of the present application P-P Simulation diagram of

[0059] Fig. 22 A schematic diagram of current simulation at a midpoint b of a three-level high-frequency inverter circuit provided in an embodiment of the present application;

[0060] Fig.23 The peak-to-peak value of the secondary current I of a high-frequency transformer provided in an embodiment of the present application is PP-S Simulation diagram of

[0061] Fig.24 A schematic diagram of the structure of a plasma system provided in an embodiment of the present application. DETAILED DESCRIPTION

[0062] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0063] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0064] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0065] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0066] refer to Figure 2 , is a schematic diagram of a driving circuit provided in an embodiment of the present application. Figure 2 As shown, the driving circuit includes at least two driving branches 20. For each driving branch 20, the driving branch 20 includes a driving module 21, a filtering module 22, and a power conversion module 23.

[0067] The first end of the driving module 21 is used to receive the first control signal, the second end of the driving module 21 is electrically connected to the first end of the power conversion module 23, the third end of the driving module 21 is electrically connected to the second end of the power conversion module 23, the fourth end of the driving module 21 is used to receive the first power signal, and the output end of the driving module 21 is electrically connected to the filter module 22. The driving module 21 is used to generate a second control signal according to the first power signal under the control of the first control signal, and output the signal obtained at the second end of the driving module 21 as a driving signal under the control of the second control signal.

[0068] The filter module 22 is used to filter the driving signal and output the filtered driving signal.

[0069] The third end of the power conversion module 23 is used to receive the second power signal, the power conversion module 23 is used to convert the second power signal into a third power signal and output it through the first end of the power conversion module 23, and the power conversion module 23 provides a reference ground signal of the third power signal to the driving module 21 through the second end of the power conversion module 23.

[0070] In an embodiment of the present application, a three-level high-frequency inverter circuit can convert a direct current into a three-level alternating current. When the three-level high-frequency inverter circuit is working, the driving circuit needs to input a driving signal to the three-level high-frequency inverter circuit to control the operation of the switching device in the three-level high-frequency inverter circuit to convert the direct current into a three-level alternating current. Since the three-level high-frequency inverter circuit usually includes at least two switching devices, a driving signal is required for each switching device, so the driving circuit includes at least two driving branches 20. For each driving branch 20, the driving branch 20 includes a driving module 21, a filtering module 22 and a power conversion module 23. The first end of the driving module 21 is used to receive a first control signal. The second end of the driving module 21 is electrically connected to the first end of the power conversion module 23, the third end of the driving module 21 is electrically connected to the second end of the power conversion module 23, and the fourth end of the driving module 21 is used to receive a first power signal. The third end of the power conversion module 23 is used to receive a second power signal. In this way, the power conversion module 23 can receive the second power signal, convert the second power signal into the third power signal required by the driving module 21, and output it through the first end of the power conversion module 23. At this time, the driving module 21 can receive the third power signal through the second end. In addition, the second end of the power conversion module 23 can output the reference ground signal of the third power signal, and the third end of the driving module 21 is electrically connected to the second end of the power conversion module 23, that is, the third end of the driving module 21 is electrically connected to the reference ground end of the third power signal, so that the third end of the driving module 21 can receive the reference ground signal of the third power supply, so that the driving module 21 can accurately obtain the third power signal. The first end of the driving module 21 receives the first control signal. In order to isolate the driving signal output by the driving module 21 from the first control signal, the driving module 21 does not directly output the driving signal according to the first control signal, but the driving module 21 generates the second control signal according to the first power signal received by the fourth end of the driving module 21 under the control of the first control signal. After the second control signal is generated, the third power signal received by the second end of the driving module 21 can be used as the driving signal according to the second control signal to output the driving signal. In this way, the driving signal output by the driving module 21 will not be affected by the first control signal, so the reliability of the driving signal can be improved, thereby improving the common-mode transient immunity of the driving circuit.

[0071] In order to improve the reliability of the driving signal, the driving branch 20 further includes a filtering module 22. The filtering module 22 can filter the driving signal output by the driving module 21 and output the filtered driving signal to reduce interference signals in the driving signal.

[0072] Furthermore, in the embodiment of the present application, each driving branch 20 includes a power conversion module 23, that is, the third power signal and the reference ground signal of the third power signal generated by the power conversion module 23 in each driving branch 20 are isolated from each other and do not interfere with each other. In this way, the driving signals generated by the driving modules 21 in each driving branch 20 are also isolated from each other and do not interfere with each other, further improving the common-mode transient immunity of the driving circuit.

[0073] It should be noted that for the sake of convenience, Figure 2 Only indicated in Figure 1 The structure of the driving branch 20 is the same as that of the illustrated driving branch 20.

[0074] As a possible implementation, Figure 3 As shown, the driving module 21 includes a first switch submodule 211 and a driving submodule 212. The first end of the first switch submodule 211 is electrically connected to the first end of the driving submodule 212. The second end of the first switch submodule 211 is electrically connected to the first grounding end. The control end of the first switch submodule 211 is used to receive a first control signal. The first switch submodule 211 is used to turn on and off under the control of the first control signal.

[0075] The second end of the driver submodule 212 is electrically connected to the first end of the power conversion module 23, and the third end of the driver submodule 212 is electrically connected to the second end of the power conversion module 23; the fourth end of the driver submodule 212 is used to receive the first power signal. The driver submodule 212 is used to sense and generate second control information according to the first power signal when the first switch submodule is in the on state, and output a driving signal under the control of the second control signal.

[0076] In the embodiment of the present application, the driving module 21 includes a first switch submodule 211 and a driving submodule 212. The first end of the first switch submodule 211 is electrically connected to the first end of the driving submodule 212, and the second end of the first switch submodule 211 is electrically connected to the first ground end. The control end of the first switch submodule 211 is used to receive a first control signal, so that the first control signal can control the conduction and disconnection of the first switch submodule 211. When the first switch submodule 211 is turned on, the first end of the first switch submodule 211 is turned on with the second end, and at this time, the first end of the driving submodule 212 is electrically connected to the first ground end, that is, the first end of the driving submodule 212 is grounded. When the first switch submodule 211 is turned off, the first end of the first switch submodule 211 is disconnected from the second end, and at this time, the branch between the first end of the driving submodule 212 and the first ground end is disconnected. Among them, the first ground end is the reference ground signal end of the first power supply signal.

[0077] The fourth end of the driver module 212 receives the first power signal. When the first switch submodule 211 is turned on, the branch between the fourth end of the driver module 212 and the first end of the driver module 212 is turned on. In this way, the driver module 212 can sense the first power signal received at the fourth end to generate a second control signal, and control the output of the driving signal through the second control signal. The second end of the driver module 212 is electrically connected to the first end of the power conversion module 23, and the third end of the driver module 212 is electrically connected to the second end of the power conversion module 23. The power conversion module 23 can convert the second power signal into a third power signal and output it through its first end. The second end of the power conversion module 23 serves as a reference ground end of the third power signal and can output a reference ground signal of the third power signal. The second end of the driver module 212 receives the third power signal. The third end of the driver module 212 receives the reference ground signal of the third power signal. In this way, the driver module 212 can output the third power signal as a driving signal under the control of the second control signal. When the driving submodule 212 does not output a driving signal, a reference ground signal of the third power signal received by the third terminal may be output.

[0078] In some embodiments, the above-mentioned driver submodule 212 can be a CA-IS3211 chip. Among them, the CA-IS3211 chip is an optocoupler-compatible single-channel isolated gate driver, which can be used to drive switching devices, such as MOSFET (metal-oxide semiconductor FET, metal-oxide semiconductor field effect tube), IGBT (Insulate-Gate Bipolar Transistor, insulated gate bipolar transistor) and SiC devices. The isolation level reaches 5.7kVRMS (kilovolt voltage effective value), and the chip can provide 5A (ampere) pull and 6A output peak current capability. The performance highlights of this chip include: high common-mode transient immunity (CMTI), low transmission delay, low pulse width distortion, and can better drive the high-voltage side power tube. Of course, the driver submodule 212 can also be other chips that can achieve the above functions, and this application does not limit this.

[0079] As a possible implementation, Figure 4 As shown, the power conversion module 23 includes a power conversion submodule 231 and a first isolation submodule 232 .

[0080] The first end of the power conversion submodule 231 is electrically connected to the second end of the driver submodule 212, the second end of the power conversion submodule 231 is electrically connected to the third end of the driver submodule 212, the third end of the power conversion submodule 231 is used to receive the second power signal, and the fourth end of the power conversion submodule 231 is used to receive the reference ground signal of the second power signal. The power conversion submodule 231 is used to convert the second power signal into a third power signal, and output the third power signal through the first end of the power conversion submodule 231, and output the reference ground signal of the third power signal through the second end of the power conversion submodule 231.

[0081] One end of the first isolation submodule 232 is electrically connected to the fourth end of the power conversion submodule 231, and the other end of the first isolation submodule 232 is electrically connected to the second end of the power conversion submodule 231. The first isolation submodule 232 is used to isolate the reference ground signal of the second power signal from the reference ground signal of the third power signal.

[0082] In the embodiment of the present application, the power conversion module 23 is used to provide the driver module 212 with a third power signal and a reference ground signal of the third power signal. The power conversion module 23 includes a power conversion submodule 231 and a first isolation submodule 232. At this time, the first end of the power conversion submodule 231 is electrically connected to the second end of the driver module 212, and the second end of the power conversion submodule 231 is electrically connected to the third end of the driver module 212. The third end of the power conversion submodule 231 can receive the second power signal, and the fourth end of the power conversion submodule 231 receives the reference ground signal of the second power signal. In the embodiment of the present application, the signal size of the driving signal to be generated in the driver module 212 is usually different from the size of the second power signal, and the second power signal needs to be adjusted before it can be input to the second end of the driver module 212. Therefore, the power conversion submodule 231 is required. In order for the power conversion submodule 231 to accurately identify the second power signal, the fourth end of the power conversion submodule 231 receives the reference ground signal of the second power signal. The power conversion submodule 231 can convert the received second power signal into a third power signal of the same signal size as the driving signal required by the driver submodule 212. The third power signal is transmitted to the second end of the driver submodule 212 through the first end of the power conversion submodule 231. In order to enable the driver submodule 212 to accurately obtain the third power signal, the power conversion submodule 231 also needs to transmit the reference ground signal of the third power signal to the driver submodule 212. At this time, the power conversion submodule 231 can use its second end as the reference ground end of the third power signal, so as to provide the reference ground signal of the third power signal to the driver submodule 212, that is, the second end of the power conversion submodule 231 is electrically connected to the third end of the driver submodule 212. In this way, the driver submodule 212 can receive the third power signal through the second end of the driver submodule 212, and connect to the reference ground end of the third power signal through the third end of the driver submodule 212. Under the control of the second control signal, the third power signal is output as the driving signal. And when the driving signal is not output, the reference ground signal of the third power signal can be output.

[0083] It should be noted that, since the second end of the power conversion submodule 231 outputs the reference ground signal of the third power signal, that is, the second end of the power conversion submodule 231 is the reference ground end of the third power signal. For the convenience of illustration, the second end of the power conversion submodule 231 is represented by the reference ground of the third power signal in the subsequent drawings.

[0084] In order to prevent the reference ground signal of the third power signal from interfering with the reference ground signal of the second power signal, thereby causing inaccurate signals, the power conversion module 23 also includes a first isolation submodule 232. The first end of the first isolation submodule 232 is electrically connected to the fourth end of the power conversion submodule 231, and the other end of the power isolation submodule 232 is electrically connected to the second end of the power conversion submodule 231. In this way, the first isolation submodule 232 can isolate the reference ground signal of the second power signal from the reference ground signal of the third power signal, thereby preventing the reference ground signal of the third power signal from interfering with the reference ground signal of the second power signal.

[0085] In some embodiments, in order to facilitate circuit implementation and reduce the occupied area of ​​the circuit, the first isolation submodule 232 can be a first capacitor C1. That is, the reference ground signal of the third power supply signal and the reference ground signal of the second power supply signal are isolated by the first capacitor C1. Figure 9a shown.

[0086] As a possible implementation, refer to Figure 5 As shown, the power conversion module 23 further includes: a second capacitor C2, a third capacitor C3, a fourth capacitor C4 and a first inductor L1. The first end of the first inductor L1 is electrically connected to the first end of the second capacitor C2, the second end of the first inductor L1 and the first end of the third capacitor C3 are electrically connected to the third end of the power conversion submodule 231, and the second end of the second capacitor C2 and the second end of the third capacitor C3 are electrically connected to the fourth end of the power conversion submodule 231. One end of the fourth capacitor C4 is electrically connected to the first end of the power conversion submodule 231, and the other end of the fourth capacitor C4 is electrically connected to the second end of the power conversion submodule 231.

[0087] In the embodiment of the present application, the second capacitor C2, the first inductor L1 and the third capacitor C3 constitute a filtering circuit for the second power signal. That is, the first end of the first inductor L1 is electrically connected to the first end of the second capacitor C2, the second end of the first inductor L1 is electrically connected to the first end of the third capacitor C3, the first end of the third capacitor C3 is electrically connected to the third end of the power conversion submodule 231, and the second end of the second capacitor C2 and the second end of the third capacitor C3 are electrically connected to the fourth end of the power conversion submodule 231. In this way, the second power signal can be filtered by the second capacitor C2, the first inductor L1 and the third capacitor C3, and the filtered second power signal is transmitted to the third end of the power conversion submodule 231. In order to improve the signal quality of the third power signal, one end of the fourth capacitor C4 is electrically connected to the first end of the power conversion submodule 231, and the other end of the fourth capacitor C4 is electrically connected to the second end of the power conversion submodule 231. In this way, the fourth capacitor C4 can filter the third power signal output by the power conversion submodule 231 to improve the signal quality of the third power signal.

[0088] As a possible implementation, Figure 6 As shown, the driving module 21 further includes: a first resistor R1, a fifth capacitor C5, a sixth capacitor C6, and a second resistor R2.

[0089] One end of the first resistor R1 is electrically connected to the control end of the first switch submodule 211 , and the other end of the first resistor R1 is electrically connected to the second end of the first switch submodule 211 .

[0090] The fifth capacitor C5 and the sixth capacitor C6 are connected in parallel, one end of the fifth capacitor C5 and the sixth capacitor C6 are electrically connected to the second end of the driving submodule 212 , and the other end of the fifth capacitor C5 and the sixth capacitor C6 are electrically connected to the second end of the power conversion submodule 231 .

[0091] One end of the second resistor R2 is electrically connected to the output end of the driving submodule 212 , and the other end of the second resistor R2 is electrically connected to the filtering module 22 .

[0092] In the embodiment of the present application, in order to improve the safety of the driving module 21, the driving module 21 also includes a first resistor R1. One end of the first resistor R1 is electrically connected to the control end of the first switch submodule 211, and the other end of the first resistor R1 is electrically connected to the second end of the first switch submodule 211. In this way, the first resistor R1 not only has the function of current limiting, but also can control the charging and discharging speed of the control end of the first switch submodule 211, prevent the first switch submodule 211 from causing damage, and improve the safety of the driving module 21. In addition, the driving module 21 also includes a fifth capacitor C5 and a sixth capacitor C6, the fifth capacitor C5 and the sixth capacitor C6 are connected in parallel, one end of the fifth capacitor C5 and the sixth capacitor C6 is electrically connected to the second end of the driving submodule 212, and the other end of the fifth capacitor C5 and the sixth capacitor C6 is electrically connected to the second end of the power conversion submodule 231. In the accompanying drawings, the second end of the power conversion submodule 231 is represented by the reference ground of the third power signal. In this way, the fifth capacitor C5 and the sixth capacitor C6 can be filtering circuits for the third power signal. The interference signal in the third power signal output by the power conversion submodule 231, such as the AC signal, can be transmitted to the reference ground terminal of the third power signal via the fifth capacitor C5 and the sixth capacitor C6. The filtered third power signal can be transmitted to the second terminal of the driving submodule 212.

[0093] The driving module 21 further includes a second resistor R2. One end of the second resistor R2 is electrically connected to the output end of the driving submodule 212, and the other end of the second resistor R2 is electrically connected to the filter module 22. In this way, the second resistor R2 can limit the current of the driving signal output by the driving submodule 212, thereby preventing the driving signal from damaging the subsequent three-level high-frequency inverter module and improving the safety of the circuit.

[0094] As a possible implementation, Figure 7 As shown, the filter module 22 includes a seventh capacitor C7 and a third resistor R3. The seventh capacitor C7 and the third resistor R3 are connected in parallel, and one end of the seventh capacitor C7 and the third resistor R3 is electrically connected to the output end of the driving submodule 212, and the other end of the seventh capacitor C7 and the third resistor R3 is electrically connected to the second end of the power conversion submodule 231.

[0095] That is, in order to reduce the interference signal in the driving signal, the output end of the driving submodule 212 is electrically connected with a filter module 22. In order to improve the filtering efficiency and reduce the complexity of the circuit, the filter module 22 can be an RC filter circuit. That is, the filter module 22 includes a seventh capacitor C7 and a third resistor R3. The seventh capacitor C7 and the third resistor R3 are connected in parallel, one end of the seventh capacitor C7 and the third resistor R3 is electrically connected to the output end of the driving submodule 212, and the other end of the seventh capacitor C7 and the third resistor R3 is electrically connected to the second end of the power conversion submodule 231. Among them, the second end of the power conversion submodule 231 is represented by the reference ground of the third power signal in the accompanying drawings. In this way, one end of the seventh capacitor C7 and the third resistor R3 is electrically connected to the output end of the driving submodule 212, and the other end of the seventh capacitor C7 and the third resistor R3 is electrically connected to the reference ground end of the driving signal, so that the interference signal in the driving signal, such as the AC signal, can be filtered out to improve the accuracy of the driving signal.

[0096] As a possible implementation, Figure 8 As shown, the driving module 21 further includes a first freewheeling submodule 213 and a second freewheeling submodule 214, and the filtering module 22 further includes a protection submodule 223. Among them, the positive terminal of the first freewheeling submodule 213 is electrically connected to the control terminal of the first switch submodule 211, and the negative terminal of the first freewheeling submodule 213 is used to receive the first control signal. The positive terminal of the second freewheeling submodule 214 is electrically connected to the filtering module 22, and the negative terminal of the second freewheeling submodule 214 is electrically connected to the output terminal of the driving submodule 212. The protection submodule 223 is connected in parallel with the seventh capacitor C7 and the third resistor R3.

[0097] In this way, the first freewheeling submodule 213 and the second freewheeling submodule 214 can prevent the reverse current from damaging the driving submodule 212, thereby improving the safety of the driving module 21. The protection submodule 223 can reduce the probability of instantaneous surges damaging various components in the driving circuit.

[0098] Furthermore, the first freewheeling submodule 213 may be a first diode D1 and a fourth resistor R4 connected in parallel, in which case the anode of the first diode D1 and one end of the fourth resistor R4 are electrically connected to the control end of the first switch submodule 211. The cathode of the first diode D1 and the other end of the fourth resistor R4 are used to receive the first control signal.

[0099] The second freewheeling submodule 214 may be a second diode D2 connected in parallel. At this time, the anode of the second diode D2 is electrically connected to the filter module 22 . The cathode of the second diode D2 is electrically connected to the output end of the driving submodule 212 .

[0100] The protection submodule 223 may be a TVS (Transient Voltage Suppressor) diode.

[0101] As a possible implementation, the driving circuit includes four driving branches. The structure of each driving branch can refer to the structure of the driving branch described above.

[0102] Exemplarily, it is assumed that the above-mentioned drive circuit includes four drive branches, and the structures of the four drive branches are the same. For the convenience of illustration, the following description will be given by taking any one of the drive branches as an example. The drive branch includes a drive module 21, a filter module 22 and a power conversion module 23. The drive module 21 includes a first switch submodule 211, a drive submodule 212, a first resistor R1, a fifth capacitor C5, a sixth capacitor C6, a second resistor R2, a first freewheeling submodule 213 and a second freewheeling submodule 214. Assume that the drive submodule 212 is a CA-IS3211 chip, which is represented by U1 in the figure. Among them, the pin structure of the CA-IS3211 chip is as follows Figure 9b Reference Figure 9a As shown, the first switch submodule 211 is an N-type MOS tube, represented by Q1 in the figure. The first freewheeling submodule 213 includes a first diode D1 and a fourth resistor R4 in parallel. The second freewheeling submodule 214 includes a second diode D2. The filter module 22 includes a seventh capacitor C7, a third resistor R3 and a TVS tube D3 in parallel. The power conversion module 23 includes a power conversion submodule 231, a first isolation submodule 232, a second capacitor C2, a third capacitor C3, a fourth capacitor C4 and a first inductor L1. Assume that the power conversion submodule 231 is a F2415S-2WR2 chip, represented by U2 in the figure. The first isolation submodule 232 is a first capacitor C1.

[0103] In this way, Figure 9aIn the embodiment, the first inductor L1 is connected between the first end of the second capacitor C2 and the first end of the third capacitor C3. The first end of the first inductor L1 and the first end of the second capacitor C2 are electrically connected to receive the second power supply. The second end of the second capacitor C2 is electrically connected to the second pin of U2. The second pin of U2 is the reference ground pin of U2 and is electrically connected to the ground terminal of the second power supply. The second end of the first inductor L1 and the first end of the third capacitor C3 are electrically connected to the first pin of U2, wherein the first pin of U2 is the power pin of U2. The second end of the third capacitor C3 is electrically connected to the second pin of U2. The seventh pin of U2 is the output pin of U2, and the fifth pin of U2 is used as the 0V level signal output pin of U2. The fifth pin of U2 is used as the reference ground terminal of the third power supply signal. The seventh pin of U2 outputs the third power supply signal. One end of the first capacitor C1 is electrically connected to the second pin of U2, and the other end is electrically connected to the fifth pin of U2, so as to isolate the reference ground signal of the second power supply signal and the reference ground signal of the third power supply signal. One end of the fourth capacitor C4 is electrically connected to the seventh pin of U2, and the other end of the fourth capacitor C4 is electrically connected to the fifth pin of U2. The fourth capacitor C4 can filter the third power signal output by U2.

[0104] The positive electrode of the first diode D1 and one end of the fourth resistor R4 are electrically connected to the control end of the first switch submodule Q1, and the negative electrode of the first diode D1 and the other end of the fourth resistor R4 are used to receive the first control signal. One end of the first resistor R1 is electrically connected to the control end of the first switch submodule Q1, the other end of the first resistor R1 is electrically connected to the source of the first switch submodule Q1, the source of the first switch submodule Q1 is electrically connected to the first ground terminal, the drain of the first switch submodule Q1 is electrically connected to the third pin of U1, wherein the third pin of U1 is the cathode terminal of U1, and the first power supply is electrically connected to the second pin of U1 through the sixth resistor R6, wherein the second pin of U1 is the anode terminal of U1. One end of the fifth capacitor C5 and the sixth capacitor C6 are electrically connected to the eighth pin of U1, wherein the eighth pin of U1 is the positive power supply terminal of U1. The eighth pin of U1 is electrically connected to the seventh pin of U2. The other ends of the fifth capacitor C5 and the sixth capacitor C6 are electrically connected to the reference ground terminal of the third power supply signal. The fifth pin of U1 is electrically connected to the reference ground of the third power supply signal, that is, it is electrically connected to the fifth pin of U2, wherein the fifth pin of U1 is the negative power supply terminal of U1. The sixth pin of U1 is electrically connected to the negative electrode of the second diode D2, wherein the sixth pin of U1 is the output terminal of U1. The positive electrode of the second diode D2 is electrically connected to one end of the seventh capacitor C7, one end of the third resistor R3 and one end of the TVS tube D3. The other end of the seventh capacitor C7, the other end of the third resistor R3 and the other end of the TVS tube D3 are electrically connected to the reference ground of the third power supply signal. Assume that the first power supply is a 5V (volt) power supply, the second power supply is a 24V power supply, and the third power supply signal is a 15V power supply signal. After filtering by the first inductor L1, the second capacitor C2 and the third capacitor C3, the 24V power supply signal is transmitted to the first pin of U2, and U2 performs voltage reduction processing on the 24 power supply signal, converts it into a 15V third power supply signal, and outputs it through the seventh pin of U2. The 15V third power signal is transmitted to the eighth pin of U1 after being filtered by the fifth capacitor C5 and the sixth capacitor C6. A seventh resistor R7 is electrically connected between the first end of the first switch submodule Q1 and the third pin of U1 to prevent excessive current from damaging U1. A sixth resistor R6 is electrically connected between the second pin of U1 and the first power supply to prevent damage to U1.

[0105] The control end of the first switch submodule Q1 can receive the first control signal. When the first switch submodule Q1 is turned on according to the first control signal, the branch between the third pin of U1 and the first ground terminal is turned on, and the circuit between the second pin and the third pin of U1 is turned on. U1 can generate a second control signal according to the first power signal. When U1 obtains the second control signal, it can control the circuit between the sixth pin and its eighth pin to be turned on. At this time, the 15V third power signal can be output as a driving signal at the sixth pin of U1. When the first switch submodule Q1 is turned off according to the first control signal, the branch between the third pin of U1 and the first ground terminal is turned off, and U1 does not generate the second control signal induction. When U1 does not obtain the second control signal, the circuit between its sixth pin and its fifth pin is turned on. At this time, the sixth pin of U1 outputs a reference ground signal of the 15V third power signal. In this example, the above scenario is used as an example for explanation.

[0106] After the seventh capacitor C7 and the third resistor R3 filter the output drive signal, the drive branch can output the drive signal.

[0107] In this way, in the embodiment of the present application, each driving branch in the driving circuit outputs a driving signal respectively, and the driving signals between the driving branches and the reference ground signals of the driving signals are isolated from each other, which can reduce the mutual interference of the driving signals between the driving branches and improve the common-mode transient immunity of the driving circuit. In addition, for each driving branch, after the second control signal is generated according to the first control signal, the output of the driving signal is controlled based on the second control signal, so that the output driving signal is also isolated from the first control signal, thereby reducing the influence of the first control signal on the driving signal, thereby improving the common-mode transient immunity of the driving circuit.

[0108] refer to Fig.10 , is a schematic diagram of the structure of a plasma power supply circuit provided in an embodiment of the present application. Fig.10 As shown, the circuit includes a driving circuit 101, a three-level high-frequency inverter circuit 102 and a high-frequency voltage conversion circuit 103. The driving circuit 101 is the driving circuit described in the above embodiment.

[0109] The driving circuit 101 is electrically connected to a first end of a three-level high-frequency inverter circuit 102, and a second end of the three-level high-frequency inverter circuit 102 is electrically connected to an input end of a high-frequency voltage conversion circuit 103. A third end of the three-level high-frequency inverter circuit 102 is used to receive a DC power supply. The output end of the high-frequency voltage conversion circuit 103 is used to connect a plasma load.

[0110] The driving circuit 101 is used to send a driving signal to the three-level high-frequency inverter circuit 102 .

[0111] The three-level high-frequency inverter circuit 102 is used to convert the DC power supply into three levels of power supply signals under the action of the driving signal and output them.

[0112] The high-frequency voltage conversion circuit 103 is used to boost the power signal output by the three-level high-frequency inverter circuit 102 and output the boosted power signal to the plasma load.

[0113] In the embodiment of the present application, the three-level high-frequency inverter circuit 102, as a mainstream multi-level inverter topology, has significant output voltage quality advantages and efficiency improvements. It divides the DC voltage of the power supply into three levels through two intermediate capacitors and two switching devices, rather than two levels in a full-bridge inverter. This design enables the three-level inverter to generate a higher quality output voltage with lower current harmonics and higher efficiency. At the same time, it can also reduce the loss and EMI noise of the switching device, which is particularly suitable for high-power applications.

[0114] In comparison, the full-bridge inverter has the advantages of low cost and simple structure, but its output voltage quality is not as good as the three-level high-frequency inverter circuit 102, and its efficiency is relatively low. The full-bridge inverter uses four switching devices to achieve the conversion of DC voltage to AC voltage. Although it is widely used in low-power applications such as household appliances and small electronic devices, its performance is inferior to the three-level high-frequency inverter circuit 102 in situations with high power and high quality requirements.

[0115] In some embodiments, the three-level high-frequency inverter circuit 102 adopts a diode-clamped NPC three-level inverter. Fig.11aAs shown, it includes a first power switch tube Q2, a second power switch tube Q3, a third power switch tube Q4, a fourth power switch tube Q5, a first clamping diode D4, a second clamping diode D5, a first bus capacitor C11 and a second bus capacitor C12. Among them, Q3, Q4, D4 and D5 form a clamped midpoint circuit. The first bus capacitor C11 and the second bus capacitor C12 are connected in series between the positive DC bus BUS+ and the negative DC bus BUS-, and the common node of the first bus capacitor C11 and the second bus capacitor C12 forms a DC bus midpoint b. The first end of the first power switch tube Q2 is electrically connected to the positive DC bus BUS+, the second end of the first power switch tube Q2 is electrically connected to the first end of the second power switch tube Q3, and the second end of the second power switch tube Q3 is electrically connected to the output end a. The first end of the third power switch tube Q4 is electrically connected to the output end a, the second end of the third power switch tube Q4 is electrically connected to the first end of the fourth power switch tube Q5, and the second end of the fourth power switch tube Q5 is electrically connected to the negative DC bus BUS-. The anode of the first clamping diode D4 and the cathode of the second clamping diode D5 are electrically connected to the DC bus midpoint b, the cathode of the first clamping diode D4 is electrically connected to the first end of the second power switch tube Q3, and the anode of the second clamping diode D5 is electrically connected to the first end of the fourth power switch tube Q5.

[0116] Among them, the first power switch tube Q2, the second power switch tube Q3, the third power switch tube Q4, and the fourth power switch tube Q5 can be N-type MOS tubes. At this time, the first ends of the first power switch tube Q2, the second power switch tube Q3, the third power switch tube Q4, and the fourth power switch tube Q5 are all drains, and the second ends of the first power switch tube Q2, the second power switch tube Q3, the third power switch tube Q4, and the fourth power switch tube Q5 are all sources. Fig.11a shown.

[0117] It should be understood that the first power switch tube Q2, the second power switch tube Q3, the third power switch tube Q4, and the fourth power switch tube Q5 can also be P-type MOS tubes. In this case, the first ends of the first power switch tube Q2, the second power switch tube Q3, the third power switch tube Q4, and the fourth power switch tube Q5 are all sources, and the second ends of the first power switch tube Q2, the second power switch tube Q3, the third power switch tube Q4, and the fourth power switch tube Q5 are all drains. Of course, the first power switch tube Q2, the second power switch tube Q3, the third power switch tube Q4, and the fourth power switch tube Q5 can also be other types of power switch tubes, and the embodiments of the present application are not limited to this.

[0118] The control ends of the first power switch tube Q2, the second power switch tube Q3, the third power switch tube Q4, and the fourth power switch tube Q5 are electrically connected to the output ends of the four drive branches in the drive circuit 101, respectively. In this way, each drive branch in the drive circuit 101 can drive the corresponding power switch tube to be turned on and off, and different drive branches drive different power switches. In this way, when the first power switch tube Q2 and the second power switch tube Q3 are turned on at the same time and the third power switch tube Q4 and the fourth power switch tube Q5 are turned off at the same time, the level of the output terminal point a relative to point b is +U dc / 2, where U dc is the voltage between the positive DC bus BUS+ and the negative DC bus BUS-. When the second power switch tube Q3 and the third power switch tube Q4 are turned on at the same time, and the first power switch tube Q2 and the fourth power switch tube Q5 are turned off at the same time, the level of the output terminal point a relative to point b is 0V. When the first power switch tube Q2 and the second power switch tube Q3 are turned off at the same time and the third power switch tube Q4 and the fourth power switch tube Q5 are turned on at the same time, the level of the output terminal point a relative to point b is +U dc The switching state and output level of the / 2 three-level high frequency inverter circuit 102 can be referred to as shown in the following Table 1.

[0119] Table 1

[0120]

[0121] In Table 1, 1 indicates that the power switch tube is turned on, and 0 indicates that the power switch tube is turned off.

[0122] For convenience of representation, the switching function Si can be set as follows according to Table 1:

[0123]

[0124] Where Sa represents the state of the bridge arm. According to the defined ideal switching function Si, Fig.11a The diode clamped three-level high-frequency inverter circuit 102 shown can be equivalent to Fig.11b The equivalent circuit shown in FIG. 1 shows a fifth resistor R5 and a second inductor L2 as equivalent loads between points a and b. According to the above formula, the bridge arm has three equivalent states: 1, 0, and -1. The switch S can conduct different branches, conduct different bridge arm states, and output different voltages. Fig.11bIn the embodiment, the second inductor L2 is connected in series with the fifth resistor R5, one end of the fifth resistor R5 is electrically connected to one end of the second inductor L2, and the other end of the fifth resistor R5 is connected to the first end of the switch S. The second end of the switch S is electrically connected to the first end of the first bus capacitor C11 and the positive DC bus BUS+, and the third end of the switch S is electrically connected to the second end of the second bus capacitor C12 and the negative DC bus BUS-. The first bus capacitor C11 and the second bus capacitor C12 are connected in series between the positive DC bus BUS+ and the negative DC bus BUS-. The fourth end of the switch S is electrically connected to the second end of the first bus capacitor C11, and the other end of the second inductor L2 is electrically connected to the first end of the second bus capacitor C12. In this way, by controlling the conduction of the first end of the switch S and the different ends of the second end, the third end and the fourth end, the conduction of different bridge arm states is achieved, and different voltages are output.

[0125] right Fig.11b Applying the KVL law to the equivalent circuit shown, we can get: Wherein, i represents the current value, R represents the resistance value of the fifth resistor R5, L represents the inductance value of the second inductor L2, and S represents the state of the bridge arm, where S=(-1,0,1). dc Indicates the voltage between the positive DC bus BUS+ and the negative DC bus BUS-.

[0126] From the relationship between the voltage and capacitance of C11 and C12, we can get:

[0127]

[0128] Then the mathematical model of the three-level high-frequency inverter circuit 102 can be expressed as:

[0129]

[0130] Therefore, the state equation of the three-level high-frequency inverter circuit 102 is as follows:

[0131]

[0132] Assume that the above formula is passed through If it means:

[0133]

[0134] Compared with the two-level structure, the three-level structure has a switching DC voltage of only half of the two-level structure under the same bus voltage, which brings many advantages, including the following points:

[0135] (1) Better output waveform

[0136] Since the three-level bridge arm changes from positive or negative to the midpoint potential each time during the commutation process, there is an extra step, which is converted into phase voltage, making the steps of waveform change smoother and closer to a sine wave. The three-level waveform is much smoother than the two-level waveform. Usually, the voltage harmonic THD (Total Harmonic Distortion) of the two-level output is generally around 50%, while at the same switching frequency, the three-level harmonic THD is only about 26%. It is reduced by nearly half, which is also very helpful in reducing harmonic injection into the power grid.

[0137] (2) Improve electromagnetic interference (EMI) issues

[0138] In the three-level structure, the switching voltage of the power switch tube is reduced by half. The voltage change rate (dv / dt) is the main source of electromagnetic interference in the power electronic system. During the switching process, the voltage change rate (dv / dt) of the power switch tube should be reduced a lot. The reduction of the voltage change rate (dv / dt) means the reduction and improvement of the system electromagnetic interference (EMI). At the same time, in the field of inverter applications, the shaft current can also be reduced, effectively improving the impact of the inverter on the life of the motor.

[0139] (3) Reduced losses, higher efficiency, and increased switching frequency

[0140] During the switching process, the reduction of the DC voltage when the power switch is turned on and off will greatly reduce the switching loss of the chip. According to empirical values, the relationship between DC voltage and switching loss is as follows:

[0141] Among them, E SW represents the switching loss, V ref Indicates the reference voltage, V dc Indicates DC voltage.

[0142] It is calculated that when the switching DC voltage becomes 50%, the loss will be reduced to about 40% of the original. The reduction in loss means higher efficiency and switching frequency. The increase in switching frequency is very helpful for the design of LC filtering, which can reduce the size and volume of the reactor and facilitate a more reliable resonance point design.

[0143] refer to Fig.11a As shown, the DC power supply between the positive DC bus BUS+ and the negative DC bus BUS- can output a DC voltage of 310V after bridge rectification of the 220V AC power.

[0144] In some embodiments, the switch devices in the three-level high-frequency inverter circuit 102 are SiC switch devices.

[0145] Among them, it has many advantages such as high temperature resistance, low impedance, fast switching speed and high operating frequency, and has significant performance advantages. Especially in applications such as plasma generators and high-power motor control, silicon carbide power semiconductor devices can effectively improve the power density and efficiency of the system and reduce heat loss, especially under extreme conditions such as high frequency, high voltage and high temperature, and are an ideal choice for achieving high efficiency and integration.

[0146] In some embodiments, the DC side of the three-level high-frequency inverter circuit 102 inputs a DC voltage of 310V. Due to the clamping effect of the clamping diode, when the system is working normally, each power switch tube withstands a DC voltage of 155V. When in use, sudden power quality problems should generally be considered. The voltage exceeds the withstand voltage of the switch tube and burns the switch tube. Therefore, a certain voltage margin should be reserved. In the embodiment of the present application, the four power switch tubes can be selected as SiC MOSFET tubes with a model of GC2M0040120D and a TO-247-3 package, and the drain-source withstand voltage U DS is 1200V, leakage current I D It is 55A.

[0147] In some embodiments, during normal operation, the voltage to be borne by each bus capacitor on the DC side of the three-level high-frequency inverter circuit 102 is 155V. Considering a 2-fold margin, its rated voltage must be at least 310V. Because there is a potential offset problem at the midpoint of the two bus capacitors on the DC side of the three-level high-frequency inverter circuit 102, and the larger the capacitance value of the bus capacitor is, the higher the voltage stability of the system is, and the better the effect of suppressing the offset of the midpoint position of the two bus capacitors is. Therefore, in the embodiment of the present application, the influence of the midpoint potential offset on the target output voltage result can be avoided as much as possible, and the capacitance value is selected as large as possible under the premise of meeting the target output voltage requirement.

[0148] Generally speaking, the voltage divider capacitors in the NPC (Neutral Point Clamped) circuit are non-polar capacitors to avoid the voltage in the circuit from acting in reverse on the capacitors, causing the capacitors to fail or be damaged. Considering the withstand voltage and stability, bus capacitors usually withstand higher voltages, especially in high-power applications. Non-polar capacitors (such as ceramic capacitors or film capacitors) have more advantages in withstand voltage and stability, and are suitable for continuously withstanding high voltages in DC or AC environments without problems. Finally, considering that the NPC circuit has high requirements for the frequency response and loss tangent (ESR) of the bus capacitor, non-polar capacitors such as ceramic capacitors and film capacitors have better high-frequency characteristics and low losses, which are suitable for the working requirements of high-frequency circuits.

[0149] The voltage dividers in the NPC circuit can be estimated using the following formula. Bus capacitors are mainly used to balance the voltage, keep the neutral point voltage stable, and withstand voltage changes caused by switching actions.

[0150] Assuming that two bus capacitors C11 and C12 are used in the topology of the three-level high-frequency inverter circuit 102, the goal is to ensure a stable midpoint voltage. The basic formula for calculating the capacitor size is:

[0151]

[0152] Δv=u P-P *(1%~2%);(3)

[0153] Where: C is the bus capacitance value (unit: Farad, F). DC is the effective value of the DC bus current (unit: ampere, A), that is, the DC side current of the three-level high-frequency inverter circuit 102. f is the switching frequency (unit: Hertz, Hz), which refers to the switching action frequency of the three-level high-frequency inverter circuit 102. Δv is the allowable midpoint voltage ripple (unit: volt, V), which is usually 1% to 2% of the bus voltage.

[0154] Hypothesis I P-P is 45A, f is 25KHz, U P-P The voltage is 310V. Substituting into formula (1)-(3), we get C = 25.7uF. Considering the margin, we select C as 30uF. Therefore, we select a welding machine capacitor with a rated voltage of 400V and a capacitance of 30μF.

[0155] In some embodiments, the DC side of the three-level high-frequency inverter circuit 102 inputs a DC voltage of 310V. Due to the clamping effect of the clamping diode, when the system is working normally, each clamping diode withstands a DC voltage of 155V. When using it, it is generally necessary to consider the sudden power quality problem and leave a certain margin. The SiC diode with model GC4D30120H and package TO-247-2 is selected, and its DC reverse withstand voltage U RRM is 1.2KV, the rectifier current I F It is 94A.

[0156] Assume that, in the embodiment of the present application, the bus current I P-P , bus voltage U P-P , the design parameters of load voltage U, load power P and frequency f are shown in Table 2 below.

[0157] parameter Design maximum <![CDATA[Busbar current I P-P > 50A <![CDATA[Bus voltage U P-P > 320V Load voltage U 25KV Load power P 500W Frequency f 25KHz

[0158] The three-level high-frequency inverter circuit 102 converts the three-level output voltage signal with a peak-to-peak value of 310V into a high-voltage signal of 18kV, and transmits it to the high-frequency high-voltage conversion circuit 103 .

[0159] The high-frequency voltage conversion circuit 103 includes a high-frequency transformer; the high-frequency transformer meets the preset conditions. The preset conditions include: the wire diameter of the high-frequency transformer is 0.015cm 2 (square centimeters)-0.02cm 2 The window utilization rate in the high-frequency transformer is within the range of 80%-85%, and the area of ​​the high-frequency transformer is within 19cm 2 -21cm 2 The working frequency of the high-frequency transformer is 25KHz (kilohertz), the magnetic flux density of the high-frequency transformer is in the range of 0.35-0.45, the voltage regulation rate is in the range of 1-5, and the core cross-sectional area of ​​the high-frequency transformer is 3.4cm 2 -3.6cm 2 At least one of the following: the number of primary turns is within the range of 14-18; wherein the area product of the high-frequency transformer includes the product of the maximum cross-sectional area of ​​the transformer core and the window area.

[0160] Based on the preset conditions, the wire diameter of the high-frequency transformer can be set to 0.017cm 2 The window utilization rate in the high-frequency transformer is 80%, and the area of ​​the high-frequency transformer is 20cm 2 The working frequency of the high-frequency transformer is 25KHz (kilohertz), the magnetic flux density of the high-frequency transformer is 0.4, the voltage adjustment rate is 1, and the core cross-sectional area of ​​the high-frequency transformer is 3.54cm 2 , the number of primary turns is 16, and the high-frequency transformer is simulated.

[0161] When performing simulation, Fig.12 As shown in (1), the waveform coefficient K f , frequency f and magnetic flux density B to calculate the electrical state coefficient K e ,

[0162] like Fig.12 As shown in (2), according to the electrical state coefficient K e , voltage regulation rate a and core geometry parameter K g , calculate the apparent power P t ,

[0163] like Fig.12 As shown in (3), according to Faraday's law of electromagnetic induction, the waveform coefficient K f , magnetic flux density B, frequency f, number of turns Np and the core cross-sectional area A c If the bus voltage V is known, calculate it. (turn).

[0164] like Fig.12 As shown in (4), according to the waveform coefficient K f , window utilization K u 、Area product A p , frequency f, magnetic flux density B and apparent power P t Calculate the current density J. Where,

[0165] like Fig.12 As shown in (5), based on the known wire diameter A wp and current density J are multiplied to obtain the busbar current I through which the conductor passes. Among them,

[0166] After simulating the high-frequency transformer, refer to Fig.13 , is a schematic diagram of the bus current simulation results of the high-frequency transformer. Bus Current effective value I RMS 24.5A. Reference Fig.14 The schematic diagram of the bus voltage simulation result of the high-frequency transformer. Bus Voltage effective value U RMS It is 251.5V.

[0167] In some embodiments, the magnetic core material of the high-frequency transformer is ferrite or PC40 or iron-nickel alloy or nanocrystalline alloy, and the output wire is a multi-strand wire with a cross-sectional area of ​​3.14 mm 2 The outer coating is a high-temperature film, which can withstand temperatures of 180 degrees Celsius for UY16 ferrite transformers.

[0168] refer to Fig.15 , is a schematic diagram of another plasma power supply circuit provided in an embodiment of the present application. The circuit includes a rectifier bridge circuit, a drive circuit 101, a three-level high-frequency inverter circuit 102 and a high-frequency voltage conversion circuit 103.

[0169] refer to Fig.16 , is a schematic diagram of generating a driving signal of the three-level high-frequency inverter circuit 102. The driving circuit 101 includes four driving branches, and the four driving branches output driving signals to four power switch tubes of the three-level high-frequency inverter circuit 102 respectively.

[0170] refer to Fig.17 , is a schematic diagram of a driving signal of the three-level high-frequency inverter circuit 102. Fig.17The driving signals are 4-channel PWM waves with a frequency of 25KHz, adjustable duty cycle and fixed phase shift.

[0171] In some embodiments, in order to avoid the risk of direct conduction in the bridge arm of the three-level high-frequency inverter circuit 102, which may cause excessive heat loss in the power switch tube, or even damage the tube, the heating and temperature rise of the power switch tube are effectively reduced. Fig.18 This is a schematic diagram of a complementary PWM signal dead time of 500ns (nanoseconds). The complementary PWM signal dead time is set to 500ns. The first power switch tube Q2 and the third power switch tube Q4 are complementary, the second power switch tube Q3 and the fourth power switch tube Q5 are complementary, and the first power switch tube Q2 and the third power switch tube Q4 have a dead time of 500ns. The second power switch tube Q3 and the fourth power switch tube Q5 have a dead time of 500ns.

[0172] refer to Fig.19 , is the bus voltage U of the high-frequency transformer P-P The simulation diagram of Fig.19 The peak value of the three-level voltage U PP-P It is 312V.

[0173] refer to Fig. 20 , is a schematic diagram of voltage simulation at the midpoint b of the three-level high-frequency inverter circuit 102. Fig. 20 As shown, the upper half peak value of the voltage is 156V, and the lower half peak value of the voltage is 156V. The full SiC three-level high-frequency inverter circuit 102 is used to achieve midpoint potential balance, ensure the stability and accuracy of the voltage waveform output by the inverter, thereby improving the output power quality; reduce the voltage stress of the capacitor, thereby extending the service life of the capacitor; and reduce the voltage stress of the inverter switch tube, thereby improving the reliability of the system. At the same time, reducing the generation of harmonics also helps protect load equipment such as motors.

[0174] refer to Fig.21 , is the bus current I of the high-frequency transformer P-P The simulation diagram of Fig.21 Middle bus current I P-P It is 43A.

[0175] refer to Fig. 22 , is a schematic diagram of current simulation at the midpoint b of the three-level high-frequency inverter circuit 102. Fig. 22 As shown, the upper half peak value of the current is 21.5A, and the lower half peak value of the current is 21.5A.

[0176] refer to Fig.23 , is the peak-to-peak value of the secondary current of the high-frequency transformer I PP-S The simulation diagram of Fig.23 As shown, the peak-to-peak value of the secondary current of the high-frequency transformer is PP-Sis 0.638A. Fig.21 Display bus current I P-P is 43A. So according to the formula Calculate the secondary voltage value U of the high-frequency transformer PP-S It is 21.03KV.

[0177] It can be seen from the simulation results that the output result of the high-frequency transformer in the embodiment of the present application is substantially the same as the target value of each parameter of the plasma power circuit preset in Table 2, so the plasma power circuit in the embodiment of the present application can provide an accurate power supply voltage for the plasma load. That is, the plasma power circuit in the embodiment of the present application can use a single-phase AC power supply as a power input, and rectify the 220V AC voltage into a DC output voltage signal with a peak-to-peak value of 310V through a diode full-bridge rectifier circuit. The SiC-based three-level high-frequency inverter circuit 102 converts the 310V DC voltage into a three-level output voltage signal. In the drive circuit, a dual-channel complementary PWM drive signal with a high-frequency 25KHz SiC power switch tube is generated to drive the power switch tube of the three-level high-frequency inverter circuit 102 to realize the inverter function of the system. And the input end of the high-frequency transformer is electrically connected to the output end of the three-level high-frequency inverter circuit 102. The three-level output voltage signal is connected to the primary side of the high-frequency transformer, which is composed of a ferrite PL-13U core. On the secondary side of the high-frequency transformer, the three-level output voltage signal with a peak-to-peak value of 310V is converted into a high voltage of 21.03KV. The output end of the high-frequency transformer is connected to a plasma load, for example, to a plasma direct injection spray gun, and the gas in the spray gun forms a plasma at a high voltage of 21.03KV.

[0178] In addition, silicon carbide (SiC) has received extensive attention in high-frequency and high-voltage applications, especially in the design and implementation of plasma generators. All-SiC high-frequency and high-voltage plasma generators utilize the excellent characteristics of SiC devices, which have low on-resistance and high switching speed and can work effectively at high frequencies. All-SiC devices perform well in high-temperature and high-voltage environments and are suitable for the harsh working conditions of plasma generators.

[0179] The core of the all-SiC high-frequency and high-voltage plasma generator lies in its efficient power conversion capability. The system usually adopts a three-level topology, which can effectively reduce switching losses and improve the power density of the system. Specifically, the three-level topology can provide a higher voltage level during the switching process of the switching device, thereby reducing voltage stress and improving overall efficiency. This design is particularly suitable for high-frequency applications because it can work stably at a higher frequency to meet the instantaneous high voltage required for plasma generation.

[0180] refer to Fig.24, is a plasma system provided in an embodiment of the present application. Fig.24 As shown, the system includes a plasma power circuit 2401 and a plasma load 2402. The plasma power circuit 2401 is the plasma power circuit described in the above embodiment.

[0181] In some embodiments, the plasma load 2402 includes at least one of a plasma rotary spray gun and a plasma direct spray gun.

[0182] Corresponding to the above-mentioned embodiments, an embodiment of the present application provides an electronic device, which includes the driving circuit described in the above-mentioned embodiments, or includes the plasma power supply circuit described in the above-mentioned embodiments, or includes the plasma system described in the above-mentioned embodiments.

[0183] Those skilled in the art can clearly understand that the technology in the embodiments of the present invention can be implemented by means of software plus a necessary general hardware platform. Based on this understanding, the technical solution in the embodiments of the present invention is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a disk, an optical disk, etc., and includes a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present invention or some parts of the embodiments.

[0184] In this specification, the same or similar parts between the various embodiments can be referred to each other. In particular, for the device embodiment and the terminal embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiment.

Claims

1. A driving circuit, characterized in that: include: At least two drive branches; For each driving branch, the driving branch includes a driving module, a filtering module and a power conversion module; The first end of the driving module is used to receive a first control signal, the second end of the driving module is electrically connected to the first end of the power conversion module, the third end of the driving module is electrically connected to the second end of the power conversion module, the fourth end of the driving module is used to receive a first power signal, and the output end of the driving module is electrically connected to the filtering module; the driving module is used to generate a second control signal according to the first power signal under the control of the first control signal, and output the signal obtained by the second end of the driving module as a driving signal under the control of the second control signal; The filtering module is used to filter the driving signal and output the filtered driving signal; The third end of the power conversion module is used to receive a second power signal, and the power conversion module is used to convert the second power signal into a third power signal and output it through the first end of the power conversion module, and the power conversion module provides the driving module with a reference ground signal of the third power signal through the second end of the power conversion module.

2. The circuit according to claim 1, characterized in that The driving module includes a first switch submodule and a driving submodule; The first end of the first switch submodule is electrically connected to the first end of the driving submodule, the second end of the first switch submodule is electrically connected to the first ground end, and the control end of the first switch submodule is used to receive a first control signal; the first switch submodule is used to be turned on and off under the control of the first control signal; The second end of the driving submodule is electrically connected to the first end of the power conversion module, and the third end of the driving submodule is electrically connected to the second end of the power conversion module; the fourth end of the driving submodule is used to receive a first power signal, and the driving submodule is used to sense and generate second control information according to the first power signal when the first switch submodule is in an on state, and output a driving signal under the control of the second control signal.

3. The circuit according to claim 2, characterized in that The power conversion module includes a power conversion submodule and a first isolation submodule; The first end of the power conversion submodule is electrically connected to the second end of the driver submodule, the second end of the power conversion submodule is electrically connected to the third end of the driver submodule, the third end of the power conversion submodule is used to receive a second power signal, and the fourth end of the power conversion submodule is used to receive a reference ground signal of the second power signal; the power conversion submodule is used to convert the second power signal into a third power signal, and output the third power signal through the first end of the power conversion submodule, and output the reference ground signal of the third power signal through the second end of the power conversion submodule; One end of the first isolation submodule is electrically connected to the fourth end of the power conversion submodule, and the other end of the first isolation submodule is electrically connected to the second end of the power conversion submodule; the first isolation submodule is used to isolate the reference ground signal of the second power signal from the reference ground signal of the third power signal.

4. The circuit according to claim 3, characterized in that The first isolation submodule includes a first capacitor.

5. The circuit according to claim 4, characterized in that The power conversion module also includes a second capacitor, a third capacitor, a fourth capacitor and a first inductor; the first end of the first inductor is electrically connected to the first end of the second capacitor, the second end of the first inductor and the first end of the third capacitor are electrically connected to the third end of the power conversion submodule, the second end of the second capacitor and the second end of the third capacitor are electrically connected to the fourth end of the power conversion submodule; one end of the fourth capacitor is electrically connected to the first end of the power conversion submodule, and the other end of the fourth capacitor is electrically connected to the second end of the power conversion submodule.

6. The circuit according to any one of claims 3 to 5, characterized in that: The driving module further includes: a first resistor, a fifth capacitor, a sixth capacitor, and a second resistor; One end of the first resistor is electrically connected to the control end of the first switch submodule, and the other end of the first resistor is electrically connected to the second end of the first switch submodule; The fifth capacitor and the sixth capacitor are connected in parallel, one end of the fifth capacitor and the sixth capacitor is electrically connected to the second end of the driving submodule, and the other end of the fifth capacitor and the sixth capacitor is electrically connected to the second end of the power conversion submodule; One end of the second resistor is electrically connected to the output end of the driving submodule, and the other end of the second resistor is electrically connected to the filtering module.

7. The circuit according to claim 6, characterized in that The filtering module includes a seventh capacitor and a third resistor; the seventh capacitor and the third resistor are connected in parallel, and one end of the seventh capacitor and the third resistor is electrically connected to the output end of the driving submodule, and the other end of the seventh capacitor and the third resistor is electrically connected to the second end of the power conversion submodule.

8. A plasma power supply circuit, characterized in that: A drive circuit comprising a three-level high-frequency inverter circuit and a high-frequency voltage conversion circuit as claimed in any one of claims 1 to 7; The driving circuit is electrically connected to a first end of the three-level high-frequency inverter circuit, and a second end of the three-level high-frequency inverter circuit is electrically connected to an input end of the high-frequency voltage conversion circuit; a third end of the three-level high-frequency inverter circuit is used to receive a DC power supply; an output end of the high-frequency voltage conversion circuit is used to connect a plasma load; The driving circuit is used to send a driving signal to the three-level high-frequency inverter circuit; The three-level high-frequency inverter circuit is used to convert the DC power supply into power supply signals of three levels under the action of the driving signal and output them; The high-frequency voltage conversion circuit is used to boost the power signal output by the three-level high-frequency inverter circuit and output the boosted power signal to the plasma load.

9. The circuit according to claim 8, characterized in that The switching device in the three-level high-frequency inverter circuit is a SiC switching device.

10. The circuit according to claim 8 or 9, characterized in that The high-frequency voltage conversion circuit includes a high-frequency transformer; the high-frequency transformer meets preset conditions; The preset conditions include: the wire diameter of the high-frequency transformer is 0.015 cm 2 (square centimeters)-0.02cm 2 The window utilization rate of the high-frequency transformer is within the range of 80%-85%, and the area of ​​the high-frequency transformer is within the range of 19cm 2 -21cm 2 The operating frequency of the high-frequency transformer is 25KHz (kilohertz), the magnetic flux density of the high-frequency transformer is in the range of 0.35-0.45, the voltage adjustment rate is in the range of 1-5, and the core cross-sectional area of ​​the high-frequency transformer is 3.4cm 2 -3.6cm 2 At least one of the range of 14-18 and the number of primary turns is within the range of 14-18; wherein the area product of the high-frequency transformer includes the product of the maximum cross-sectional area of ​​the transformer core and the window area.

11. A plasma system, characterized in that: include: The plasma power supply circuit and plasma load as described in any one of claims 8 to 10.

12. The system according to claim 11, characterized in that The plasma load includes at least one of a plasma rotary spray gun and a load plasma direct spray gun.

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