Preparation method of TOPCon battery and TOPCon battery

Abstract

The invention provides a preparation method of a TOPCon battery and the TOPCon battery. The method comprises the following steps: providing a silicon substrate; forming a first tunneling oxide layer and an intrinsic amorphous silicon layer which are stacked on the surface of the silicon substrate; performing crystallization treatment on the intrinsic amorphous silicon layer to obtain an intrinsic polycrystalline silicon layer; a boron source is doped in the intrinsic polycrystalline silicon layer to obtain a prepared doped conductive layer and a prepared BSG layer, and the boron doping concentration of the prepared doped conductive layer closer to the silicon substrate is lower; and performing laser processing on the prepared doped conductive layer and the prepared BSG layer to obtain a first doped conductive layer and a BSG layer, the doping concentration of the first doped conductive layer being greater than the doping concentration of the prepared doped conductive layer, and the doping concentration of the BSG layer being less than the doping concentration of the prepared BSG layer. The problem that in the prior art, due to the fact that the doping concentration of boron in a front emitting electrode of a TOPCon cell is low, photon-generated carriers are seriously compounded in a metal contact area is solved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor technology, and in particular to a method for preparing a TOPCon cell, a TOPCon cell and a photovoltaic module. Background Art

[0002] In N-type high-efficiency crystalline silicon cells, tunnel oxide passivated contact technology (TOPCon) has received continuous attention due to its excellent surface passivation effect, high theoretical efficiency and good compatibility with traditional production lines. The most notable feature of TOPCon technology is its high-quality ultra-thin silicon oxide and heavily doped polysilicon stacked structure, which allows one type of carrier to pass freely through the interface while blocking another type of carrier, and greatly suppresses interface recombination by widening the concentration difference between the two carriers at the interface. TOPCon technology uses field effects and selective carrier transmission to achieve efficient passivation of the entire surface, greatly reducing the metal contact recombination current, thereby increasing the open circuit voltage and short-circuit current of the battery. However, at present, N-type TOPCon high-efficiency cells only use n+ polysilicon (polySi) passivation contact structure on the back, and the conventional boron diffusion structure is still used for the emitter. Photogenerated carriers recombine severely in the metal contact area, and the front efficiency is seriously lost.

[0003] The traditional method of making p+polySi is intrinsic amorphous silicon + boron diffusion or in-situ doping + annealing. This method has extremely high requirements for the first tunneling oxide layer and has certain limitations on the doping concentration. It is easy to have serious boron internal diffusion. At the same time, the doping concentration in Poly is low and the passivation performance is limited. Summary of the invention

[0004] The main purpose of the present application is to provide a method for preparing a TOPCon cell, a TOPCon cell and a photovoltaic module, so as to solve the problem in the prior art that the low boron doping concentration in the front emitter of the TOPCon cell leads to serious recombination of photogenerated carriers in the metal contact area.

[0005] In order to achieve the above-mentioned purpose, according to one aspect of the present application, a preparation method of a TOPCon battery is provided, comprising: providing a silicon substrate; forming a stacked first tunneling oxide layer and an intrinsic amorphous silicon layer on the surface of the silicon substrate; performing a crystallization treatment on the intrinsic amorphous silicon layer to crystallize the intrinsic amorphous silicon layer to obtain an intrinsic polycrystalline silicon layer; doping a boron source into the intrinsic polycrystalline silicon layer, the intrinsic polycrystalline silicon layer after doping with the boron source constitutes a preliminary doped conductive layer and a preliminary BSG layer, wherein the preliminary BSG layer is located on the surface of the preliminary doped conductive layer away from the silicon substrate, and in the preliminary doped conductive layer, the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration; performing laser treatment on the preliminary doped conductive layer and the preliminary BSG layer, the preliminary doped conductive layer after the laser treatment constitutes a first doped conductive layer, and the preliminary BSG layer after the laser treatment constitutes a BSG layer, wherein the doping concentration of the first doped conductive layer is greater than the doping concentration of the preliminary doped conductive layer, and the doping concentration of the BSG layer is less than the doping concentration of the preliminary BSG layer; removing the BSG layer.

[0006] Optionally, doping the intrinsic polysilicon layer with a boron source comprises: doping the intrinsic polysilicon layer with the boron source in a tubular diffusion furnace within a temperature range of 700° C. to 900° C.

[0007] Optionally, the intrinsic amorphous silicon layer is crystallized, including: annealing the intrinsic amorphous silicon layer within a temperature range of 900° C. to 1050° C.

[0008] Optionally, the pre-doped conductive layer and the pre-doped BSG layer are laser processed, including: laser scanning the pre-doped conductive layer and the pre-doped BSG layer, wherein the laser light source includes an infrared nanosecond laser, the laser power is 100W to 300W, the laser scanning frequency is 300HZ to 1500HZ, and the scanning speed is 15000mm / s to 30000mm / s.

[0009] Optionally, a stacked first tunneling oxide layer and an intrinsic amorphous silicon layer are formed on the surface of the above-mentioned silicon substrate, including: using a tubular LPCVD device to successively introduce oxygen and silane at a temperature of 500°C to 800°C to obtain the above-mentioned first tunneling oxide layer and the above-mentioned intrinsic amorphous silicon layer.

[0010] Optionally, the silicon substrate includes a first surface and a second surface relative to each other, and a stacked first tunneling oxide layer and an intrinsic amorphous silicon layer are formed on the surface of the silicon substrate, including: forming the first tunneling oxide layer and the intrinsic amorphous silicon layer on the first surface, and the method further includes: forming a second tunneling oxide layer on the second surface; forming a second doped conductive layer on a surface of the second tunneling oxide layer away from the silicon substrate, the doping type of the second doped conductive layer being different from the doping type of the first doped conductive layer; and forming a first anti-reflection layer on a surface of the second doped conductive layer away from the silicon substrate.

[0011] Optionally, after removing the BSG layer, the method further comprises: forming a passivation layer on a surface of the first doped conductive layer away from the silicon substrate; and forming a second anti-reflection layer on a surface of the passivation layer away from the silicon substrate.

[0012] According to another aspect of the present application, a TOPCon cell is provided. The TOPCon cell is prepared by any of the above-mentioned TOPCon cell preparation methods. The TOPCon cell comprises: a silicon substrate; a first tunneling oxide layer, located on the surface of the silicon substrate; a first doped conductive layer, located on the surface of the first tunneling oxide layer away from the silicon substrate, the doping atoms of the first doped conductive layer include boron, and the doping concentration of the first doped conductive layer is 5E20cm -3 ~1E21cm -3 .

[0013] Optionally, the silicon substrate includes a first surface and a second surface relative to each other, the first tunneling oxide layer is located on the first surface, and the TOPCon cell further includes: a second tunneling oxide layer, located on the second surface; a second doped conductive layer, located on the surface of the second tunneling oxide layer away from the silicon substrate, the doping type of the second doped conductive layer is different from the doping type of the first doped conductive layer; and a first anti-reflection layer, located on the surface of the second doped conductive layer away from the silicon substrate.

[0014] According to another aspect of the present application, a photovoltaic module is provided, comprising a TOPCon cell prepared by any of the above-mentioned TOPCon cell preparation methods, or the above-mentioned TOPCon cell.

[0015] By applying the technical solution of the present application, a first stacked tunneling oxide layer and an intrinsic amorphous silicon layer are first formed on a silicon substrate, and then the intrinsic amorphous silicon layer is crystallized to obtain an intrinsic polycrystalline silicon layer. A boron source is then doped into the intrinsic polycrystalline silicon layer to obtain a preliminary doped conductive layer and a preliminary BSG layer. The preliminary doped conductive layer and the preliminary BSG layer are then laser treated to obtain a first doped conductive layer and a BSG layer, and finally the BSG layer is removed. Among them, in the preliminary doped conductive layer, the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration is, the doping concentration of the first doped conductive layer is greater than the doping concentration of the preliminary doped conductive layer, and the doping concentration of the BSG layer is less than the doping concentration of the preliminary BSG layer. Compared with the problem in the prior art that the boron doping concentration in the front emitter of the TOPCon battery is low, resulting in serious recombination of photogenerated carriers in the metal contact area, the present application first forms a first tunneling oxide layer and an intrinsic amorphous silicon layer on a silicon substrate, and crystallizes the intrinsic amorphous silicon layer to obtain an intrinsic polycrystalline silicon layer, and then dopes a boron source into the intrinsic polycrystalline silicon layer to form a high surface concentration, low-activated preliminary doped conductive layer and a preliminary BSG layer (the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration), reducing the phenomenon of boron diffusion into the first tunneling oxide layer, which significantly reduces the thermal diffusion power of boron atoms, thereby reducing the phenomenon of boron internal diffusion; the preliminary doped conductive layer and the preliminary BSG layer are laser treated, and since the laser heating is instantaneous and local, the boron atoms can be quickly activated to a high concentration state without causing extensive diffusion of boron, thereby ensuring that the doping concentration of boron in the first doped conductive layer is high, and the high concentration of boron doping can form a more effective hole selective transmission interface, reduce the recombination current in the front metal contact area, and improve the battery efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The drawings constituting part of the present application are used to provide a further understanding of the present application. The exemplary embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0017] Figure 1 A schematic flow chart of a method for preparing a TOPCon battery according to an embodiment of the present application is shown;

[0018] Figures 2 to 7 Schematic diagrams of the cross-sectional structure of a TOPCon battery formed after each process step according to a method for preparing a TOPCon battery provided in an embodiment of the present application are respectively shown;

[0019] Figure 8 A schematic diagram comparing doping curves of a conventional method for preparing a front emitter and a method for preparing a front emitter of the present application is shown.

[0020] The above drawings include the following reference numerals:

[0021] 10. Silicon substrate; 11. First tunneling oxide layer; 12. Intrinsic amorphous silicon layer; 13. Intrinsic polysilicon layer; 14. Preliminary doped conductive layer; 15. Preliminary BSG layer; 16. First doped conductive layer; 17. BSG layer; 101. First surface; 102. Second surface; 18. Second tunneling oxide layer; 19. Second doped conductive layer; 20. First anti-reflection layer; 21. Passivation layer; 22. Second anti-reflection layer; 23. First electrode; 24. Second electrode. DETAILED DESCRIPTION

[0022] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0023] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0024] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be intermediate elements. Moreover, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element through a third element.

[0025] As introduced in the background technology, the boron doping concentration in the front emitter of the TOPCon cell in the prior art is low, resulting in serious recombination of photogenerated carriers in the metal contact area. To solve the above problem, the embodiments of the present application provide a TOPCon cell preparation method, a TOPCon cell and a photovoltaic module.

[0026] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0027] Figure 1 FIG. 1 is a flow chart of a method for preparing a TOPCon battery according to an embodiment of the present application. Figure 1 As shown, the method comprises the following steps:

[0028] Step S101, as Figure 2 As shown, a silicon substrate 10 is provided;

[0029] Specifically, the doping type of the silicon substrate is N-type.

[0030] Step S102, as Figure 3 As shown, a first tunneling oxide layer 11 and an intrinsic amorphous silicon layer 12 are stacked on the surface of the silicon substrate 10;

[0031] Specifically, the intrinsic amorphous silicon layer is i-poly.

[0032] Step S103, as Figure 3 and Figure 4 As shown, the intrinsic amorphous silicon layer 12 is subjected to a crystallization process so as to crystallize the intrinsic amorphous silicon layer 12 to obtain an intrinsic polycrystalline silicon layer 13;

[0033] Step S104, as Figure 4 and Figure 5 As shown, a boron source is doped into the intrinsic polysilicon layer 13, and the intrinsic polysilicon layer 13 doped with the boron source constitutes a preliminary doped conductive layer 14 and a preliminary BSG layer 15, wherein the preliminary BSG layer 15 is located on the surface of the preliminary doped conductive layer 14 away from the silicon substrate 10, and in the preliminary doped conductive layer 14, the closer the preliminary doped conductive layer 14 is to the silicon substrate 10, the lower the boron doping concentration is;

[0034] Specifically, the boron doping concentration in the pre-doped conductive layer closer to the silicon substrate is lower.

[0035] Step S105, as Figure 5 and Figure 6 As shown, the preliminary doped conductive layer 14 and the preliminary BSG layer 15 are laser treated, the preliminary doped conductive layer 14 after the laser treatment constitutes a first doped conductive layer 16, and the preliminary BSG layer 15 after the laser treatment constitutes a BSG layer 17, wherein the doping concentration of the first doped conductive layer 16 is greater than the doping concentration of the preliminary doped conductive layer 14, and the doping concentration of the BSG layer 17 is less than the doping concentration of the preliminary BSG layer 15;

[0036] Specifically, the BSG layer is boron-doped silicon dioxide, and the doping type of the first doped conductive layer is P type.

[0037] Step S106, Figure 6 and Figure 7 As shown, the BSG layer 17 is removed.

[0038] According to this embodiment, a first stacked tunneling oxide layer and an intrinsic amorphous silicon layer are first formed on a silicon substrate, and then the intrinsic amorphous silicon layer is crystallized to obtain an intrinsic polycrystalline silicon layer, and then a boron source is doped into the intrinsic polycrystalline silicon layer to obtain a preliminary doped conductive layer and a preliminary BSG layer, and then the preliminary doped conductive layer and the preliminary BSG layer are laser processed to obtain a first doped conductive layer and a BSG layer, and finally the BSG layer is removed, wherein, in the preliminary doped conductive layer, the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration is, the doping concentration of the first doped conductive layer is greater than the doping concentration of the preliminary doped conductive layer, and the doping concentration of the BSG layer is less than the doping concentration of the preliminary BSG layer. Compared with the problem in the prior art that the boron doping concentration in the front emitter of the TOPCon battery is low, resulting in serious recombination of photogenerated carriers in the metal contact area, the present application first forms a first tunneling oxide layer and an intrinsic amorphous silicon layer on a silicon substrate, and crystallizes the intrinsic amorphous silicon layer to obtain an intrinsic polycrystalline silicon layer, and then dopes a boron source into the intrinsic polycrystalline silicon layer to form a high surface concentration, low-activated preliminary doped conductive layer and a preliminary BSG layer (the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration), reducing the phenomenon of boron diffusion into the first tunneling oxide layer, which significantly reduces the thermal diffusion power of boron atoms, thereby reducing the phenomenon of boron internal diffusion; the preliminary doped conductive layer and the preliminary BSG layer are laser treated, and since the laser heating is instantaneous and local, the boron atoms can be quickly activated to a high concentration state without causing extensive diffusion of boron, thereby ensuring that the doping concentration of boron in the first doped conductive layer is high, and the high concentration of boron doping can form a more effective hole selective transmission interface, reduce the recombination current in the front metal contact area, and improve the battery efficiency.

[0039] In addition, compared with traditional thermal diffusion or annealing methods, laser doping can more accurately control the doping depth, which means that the doped boron atoms can be more effectively confined in the intrinsic polysilicon layer, avoiding excessive diffusion into the silicon substrate, reducing recombination at the tunneling oxide layer, and maintaining its passivation properties.

[0040] Specifically, the first tunneling oxide layer and the first doped conductive layer form a passivation contact structure. The material of the first tunneling oxide layer may be a dielectric material, such as silicon oxide.

[0041] Specifically, the silicon substrate is used to receive incident light and generate photogenerated carriers, and the material of the silicon substrate may include at least one of single crystal silicon, polycrystalline silicon, amorphous silicon or microcrystalline silicon. The silicon substrate is an N-type semiconductor substrate, that is, the N-type silicon substrate is doped with N-type doping ions, and the N-type doping ions may be any one of phosphorus ions, arsenic ions or antimony ions.

[0042] In an optional solution, the boron source is doped into the intrinsic polysilicon layer, including: using a tubular diffusion furnace, doping the boron source into the intrinsic polysilicon layer within a temperature range of 700° C. to 900° C. In this embodiment, the boron source is doped into the intrinsic polysilicon layer at a low temperature of 700° C. to 900° C., which further ensures that the thermal diffusion power of boron atoms is low, further reduces the phenomenon of boron diffusion into the first tunneling oxide layer, and thus further ensures that the boron doping concentration in the first doped conductive layer obtained subsequently is high.

[0043] Specifically, the tubular boron diffusion furnace is at 700° C. to 900° C. to low-temperature dope the boron source to form a high surface concentration, low-activated p+poly (ie, a preliminary doped conductive layer) and a preliminary BSG layer.

[0044] According to some exemplary embodiments of the present application, the intrinsic amorphous silicon layer is crystallized, including: annealing the intrinsic amorphous silicon layer within a temperature range of 900° C. to 1050° C. In this embodiment, the annealing treatment is performed within a temperature range of 900° C. to 1050° C., which can effectively transform the amorphous silicon layer into a polycrystalline silicon layer. The crystallization process allows the amorphous silicon atoms to recombine to form a crystalline structure, thereby improving the electrical properties of the material and the carrier mobility.

[0045] Specifically, a tubular annealing furnace is used to introduce nitrogen at a temperature of 900° C. to 1050° C. to perform annealing to form a crystallized i-poly (ie, an intrinsic polysilicon layer).

[0046] In other embodiments, the pre-doped conductive layer and the pre-BSG layer are laser processed, including: laser scanning the pre-doped conductive layer and the pre-BSG layer, wherein the laser light source includes an infrared nanosecond laser, the laser power is 100W to 300W, the laser scanning frequency is 300HZ to 1500HZ, and the scanning speed is 15000mm / s to 30000mm / s. In this embodiment, the infrared nanosecond laser has high energy density and short pulse characteristics, which can accurately control local heating, further allowing the boron source to diffuse and activate rapidly, further forming a high-concentration first doped conductive layer, further achieving more efficient carrier transport and collection, and further reducing the recombination current in the metal contact area.

[0047] Specifically, a p++poly layer (ie, a first doped conductive layer) and a BSG layer with a high doping concentration are formed by doping with a laser.

[0048] According to some other exemplary embodiments of the present application, a stacked first tunneling oxide layer and an intrinsic amorphous silicon layer are formed on the surface of the silicon substrate, comprising: using a tubular LPCVD device, introducing oxygen and silane successively at a temperature of 500° C. to 800° C. to obtain the first tunneling oxide layer and the intrinsic amorphous silicon layer. In this embodiment, in a relatively low temperature range (500° C. to 800° C.), introducing oxygen can promote the formation of a high-quality first tunneling oxide layer, and then introducing silane can deposit an intrinsic amorphous silicon layer on the tunneling oxide layer.

[0049] Specifically, a tubular LPCVD device is used to successively introduce oxygen and silane at 500°C to 800°C to form a first tunneling oxide layer and an intrinsic amorphous silicon layer. The oxygen flow rate range is usually between 100sccm-1000sccm, and the specific value can be adjusted according to the equipment characteristics and the required thickness of the first tunneling oxide layer; the silane flow rate range is generally between 10sccm-500sccm, but it needs to be considered in combination with the oxygen flow rate and deposition temperature. The gas pressure in the LPCVD process needs to be maintained at a low level (between 100mTorr-1000mTorr) to ensure uniform distribution and effective reaction of gas molecules in the reaction chamber. The thickness of the first tunneling oxide layer is usually between 1nm-10nm, and the thickness of the intrinsic amorphous silicon layer is generally between 100nm-500nm.

[0050] In some other optional schemes of this application, such as Figure 7 As shown, the silicon substrate 10 includes a first surface 101 and a second surface 102 relative to each other, and a first tunneling oxide layer 11 and an intrinsic amorphous silicon layer 12 are stacked on the surface of the silicon substrate 10, including: forming the first tunneling oxide layer 11 and the intrinsic amorphous silicon layer 12 on the first surface 101, and the method further includes: forming a second tunneling oxide layer 18 on the second surface 102; forming a second doped conductive layer 19 on a surface of the second tunneling oxide layer 18 away from the silicon substrate 10, the doping type of the second doped conductive layer 19 being different from the doping type of the first doped conductive layer 16; and forming a first anti-reflection layer 20 on a surface of the second doped conductive layer 19 away from the silicon substrate 10. In this embodiment, a first tunneling oxide layer and an intrinsic amorphous silicon layer are stacked on the first surface of the silicon substrate, and a second tunneling oxide layer and a second doped conductive layer are formed on the second surface, which constructs a double-sided passivation contact structure. This structure can further significantly improve the photoelectric conversion efficiency of the battery; the first anti-reflection layer can significantly reduce the reflection loss of light, increase the absorption and utilization of light, and thus further improve the performance of the battery.

[0051] Specifically, the doping type of the second doped conductive layer is N-type, the material of the first anti-reflection layer includes one of silicon oxide, silicon nitride or silicon oxynitride, and the material of the second tunneling oxide layer can be a dielectric material, such as silicon oxide.

[0052] Specifically, the first tunnel oxide layer and the second tunnel oxide layer may be prepared simultaneously or at different times.

[0053] Specifically, the tunneling layer is used to achieve interface passivation on the surface of the silicon substrate, and has a chemical passivation effect. The tunneling layer can be formed by a deposition process, such as a chemical vapor deposition process; in other embodiments, when the material of the tunneling layer is silicon oxide, the tunneling layer can also be formed by an in-situ growth process, such as a thermal oxidation process and a nitric acid passivation process to in-situ generate the tunneling layer on the surface of the silicon substrate.

[0054] In some other optional solutions of the present application, after removing the BSG layer, the method further includes: Figure 7 As shown, a passivation layer 21 is formed on the surface of the first doped conductive layer 16 away from the silicon substrate 10; and a second anti-reflection layer 22 is formed on the surface of the passivation layer 21 away from the silicon substrate 10. In this embodiment, the formed passivation layer can further enhance the surface passivation effect of the battery and reduce the recombination loss of carriers on the surface; the addition of the second anti-reflection layer can further reduce the reflection of light on the battery surface and further increase the absorption of light, thereby further improving the performance of the battery.

[0055] Specifically, the material of the passivation layer may be one or more of silicon oxide, aluminum oxide, silicon nitride, silicon oxynitride or silicon oxycarbon nitride; the material of the second anti-reflection layer includes one of silicon oxide, silicon nitride or silicon oxynitride. The passivation layer and the anti-reflection layer may be a single-layer structure or a multi-layer structure. For a multi-layer structure, the materials of different layers may be different from each other, or the materials of some number of layers may be the same and different from the materials of other layers. In some embodiments, the passivation layer may be formed by a PECVD method.

[0056] In other embodiments, the above method further includes: Figure 7 As shown, a plurality of first electrodes 23 are formed on a portion of the surface of the second anti-reflection layer 22 away from the silicon substrate 10 and are spaced apart in a predetermined direction, wherein the predetermined direction is a direction perpendicular to the thickness of the silicon substrate 10; a plurality of second electrodes 24 are formed on a portion of the surface of the first anti-reflection layer 20 away from the silicon substrate 10 and are spaced apart in the predetermined direction.

[0057] Specifically, the first electrode directly contacts the first doped conductive layer on the second anti-reflection layer or through the second anti-reflection layer and the passivation layer, and the second electrode directly contacts the second doped conductive layer on the first anti-reflection layer or through the first anti-reflection layer to establish electrical connection with an external circuit.

[0058] In other embodiments, providing a silicon substrate includes: providing a prepared silicon substrate; and cleaning the prepared silicon substrate with an alkaline solution to obtain the silicon substrate. In this embodiment, cleaning the prepared silicon substrate with an alkaline solution can remove the damaged layer and pave the way for subsequent processes.

[0059] Specifically, the original silicon wafer (ie, the prepared silicon substrate) is treated in an alkaline solution to remove the damaged layer and form a polished morphology.

[0060] It should be noted that there are generally two commonly used p+polySi production technologies. One is to first deposit a tunneling oxide layer, then crystallize the intrinsic amorphous silicon layer at high temperature, and then form a p+polySi layer by tubular boron diffusion; the other method is to deposit a tunneling oxide layer and an in-situ p+polySi layer by PECVD, and then use annealing to activate boron to form a p+polySi layer; their disadvantages are that they have high requirements for the tunneling oxide layer, and it is easy to have serious boron internal diffusion. At the same time, the doping concentration in the Poly is low and the passivation performance is limited.

[0061] In summary, the present application adopts the method of intrinsic amorphous silicon + boron deposition + laser doping to greatly increase the doping concentration of boron in amorphous silicon and reduce metal recombination and contact (that is, first depositing the first tunneling oxide layer and intrinsic amorphous silicon on the processed silicon wafer, then using high temperature for crystallization, then low temperature for boron deposition, and finally doping by laser).

[0062] Figure 8 A schematic diagram comparing doping curves of a conventional method for preparing a front emitter and a method for preparing a front emitter of the present application is shown. Figure 8 In the figure, the orange curve represents the conventional method for preparing the front emitter, the gray curve represents the method for preparing the front emitter of the present application, the abscissa represents the depth of the passivation contact structure (Depth), in μm, and the ordinate represents the doping concentration of boron in the passivation contact structure (Doping Concentration), in cm -3 The passivation contact structure is the stacked tunnel oxide layer and the front emitter. The front emitter is a P-type doped conductive layer. The shallower area (such as 0-0.4μm) corresponds to the location of the front emitter, while the deeper area (such as 0.4μm-0.7μm) corresponds to the location of the tunnel oxide layer. Figure 8It can be seen that, compared with the prior art, the present application effectively reduces the serious phenomenon of boron internal diffusion, and at the same time greatly increases the doping concentration of boron in the front emitter.

[0063] Specifically, the performance parameter comparison between the front emitter prepared by the preparation method of the TOPCon battery of the present application and the front emitter prepared by the conventional preparation method of the front emitter is shown in Table 1.

[0064] Table 1

[0065]

[0066] Specifically, in Table 1, Lifetime represents carrier lifetime, Jo represents dark current density, Voc represents fill factor, FF represents, and Res represents resistivity.

[0067] In order to enable those skilled in the art to more clearly understand the technical solution of the present application, the implementation process of the method for preparing the TOPCon battery of the present application will be described in detail below in conjunction with specific embodiments.

[0068] This embodiment relates to a specific method for preparing a TOPCon battery, comprising the following steps:

[0069] Step S1: providing a prepared silicon substrate, and cleaning the prepared silicon substrate with an alkaline solution to obtain a silicon substrate;

[0070] Step S2: using a tubular LPCVD device to sequentially introduce oxygen and silane at 500° C. to 800° C. to form a first tunneling oxide layer and an intrinsic amorphous silicon layer;

[0071] Step S3: using a tubular annealing furnace to introduce nitrogen at a temperature of 900° C. to 1050° C. to perform annealing to form an intrinsic polysilicon layer;

[0072] Step S4: doping a boron source into the intrinsic polysilicon layer at 700° C. to 900° C. in a tubular boron diffusion furnace to obtain a preliminary doped conductive layer and a preliminary BSG layer, wherein the preliminary BSG layer is located on a surface of the preliminary doped conductive layer away from the silicon substrate, and in the preliminary doped conductive layer, the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration;

[0073] Step S5: laser processing the preliminary doped conductive layer and the preliminary BSG layer, wherein the preliminary doped conductive layer after the laser processing constitutes a first doped conductive layer, and the preliminary BSG layer after the laser processing constitutes a BSG layer, wherein the doping concentration of the first doped conductive layer is greater than the doping concentration of the preliminary doped conductive layer, and the doping concentration of the BSG layer is less than the doping concentration of the preliminary BSG layer;

[0074] Step S6: removing the BSG layer.

[0075] The embodiment of the present application further provides a TOPCon battery, which is prepared by any of the above-mentioned TOPCon battery preparation methods, and comprises: a silicon substrate; a first tunneling oxide layer, which is located on the surface of the silicon substrate; a first doped conductive layer, which is located on the surface of the first tunneling oxide layer away from the silicon substrate, wherein the doping atoms of the first doped conductive layer include boron, and the doping concentration of the first doped conductive layer is 5E20cm -3 ~1E21cm -3 .

[0076] According to the above embodiment, the TOPCon cell includes a stacked silicon substrate, a first tunneling oxide layer and a first doped conductive layer, wherein the doping atoms of the first doped conductive layer include boron, and the doping concentration of the first doped conductive layer is 5E20cm -3 ~1E21cm -3 Compared with the prior art TOPCon cells in which the boron doping concentration in the front emitter is low, resulting in serious recombination of photogenerated carriers in the metal contact area, the doping concentration of the first doped conductive layer in the present application is 5E20cm -3 ~1E21cm -3 , which ensures that the boron doping concentration in the first doped conductive layer is high. High-concentration boron doping can form a more effective hole-selective transmission interface, reduce the recombination current in the front metal contact area, and improve battery efficiency.

[0077] In an optional embodiment, the silicon substrate includes a first surface and a second surface relative to each other, the first tunneling oxide layer is located on the first surface, and the TOPCon cell further includes: a second tunneling oxide layer, located on the second surface; a second doped conductive layer, located on the surface of the second tunneling oxide layer away from the silicon substrate, the doping type of the second doped conductive layer is different from the doping type of the first doped conductive layer; and a first anti-reflection layer, located on the surface of the second doped conductive layer away from the silicon substrate.

[0078] In other embodiments, the TOPCon cell further includes: a passivation layer located on the surface of the first doped conductive layer away from the silicon substrate; a second anti-reflection layer located on the surface of the passivation layer away from the silicon substrate; a plurality of first electrodes spaced apart in a predetermined direction, located on a portion of the surface of the second anti-reflection layer away from the silicon substrate, the predetermined direction being a direction perpendicular to the thickness of the silicon substrate; a plurality of second electrodes spaced apart in the predetermined direction, located on a portion of the surface of the first anti-reflection layer away from the silicon substrate.

[0079] The embodiments of the present application also provide a photovoltaic module, including a TOPCon cell prepared by any of the above-mentioned TOPCon cell preparation methods, or the above-mentioned TOPCon cell.

[0080] In the above embodiment, the photovoltaic module includes a TOPCon cell prepared by a TOPCon cell preparation method, or a TOPCon cell, wherein in the TOPCon cell preparation method, a stacked first tunneling oxide layer and an intrinsic amorphous silicon layer are first formed on a silicon substrate, and then the intrinsic amorphous silicon layer is crystallized to obtain an intrinsic polycrystalline silicon layer, and then a boron source is doped into the intrinsic polycrystalline silicon layer to obtain a preliminary doped conductive layer and a preliminary BSG layer, and then the preliminary doped conductive layer and the preliminary BSG layer are laser treated to obtain a first doped conductive layer and a BSG layer, and finally the BSG layer is removed, wherein, in the preliminary doped conductive layer, the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration is, the doping concentration of the first doped conductive layer is greater than the doping concentration of the preliminary doped conductive layer, and the doping concentration of the BSG layer is less than the doping concentration of the preliminary BSG layer. Compared with the problem in the prior art that the boron doping concentration in the front emitter of the TOPCon battery is low, resulting in serious recombination of photogenerated carriers in the metal contact area, the present application first forms a first tunneling oxide layer and an intrinsic amorphous silicon layer on a silicon substrate, and crystallizes the intrinsic amorphous silicon layer to obtain an intrinsic polycrystalline silicon layer, and then dopes a boron source into the intrinsic polycrystalline silicon layer to form a high surface concentration, low-activated preliminary doped conductive layer and a preliminary BSG layer (the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration), reducing the phenomenon of boron diffusion into the first tunneling oxide layer, which significantly reduces the thermal diffusion power of boron atoms, thereby reducing the phenomenon of boron internal diffusion; the preliminary doped conductive layer and the preliminary BSG layer are laser treated, and since the laser heating is instantaneous and local, the boron atoms can be quickly activated to a high concentration state without causing extensive diffusion of boron, thereby ensuring that the doping concentration of boron in the first doped conductive layer is high, and the high concentration of boron doping can form a more effective hole selective transmission interface, reduce the recombination current in the front metal contact area, and improve the battery efficiency.

[0081] From the above description, it can be seen that the above embodiments of the present application achieve the following technical effects:

[0082] In the preparation method of the TOPCon battery of the present application, a first stacked tunneling oxide layer and an intrinsic amorphous silicon layer are first formed on a silicon substrate, and then the intrinsic amorphous silicon layer is crystallized to obtain an intrinsic polycrystalline silicon layer, and then a boron source is doped into the intrinsic polycrystalline silicon layer to obtain a preliminary doped conductive layer and a preliminary BSG layer, and then the preliminary doped conductive layer and the preliminary BSG layer are laser treated to obtain a first doped conductive layer and a BSG layer, and finally the BSG layer is removed, wherein, in the preliminary doped conductive layer, the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration is, the doping concentration of the first doped conductive layer is greater than the doping concentration of the preliminary doped conductive layer, and the doping concentration of the BSG layer is less than the doping concentration of the preliminary BSG layer. Compared with the problem in the prior art that the boron doping concentration in the front emitter of the TOPCon battery is low, resulting in serious recombination of photogenerated carriers in the metal contact area, the present application first forms a first tunneling oxide layer and an intrinsic amorphous silicon layer on a silicon substrate, and crystallizes the intrinsic amorphous silicon layer to obtain an intrinsic polycrystalline silicon layer, and then dopes a boron source into the intrinsic polycrystalline silicon layer to form a high surface concentration, low-activated preliminary doped conductive layer and a preliminary BSG layer (the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration), reducing the phenomenon of boron diffusion into the first tunneling oxide layer, which significantly reduces the thermal diffusion power of boron atoms, thereby reducing the phenomenon of boron internal diffusion; the preliminary doped conductive layer and the preliminary BSG layer are laser treated, and since the laser heating is instantaneous and local, the boron atoms can be quickly activated to a high concentration state without causing extensive diffusion of boron, thereby ensuring that the doping concentration of boron in the first doped conductive layer is high, and the high concentration of boron doping can form a more effective hole selective transmission interface, reduce the recombination current in the front metal contact area, and improve the battery efficiency.

[0083] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A method for preparing a TOPCon battery, characterized in that: include: providing a silicon substrate; forming a stacked first tunneling oxide layer and an intrinsic amorphous silicon layer on the surface of the silicon substrate; Performing a crystallization process on the intrinsic amorphous silicon layer to crystallize the intrinsic amorphous silicon layer to obtain an intrinsic polycrystalline silicon layer; doping a boron source into the intrinsic polysilicon layer, wherein the intrinsic polysilicon layer doped with the boron source constitutes a preliminary doped conductive layer and a preliminary BSG layer, wherein the preliminary BSG layer is located on a surface of the preliminary doped conductive layer away from the silicon substrate, and in the preliminary doped conductive layer, the closer the preliminary doped conductive layer is to the silicon substrate, the lower the boron doping concentration is; Performing laser treatment on the preliminary doped conductive layer and the preliminary BSG layer, wherein the preliminary doped conductive layer after the laser treatment constitutes a first doped conductive layer, and the preliminary BSG layer after the laser treatment constitutes a BSG layer, wherein the doping concentration of the first doped conductive layer is greater than the doping concentration of the preliminary doped conductive layer, and the doping concentration of the BSG layer is less than the doping concentration of the preliminary BSG layer; The BSG layer is removed.

2. The method for preparing a TOPCon battery according to claim 1, characterized in that: Adding a boron source into the intrinsic polysilicon layer comprises: The boron source is doped into the intrinsic polysilicon layer in a temperature range of 700° C. to 900° C. by using a tubular diffusion furnace.

3. The method for preparing a TOPCon battery according to claim 1, characterized in that: The intrinsic amorphous silicon layer is subjected to a crystallization process, comprising: The intrinsic amorphous silicon layer is annealed within a temperature range of 900° C. to 1050° C.

4. The method for preparing a TOPCon battery according to claim 1, characterized in that: The preliminary doped conductive layer and the preliminary BSG layer are subjected to laser treatment, comprising: The preliminary doped conductive layer and the preliminary BSG layer are laser scanned, wherein the laser light source comprises an infrared nanosecond laser, the laser power is 100W to 300W, the laser scanning frequency is 300HZ to 1500HZ, and the scanning speed is 15000mm / s to 30000mm / s.

5. The method for preparing a TOPCon battery according to claim 1, characterized in that: A first tunneling oxide layer and an intrinsic amorphous silicon layer are formed on the surface of the silicon substrate, comprising: By using a tubular LPCVD device, oxygen and silane are introduced successively at a temperature of 500° C. to 800° C. to obtain the first tunneling oxide layer and the intrinsic amorphous silicon layer.

6. The method for preparing a TOPCon battery according to claim 1, characterized in that: The silicon substrate comprises a first surface and a second surface opposite to each other. Forming a stacked first tunneling oxide layer and an intrinsic amorphous silicon layer on the surface of the silicon substrate, comprising: forming the first tunneling oxide layer and the intrinsic amorphous silicon layer on the first surface, The method also includes: forming a second tunneling oxide layer on the second surface; forming a second doped conductive layer on a surface of the second tunneling oxide layer away from the silicon substrate, wherein the doping type of the second doped conductive layer is different from the doping type of the first doped conductive layer; and forming a first anti-reflection layer on a surface of the second doped conductive layer away from the silicon substrate.

7. The method for preparing a TOPCon battery according to claim 1, characterized in that: After removing the BSG layer, the method further comprises: A passivation layer is formed on a surface of the first doped conductive layer away from the silicon substrate; and a second anti-reflection layer is formed on a surface of the passivation layer away from the silicon substrate.

8. A TOPCon battery, characterized in that: The TOPCon battery is prepared by the preparation method of the TOPCon battery according to any one of claims 1 to 7, and the TOPCon battery comprises: Silicon substrate; A first tunneling oxide layer, located on the surface of the silicon substrate; A first doped conductive layer is located on a surface of the first tunneling oxide layer away from the silicon substrate, wherein the doping atoms of the first doped conductive layer include boron, and the doping concentration of the first doped conductive layer is 5E20cm -3 ~1E21cm -3 .

9. The TOPCon battery according to claim 8, characterized in that The silicon substrate comprises a first surface and a second surface opposite to each other, the first tunneling oxide layer is located on the first surface, and the TOPCon cell further comprises: a second tunneling oxide layer, located on the second surface; a second doped conductive layer, located on a surface of the second tunneling oxide layer away from the silicon substrate, wherein the doping type of the second doped conductive layer is different from the doping type of the first doped conductive layer; The first anti-reflection layer is located on a surface of the second doped conductive layer away from the silicon substrate.

10. A photovoltaic module, characterized in that: It comprises a TOPCon battery prepared by the preparation method of a TOPCon battery according to any one of claims 1 to 7, or a TOPCon battery according to claim 8 or 9.

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