Control method adaptive to different valve opening degrees of steam regulating valve and circuit thereof
By designing a control circuit that is suitable for different valve openings of steam regulating valves, using reference signals, grading and asynchronous pulse signals, the problem of uneven valve flow in the pipeline system is solved, and the synchronization and precise control of flow is achieved.
Patent Information
- Application Number
- CN202510414784.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-03
- Publication Date
- 2025-05-02
- Estimated Expiration
- 2045-04-03
AI Technical Summary
In pipeline systems, due to uneven flow problems of valves of different models or manufacturers, some pipelines may be overloaded or insufficient, affecting the system operation efficiency and aggravating pipeline wear.
A control circuit adapted to the opening of different valves of steam regulating valves is designed, including a control unit and a processing unit. By setting a reference signal, grading valve opening, generating asynchronous pulse signals and feeding them back to the servo motor, flow synchronization is achieved.
This method can maintain consistent flow when the valve is controlled by different flow rate, prevent overload and insufficient flow rate, and is suitable for most types of valves on the market, with high control accuracy and flow errors controlled within the motor step angle error range corresponding to one pulse.
Smart Images

Figure CN119914741A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the field of automatic control technology, and in particular to a control method and a circuit thereof for adapting different valve openings of a steam regulating valve. Background Art
[0002] In the pipeline system, due to the limitation of valve service life and the iteration and update of products, when they are damaged and replaced, there are errors in products of different models or manufacturers, and the flow rate cannot be guaranteed to be consistent with other valves under the same control, which will lead to uneven distribution of pipeline flow. Some pipelines may be overloaded due to excessive flow, or unable to meet the use requirements due to insufficient flow. In the long run, it will not only affect the operating efficiency of the system, but also aggravate pipeline wear. In addition, the problem faced in actual use is that for valve models that have been put into use, it is often difficult to purchase products with the same specifications as before in the market after iteration, and only similar products can be selected as substitutes. This alternative may further aggravate the problem of uneven flow. Summary of the invention
[0003] In view of the above technical problems, the purpose of the present invention is to provide a control circuit adapted to different valve openings of a steam regulating valve, including a control unit and a processing unit. The control unit includes a plurality of resistors, a plurality of operational amplifiers, a digital potentiometer, a trigger, a counter, and an inverter. One end of the resistor R15 among the plurality of resistors is connected to the CS pin and the 1_1 end of the digital potentiometer U8, and 1_1 inputs a low-level signal during valve control; the U / D pin of the digital potentiometer U8 is connected to one end of the resistor R12 and the output pin of the inverter U7, the A1 pin is connected to the power supply, the W1 pin, the B1 pin, one end of the resistor R13, the reverse end of the operational amplifier U11, and the in-phase end of the operational amplifier U10 are connected; the inverting end of the operational amplifier U10 is connected to the reference voltage and the 2_1 end; the in-phase end of the operational amplifier U11 is connected to the reference voltage The output terminals of the operational amplifier U10 and the operational amplifier U11 are connected to the 1CLK pin of the trigger U9 and the CP pin of the counter U5; the 1D pin of the trigger U9 is connected to the 1Q inverting pin, and the 1Q pin is connected to the input pin of the inverter U7; the CE pin of the counter U5 is connected to one end of the resistor R5, the MR pin is connected to one end of the resistor R6 and the 1_2 end, the output end is except the 0 pin, and the 1 to 9 pins correspond to the output 4_1_1 to 4_1_N ends respectively, and 1_2 inputs the signal during reset; the other ends of the resistors R15, R12, R13, R6, and R5 are connected to the ground; the 2_1 end, the 2_2 end, the 2_3 end, and the 4_1_1 to 4_1_N ends are fed back to the processing unit to obtain the asynchronous pulse signal.
[0004] Preferably, the processing unit includes a processor, and terminals 2_1, 2_2, 2_3, and 4_1_1 to 4_1_N are fed back to the processor. When the odd-numbered pin at the output end of the counter U5 feeds back a signal, the processor obtains the positive voltage difference between terminals 2_3 and 2_2, and the even-numbered pin obtains the positive voltage difference between terminals 2_1 and 2_3. Based on the pin at the output end of the counter U5, a conversion signal is generated and fed back to the voltage-controlled oscillator to output an asynchronous pulse signal to the servo motor.
[0005] Preferably, the processing unit includes a plurality of resistors, a gate, an op amp, and the AX pin of the gate U1 is connected to the 2_1 end, the BX pin is connected to the 2_2 end, the BY pin is connected to the AX pin and the 2_3 end, the AX / AY pin is connected to one end of the resistor R1, the BX / BY pin is connected to one end of the resistor R2, the A pin, the B pin are connected to the input pin of the inverter U7; the in-phase end of the op amp U2 is connected to the other end of the resistor R1 and one end of the resistor R4, the inverting end of the op amp U2 is connected to the other end of the resistor R2 and one end of the resistor R3, the output end of the op amp U2 is connected to one end of the resistor R3 and the 3_1 end; the other end of the resistor R4 is connected to the ground end.
[0006] Preferably, the processing unit further includes an inverter, a multi-way trigger, and several transfer modules. The several transfer modules include several diodes and several resistors. The cathode of D1 in the several diodes is connected to the cathode of D2 and one end of the resistor R19, one end of the resistor R11 is connected to one end of the resistor R18 and the resistor R17, and the other end of the resistor R18 and the resistor R19 is connected to the ground end; the anode of D1 in each transfer module is respectively connected to the 4_1_1 to 4_1_N ends corresponding to the output ends 1 to 9 pins of the counter U5, the anode of D2 is connected to the other end of the resistor R11 and the 4_3_1 to 4_3_N ends corresponding to the output ends 1Q to 8Q of the multi-way trigger U4, the cathode of D2 is connected to the 4_2_1 to 4_2_N ends corresponding to the input ends 1D to 8D of the multi-way trigger U4, and the other end of the resistor R17 is connected to the corresponding 5_1_1 to 5_1_N ends; the input end of the inverter U3 in the inverter is connected to the 1_2 end, and the output end is connected to the CLR pin of the multi-way trigger U4.
[0007] Preferably, the processing unit also includes a plurality of resistors and operational amplifiers, wherein the in-phase end of the operational amplifier U6 is connected to the ends 5_1_1 to 5_1_N, and the inverting end is connected to one end of the resistor R7 and the resistor R8; the other end of the resistor R7 is connected to the output end of the operational amplifier U6 and the end 6_1, and the other end of the resistor R8 is connected to the ground end; the end 6_1 is connected to the voltage-controlled oscillator of the servo motor control system.
[0008] Preferably, the control unit also includes a plurality of resistors, among which one end of resistor R10 is connected to the A1 pin of the digital potentiometer U8, and the other end is connected to one end of resistor R14 and the inverting end of the operational amplifier U10; one end of resistor R9 is connected to the power supply, and the other end is connected to one end of resistor R16 and the inverting end of the operational amplifier U11; the other ends of resistor R16 and resistor R14 are connected to the ground.
[0009] Preferably, the resistor R11 and the resistor R18 are adjustable resistors.
[0010] Preferably, a control method for adapting different valve openings of a steam regulating valve is provided, characterized in that it comprises the following steps: S1. Set a reference signal as a reference signal for different valve classifications; S2 classifies the flow rates corresponding to different valve openings; S3. Generate asynchronous pulse signals according to different levels of valves; S4. Feedback the signal to the servo motor corresponding to the valve to complete flow synchronization.
[0011] Compared with the existing technology, the present invention can always maintain a consistent flow rate when controlling valves with different flow rates, preventing overload and insufficient flow, and can be adapted to most types of valves on the market. The control accuracy is high, and the final flow error can be controlled within the motor step angle error range corresponding to one pulse. BRIEF DESCRIPTION OF THE DRAWINGS
[0012] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the prior art and the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0013] Figure 1 This is a schematic diagram of the overall structural signal feedback provided by the present invention.
[0014] Figure 2 This is a schematic diagram of the overall structure of the control unit and the processing unit provided by the present invention.
[0015] Figure 3 This is a schematic diagram of the input structure of the transfer module in the processing unit provided by the present invention.
[0016] Figure 4 This is a schematic diagram of the output structure of the transfer module in the processing unit provided by the present invention.
[0017] Figure 5 This is a schematic diagram of the processing unit structure provided by the present invention. DETAILED DESCRIPTION
[0018] In order to make the objects and advantages of the present invention more clearly understood, the present invention is specifically described below in conjunction with embodiments. It should be understood that the following text is only used to describe one or several specific implementations of the present invention, and does not strictly limit the scope of protection specifically requested by the present invention.
[0019] See also Figure 1 and Figure 2 The present invention discloses a control circuit adapted to different valve openings of a steam regulating valve, including a control unit and a processing unit. The control unit includes a plurality of resistors, a plurality of operational amplifiers, a digital potentiometer, a trigger, a counter, and an inverter. One end of a resistor R15 among the plurality of resistors is connected to a CS pin and a 1_1 end of a digital potentiometer U8, and 1_1 inputs a low-level signal during valve control; a U / D pin of the digital potentiometer U8 is connected to one end of a resistor R12 and an output pin of an inverter U7, an A1 pin is connected to a power supply, a W1 pin, a B1 pin, one end of a resistor R13, an inverting end of an operational amplifier U11, and a non-inverting end of an operational amplifier U10 are connected; an inverting end of the operational amplifier U10 is connected to a reference voltage and a 2_1 end; and a non-inverting end of the operational amplifier U11 is connected to a reference voltage and a 2_2 end. Connection; the output ends of the operational amplifier U10 and the operational amplifier U11 are connected to the 1CLK pin of the trigger U9 and the CP pin of the counter U5; the 1D pin of the trigger U9 is connected to the 1Q inverse pin, and the 1Q pin is connected to the input pin of the inverter U7; the CE pin of the counter U5 is connected to one end of the resistor R5, the MR pin is connected to one end of the resistor R6 and the 1_2 end, the output end is except the 0 pin, and the 1 to 9 pins correspond to the output 4_1_1 to 4_1_N ends respectively, and 1_2 inputs the signal during reset; the other ends of the resistors R15, R12, R13, R6, and R5 are connected to the ground end; the 2_1 end, the 2_2 end, the 2_3 end, and the 4_1_1 to 4_1_N ends are fed back to the processing unit to obtain asynchronous pulse signals; In order to adapt to the common valve types on the market, we choose the valve with a lower flow rate as the reference benchmark, so that the flow rate of valves with different flow rates can always be synchronized when they are opened, because the flow rate corresponding to the same opening range of different valves is different. To solve this problem, a reference signal is first set, and the flow rate corresponding to the opening of different valves is graded. According to the valves of different levels, asynchronous pulse signals are generated and fed back to the servo motors corresponding to each valve to achieve flow synchronization. The specific control method is to feedback a low-level signal to 1_1 to start the digital potentiometer U8 when the valve is selected and opened. The U / D pin of the digital potentiometer U8 defaults to a high-resistance to low-resistance state in the initial state. With the CLK signal input, the voltage of the connection end of the B1 pin of the digital potentiometer U8 and the resistor R13 is pulled up and fed back to the in-phase end of the op amp U10 and the inverting end of the op amp U11 for detection. The inverting end of the op amp U10 sets the reference voltage. In the attached figure, it is assumed that the digital potentiometer U8 uses the attached model and the resistance is 10KΩ, the number of taps is 1024, and the output range is 5V, then the resistor R The selection rule of resistor R10 and resistor R14 is the downward rounded value of the tap number of 1024-1 and the voltage of the voltage dividing point of resistor R13. The selection rule of resistor R9 and resistor R16 is the upward rounded value of the tap number of 1024-1023 and the voltage of the voltage dividing point of resistor R13. Assuming that the digital potentiometer is based on the U8 model and the power supply is 5V, the resistance values of resistor R10, resistor R14, resistor R9, and resistor R16 are selected as 300Ω, 4.7KΩ, 2.3KΩ, and 2.7KΩ respectively (for example only, the rest of the span can be set by yourself, and the resistors can be connected in series when they are non-standard. ), its voltage span is 2V first order, and the accuracy is 1024. The purpose of the order setting is to make the control accuracy of valves with different opening ranges consistent when they are asynchronously converted into pulses, so that the error of the final opening flow rate is reduced to the error of the step angle of one pulse. When the B1 pin of the digital potentiometer U8 and the voltage of the resistor R13 end are pulled up to the reference voltage of the operational amplifier U10, the operational amplifier U10 outputs a signal to the 1CLK pin of the trigger U9. When the trigger U9 is in the initial state, the 1Q pin outputs (pin 5 and pin 6 are the 1Q inverted pins). After 1CLK receives the signal, the 1Q inverted pin outputs, and the 1Q inverted pin outputs. The foot pulls down feedback signal to the inverter U7, and the inverter U7 inverts and outputs the signal to the U / D pin of the digital potentiometer U8. The digital potentiometer U8 is changed from low resistance to high resistance until the op amp U11 outputs and converts again. At the same time, the 1CLK signal of the trigger U9 is fed back to the CP pin of the counter U5, and the 0 to 9 pins of the counter U5 are polled and output. The 1-9 pins of the counter U5 correspond to the 4_1_1 to 4_1_N connection terminals respectively. In this embodiment, 2_1 to 2_3 and 4_1_1 to 4_1_N are all fed back to the upper processor (not shown in the figure) See also Figure 2Specifically, the processing unit includes a processor, and the 2_1 terminal, the 2_2 terminal, the 2_3 terminal, and the 4_1_1 to 4_1_N terminals are fed back to the processor. When the odd-numbered pins at the output end of the counter U5 feed back a signal, the processor obtains the positive voltage difference between the 2_3 terminal and the 2_2 terminal, and the even-numbered pins obtain the positive voltage difference between the 2_1 terminal and the 2_3 terminal, and generates a conversion signal based on the pin at the output end of the counter U5 and feeds it back to the voltage-controlled oscillator to output an asynchronous pulse signal to the servo motor; The logic of the processor is that when any of the odd-numbered pins 1, 3, 5, 7, and 9 of the counter U5 is input, the voltage at terminal 2_3 is subtracted from the voltage at terminal 2_2, and for the even-numbered pins, the voltage at terminal 2_1 is subtracted from the voltage at terminal 2_3. This voltage is the voltage parameter value corresponding to the current order. The above example is 2V. Assuming it is 3rd order, it corresponds to 3*2+the voltage parameter value corresponding to the current order. This parameter is the final conversion parameter. After completing the flow conversion of each valve in the above manner, the corresponding signal will be fed back to the processor. The processor will use any one as the valve reference voltage signal, and during control, it will proportionally amplify the order voltage signals of other corresponding valve openings and feed them back to the servo motor, or directly feed the converted voltage signal back to the voltage-controlled oscillator (or external) in the servo motor control system to output asynchronous pulses to the servo motor to complete flow synchronization control.
[0020] See also Figure 2 Specifically, the processing unit includes a plurality of resistors, a gate, an op amp, and the gate has the AX pin of the gate U1 connected to the 2_1 end, the BX pin connected to the 2_2 end, the BY pin connected to the AX pin and the 2_3 end, the AX / AY pin connected to one end of the resistor R1, the BX / BY pin connected to one end of the resistor R2, the A pin, the B pin and the input pin of the inverter U7 connected; the in-phase end of the op amp U2 connected to the other end of the resistor R1 and one end of the resistor R4, the inverting end of the op amp U2 connected to the other end of the resistor R2 and one end of the resistor R3, the output end of the op amp U2 connected to one end of the resistor R3 and the 3_1 end; the other end of the resistor R4 connected to the ground; See also Figure 2In one embodiment, a more preferred control method is provided based on the above scheme. Compared with the above method that requires secondary embedding and development, the logic is simpler, and it can partially or completely replace the development process. It can also be used as an independent controller after packaging. In this embodiment, the 2_1 to 2_3 signals are connected to the selector U1, and the A and B pins of the selector U1 are connected to the 1Q pin of the trigger U9. When the trigger U9 outputs, the selector U1 corresponds the output of AX / AY and BX / BY to AX or AY and BX or BY. Then the AX / AY pin is fed back to the in-phase terminal of the operational amplifier U2 through the resistor R1 and the resistor R4 loop. After BX / BY is input to the inverting terminal of the operational amplifier U2 through the resistor R2, the output terminal is output to the inverting terminal of the operational amplifier U2 through the resistor R3 to form negative feedback. When the output pin of the counter U5 is an odd pin, the A and B pins of the selector U1 are pulled down, and the AX / AY output signal is AX , the BX / BY output signal is BX, and the digital potentiometer U8 inverts the signal output by the trigger U9 and inputs it to the U / D pin of the digital potentiometer U8. When 1_1 is cut off, the voltage of 3_1 will correspond to the difference between the voltage at the 2_3 terminal and the voltage at the 2_2 terminal; when the output pin of the counter U5 is an even number, the A and B pins of the selector U1 are pulled up, the AX / AY output signal is AY, and the BX / BY output signal is BY. At the same time, the digital potentiometer U8 inverts the signal output by the trigger U9 and inputs it to the U / D pin of the digital potentiometer U8. When 1_1 is cut off, the voltage of 3_1 will correspond to the difference between the voltage at the 2_1 terminal and the voltage at the 2_3 terminal.
[0021] See also Figure 3 and Figure 4 Specifically, the processing unit also includes an inverter, a multi-way trigger, and several transfer modules. The several transfer modules include several diodes and several resistors. The cathode of D1 in the several diodes is connected to the cathode of D2 and one end of the resistor R19, one end of the resistor R11 is connected to one end of the resistor R18 and the resistor R17, and the other end of the resistor R18 and the resistor R19 is connected to the ground end; the anode of D1 in each transfer module is respectively connected to the 4_1_1 to 4_1_N ends corresponding to the output pins 1 to 9 of the counter U5, the anode of D2 is connected to the other end of the resistor R11 and the 4_3_1 to 4_3_N ends corresponding to the output pins 1Q to 8Q of the multi-way trigger U4, the cathode of D2 is connected to the 4_2_1 to 4_2_N ends corresponding to the input pins 1D to 8D of the multi-way trigger U4, and the other end of the resistor R17 is connected to the corresponding 5_1_1 to 5_1_N ends; the input end of the inverter U3 in the inverter is connected to the 1_2 end, and the output end is connected to the CLR pin of the multi-way trigger U4; The replacement of the order feeds back the output pins of the counter U5 except the pin 0 to the corresponding D1, and adds a multi-way trigger U4 to compensate for the output polling method of the counter U5. The voltage at the connection end of D1 and D2 is pulled up by the resistor R19 and input to the 1D to 8D input ends of the multi-way trigger U4 by 4_2_1. When the output pins 0 to 9 of the counter U5 are output in sequence, the output pins 1Q to 8Q of the multi-way trigger U4 are input to D2 in sequence through 4_3_1 to 4_3_N and then fed back to the input pins of the multi-way trigger U4, so that the CLK signal of the multi-way trigger U4 can be input without being set.
[0022] See also Figure 5 Specifically, the processing unit also includes a number of resistors and operational amplifiers. The in-phase end of the operational amplifier U6 is connected to the ends 5_1_1 to 5_1_N, and the inverting end is connected to one end of the resistor R7 and the resistor R8; the other end of the resistor R7 is connected to the output end of the operational amplifier U6 and the end 6_1, and the other end of the resistor R8 is connected to the ground end; the end 6_1 is connected to the voltage-controlled oscillator of the servo motor control system; The final conversion parameters are obtained by feeding back 4_3_1 to 4_3_N to the corresponding resistor R11. The resistor R11 and the resistor R18 are used to convert the fixed parameter voltage output by the multi-way trigger U4 into a corresponding first-order voltage. The resistor R17 is used for impedance matching and is input to the same-phase terminal of the operational amplifier U6. The resistor R17 can also be replaced by an isolation circuit and input to the same-phase terminal of the operational amplifier U6. At the same time, 3_1 is also fed back to the same-phase terminal of the operational amplifier U6. The operational amplifier U6 outputs 6_1 after superposition to complete the output of the final conversion parameters. The signal is fed back to the voltage-controlled oscillator to directly output asynchronous pulses to control the servo motor (the voltage-controlled oscillator is not shown in the figure). 1_2 is used to reset the counter U5 and the multi-way trigger U4.
[0023] See also Figure 2 Specifically, the control unit also includes a plurality of resistors, among which one end of the resistor R10 is connected to the A1 pin of the digital potentiometer U8, and the other end is connected to one end of the resistor R14 and the inverting end of the operational amplifier U10; one end of the resistor R9 is connected to the power supply, and the other end is connected to one end of the resistor R16 and the inverting end of the operational amplifier U11; the other ends of the resistor R16 and the resistor R14 are connected to the ground; The voltage signals fed back by the resistors R10, R14, R9 and R16 can also be directly input into corresponding voltages through the host processor.
[0024] See also Figure 4 Specifically, the resistor R11 and the resistor R18 are adjustable resistors.
[0025] Specifically, a control method for adapting different valve openings of a steam regulating valve is also provided, which is characterized by comprising the following steps: S1. Set a reference signal as a reference signal for different valve classifications; S2 classifies the flow rates corresponding to different valve openings; S3. Generate asynchronous pulse signals according to different levels of valves; S4. Feedback the signal to the servo motor corresponding to the valve to complete flow synchronization.
[0026] See also Figure 1 and Figure 2In order to adapt to the common valve types on the market, we choose the valve with a lower flow rate as the reference benchmark. The purpose is to keep the flow rate of valves with different flow rates synchronized when they are opened. Because the flow rates corresponding to the same opening range of different valves are different, to solve this problem, first set a reference signal, and classify the flow rates corresponding to different valve openings. Then, according to the valves of different levels, generate asynchronous pulse signals and feedback them to the servo motors corresponding to each valve to achieve flow synchronization. The specific control method is to feedback a low-level signal to 1_1 to start the digital potentiometer U8 when the valve is selected and opened. The U / D pin of the digital potentiometer U8 defaults to a high-resistance to low-resistance state in the initial state. With the CLK signal input, the voltage of the connection end of the B1 pin of the digital potentiometer U8 and the resistor R13 is pulled up and fed back to the same-phase end of the op amp U10 and the inverting end of the op amp U11 for detection. The inverting end of the op amp U10 sets the reference voltage. In the attached figure, it is assumed that the digital potentiometer U8 uses the attached signal, and its resistance is 20KΩ, and the number of taps is 1024, the output range is 5V, then the selection rule of resistor R10 and resistor R14 is 1024-1 tap number and the voltage of resistor R13 dividing point rounded down, the selection rule of resistor R9 and resistor R16 is 1024-1023 tap number and the voltage of resistor R13 dividing point rounded up, assuming that it is based on the digital potentiometer U8 model and the power supply is 5V, then the resistance values of resistor R10, resistor R14, resistor R9, and resistor R16 are selected as 300Ω, 4.7KΩ, 2.3KΩ, 2.7KΩ (for example only, other spans can be set by yourself, and the resistors can be connected in series when they are non-standard). Its voltage span is 2V first order, and the accuracy is 1024. The purpose of setting the order is to make the control accuracy of valves with different opening ranges consistent when they are asynchronously converted into pulses, so that the error of the final opening flow is reduced to the error of the step angle of one pulse. When the voltage of the B1 pin of the digital potentiometer U8 and the resistor R13 end is pulled up to the reference voltage of the op amp U10, the op amp U10 outputs a signal to the 1CLK pin of the trigger U9. Pin, when the trigger U9 is in the initial state, the 1Q pin outputs (pin 5 and pin 6 are the 1Q inverted pins), and the 1Q inverted pin outputs after the 1CLK receives the signal. The 1Q pin pulls down the feedback signal to the inverter U7, and the inverter U7 inverts and outputs the signal to the U / D pin of the digital potentiometer U8. The digital potentiometer U8 is changed from low resistance to high resistance until the op amp U11 outputs and converts again. At the same time, the 1CLK signal of the trigger U9 is fed back to the CP pin of the counter U5, and the 0 to 9 pins of the counter U5 are polled and output. , pins 1-9 of counter U5 correspond to connection terminals 4_1_1 to 4_1_N respectively. In this embodiment, pins 2_1 to 2_3 and pins 4_1_1 to 4_1_N are all fed back to the upper processor (not shown in the figure). The logic of the processor is that when any of the odd pins 1, 3, 5, 7, and 9 of counter U5 is input, the voltage at terminal 2_3 is reduced by the voltage at terminal 2_2, and the voltage at terminal 2_1 is reduced by the voltage at terminal 2_3 for even pins. This voltage is the voltage parameter value corresponding to the current order. The above example is 2V. Assuming it is 3 orders, it corresponds to 3*2+the voltage parameter value corresponding to the current order. This parameter is the final conversion parameter. After the flow conversion of each valve is completed in the above manner, the corresponding signal is fed back to the processor. The processor uses any one as the valve reference voltage signal, and proportionally amplifies the order voltage signals of other corresponding valve openings during control and then feeds them back to the servo motor, or directly feeds back the converted voltage signal to the voltage-controlled oscillator (or external) in the servo motor control system to output asynchronous pulses to the servo motor to complete flow synchronization control. .
[0027] See also Figure 3 , Figure 4 and Figure 5In one embodiment, a more preferred control method is provided based on the above scheme. Compared with the above method which requires secondary embedding and development, the logic is simpler and can partially or completely replace the secondary embedding process. When it is put into use in a system, the control system of the servo motor can complete the above process after feeding back the valve opening control signal to replace the original motor control signal. It can also be used as an independent controller after packaging.In this embodiment, the 2_1 to 2_3 signals are connected to the selector U1, and the A and B pins of the selector U1 are connected to the 1Q pin of the trigger U9. When the trigger U9 outputs, the selector U1 corresponds the outputs of AX / AY and BX / BY to AX or AY and BX or BY. Then, the AX / AY pin is fed back to the in-phase terminal of the operational amplifier U2 through the resistor R1 and the resistor R4 loop. After BX / BY is input to the inverting terminal of the operational amplifier U2 through the resistor R2, the output terminal is output to the inverting terminal of the operational amplifier U2 through the resistor R3 to form a negative feedback. When the output pin of the counter U5 is an odd pin, the A and B pins of the selector U1 are pulled down, and the AX / AY output signal is AX, and the BX / BY output signal is BX At the same time, the digital potentiometer U8 inverts the signal output by the trigger U9 and inputs it to the U / D pin of the digital potentiometer U8. When 1_1 is cut off, the voltage of 3_1 will correspond to the difference between the voltage at the 2_3 terminal and the voltage at the 2_2 terminal. When the output pin of the counter U5 is an even number, the A and B pins of the selector U1 are pulled up, the AX / AY output signal is AY, and the BX / BY output signal is BY. At the same time, the digital potentiometer U8 inverts the signal output by the trigger U9 and inputs it to the U / D pin of the digital potentiometer U8. When 1_1 is cut off, the voltage of 3_1 will correspond to the difference between the voltage at the 2_1 terminal and the voltage at the 2_3 terminal. The replacement of the order will feedback the output pins of the counter U5 except the 0 pin. to the corresponding D1, and a multi-way trigger U4 is added to compensate for the polling mode of the counter U5 output. The voltage at the connection end of D1 and D2 is pulled up by the resistor R19 and input to the 1D to 8D input end of the multi-way trigger U4 by 4_2_1. When the output pins 0 to 9 of the counter U5 are output in sequence, the output pins 1Q to 8Q of the multi-way trigger U4 are input to D2 in sequence through 4_3_1 to 4_3_N and then fed back to the input pins of the multi-way trigger U4, so that the CLK signal of the multi-way trigger U4 can be input without setting; the final conversion parameter is fed back to the corresponding resistor R11 through 4_3_1 to 4_3_N, and the resistor R11 and the resistor R18 are used to The fixed parameter voltage output by the multi-way trigger U4 is converted into a corresponding first-order voltage by voltage division. The resistor R17 is used for impedance matching and is input to the non-inverting terminal of the operational amplifier U6. The resistor R17 can also be replaced by an isolation circuit and input to the non-inverting terminal of the operational amplifier U6. At the same time, 3_1 is also fed back to the non-inverting terminal of the operational amplifier U6. The operational amplifier U6 outputs 6_1 after superposition to complete the output of the final conversion parameter. The signal is fed back to the voltage-controlled oscillator to directly output an asynchronous pulse to control the servo motor (the voltage-controlled oscillator is not shown in the figure). 1_2 is used to reset the counter U5 and the multi-way trigger U4. The voltage signals fed back by the resistors R10, R14, R9, and R16 can also be directly input into the corresponding voltage through the upper processor.
[0028] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations within the meaning and scope of the equivalent elements of the claims be included in the invention. Any marking in a claim should not be considered as limiting the claim to which it relates.
Claims
1. A control circuit adapted to different valve openings of a steam regulating valve, characterized in that The invention comprises a control unit and a processing unit, wherein the control unit comprises a plurality of resistors, a plurality of operational amplifiers, a digital potentiometer, a trigger, a counter, and an inverter. One end of a resistor R15 among the plurality of resistors is connected to the CS pin and the 1_1 end of the digital potentiometer U8, and 1_1 inputs a low-level signal during valve control; the U / D pin of the digital potentiometer U8 is connected to one end of a resistor R12 and the output pin of the inverter U7, the A1 pin is connected to a power supply, the W1 pin, the B1 pin, one end of a resistor R13, the reverse end of the operational amplifier U11, and the in-phase end of the operational amplifier U10 are connected; the reverse end of the operational amplifier U10 is connected to the reference voltage and the 2_1 end; the in-phase end of the operational amplifier U11 is connected to the reference voltage and the 2_2 end; the operational amplifier U10 and the operational amplifier The output end of U11 is connected to the 1CLK pin of the trigger U9 and the CP pin of the counter U5; the 1D pin of the trigger U9 is connected to the 1Q inverting pin, and the 1Q pin is connected to the input pin of the inverter U7; the CE pin of the counter U5 is connected to one end of the resistor R5, the MR pin is connected to one end of the resistor R6 and the 1_2 end, the output end is except the 0 pin, and the 1 to 9 pins correspond to the output 4_1_1 to 4_1_N ends respectively, and 1_2 inputs the signal during reset; the other ends of the resistors R15, R12, R13, R6, and R5 are connected to the ground end; the 2_1 end, the 2_2 end, the 2_3 end, and the 4_1_1 to 4_1_N ends are fed back to the processing unit to obtain asynchronous pulse signals.
2. The control circuit for adapting steam regulating valves to different valve openings according to claim 1, characterized in that: The processing unit includes a processor, and the 2_1 terminal, 2_2 terminal, 2_3 terminal, and 4_1_1 to 4_1_N terminals are fed back to the processor. When the odd-numbered pins at the output end of the counter U5 feedback a signal, the processor obtains the positive voltage difference between the 2_3 terminal and the 2_2 terminal, and the even-numbered pins obtain the positive voltage difference between the 2_1 terminal and the 2_3 terminal, and generates a conversion signal based on the pin at the output end of the counter U5 and feeds it back to the voltage-controlled oscillator to output an asynchronous pulse signal to the servo motor.
3. The control circuit for adapting steam regulating valves to different valve openings according to claim 1, characterized in that: The processing unit includes a plurality of resistors, a gate, and an operational amplifier. The AX pin of the gate U1 is connected to the 2_1 end, the BX pin is connected to the 2_2 end, the BY pin is connected to the AX pin and the 2_3 end, the AX / AY pin is connected to one end of the resistor R1, the BX / BY pin is connected to one end of the resistor R2, the A pin, the B pin are connected to the input pin of the inverter U7; the in-phase end of the operational amplifier U2 is connected to the other end of the resistor R1 and one end of the resistor R4, the inverting end of the operational amplifier U2 is connected to the other end of the resistor R2 and one end of the resistor R3, the output end of the operational amplifier U2 is connected to one end of the resistor R3 and the 3_1 end; the other end of the resistor R4 is connected to the ground end.
4. The control circuit for adapting steam regulating valves to different valve openings according to claim 1, characterized in that: The processing unit also includes an inverter, a multi-way trigger, and several transfer modules. The several transfer modules include several diodes and several resistors. The cathode of D1 in the several diodes is connected to the cathode of D2 and one end of the resistor R19, one end of the resistor R11 is connected to one end of the resistor R18 and the resistor R17, and the other end of the resistor R18 and the resistor R19 is connected to the ground end; the anode of D1 in each transfer module is respectively connected to the 4_1_1 to 4_1_N ends corresponding to the output ends 1 to 9 of the counter U5, the anode of D2 is connected to the other end of the resistor R11 and the 4_3_1 to 4_3_N ends corresponding to the output ends 1Q to 8Q of the multi-way trigger U4, the cathode of D2 is connected to the 4_2_1 to 4_2_N ends corresponding to the input ends 1D to 8D of the multi-way trigger U4, and the other end of the resistor R17 is connected to the corresponding 5_1_1 to 5_1_N ends; the input end of the inverter U3 in the inverter is connected to the 1_2 end, and the output end is connected to the CLR pin of the multi-way trigger U4.
5. The control circuit for adapting steam regulating valves to different valve openings according to claim 4, characterized in that: The processing unit also includes a plurality of resistors and operational amplifiers, wherein the in-phase end of the operational amplifier U6 is connected to the ends 5_1_1 to 5_1_N, and the inverting end is connected to one end of the resistor R7 and the resistor R8; the other end of the resistor R7 is connected to the output end of the operational amplifier U6 and the end 6_1, and the other end of the resistor R8 is connected to the ground end; the end 6_1 is connected to the voltage-controlled oscillator of the servo motor control system.
6. The control circuit for adapting steam regulating valves to different valve openings according to claim 1, characterized in that: The control unit also includes a plurality of resistors, among which one end of resistor R10 is connected to the A1 pin of the digital potentiometer U8, and the other end is connected to one end of resistor R14 and the inverting end of the operational amplifier U10; one end of resistor R9 is connected to the power supply, and the other end is connected to one end of resistor R16 and the non-inverting end of the operational amplifier U11; the other ends of resistor R16 and resistor R14 are connected to the ground.
7. The control circuit for adapting steam regulating valves to different valve openings according to claim 4, characterized in that: The resistor R11 and the resistor R18 are adjustable resistors.
8. A control method for adapting a steam regulating valve to different valve openings, characterized in that: The following steps are involved: S1. Set a reference signal as a reference signal for different valve classifications; S2 classifies the flow rates corresponding to different valve openings; S3. Generate asynchronous pulse signals according to different levels of valves; S4. Feedback the signal to the servo motor corresponding to the valve to complete flow synchronization.
Citation Information
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