Satellite-borne file storage system and method based on FPGA

Abstract

The invention relates to the technical field of satellite-borne data storage, and discloses a satellite-borne file storage system based on an FPGA (Field Programmable Gate Array), which comprises an FPGA processing unit used for executing file information management, storage control, file indexing, parallel read-write operation and error correction coding; the FPGA processing unit is used for processing file data and file information, the NandFlash storage unit is used for storing file data and file information, and the invention further discloses an FPGA-based satellite-borne file storage method which comprises the following steps: S1, initializing the file storage system, including configuring the FPGA processing unit and the NandFlash storage unit; and S2, creating the file. According to the method, the high-concurrency file operation performance is improved through an FPGA parallel processing architecture, and the efficiency bottleneck of a traditional CPU serial architecture is solved; and meanwhile, by combining triple-modular redundancy and a multi-level error correction mechanism, high-reliability storage of data in a severe environment is ensured, and the problem of data integrity caused by hardware faults and cosmic ray interference is solved.

Description

Technical Field

[0001] The present invention relates to the field of satellite-borne data storage technology, and in particular to a satellite-borne file storage system and method based on FPGA. Background Art

[0002] Traditional file systems based on general-purpose processors (CPUs) mainly rely on serial processing modes. Although they can meet basic data storage needs in ordinary scenarios, their performance is obviously insufficient when faced with large-scale, high-speed data processing tasks. Especially in spaceborne applications, in tasks that require fast, high-concurrency storage of telemetry data, orbital data, etc., the single-task serial characteristics of the CPU lead to a significant increase in the delay of data storage and access. The continuous growth of data volume has further exacerbated this performance bottleneck.

[0003] In addition, existing technologies often use simple parity checks or basic redundancy mechanisms to ensure data integrity. However, in complex onboard environments, such as cosmic ray radiation and extreme temperature conditions, these mechanisms have limited error correction capabilities and are difficult to deal with multi-bit errors or storage unit damage. The data integrity of storage devices is difficult to ensure in extreme environments.

[0004] At the same time, the limited erase and write life of NandFlash storage media also puts higher design requirements on the file system. The traditional wear leveling strategy lacks real-time dynamic adjustment capabilities, resulting in excessive wear of some areas and affecting storage reliability. In addition, file index management mostly uses a simple linked list or partition structure, which is prone to storage fragmentation and linked list access delay when processing large files or high-frequency file operations, reducing the overall efficiency of the system.

[0005] Therefore, the existing CPU-based file system has significant limitations in processing high-concurrency tasks, ensuring storage reliability, and optimizing the use of hardware resources, and it is difficult to meet the efficiency and stability requirements of satellite missions. Summary of the invention

[0006] In view of the deficiencies in the prior art, the present invention provides an onboard file storage system and method based on FPGA, which solves the deficiencies of traditional CPU-based file systems in terms of high-concurrency storage of large data, reliability assurance, and storage efficiency optimization.

[0007] To achieve the above objectives, the present invention is implemented through the following technical solutions: a satellite file storage system based on FPGA, comprising: An FPGA processing unit, used to perform file information management, storage control, file indexing, parallel read and write operations, and error correction coding; a NandFlash storage unit, used to store file data and file information, wherein the NandFlash storage unit is divided into a plurality of physical blocks, each of which includes a plurality of pages; The file linked list module is used to store the index relationship between file blocks and record the storage location of file data in each physical block through the linked list pointer; Error correction and redundancy module, used for error correction coding, redundant storage and fault recovery of file information and data; The scheduling control module is used to schedule the parallel reading and writing operations of files and control the reading and writing order of data blocks based on priority; The file information table management module is used to cache file information in the internal RAM of the FPGA and store the file information in a specific area of ​​the NandFlash according to the write strategy.

[0008] Preferably, the FPGA processing unit includes a plurality of independent read-write control units, and the read-write control units are used to perform parallel operations on different channels of NandFlash, and each read-write control unit includes: A data cache module, used to control parallel read and write operations of multiple physical blocks; The encoding and decoding module is used to perform error correction encoding processing on file data, generate checksums when writing data, and perform error detection and correction when reading data; The Flash interface control module is used to realize the communication between FPGA and NandFlash, control the physical address mapping, page operation and data transmission coordination.

[0009] Preferably, the NandFlash storage unit includes: File data storage area, used to store the actual data blocks of the file; File information storage area, used to store basic information and index linked lists of files; Triple-module redundancy area, used for redundant storage of file information to ensure reliability; The error correction check area is used to store check codes to support error correction and recovery of data.

[0010] Preferably, the file link list module includes: The file start pointer unit is used to record the starting physical block address of the file; A block index unit, used to record the next physical block address of each physical block to construct a linked list; The linked list maintenance unit is used to dynamically allocate physical blocks and update the linked list pointer when the file is created, recycle the corresponding physical blocks and clear the linked list index when the file is deleted, and reallocate physical blocks and update the linked list when the file is moved.

[0011] Preferably, the error correction and redundancy module includes: A triple-module redundant storage unit is used to store file information as three redundant copies, which are stored in different physical blocks to prevent single block failure; The error correction coding unit is used to perform error correction coding on the file data before writing it, generate a check code and append it to the file data block; An error detection unit, used to verify the checksum when reading data and detect errors in the data block; The data recovery unit is used to recover the damaged data block based on the triple-mode redundant storage information and the error correction check result.

[0012] Preferably, the scheduling control module includes: A task priority allocation unit, used to allocate storage resources according to real-time requirements and file operation priorities; A parallel processing scheduling unit, used to schedule the FPGA parallel control unit to perform read and write operations on multiple channels; Storage resource optimization unit, used to dynamically allocate storage space.

[0013] A satellite file storage method based on FPGA includes the following steps: S1, initializing the file storage system, including configuring the FPGA processing unit and the NandFlash storage unit; S2, when creating a file, allocate physical blocks and cache file information in the FPGA internal RAM; S3, writing the file data into the NandFlash storage unit in parallel through multiple channels in units of blocks; S4, recording the index information of the file block in the linked list module to form a file linked list; S5. After receiving the recording stop instruction, the file information is written from the FPGA internal RAM into the NandFlash file information table and stored in a triple-module redundant manner; S6. When reading a file, the file blocks are read sequentially through the index linked list, and error correction and verification are performed on the read data.

[0014] Preferably, the file reading in step S6 includes the following steps: Locate the physical address of the file start block in the file information table according to the file number; Obtain the physical address of each data block of the file in sequence through the linked list structure; Read data from multiple physical blocks in parallel; Correct and verify the read data; Concatenate the file data in the order of the linked list until the reading is completed.

[0015] The present invention provides a satellite-borne file storage system and method based on FPGA, which has the following beneficial effects: 1. A storage architecture based on FPGA parallel processing is adopted, and multiple independent read-write control units and scheduling control modules are designed, which can simultaneously execute file read and write operations in multiple channels, achieving a high-throughput data storage effect. Compared with the file system based on CPU serial architecture in the prior art, which has a bottleneck problem caused by low single-task execution efficiency in big data processing scenarios, the present invention solves the deficiency that traditional systems are difficult to support high-concurrency file operations.

[0016] 2. The present invention realizes high-reliability storage of data in harsh environments by designing triple-module redundant storage and multi-level error correction coding mechanisms, combined with a dynamic maintenance strategy for file list indexes, and achieves the technical effect of being able to recover data under various failure scenarios. Compared with the problem of single redundancy or simple verification mechanisms in the prior art that easily cause data loss when a storage device fails, the present invention solves the problem of data integrity loss caused by hardware damage or cosmic ray radiation. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a system framework diagram of the present invention; Figure 2 It is a framework diagram of the read-write control unit of the present invention; Figure 3 The NandFlash storage unit framework diagram of the present invention; Figure 4 It is a framework diagram of the file linked list module of the present invention; Figure 5 It is a framework diagram of the error correction and redundancy module of the present invention; Figure 6 It is a framework diagram of the scheduling control module of the present invention; Figure 7 It is a schematic diagram of the method flow of the present invention. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the specification of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] Please see attached Figure 1 , an embodiment of the present invention provides a satellite-borne file storage system based on FPGA, comprising: an FPGA processing unit, used to perform file information management, storage control, file indexing, parallel read and write operations and error correction coding; a NandFlash storage unit, used to store file data and file information, the NandFlash storage unit is divided into a plurality of physical blocks, each physical block includes a plurality of pages; The file linked list module is used to store the index relationship between file blocks and record the storage location of file data in each physical block through the linked list pointer; Error correction and redundancy module, used for error correction coding, redundant storage and fault recovery of file information and data; The scheduling control module is used to schedule the parallel reading and writing operations of files and control the reading and writing order of data blocks based on priority; The file information table management module is used to cache file information in the internal RAM of the FPGA and store the file information in a specific area of ​​the NandFlash according to the write strategy.

[0020] Specifically, the modules in the system of the present invention cooperate with each other to jointly complete the overall operation of the onboard file storage system. The modules have a close interactive relationship and can independently realize corresponding functions and also coordinately optimize the overall performance of the system.

[0021] In general, the linkage between modules is uniformly scheduled by the FPGA processing unit, which is mainly responsible for task allocation, data management and fault-tolerant processing. Other modules, such as the NandFlash storage unit, file list module, error correction and redundancy module, etc., are mainly centered around efficient data storage and access, especially in the onboard environment, emphasizing radiation resistance and high reliability. The file information table management module caches file information through the FPGA internal RAM to increase the read and write speed and reduce the frequent erasing of NandFlash.

[0022] In this embodiment, the FPGA processing unit performs file information management, storage control, file indexing, parallel reading and writing, and error correction coding through its internal logic resource allocation. FPGA adopts modular design, and each module completes information exchange through on-chip interconnection.

[0023] Specifically, the FPGA processing unit includes multiple independent read and write control units, each of which is responsible for the operation of a storage channel. Each read and write control unit is further divided into the following modules: Data cache module: used to temporarily store and manage file data. The data cache module adopts a double buffer design, that is, when data is written, one part of the buffer is responsible for encoding operations, and the other part of the buffer is used to receive the next set of data. This design realizes the continuity of data flow.

[0024] Encoding and decoding module: used to generate error correction codes when writing data and attach them to data blocks, and to perform error detection and repair based on the check information when reading. In general, the error correction algorithm used is the Reed-Solomon code, and the specific formula is: C(x)=M(x)·G(x) Where C(x) is the generated check code, M(x) is the polynomial representation of the input data block, and G(x) is the generating polynomial. The generating polynomial of the Reed-Solomon code can be expressed as: G(x)=(x+α 1 )(x+α 2 )…(x+α 2t ) Among them, α is the primitive element in the finite field, and t is the maximum number of error symbols that can be corrected.

[0025] Flash interface control module: responsible for the physical address conversion and operation control of NandFlash storage unit. It realizes fast mapping between logical address and physical address through address mapping table. As an option, the management of physical address adopts linked list structure storage to realize dynamic allocation and fast search.

[0026] In one possible implementation, each read / write control unit of the FPGA is connected to a different NandFlash storage unit through a dedicated hardware channel. When writing files, multiple channels can operate in parallel, significantly improving the file storage speed.

[0027] In this embodiment, the NandFlash storage unit is divided into multiple physical blocks, each of which is further divided into pages. The size of each page is 8640 bytes, of which 8192 bytes are used to store file data and 448 bytes are used to store linked list index information and checksums.

[0028] As an option, NandFlash is divided into the following parts: File data storage area: mainly used to store actual file data. Each file data block is stored in a fixed block size, and there is no overlap between data blocks.

[0029] File information storage area: used to store file metadata, including file number, file size, starting address, etc.

[0030] Triple-module redundant area: used to store redundant copies of file information. Generally, triple-module redundant copies are stored in different physical blocks to avoid the impact of single point failure.

[0031] Check area: used to store check codes and other auxiliary information. The check codes are generated by the FPGA encoding module and are used for subsequent error detection and repair.

[0032] In some embodiments, in order to further improve storage efficiency, the physical block allocation of NandFlash follows a dynamic adjustment strategy. Specifically, when the number of times a block is used approaches the upper limit of erase and write, the system automatically marks it as a read-only block and reallocates a new storage block through the linked list module.

[0033] The main function of the file link list module is to maintain the logical relationship between file blocks and provide a fast file location function. In this embodiment, the file link list module records the index information of each file block through a link list structure.

[0034] Specifically, each linked list node includes the following: Current physical block address.

[0035] The next physical block address. If the file ends, this field is empty.

[0036] Verification information is used to verify the integrity of the linked list nodes.

[0037] When writing files, linked list nodes are dynamically created as file blocks increase. The linked list maintenance unit of the FPGA updates the linked list information after each file writing or deletion operation.

[0038] As a possible implementation, the linked list module also supports a skip list structure to speed up file search. For example, when reading a large file, the system can quickly locate the target block through the skip list, thereby reducing the linear search time.

[0039] In this embodiment, the error correction and redundancy module is mainly used to ensure the reliability of data, especially in a spaceborne environment. The main functions of the module include error correction coding, error detection and data recovery.

[0040] When writing a file, the FPGA generates a checksum through the encoding module and appends it to the data block. Generally, the checksum length is 10% of the data block length to balance storage overhead and error correction capability.

[0041] When reading a file, the error correction module will parse the checksum. If an error is detected, the system will recover in the following two ways: If it is a single-bit error, it is directly repaired through the check code; if it is a multi-bit error, it is restored through the redundant copy.

[0042] In a possible implementation, the error correction module also supports a hierarchical recovery mechanism, that is, the error correction of the checksum is tried first, and if it fails, the redundant copy recovery mode is switched.

[0043] In this embodiment, the scheduling control module is responsible for the priority allocation and multi-channel scheduling of tasks. The module uses a FIFO queue to store tasks and adjusts the priority based on the real-time requirements of the tasks.

[0044] In file write operations, the system prioritizes tasks with higher real-time requirements. For example, real-time recording of satellite observation data will be assigned a higher scheduling priority. In file read operations, the scheduling module will try to balance read latency and storage channel utilization.

[0045] In this embodiment, the file information table management module mainly caches file information through the internal RAM of the FPGA to reduce frequent access to NandFlash.

[0046] Specifically, when a file is created, the file information is first stored in RAM. Only when the recording stop instruction is triggered, the file information in the cache will be written to NandFlash. At the same time, the module will dynamically adjust the write strategy according to the storage status of the file. For example, the metadata of multiple small files will be merged and written to reduce the frequency of write operations.

[0047] As an option, the file information table also supports version control. When the file information is updated, the system will keep an old version as a backup to deal with potential data errors.

[0048] Please see attached Figure 2 , the FPGA processing unit includes multiple independent read-write control units, which are used to perform parallel operations on different channels of NandFlash. Each read-write control unit includes: A data cache module, used to control parallel read and write operations of multiple physical blocks; The encoding and decoding module is used to perform error correction encoding processing on file data, generate checksums when writing data, and perform error detection and correction when reading data; The Flash interface control module is used to realize the communication between FPGA and NandFlash, control the physical address mapping, page operation and data transmission coordination.

[0049] Specifically, in the design of the present invention, the modules in the FPGA processing unit are interconnected through the FPGA on-chip resources, and the NandFlash storage unit is uniformly managed through the scheduling logic. The data cache module is mainly responsible for the temporary storage and parallel management of data; the encoding and decoding module provides efficient error correction coding support; and the Flash interface control module is used for the physical address mapping and page control of NandFlash. The three cooperate with each other to achieve a high-throughput and high-reliability storage architecture.

[0050] In this embodiment, the data cache module is designed to provide buffer support during data transmission, and its main functions include temporarily storing external input data, maintaining the continuity of data flow, and coordinating multi-channel parallel operations. Generally, the data cache module adopts a double buffer structure, which allows one buffer to write or read data while the other buffer is used to receive or send the next set of data.

[0051] Specifically, the data cache module works in conjunction with the FPGA on-chip RAM. External input data is first written into the cache module and transferred to the RAM after verification. In the RAM, the data is divided into multiple physical blocks and written into the NandFlash by the Flash interface control module according to the logical address mapping table.

[0052] As an option, the data cache module can dynamically adjust the buffer capacity according to the size of the file data block. For example, when processing large data files, the buffer capacity can be appropriately expanded to reduce the number of fragments of data transmission; while when processing small data streams, the buffer capacity can be reduced to save on-chip RAM resources.

[0053] In one possible implementation, the data cache module supports multi-task operation scheduling. For example, in a high-concurrency write scenario, the cache module can prioritize high-priority data streams based on the real-time requirements of the tasks, while low-priority tasks are temporarily stored in the queue and processed after the high-priority tasks are completed.

[0054] In this embodiment, the encoding and decoding module is mainly used for error correction processing of data, and its functions include generating a check code when writing data, and performing error detection and repair when reading data. Generally, the encoding and decoding module adopts the Reed-Solomon Code algorithm, which can effectively deal with single-bit errors and multi-bit errors.

[0055] During the data writing process, the encoding and decoding module represents the input data block in the form of a polynomial and generates the corresponding check code. The generation process of the check code can be expressed as: C(x)=M(x)·G(x) Among them, C(x) represents the generated coded data block, M(x) is the polynomial representation of the original data block, and G(x) is the generating polynomial. One possible form of the generating polynomial is: G(x)=(x+α 1 )(x+α 2 )…(x+α 2t ) Here, α is a finite field GF(2 m) is the primitive element in , and t is the maximum number of error symbols that can be corrected. When reading data, the encoding and decoding module detects errors by calculating the remainder polynomial of the received data: R(x)=C ′ (x)mod G(x) If the remainder R(x) = 0, it means that the data block has no error; otherwise, the module locates the position of the error symbol according to the remainder polynomial and repairs the error through reverse operation.

[0056] In some embodiments, the encoding and decoding module also supports a hierarchical error correction strategy. When there are fewer data errors, the module preferentially uses simple parity check codes or Hamming codes for quick repair; when there are more errors, it switches to more complex Reed-Solomon codes for deep repair.

[0057] In this embodiment, the Flash interface control module is responsible for the communication between the FPGA and the NandFlash storage unit. Its main functions include physical address mapping, page operation control, and coordination of multi-channel data transmission. Generally, the Flash interface control module converts the logical address into the physical address of the NandFlash through the address mapping table and performs the write or read operation of the data block.

[0058] The address mapping table is constructed based on the relationship between the logical number of the file block and the physical block of NandFlash. For example, each logical address consists of the following three parts: Logical block number: corresponds to the physical block in NandFlash; Page number: indicates the specific page in the physical block; Offset address: indicates the specific location of data within the page.

[0059] In one possible implementation, the Flash interface control module supports dynamic address mapping. When a physical block fails or is close to the end of its life, the module automatically updates the address mapping table and reallocates the logical address to other free physical blocks. In addition, the module also supports a jump mechanism, which allows the data of a logical block to be distributed in multiple physical blocks and achieves continuous storage through linked list indexes.

[0060] As an option, the Flash interface control module also integrates page operation optimization functions. For example, in high-frequency write scenarios, the module will give priority to free pages for writing to avoid erase operations; in low-frequency write scenarios, overwrite writing is used to reduce page fragmentation.

[0061] In this embodiment, the data cache module, the encoding and decoding module and the Flash interface control module cooperate with each other through the internal logic resources of the FPGA. During the writing process of the file data, the data flow path is as follows: The data cache module receives external input data and stores it in blocks in the on-chip RAM; The encoding and decoding module performs error correction encoding on each data block, generates a checksum and appends it to the end of the data block; The Flash interface control module maps the encoded data block to the physical address of NandFlash and writes it in parallel through multiple channels.

[0062] During the reading of file data, the data flow path is reversed: The Flash interface control module extracts the data block from NandFlash according to the logical address; The encoding and decoding module verifies the extracted data blocks, fixes errors and outputs the verified data; The data cache module temporarily stores the repaired data blocks and eventually transmits them to the external interface.

[0063] Please see attached Figure 3 , NandFlash storage unit includes: File data storage area, used to store the actual data blocks of the file; File information storage area, used to store basic information and index linked lists of files; Triple-module redundancy area, used for redundant storage of file information to ensure reliability; The error correction check area is used to store check codes to support error correction and recovery of data.

[0064] Specifically, in general, NandFlash storage units use physical blocks as basic management units. Each physical block is 1MB in size and is further divided into multiple pages. The page size is 8640B, most of which is used for actual data storage, and the rest is used to store linked list indexes and verification information. This hierarchical design helps simplify storage management and improve system reliability and efficiency.

[0065] In this embodiment, the file data storage area is used to store the actual data content of the file. In order to improve storage efficiency and reading performance, the area is allocated in units of physical blocks, and each block contains a fixed number of pages.

[0066] Specifically, file data is stored in blocks, each block is 1MB in size, and each page is 8640B in size. The first 8192B in the file data storage area is used to store the actual data of the file, and the remaining 448B is used to store the file link list information and checksum. This design maximizes the use of page capacity while providing necessary support for file indexing and data verification.

[0067] As a possible implementation, when the file size exceeds one physical block, the file data storage area divides the file into multiple physical blocks through a linked list structure. The linked list index information is stored in the 448B area of ​​each page, which is used to record the physical address of the next page corresponding to the current page. In this way, when reading a file, the system can quickly locate and sequentially read all the data blocks of the file.

[0068] In some embodiments, the file data storage area also supports dynamic allocation and recycling. When a file is deleted, its corresponding physical block will be marked as free and added to the available block pool for subsequent file storage tasks.

[0069] In this embodiment, the file information storage area is used to store the meta information and index linked list of the file. This area is specially used to manage the file information by reserving a specific number of physical blocks to ensure the reliability and rapid positioning of the file.

[0070] Specifically, each physical block of the file information storage area contains 128 pages, and each page stores the complete information of a file. The content of the file information includes but is not limited to: File number: a number that uniquely identifies the file; Creation time: record the creation timestamp of the file; File size: indicates the total size of the file; Starting address: the address of the first physical block of file data; Index linked list: Linked list information pointing to file data blocks.

[0071] As an option, in order to improve the access speed of file information, the data in the file information storage area will first be cached in the FPGA internal RAM when the file is created or modified. Only when the file operation is completed, the information will be written to NandFlash in batches, thus reducing the erase and write operations on Flash.

[0072] In a possible implementation, the file information storage area also supports a multi-version management function. For example, when file information is updated, the system will retain the old version as a backup to prevent information loss due to update failure.

[0073] In this embodiment, the triple redundancy area is specifically used to redundantly store file information to improve the fault tolerance of the system. This area stores file information as three copies and writes them to different physical blocks respectively, ensuring that data can still be restored through the remaining two copies when a single physical block fails.

[0074] Specifically, the data storage mechanism in the triple-module redundant area is as follows: When writing file information, the system simultaneously writes the information to three redundant copies; When reading file information, the system will read three copies at the same time and select the consistent version through comparison; If an error occurs in one of the copies, the system will repair the data based on the remaining two copies and rewrite the repaired data to the failed location.

[0075] As a possible implementation method, the triple-module redundancy area works together with the error correction area to further improve data reliability. For example, when an error in a copy cannot be repaired by simple comparison, the system will use the verification information in the error correction area to perform a higher level of error repair.

[0076] In this embodiment, the error correction check area is used to store the check information corresponding to each data block to support data error detection and error correction operations. Generally, the check information stored in this area is generated by the encoding and decoding module of the FPGA, including the check code of the file data and the check code of the file information.

[0077] Specifically, the process of generating and using the check information in the error correction check area is as follows: During the data writing process, the encoding module of the FPGA represents the data block in the form of a polynomial and generates a check code. For example, for the input data block M(x), the generated check code C(x) can be expressed as: C(x)=M(x)·G(x) Wherein, G(x) is a generating polynomial, which is usually generated by Reed-Solomon code or Hamming code.

[0078] During the data reading process, the FPGA decoding module detects errors by calculating the remainder polynomial R(x) of the received data block. If R(x)≠0, it means that there is an error in the data block. The module locates the position of the error symbol based on the remainder polynomial and fixes the error.

[0079] The design of the error correction area takes into account the high single-bit error rate that may occur in the spaceborne environment. For example, in certain high-radiation scenarios, the error correction area can detect and repair more than 50% of multi-bit errors, significantly improving the reliability of the system.

[0080] In this embodiment, each functional area of ​​the NandFlash storage unit cooperates through the internal logic resources of the FPGA. In the process of storing and accessing file data, the functions of each functional area are as follows: The file data storage area is responsible for the actual data block storage; The file information storage area provides file meta-information and fast positioning support; The triple-mode redundancy area ensures the reliability of file information through redundant storage and repair mechanisms; The error correction check area detects and repairs errors in file data and file information through checksums.

[0081] In the file reading operation, the system first obtains the file's meta information through the file information storage area, then locates the data block through the linked list index, and reads the data from the file data storage area in sequence. During the reading process, the triple-mode redundancy area and the error correction check area work together to ensure the integrity of the read data.

[0082] Please see attached Figure 4 , the file list module includes: The file start pointer unit is used to record the starting physical block address of the file; A block index unit, used to record the next physical block address of each physical block to construct a linked list; The linked list maintenance unit is used to dynamically allocate physical blocks and update the linked list pointer when the file is created, recycle the corresponding physical blocks and clear the linked list index when the file is deleted, and reallocate physical blocks and update the linked list when the file is moved.

[0083] Specifically, the present invention records the association relationship between file data blocks in a linked list manner, and the file linked list module realizes efficient file storage and access, and provides the ability to dynamically allocate, delete and move files.

[0084] In general, the file linked list module works together through the file start pointer unit, block index unit and linked list maintenance unit to achieve dynamic management of file creation, reading, deletion and movement. During the file creation process, the linked list module dynamically allocates physical blocks for the file and records the logical order between data blocks through the linked list pointer. When reading the file, the linked list module sequentially searches for the location of the file's start block and subsequent data blocks until the end of the file. At the same time, when the file is deleted or moved, the module is responsible for updating the linked list pointer to ensure data consistency.

[0085] In this embodiment, the file start pointer unit is used to record the start physical block address of each file. The start pointer is the entry point of the file linked list, stored in the file information storage area, and is used to quickly locate the first data block of the file.

[0086] Specifically, when a file is created, the file start pointer unit will allocate a physical block address in the free physical block pool as the start address of the file. This address will be stored in the corresponding record of the file information storage area and participate in the subsequent storage and reading operations of the file as the first node of the linked list.

[0087] In the process of reading files, the system first extracts the starting address of the file from the file information storage area. Through this address, the system can directly access the first physical block of the file and gradually obtain the subsequent data blocks of the file through the linked list module.

[0088] As a possible implementation, the file start pointer unit can also support the fast file location function. For example, in the scenario of storing a large number of files, the start pointer can accelerate the file location process through a hash table index or a secondary skip table, thereby reducing the file search time.

[0089] In this embodiment, the block index unit is used to record the next physical block address of each physical block to construct a linked list. In this way, the system can organize the data blocks of the file into a logical linked list, thereby supporting block storage and sequential reading of the file.

[0090] Specifically, the index information of the block index unit is stored in the linked list area of ​​each physical block (the last 448B of each page), and its contents include: The address of the current physical block; the address of the next physical block; the checksum of the data block (used to verify data integrity).

[0091] During the file writing process, the block index unit will update the linked list information after each data block of the file is written. For example, when the file is written to the second physical block, the block index unit will update the "next physical block address" field of the first physical block to the address of the second physical block; when the file is written to the third physical block, the same process will continue to update the linked list.

[0092] During the file reading process, the linked list structure of the block index unit enables the system to read the data blocks of the file in logical order. The start pointer provides the first physical block address of the file, and the block index unit is responsible for locating the subsequent data block addresses of the file until the end of the linked list (file end mark).

[0093] As an option, the block index unit can also support a skip list structure to optimize the access efficiency of large files. For example, in a large file storage scenario, the block index can introduce a skip list mechanism, setting a skip index node every several physical blocks to reduce the performance loss caused by linear search.

[0094] In this embodiment, the linked list maintenance unit is responsible for dynamically maintaining the linked list structure during the creation, deletion and movement of files to ensure the integrity and consistency of the linked list. Its functions include dynamically allocating physical blocks, clearing linked list indexes and updating linked list pointers.

[0095] Specifically, in different file operation scenarios, the working mechanism of the linked list maintenance unit is as follows: File creation: When creating a file, the linked list maintenance unit allocates enough physical blocks from the free physical block pool and builds the linked list in the order in which the file data is written. For example, if a file needs to be stored in three physical blocks, the linked list maintenance unit will: Allocate the first physical block and record it as the starting address; Allocate a second physical block and update the "next physical block address" field of the first physical block to the address of the second physical block; Allocate a third physical block and update the "next physical block address" field of the second physical block to the address of the third physical block; Write the "end of file" marker in the third physical block.

[0096] File deletion: When a file is deleted, the linked list maintenance unit will reclaim all physical blocks corresponding to the file and clear the linked list index. For example, when a user requests to delete a file, the module will extract the starting address of the file from the file information storage area, and release all physical blocks of the file one by one through the linked list index, marking its status as free.

[0097] File movement: When a file is moved, the linked list maintenance unit reallocates the physical blocks of the file and updates the linked list structure. For example, when a file needs to be moved from the current storage area to another area, the module will: Allocate a new physical block in the target storage area; copy the data of each node of the original linked list to the new physical block; update the starting pointer in the file information storage area; clear the old linked list and release its physical block.

[0098] As a possible implementation method, the linked list maintenance unit can also support the defragmentation function of the linked list. During long-term use, the linked list may be fragmented due to the creation and deletion of files. The linked list maintenance unit can regularly defragment the linked list and rearrange the scattered stored data blocks into continuous physical blocks, thereby improving storage efficiency and access speed.

[0099] In this embodiment, the three units of the file list module work together to manage the starting address of the file, the data block index, and the dynamic maintenance of the list. During the file operation process, the file list module works closely with other system modules (such as the FPGA processing unit and the NandFlash storage unit) to complete the storage and management of the file.

[0100] For example, in a file write operation: The file start pointer unit allocates the starting physical block for the file; the block index unit records the linked list relationship of each data block; the linked list maintenance unit dynamically updates the linked list pointer to ensure the integrity of the linked list structure.

[0101] In a file read operation: The system quickly locates the first physical block of the file through the file start pointer unit; the block index unit obtains the address of subsequent data blocks through the linked list sequence; the data blocks are read and transmitted to the outside in sequence.

[0102] Please see attached Figure 5 , the error correction and redundancy modules include: A triple-module redundant storage unit is used to store file information as three redundant copies, which are stored in different physical blocks to prevent single block failure; The error correction coding unit is used to perform error correction coding on the file data before writing it, generate a check code and append it to the file data block; An error detection unit, used to verify the checksum when reading data and detect errors in the data block; The data recovery unit is used to recover the damaged data block based on the triple-mode redundant storage information and the error correction check result.

[0103] Specifically, in general, the error correction and redundancy module implements data protection by combining hardware and algorithms. The triple-module redundant storage unit provides basic fault tolerance through a multi-copy mechanism; the error correction coding unit generates checksums based on algorithms to provide support for error detection and repair; the error detection unit monitors data integrity in real time; and the data recovery unit recovers data through redundancy and error correction information when an error occurs.

[0104] In this embodiment, the triple-module redundant storage unit is used to store file information as three copies, and store the three copies in different physical blocks respectively, so as to prevent data loss caused by failure of a single physical block.

[0105] Specifically, during the process of writing file information, the triple-module redundant storage unit will store copies of the same file information in three separate physical blocks. These physical blocks are usually distributed in different storage areas to minimize the impact of hardware failures on data. For example, the starting address of the file information is in the first physical block, copy one is stored in the second physical block, and copy two is stored in the third physical block.

[0106] When reading file information, the system will extract copies from the three physical blocks at the same time and perform consistency checks on them. If a copy is found to be inconsistent with the other two, the system will automatically select the consistent two copies as the correct data and update the incorrect copy.

[0107] In a possible implementation, the triple-module redundant storage unit also supports a dynamic redundant repair mechanism. During system operation, if a data error in a physical block is detected and successfully repaired, the triple-module redundant storage unit will automatically regenerate the copy and write it to a new free block, thereby ensuring that the three copies are always synchronized.

[0108] In this embodiment, the error correction coding unit is used to perform error correction coding on the file data before writing it in. The unit generates a check code and appends it to the file data block, thereby providing support for subsequent data verification and recovery.

[0109] Specifically, the error correction coding unit uses Reed-Solomon code or other efficient error correction algorithms. The file data block is regarded as a polynomial M(x) over a finite field, and the check code C(x) is generated by multiplying it with the generator polynomial G(x): C(x)=M(x)·G(x) Where: M(x) is the polynomial representation corresponding to the file data block; G(x) is the generating polynomial, usually in the following form: G(x)=(x+α 1 )(x+α 2 )…(x+α 2t ) α is the primitive element in the finite field, and t is the maximum number of error symbols that can be corrected.

[0110] In some embodiments, the error correction coding unit dynamically adjusts the parameter t of the generating polynomial to adapt to different data protection requirements. For example, in a high radiation environment, a larger t value can be selected to enhance the error correction capability; while in a low interference environment, a smaller t value can be selected to reduce storage overhead.

[0111] In this embodiment, the error detection unit is used to verify the check code when reading the file data to detect potential errors in the data block. The error detection unit compares the received file data block with its check code to determine whether there is an error in the data.

[0112] Specifically, the error detection unit detects errors by calculating the remainder polynomial R(x) of the received data block: R(x)=C ′ (x)mod G(x) Where: C ′ (x) is the polynomial corresponding to the received erroneous data block; G(x) is the generating polynomial.

[0113] If the remainder R(x)=0, it indicates that the data block has no error; if R(x)≠0, it indicates that the data block has an error, and the remainder polynomial R(x) can be used to locate the position of the error symbol.

[0114] In one possible implementation, the error detection unit also supports error level assessment. When an error occurs, the unit will classify it according to the type and number of errors and trigger the corresponding error correction or recovery process. For example: If a single-bit error is detected, the error correction process is directly triggered; If multiple bit errors are detected, data recovery is performed through redundancy mechanisms.

[0115] In this embodiment, the data recovery unit is used to recover the data based on the triple-mode redundant storage information and the error correction check result when the data is damaged. The data recovery unit is an important guarantee for ensuring data integrity. Its main function is to recover the lost or damaged content when the file data or file information is physically damaged or interfered by radiation.

[0116] Specifically, when the error detection unit finds an error in a data block, the data recovery unit processes it according to the following steps: Error correction and recovery: If the error detection unit reports a single-bit or multi-bit error and the checksum can be repaired, the data recovery unit will directly repair the data block through the error correction algorithm. For example, the remainder polynomial R(x) is used to locate the error symbol and repair the corresponding bit.

[0117] Redundant recovery: If the error is serious and cannot be repaired by error correction, the data recovery unit will switch to redundant mode and extract a consistent copy from the triple-mode redundant storage unit as replacement data.

[0118] Dynamic update: After completing data recovery, the data recovery unit will regenerate the checksum and write the repaired data block and checksum back to the storage.

[0119] In one possible implementation, the data recovery unit also supports real-time monitoring and active recovery mechanisms. For example, when the system is idle, the data recovery unit will periodically scan the data blocks in the storage and pre-recover the data blocks that have hidden errors but have not triggered a read request, so as to reduce data recovery delays in future operations.

[0120] In this embodiment, the units of the error correction and redundancy modules work together to form a complete data protection process: during the data writing process, the error correction coding unit generates a check code and stores it in the error correction check area, and the triple-module redundant storage unit generates three redundant copies at the same time; During the data reading process, the error detection unit verifies the check code and triggers the data recovery unit if an error is found; the data recovery unit repairs the erroneous data through the check code or redundant information and provides the repaired data to the calling program.

[0121] Please see attached Figure 6 , the scheduling control module includes: A task priority allocation unit, used to allocate storage resources according to real-time requirements and file operation priorities; A parallel processing scheduling unit, used to schedule the FPGA parallel control unit to perform read and write operations on multiple channels; Storage resource optimization unit, used to dynamically allocate storage space.

[0122] Specifically, in this embodiment, the task priority allocation unit is used to allocate system resources according to the real-time requirements and priorities of file operations, ensuring that important tasks can be executed first, thereby improving the overall performance and responsiveness of the system.

[0123] Specifically, the task priority allocation unit divides the file operation tasks into different priorities, such as: High-priority tasks: including data writing tasks with high real-time requirements, such as recording satellite observation data; Medium priority tasks: include file read operations, such as data file reads for transmission or processing; Low-priority tasks: include background operations on files, such as data backup, file information update, or garbage collection.

[0124] During the scheduling process, the task priority allocation unit will dynamically adjust the priority of the task according to the task type and real-time requirements. For example, when a high-priority data writing task arrives, the system will suspend the executing low-priority task and allocate storage resources to the high-priority task first. After the task is completed, the low-priority task continues to execute.

[0125] As a possible implementation method, the task priority allocation unit uses a time slice-based scheduling algorithm, each task is assigned a certain time slice, and the priority of the task determines the frequency of its obtaining the time slice. For example: The time slice ratio for high priority tasks is 50%, for medium priority tasks is 30%, and for low priority tasks is 20%; When the system is idle, low-priority tasks can monopolize time slices to improve storage utilization.

[0126] In this embodiment, the parallel processing scheduling unit is used to coordinate the multi-channel control unit of the FPGA to implement parallel read and write operations of multiple file blocks. By making full use of the hardware parallel processing capability of the FPGA, the scheduling unit significantly improves the data throughput and storage efficiency of the system.

[0127] Specifically, the parallel processing scheduling unit implements parallel read and write operations through the following steps: Task decomposition: Divide the file operation task into multiple subtasks, each subtask corresponds to the read and write operation of a physical block; Channel allocation: Assign subtasks to independent control units of the FPGA, each control unit is responsible for the read and write of a physical block; Resource monitoring: Real-time monitoring of the resource usage of each channel, and dynamically adjust the task allocation strategy to avoid channel overload or resource waste.

[0128] Alternatively, the parallel processing scheduler can optimize the allocation of read and write operations based on the size and storage location of the files. For example: For large files, the scheduling unit divides the task into multiple subtasks and assigns these subtasks to different channels to achieve parallel writing; For small files, the scheduling unit can merge operations on multiple small files and assign them to the same channel in batches to reduce switching overhead.

[0129] In one possible implementation, the parallel processing scheduling unit also supports dynamic load balancing. For example, when the load of a channel is too high, the scheduling unit will automatically transfer some tasks to other idle channels to balance resource usage and avoid performance bottlenecks.

[0130] In this embodiment, the storage resource optimization unit is responsible for dynamically allocating storage space to improve the storage efficiency and device life of the system. The unit optimizes the allocation strategy of physical blocks and pages based on the priority of the task and the current state of the storage space.

[0131] Specifically, the storage resource optimization unit achieves resource optimization in the following ways: Dynamic block allocation: According to the file size and write frequency, select the appropriate free block in the physical block pool for allocation. For example: For high-frequency writing tasks, physical blocks with fewer erase times are preferred to reduce wear; For low-frequency write tasks, physical blocks close to the current task are prioritized to improve read and write continuity.

[0132] Wear leveling: The storage resource optimization unit regularly counts the number of times each physical block is erased and written, and balances the usage frequency of different physical blocks through a migration mechanism. For example: If the number of erase and write times of a physical block approaches the upper limit of its usage, the system will migrate its contents to other free blocks and mark the block as low priority for use.

[0133] Defragmentation: The creation and deletion of files may cause storage space fragmentation. The storage resource optimization unit merges the scattered storage space into continuous blocks by sorting the linked list and reallocating physical blocks, thereby improving storage efficiency.

[0134] As an option, the storage resource optimization unit also supports hot and cold data tiering management. For example: For cold data that has not been accessed for a long time, migrate it to a low-priority block in the storage area; Frequently accessed hot data is preferentially allocated to high-performance storage areas to speed up access.

[0135] In this embodiment, the three units of the scheduling control module cooperate with each other to ensure that the file operation task can be executed in an efficient and stable manner: The task priority allocation unit is responsible for allocating resources and determining the execution order of tasks; The parallel processing scheduling unit allocates operations to different channels according to the priority tasks to achieve parallel processing of multiple tasks; The storage resource optimization unit dynamically adjusts the storage space allocation strategy to ensure efficient utilization and long-term reliability of storage devices.

[0136] For example, in a high-concurrency file writing scenario: The task priority allocation unit prioritizes high-priority write tasks according to real-time requirements; The parallel processing scheduling unit decomposes the writing task into multiple subtasks and assigns them to different channels for parallel execution; The storage resource optimization unit selects a suitable storage location for each subtask according to the status of the physical block.

[0137] Please see attached Figure 7 , a satellite file storage method based on FPGA, comprising the following steps: S1, initializing the file storage system, including configuring the FPGA processing unit and the NandFlash storage unit; S2, when creating a file, allocate physical blocks and cache file information in the FPGA internal RAM; S3, writing the file data into the NandFlash storage unit in parallel through multiple channels in units of blocks; S4, recording the index information of the file block in the linked list module to form a file linked list; S5. After receiving the recording stop instruction, the file information is written from the FPGA internal RAM into the NandFlash file information table and stored in a triple-module redundant manner; S6. When reading a file, the file blocks are read sequentially through the index linked list, and error correction and verification are performed on the read data.

[0138] The file reading in step S6 includes the following steps: Locate the physical address of the file start block in the file information table according to the file number; Obtain the physical address of each data block of the file in sequence through the linked list structure; Read data from multiple physical blocks in parallel; Correct and verify the read data; Concatenate the file data in the order of the linked list until the reading is completed.

[0139] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A satellite-borne file storage system based on FPGA, characterized in that: include: FPGA processing unit, used to perform file information management, storage control, file indexing, parallel read and write operations, and error correction coding; A NandFlash storage unit, used for storing file data and file information, wherein the NandFlash storage unit is divided into a plurality of physical blocks, each of which includes a plurality of pages; The file linked list module is used to store the index relationship between file blocks and record the storage location of file data in each physical block through the linked list pointer; Error correction and redundancy module, used for error correction coding, redundant storage and fault recovery of file information and data; The scheduling control module is used to schedule the parallel reading and writing operations of files and control the reading and writing order of data blocks based on priority; The file information table management module is used to cache file information in the internal RAM of the FPGA and store the file information in a specific area of ​​the NandFlash according to the write strategy.

2. The FPGA-based on-board file storage system according to claim 1, characterized in that: The FPGA processing unit includes a plurality of independent read-write control units, which are used to perform parallel operations on different channels of NandFlash, and each read-write control unit includes: A data cache module, used to control parallel read and write operations of multiple physical blocks; The encoding and decoding module is used to perform error correction encoding processing on file data, generate checksums when writing data, and perform error detection and correction when reading data; The Flash interface control module is used to realize the communication between FPGA and NandFlash, control the physical address mapping, page operation and data transmission coordination.

3. The FPGA-based on-board file storage system according to claim 1, characterized in that: The NandFlash storage unit includes: File data storage area, used to store the actual data blocks of the file; File information storage area, used to store basic information and index linked lists of files; Triple-module redundancy area, used for redundant storage of file information to ensure reliability; The error correction check area is used to store check codes to support error correction and recovery of data.

4. The FPGA-based on-board file storage system according to claim 1, characterized in that: The file linked list module includes: The file start pointer unit is used to record the starting physical block address of the file; A block index unit, used to record the next physical block address of each physical block to construct a linked list; The linked list maintenance unit is used to dynamically allocate physical blocks and update the linked list pointer when the file is created, recycle the corresponding physical blocks and clear the linked list index when the file is deleted, and reallocate physical blocks and update the linked list when the file is moved.

5. The FPGA-based on-board file storage system according to claim 1, characterized in that: The error correction and redundancy module comprises: A triple-module redundant storage unit is used to store file information as three redundant copies, which are stored in different physical blocks to prevent single block failure; The error correction coding unit is used to perform error correction coding on the file data before writing it, generate a check code and append it to the file data block; An error detection unit, used to verify the checksum when reading data and detect errors in the data block; The data recovery unit is used to recover the damaged data block based on the triple-mode redundant storage information and the error correction check result.

6. The FPGA-based on-board file storage system according to claim 1, characterized in that: The dispatch control module includes: A task priority allocation unit, used to allocate storage resources according to real-time requirements and file operation priorities; A parallel processing scheduling unit, used to schedule the FPGA parallel control unit to perform read and write operations on multiple channels; Storage resource optimization unit, used to dynamically allocate storage space.

7. A satellite file storage method based on FPGA, characterized in that: The following steps are involved: S1, initializing the file storage system, including configuring the FPGA processing unit and the NandFlash storage unit; S2, when creating a file, allocate physical blocks and cache file information in the FPGA internal RAM; S3, writing the file data into the NandFlash storage unit in parallel through multiple channels in units of blocks; S4, recording the index information of the file block in the linked list module to form a file linked list; S5. After receiving the recording stop instruction, the file information is written from the FPGA internal RAM into the NandFlash file information table and stored in a triple-module redundant manner; S6. When reading a file, the file blocks are read sequentially through the index linked list, and error correction and verification are performed on the read data.

8. The FPGA-based on-board file storage method according to claim 7, characterized in that: The file reading in step S6 includes the following steps: Locate the physical address of the file start block in the file information table according to the file number; Obtain the physical address of each data block of the file in sequence through the linked list structure; Read data from multiple physical blocks in parallel; Correct and verify the read data; Concatenate the file data in the order of the linked list until the reading is completed.

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