A TSV-based tunable inductance structure and a tuning method thereof

Abstract

The application discloses a TSV-based tunable inductance structure and a tuning method thereof, and the tunable inductance structure comprises a primary inductance and an auxiliary inductance, the primary inductance is nested in the auxiliary inductance, and a nested tunable inductance structure is formed; wherein the auxiliary inductance is connected with a modulation source, and the primary inductance is connected with an actual application circuit, so that the voltage difference between the voltage V1 between the two ports of the primary inductance and the voltage V2 between the two ports of the auxiliary inductance is regulated by the modulation source, the primary inductance and the auxiliary inductance are coupled with each other under the action of the voltage V1 and the voltage V2, and the inductance tuning of the primary inductance is realized. The application realizes the transformation from the traditional tunable inductance with small tuning range, large area and high-frequency performance degradation to the TSV tunable inductance structure based on the magnetic coupling technology, which has smaller area, wider tuning range and continuous tuning.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of integrated circuits, and particularly relates to a tunable inductance structure based on TSV and a tuning method thereof. BACKGROUND

[0002] With the rapid development of new generation wireless communication systems, compact tunable devices are needed to realize frequency agility to meet the demand of multi-band reconfiguration capability of radio frequency systems. As a key component of reconfigurable filters, tunable inductance can realize dynamic selection of signals; as the core part of impedance matching network, it can dynamically adjust the impedance matching between power amplifier and antenna, so as to realize the maximum efficiency output of signals. As the core of tunable devices, tunable inductance can realize dynamic tuning of frequency band, impedance matching and filter tuning during system operation without increasing the chip area.

[0003] The existing tunable inductance can be divided into the following categories:

[0004] The first kind is to realize inductance value tuning by switching inductance combination. Jaehun Lee et al. published "Millimeter-Wave Frequency Reconfigurable Dual-Band CMOS Power Amplifier for 5G Communication Radios", which proposed a method of adjusting inductance value by switching the electrical connection relationship of inductance through MOS switch, but it has the disadvantages of large area, non-continuous tuning and high MOS switch loss. The tunable inductance based on MEMS switch can also adjust the connection relationship of inductance to realize inductance value tuning, and the tunable inductance based on MEMS switch has good radio frequency performance, mature preparation process and wide tuning range, but it has the disadvantages of slow switch speed, large area and high driving voltage. In addition, the tunable inductance based on memristor can also adjust the connection relationship of inductance to realize inductance value tuning, and the tunable inductance based on memristor has the advantages of high integration, low power consumption and fast response speed, but it has the disadvantages of narrow tuning range and sensitivity to temperature change, which is not suitable for high-power radio frequency system applications.

[0005] The second is active inductance. Aysu Belen et al. published a paper entitled "Design and Realization of Broadband Active Inductor Based Band Pass Filter", which proposes an active inductance using a gyrator. The load capacitance is equivalent to inductance through the capacitive-inductive gyrator characteristics of the gyrator, and the tuning of the inductance is realized. The tunable inductance based on active devices has high integration and tuning range, but uses capacitance as the load. In high-frequency applications, the self-resonant frequency decreases, the quality factor decreases, and there is a serious degradation problem of high-frequency performance.

[0006] In summary, the existing tunable inductance structure has the problems of limited tuning range, large area and high-frequency performance degradation. Therefore, the application of high-frequency band, wide tuning range, continuous adjustable, small size tunable inductance has important significance for promoting the development of multi-functional reconstruction and miniaturization of radio frequency systems. SUMMARY

[0007] In order to solve the above problems existing in the prior art, the present application provides a tunable inductance structure based on TSV and a tuning method thereof. The technical problem to be solved by the present application is solved by the following technical scheme:

[0008] In a first aspect, the embodiment of the present application provides a tunable inductance structure based on TSV, which comprises a primary inductance and an auxiliary inductance, the primary inductance is nested in the auxiliary inductance, and a nested tunable inductance structure is formed; wherein,

[0009] The auxiliary inductance is connected to a modulation source, and the primary inductance is connected to an actual application circuit, so as to control the voltage difference between the two-port voltage V1 of the primary inductance and the two-port voltage V2 of the auxiliary inductance through the modulation source, so that the primary inductance and the auxiliary inductance are coupled under the action of the voltage V1 and the voltage V2, and the inductance tuning of the primary inductance is realized.

[0010] In an embodiment of the present application, the auxiliary inductance comprises a first TSV structure, a first micro-bump, a second micro-bump, a first metal RDL and a second metal RDL; wherein,

[0011] Each first TSV structure is located in a silicon substrate;

[0012] The first micro-bump in N rows and 2 columns is located in the first insulating layer on the upper surface of the silicon substrate, and N is an integer greater than 1; a plurality of first metal RDLs are located in the second insulating layer on the upper surface of the first insulating layer, and two ends of each first metal RDL are connected to the first micro-bump in the n-th row and the second column and the first micro-bump in the (n+1)-th row and the first column, n=1, 2, …, N-1; and the port leading out of the first micro-bump in the first row and the first column and the port leading out of the first micro-bump in the N-th row and the second column are used as two ports of an auxiliary inductor.

[0013] The second micro-bump in N rows and 2 columns is located in the third insulating layer on the lower surface of the silicon substrate, and the second micro-bump corresponds to the first micro-bump in a one-to-one manner, and a first TSV structure is connected between the corresponding second micro-bump and the first micro-bump; a plurality of second metal RDLs are located in the fourth insulating layer on the lower surface of the third insulating layer, and two ends of each second metal RDL are connected to two second micro-bumps in the same row.

[0014] In an embodiment of the present application, the primary inductor includes a second TSV structure, a third micro-bump, a fourth micro-bump, a third metal RDL and a fourth metal RDL; wherein,

[0015] Each second TSV structure is located in the silicon substrate;

[0016] The third micro-bump in N rows and 2 columns is located in the first insulating layer on the upper surface of the silicon substrate, and N is an integer greater than 1; a plurality of third metal RDLs are located in the first insulating layer, and two ends of the n-th third metal RDL are connected to the first micro-bump in the n-th row and the second column and the first micro-bump in the (n+1)-th row and the first column, n=1, 2, …, N-1; and the port leading out of the third micro-bump in the first row and the first column and the port leading out of the third micro-bump in the N-th row and the second column are used as two ports of a primary inductor.

[0017] The fourth micro-bump in N rows and 2 columns is located in the third insulating layer, and the fourth micro-bump corresponds to the third micro-bump in a one-to-one manner, and a second TSV structure is connected between the corresponding fourth micro-bump and the third micro-bump; a plurality of fourth metal RDLs are located in the third insulating layer, and two ends of each fourth metal RDL are connected to two fourth micro-bumps in the same row, and the length of the fourth metal RDL in the same row is less than the length of the second metal RDL.

[0018] In an embodiment of the present application, the first TSV structure and the second TSV structure are of the same structure; each first TSV structure includes a TSV via, a TSV insulating layer and a TSV metal, the TSV insulating layer is located on the inner surface of the TSV via, and the TSV metal is fully filled in the TSV via.

[0019] In an embodiment of the present application, the aperture sizes of the first micro-bump to the fourth micro-bump are all equal; and the aperture size of the first micro-bump is greater than the aperture size of the TSV via.

[0020] In one embodiment of the present application, the thicknesses of the first and second micro-bumps are equal, and the thicknesses of the third and fourth micro-bumps are equal; the thickness of the first micro-bump is greater than the thickness of the third micro-bump.

[0021] In one embodiment of the present application, the thicknesses of the first and third insulating layers are equal; the thicknesses of the second and fourth insulating layers are equal; the thickness of the first insulating layer is greater than the thickness of the second insulating layer.

[0022] In one embodiment of the present application, the thicknesses of the first to fourth metal RDLs are equal.

[0023] In one embodiment of the present application, the thicknesses of the first and second micro-bumps are 6 μm; the thicknesses of the third and fourth micro-bumps are 2 μm; the thicknesses of the first and third insulating layers are 6 μm, and the thicknesses of the second and fourth insulating layers are 2 μm; the thicknesses of the first to fourth metal RDLs are 2 μm.

[0024] In a second aspect, an embodiment of the present application provides a tuning method of a tunable inductance structure based on TSV, and the tuning method comprises:

[0025] designing the tunable inductance structure based on TSV according to any one of the first aspect;

[0026] connecting two ports of the auxiliary inductance to a modulation source and ground, respectively;

[0027] controlling the modulation source to control the voltage difference between the two-port voltage V1 of the primary inductance and the two-port voltage V2 of the auxiliary inductance, so that the primary inductance and the auxiliary inductance are coupled under the voltages V1 and V2, the inductance value of the primary inductance is tuned, and the two ports of the primary inductance are connected to an actual application circuit.

[0028] The present application has the following beneficial effects:

[0029] The TSV-based tunable inductance structure provided by the present application can reduce the area of the tunable inductance structure, and is beneficial to improving the integration of the radio frequency system; since the self-resonant frequency of the primary inductance is higher than that of the auxiliary inductance, the primary inductance is connected to an actual circuit, and the auxiliary inductance is connected to a modulation source for regulation and control, the inductance value of the primary inductance can be continuously tuned in a wide range, and the inductance with a higher self-resonant frequency can be designed, and the ability of the radio frequency system in multi-band tuning can be improved; based on the tunable inductance structure, the modulation source is used for modulation, the tuning is simple and flexible, and the inductance value can be continuously tuned; by flexibly regulating and controlling the voltage V2 of the modulation source, the voltage difference between the voltage V1 and the voltage V2 is formed, and the mutual coupling between the primary inductance and the auxiliary inductance is formed, so that the inductance value of the primary inductance is tuned. It can be seen that the tunable inductance structure provided by the present application improves the tunable ability of the inductor, realizes the transformation from the traditional tunable inductance with a small tuning range, a large area and a degraded high-frequency performance to the TSV tunable inductance structure based on the magnetic coupling technology with a smaller area, a wider tuning range and continuous tuning, has the advantages of smaller size, wider tuning range and continuous tuning, can improve the multi-band tuning ability of the electronic system, meets the design requirements of the miniaturization and multi-functional reconstruction of the radio frequency micro system, can be widely applied to the radio frequency circuits such as filters and impedance matching networks, and has a positive significance for promoting the development of the miniaturized design and flexible configuration of the radio frequency electronic system.

[0030] The present application will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0031] Figure 1 is a schematic diagram of a TSV-based tunable inductance structure provided by an embodiment of the present application;

[0032] Figure 2 is a specific structure schematic diagram of a TSV-based tunable inductance structure provided by an embodiment of the present application;

[0033] Figure 3 is a side view of a TSV-based tunable inductance structure provided by an embodiment of the present application;

[0034] Figure 4 is a comparison schematic diagram of the change of the equivalent inductance value of the primary inductance in the non-modulation mode and the modulation mode provided by an embodiment of the present application.

[0035] Figure 5 is a schematic diagram of the change of the equivalent inductance value of the primary inductance when the voltage V2 of the modulation source takes different values provided by an embodiment of the present application. DETAILED DESCRIPTION

[0036] The present application will be further described in detail below with reference to the accompanying drawings and embodiments.

[0037] In a first aspect, referring to Figure 1 The embodiment of the present application provides a tunable inductance structure based on a TSV, the tunable inductance structure comprising a primary inductance and an auxiliary inductance, the primary inductance being nested in the auxiliary inductance, the physical size of the auxiliary inductance being greater than the size of the primary inductance, so as to form a nested tunable inductance structure, and to realize area sharing between the primary inductance and the auxiliary inductance; wherein the auxiliary inductance is connected to a modulation source, and the primary inductance is connected to an actual application circuit, so as to control the voltage difference between the voltage V1 between the two ports of the primary inductance and the voltage V2 between the two ports of the auxiliary inductance through the modulation source, so that the primary inductance and the auxiliary inductance are coupled to each other under the action of the voltage V1 and the voltage V2, and the inductance value of the primary inductance is tuned. Figure 1 The dashed line in the figure shows the structure of the primary inductance, and the solid line shows the structure of the auxiliary inductance, S1 and S3 being two ports of the primary inductance and being used for connecting the actual application circuit, S2 and G being two ports of the auxiliary inductance, S2 being connected to the modulation source, and G being grounded.

[0038] The auxiliary inductance in the embodiment of the present application is shown in Figure 2 and Figure 3 The auxiliary inductance in the embodiment of the present application is shown in

[0039] Each first TSV (Through-Silicon Via) structure is located in a silicon substrate;

[0040] N rows of 2-column distributed first micro-bumps are located in a first insulating layer on the upper surface of the silicon substrate, N being an integer greater than 1; a plurality of first metal RDLs are located in a second insulating layer on the upper surface of the first insulating layer, two ends of each first metal RDL being connected to the two first micro-bumps in the nth row and the 2nd column and the (n+1)th row and the 1st column respectively, n=1, 2, …, N-1; the port led out by the first micro-bump in the 1st row and the 1st column and the port led out by the first micro-bump in the Nth row and the 2nd column are used as two ports of the auxiliary inductance; Figure 2 and Figure 3 The case where N=3 is shown in the figure, and here the row and column close to S1 and S2 can be defined as the starting point of the row and column.

[0041] N rows of 2-column distributed second micro-bumps are located in a third insulating layer on the lower surface of the silicon substrate, the second micro-bumps corresponding to the first micro-bumps one by one, and the corresponding second micro-bump and the first micro-bump being connected by a first TSV structure; a plurality of second metal RDLs are located in a fourth insulating layer on the lower surface of the third insulating layer, two ends of each second metal RDL being connected to two second micro-bumps in the same row.

[0042] The primary inductor in the embodiment of the present application is as shown in Figure 2 and Figure 3 The primary inductor in the embodiment of the present application is as shown in

[0043] Each second TSV structure is located in the silicon substrate.

[0044] The third micro-bumps in N rows and 2 columns are located on the first insulating layer on the upper surface of the silicon substrate, N is an integer greater than 1; a plurality of third metal RDLs are located in the first insulating layer, two ends of the nth third metal RDL are connected to the two first micro-bumps in the n-th row and the 2nd column and the n+1-th row and the 1st column respectively, n = 1, 2, …, N-1; the port leading out of the third micro-bump in the 1st row and the 1st column and the port leading out of the third micro-bump in the Nth row and the 2nd column are used as two ports of the primary inductor.

[0045] The fourth micro-bumps in N rows and 2 columns are located in the third insulating layer, the fourth micro-bumps correspond to the third micro-bumps one by one, and a second TSV structure is connected between the corresponding fourth micro-bump and the third micro-bump; a plurality of fourth metal RDLs are located in the third insulating layer, two ends of each fourth metal RDL are connected to two fourth micro-bumps in the same row, and the length of the fourth metal RDL in the same row is less than the length of the second metal RDL. Figure 2 and Figure 3 The case of N = 3 is shown in

[0046] The fourth micro-bumps in N rows and 2 columns are located in the third insulating layer, the fourth micro-bumps correspond to the third micro-bumps one by one, and a second TSV structure is connected between the corresponding fourth micro-bump and the third micro-bump; a plurality of fourth metal RDLs are located in the third insulating layer, each fourth metal RDL is connected through two fourth micro-bumps in the same row.

[0047] The first TSV structure and the second TSV structure in the embodiment of the present application have the same structure; each first TSV structure includes a TSV via, a TSV insulating layer, and a TSV metal, the TSV insulating layer is located on the inner surface of the TSV via, and the TSV metal is filled in the TSV via, and the filled TSV metal can be copper. The aspect ratio of the first TSV structure and the second TSV structure is 10:1; the first TSV structure and the second TSV structure function as an inductive conductive coil in the present application.

[0048] The aperture sizes of the first micro-bump to the fourth micro-bump are equal in the embodiment of the present application; the aperture size of the first micro-bump is larger than the aperture size of the TSV via. The aperture of the first micro-bump to the fourth micro-bump is larger than the aperture of the TSV via in the first TSV structure and the second TSV structure, so that good electrical interconnection can be formed between the micro-bump and the TSV metal in the TSV via.

[0049] The thicknesses of the first micro-bumps and the second micro-bumps are equal, the thicknesses of the third micro-bumps and the fourth micro-bumps are equal, and the thickness of the first micro-bump is greater than the thickness of the third micro-bump in the embodiment of the application. The materials of the first micro-bump to the fourth micro-bump can be copper.

[0050] The thicknesses of the first insulating layers and the third insulating layers are equal, the thicknesses of the second insulating layers and the fourth insulating layers are equal, and the thickness of the first insulating layer is greater than the thickness of the second insulating layer in the embodiment of the application. The materials of the first insulating layer to the fourth insulating layer can be SiO2.

[0051] The thicknesses of the first metal RDL to the fourth metal RDL are equal in the embodiment of the application. The two ports of the primary inductor and the auxiliary inductor are both formed by the metal RDL. The metal RDL can be copper. The first metal RDL of the auxiliary inductor is electrically connected to the TSV metal in the first TSV structure through the first micro-bump, and the second metal RDL of the auxiliary inductor is electrically connected to the TSV metal in the first TSV structure through the second micro-bump. The third metal RDL of the primary inductor is electrically connected to the TSV metal in the second TSV structure through the third micro-bump, and the fourth metal RDL of the primary inductor is electrically connected to the TSV metal in the second TSV structure through the fourth micro-bump.

[0052] The thicknesses of the first micro-bump and the second micro-bump are 6 μm, the thicknesses of the third micro-bump and the fourth micro-bump are 2 μm, the thicknesses of the first insulating layer and the third insulating layer are 6 μm, the thicknesses of the second insulating layer and the fourth insulating layer are 2 μm, and the thicknesses of the first metal RDL to the fourth metal RDL are 2 μm in the embodiment of the application.

[0053] The TSV structure is embedded in the silicon substrate in the embodiment of the application, the electrical interconnection between the metal RDL and the TSV metal is realized by the via and the micro-bump, the volume in the vertical direction of the silicon substrate is effectively utilized, the occupied area of the inductor structure is reduced, the transition to the three-dimensional inductor structure with larger scale, smaller volume and wider tuning range is facilitated, and the integration scale of the system is improved.

[0054] In summary, the tunable inductor structure based on TSV provided by the embodiment of the present application nests the primary inductor and the auxiliary inductor, can reduce the area of the tunable inductor structure, and is beneficial to improving the integration of the radio frequency system; since the self-resonant frequency of the primary inductor is higher than the self-resonant frequency of the auxiliary inductor, the primary inductor is connected to the actual circuit, and the auxiliary inductor is connected to the modulation source for modulation and control, so that the inductance of the primary inductor can be continuously tuned in a wide range, and the inductor with a higher self-resonant frequency can be designed, and the ability of the radio frequency system in multi-band tuning can be improved; based on the tunable inductor structure, the modulation of the modulation source is used, the tuning is simple and flexible, and the continuous tuning can be achieved; by flexibly regulating the voltage V2 of the modulation source, the voltage difference between the voltage V1 and the voltage V2 is caused, and then the mutual coupling between the primary inductor and the auxiliary inductor is caused, so that the inductance of the primary inductor is tuned. It can be seen that the tunable inductor structure provided by the embodiment of the present application improves the tunable ability of the inductor device, realizes the conversion from the traditional tunable inductor with a small tuning range, a large area and a degraded high-frequency performance to the TSV tunable inductor structure based on the magnetic coupling technology with a smaller area, a wider tuning range and continuous tuning, has a smaller volume and a wider tuning range, can improve the multi-band tuning ability of the electronic system, meets the design requirements of the miniaturization and multi-functional reconstruction of the radio frequency micro system, can be widely applied to the radio frequency circuits such as filters and impedance matching networks, and has a positive significance for promoting the development of the miniaturized design and flexible configuration of the radio frequency electronic system.

[0055] In a second aspect, the embodiment of the present application provides a tuning method of the tunable inductor structure based on TSV, and the tuning method comprises the following steps:

[0056] designing the tunable inductor structure based on TSV in any one of the first aspect;

[0057] connecting the two ports of the auxiliary inductor to the modulation source and the ground respectively;

[0058] regulating the modulation source to regulate the voltage difference between the voltage V1 between the two ports of the primary inductor and the voltage V2 between the two ports of the auxiliary inductor, so that the primary inductor and the auxiliary inductor are coupled under the action of the voltages V1 and V2, the inductance of the primary inductor is tuned, and the two ports of the primary inductor are connected to the actual application circuit.

[0059] The embodiment of the present application verifies the tunable inductor structure based on TSV provided in the first aspect as follows:

[0060] As shown by the black line in FIG. 8, when no modulation is performed, the equivalent inductance of the primary inductor is 2.52 nH; as shown by the red line in FIG. 8, when the modulation source voltage V2 is changed to perform modulation, the equivalent inductance of the primary inductor can be changed to 5.14 nH. Wherein, Figure 4 Figure 4 Figure 4 ​​The abscissa represents frequency, unit: GHz, and the ordinate represents equivalent inductance value, unit: nH.

[0061] As Figure 5 In the modulation mode, the voltage V1 of the two ports of the primary inductor is set to 0.5V, different voltages V2 are generated by regulating the modulation source, different voltage differences are generated between the voltage V1 and the voltage V2, and under the action of the magnetic coupling effect, the change of the voltage makes the equivalent inductance value of the primary inductor change, thereby realizing the dynamic tuning of the inductance value of the primary inductor. Among them, Figure 5 The abscissa represents frequency, unit: GHz, and the ordinate represents equivalent inductance value, unit: nH, Figure 5 The different colored lines in the figure represent the change of the equivalent inductance value of the primary inductor under different voltage differences.

[0062] For the method embodiment of the second aspect, since it is basically similar to the structural embodiment of the first aspect, the description is relatively simple, and the related parts refer to the part of the description of the structural embodiment of the first aspect.

[0063] In the description of the present application, it should be understood that the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with "first", "second" can be explicitly or implicitly included one or more features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0064] Although the present application is described herein in conjunction with various embodiments, other variations of the disclosed embodiments can be understood and implemented by those skilled in the art by referring to the description and drawings. In the description, the word "comprising" does not exclude other components or steps, and "one" or "a" does not exclude multiple cases. Some measures are described in mutually different embodiments, but this does not mean that these measures cannot be combined to produce good results.

[0065] The above is a further detailed description of the present application in conjunction with specific preferred embodiments, and the specific implementation of the present application cannot be limited to these descriptions. For those skilled in the art to which the present application belongs, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, which should be regarded as falling within the scope of protection of the present application.

Claims

1. A TSV-based tunable inductance structure, characterized by, The tunable inductance structure comprises a primary inductance and an auxiliary inductance, the primary inductance is nested in the auxiliary inductance, and a nested tunable inductance structure is formed; the auxiliary inductance is connected to a modulation source, and the primary inductance is connected to an actual application circuit, so as to control the voltage difference between the voltage V1 between the two ports of the primary inductance and the voltage V2 between the two ports of the auxiliary inductance through the modulation source, so that the primary inductance and the auxiliary inductance are coupled to each other under the action of the voltage V1 and the voltage V2, and the inductance value of the primary inductance is tuned. The auxiliary inductor comprises a first TSV structure, a first micro-bump, a second micro-bump, a first metal RDL and a second metal RDL; each first TSV structure is located in a silicon substrate; N rows of 2-column distributed first micro-bumps are located in a first insulating layer on a top surface of the silicon substrate, N is an integer greater than 1; a plurality of first metal RDLS are located in a second insulating layer on a top surface of the first insulating layer, two ends of each first metal RDL are connected to two first micro-bumps in the same row respectively, n the first micro-bump in the first row and the first column and the first micro-bump in the Nth row and the second column, n the first micro-bump in the first row and the first column and the first micro-bump in the Nth row and the second column, n =1,2,…,N-1; a port led out by the first micro-bump in the first row and the first column and a port led out by the first micro-bump in the Nth row and the second column are used as two ports of the auxiliary inductor; N rows of 2-column distributed second micro-bumps are located in a third insulating layer on a bottom surface of the silicon substrate, the second micro-bumps correspond to the first micro-bumps one by one, and a first TSV structure is connected between the corresponding second micro-bump and the first micro-bump; a plurality of second metal RDLS are located in a fourth insulating layer on a bottom surface of the third insulating layer, two ends of each second metal RDL are connected to two second micro-bumps in the same row respectively; The primary-side inductor includes a second TSV structure, a third microbump, a fourth microbump, a third metal RDL, and a fourth metal RDL; wherein each second TSV structure is located within the silicon substrate; the third microbumps, distributed in N rows and 2 columns, are located in the first insulating layer on the upper surface of the silicon substrate, where N is an integer greater than 1; a plurality of third metal RDLs are located within the first insulating layer, the nth microbump being the first metal RDL. n The two ends of the third metal RDL are respectively connected to the first n Row 2, Column 2 n The two third micro-bumps in row +1, column 1. n =1,2,…,N-1; The port led out from the third microbump in the first row and first column and the port led out from the third microbump in the second row and second column are used as the two ports of the primary inductor; The fourth microbumps distributed in N rows and 2 columns are located in the third insulating layer, and the fourth microbumps correspond one-to-one with the third microbumps. The corresponding fourth microbumps and the third microbumps are connected by a second TSV structure; Several fourth metal RDLs are located in the third insulating layer, and the two ends of each fourth metal RDL are connected to two fourth microbumps in the same row. The length of the fourth metal RDL in the same row is less than the length of the second metal RDL; The first TSV structure and the second TSV structure are the same in structure; each first TSV structure comprises a TSV via hole, a TSV insulating layer and a TSV metal, the TSV insulating layer is located on the inner surface of the TSV via hole, and the TSV metal is fully filled in the TSV via hole; The thicknesses of the first micro-bump and the second micro-bump are 6 μm; the thicknesses of the third micro-bump and the fourth micro-bump are 2 μm; the thicknesses of the first insulating layer and the third insulating layer are 6 μm, and the thicknesses of the second insulating layer and the fourth insulating layer are 2 μm; the thicknesses of the first metal RDL to the fourth metal RDL are 2 μm.

2. The TSV-based tunable inductance structure of claim 1, wherein, The apertures of the first micro-bump to the fourth micro-bump are equal in size; the aperture of the first micro-bump is larger than the aperture of the TSV via hole.

3. A tuning method of a TSV-based tunable inductance structure, characterized in that, The tuning method comprises: designing the TSV-based tunable inductance structure according to any one of claims 1-2; connecting the two ports of the auxiliary inductance to a modulation source and ground respectively; controlling the voltage difference between the voltage V1 between the two ports of the primary inductance and the voltage V2 between the two ports of the auxiliary inductance through the modulation source, so that the primary inductance and the auxiliary inductance are coupled to each other under the action of the voltage V1 and the voltage V2, the inductance value of the primary inductance is tuned, and the two ports of the primary inductance are connected to an actual application circuit.

Images