Packaging structure of three-dimensional dynamic random access memory
By setting heat dissipation channels and heat dissipation components on the substrate of the 3D DRAM memory to form a heat conduction structure, the problem of poor heat dissipation effect of 3D DRAM memory in the prior art is solved, and the heat dissipation efficiency of the chip is improved.
Patent Information
- Application Number
- CN202411972376.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-05-02
AI Technical Summary
The existing 3D DRAM memory's heat dissipation method cannot meet the increasing heat dissipation needs with the increase in the number of layers, resulting in poor heat dissipation effect of the chip.
A three-dimensional dynamic random access memory package structure is designed, including a substrate, a 3D DRAM device and a heat dissipation component. A heat dissipation channel is provided on the substrate. Part of the structure of the heat dissipation component comes into contact with the heat dissipation channel to form a heat conduction structure to improve heat dissipation efficiency.
By setting a heat dissipation channel on the substrate, heat from the bottom of the 3D DRAM is transferred to the heat dissipation component for heat dissipation, which improves the heat dissipation efficiency of the chip and solves the problem of poor heat dissipation effect of the chip in the prior art.
Smart Images
Figure CN119920775A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of stacked semiconductors, and in particular to a three-dimensional dynamic random access memory packaging structure. Background Art
[0002] In 3D DRAM memory technology, as the number of memory layers increases, the stacking density of each unit increases, resulting in an increase in the heat generated per unit volume. Currently, the heat dissipation of 3D DRAM memory mainly depends on the chip packaging materials and external heat sinks, but as the number of layers increases, this heat dissipation method can no longer meet the growing heat dissipation needs. The closest existing technology is to use packaging materials with high thermal conductivity, but these methods are often costly and difficult to achieve ideal heat dissipation effects in practical applications. Summary of the invention
[0003] The object of the present invention is to provide a three-dimensional dynamic random access memory packaging structure, which can solve the problem of poor heat dissipation effect of chips in the prior art;
[0004] The present invention provides a three-dimensional dynamic random access memory packaging structure, which includes a substrate, a 3DDRAM device and a heat dissipation component;
[0005] The 3D DRAM device is arranged on a substrate, and the heat dissipation component is arranged on an upper surface of the 3D DRAM device;
[0006] A heat dissipation channel is arranged on the substrate, and a part of the structure of the heat dissipation component is in contact with the open end of the heat dissipation channel.
[0007] Preferably, the heat dissipation component includes a heat dissipation plate, heat dissipation fins and a heat conduction plate;
[0008] The heat dissipation fins are arranged on the upper side of the heat dissipation plate;
[0009] One end of the heat conducting plate is connected to the heat dissipation plate, and the other end is in contact with the open end of the heat dissipation channel.
[0010] Preferably, the heat dissipation plate and the heat conduction plate are provided with heat dissipation component channels;
[0011] The heat dissipation component channel is communicated with the heat dissipation channel. The heat dissipation component channel is provided with an inlet end and an outlet end. The heat dissipation component channel and the heat dissipation channel form a medium circulation passage.
[0012] Preferably, a cavity structure is provided in the substrate, and a plurality of staggered baffles are provided in the cavity structure, and the plurality of baffles divide the cavity structure into heat dissipation channels.
[0013] Preferably, a heat dissipation layer is provided between the heat dissipation plate and the 3D DRAM device.
[0014] Preferably, the 3D DRAM device comprises a plurality of device layers stacked together;
[0015] The 3D DRAM device further includes a heat-conducting structure disposed through a portion of the plurality of stacked device layers, and an end of the heat-conducting structure is connected to a heat dissipation component.
[0016] Preferably, the heat-conducting structure runs through a plurality of stacked device layers.
[0017] Preferably, the thermally conductive structure is a heat dissipation through silicon via.
[0018] Preferably, each of the device layers is a dynamic random access memory chip.
[0019] Preferably, some of the multiple device layers are logic chips.
[0020] Beneficial effects:
[0021] In 3D DRAM, due to the stacking of multiple layers of chips, heat accumulates in the vertical direction, which increases the heat dissipation burden of the bottom chip. In this application, a heat dissipation channel is set on the substrate, and the heat of the bottom chip can be transferred to the heat dissipation component through the heat dissipation channel for dissipation, thereby improving the heat dissipation efficiency of the chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0023] Figure 1 A schematic structural diagram of a three-dimensional dynamic random access memory packaging structure provided in a specific embodiment of the present invention;
[0024] Figure 2 A schematic structural diagram of another three-dimensional dynamic random access memory packaging structure provided for a specific embodiment of the present invention.
[0025] Description of reference numerals:
[0026] 1: substrate, 2: 3D DRAM device, 3: heat dissipation component, 4: heat dissipation layer, 5: thermal conductive structure, 6: thermal insulation layer;
[0027] 11: Heat dissipation channel,
[0028] 31: heat sink, 32: heat sink fins, 33: heat conduction plate, 34: heat sink component channel. DETAILED DESCRIPTION
[0029] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0030] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as limiting the present invention.
[0031] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "multiple" means two or more, unless otherwise clearly and specifically defined. In addition, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal connection of two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0032] like Figure 1 As shown, this embodiment provides a three-dimensional dynamic random access memory packaging structure, which includes a substrate 1, a 3D DRAM device 2 and a heat dissipation component 3.
[0033] The 3D DRAM device 2 is disposed on the substrate 1 , and the heat dissipation component 3 is disposed on the upper surface of the 3D DRAM device 2 .
[0034] A heat dissipation channel 11 is provided on the substrate 1 , and a part of the structure of the heat dissipation component 3 is in contact with the open end of the heat dissipation channel 11 .
[0035] In 3D DRAM, due to the stacking of multiple layers of chips, heat accumulates in the vertical direction, which increases the heat dissipation burden of the bottom chip. In the present application, a heat dissipation channel 11 is set on the substrate 1, and the heat of the bottom chip can be transferred to the heat dissipation component 3 through the heat dissipation channel 11 for dissipation, thereby improving the heat dissipation efficiency of the chip.
[0036] In this embodiment, a specific structure of the heat dissipation component 3 is provided, which is specifically shown as follows:
[0037] The heat dissipation component 3 includes a heat dissipation plate 31 , heat dissipation fins 32 and a heat conduction plate 33 . The heat dissipation fins 32 are disposed on the upper side of the heat dissipation plate 31 .
[0038] One end of the heat conducting plate 33 is connected to the heat dissipation plate 31 , and the other end is connected to the open end of the heat dissipation channel 11 .
[0039] That is, the lower side of the heat dissipation plate 31 is attached to the upper surface of the 3D DRAM device 2 , and the heat conduction plate 33 is attached to the open end of the heat dissipation channel 11 , forming a heat conduction structure.
[0040] By disposing the heat conducting plate 33 , the heat dissipation channel 11 can be connected to the heat dissipation plate 31 , thereby transferring the heat at the bottom of the 3D DRAM to the heat dissipation component 3 .
[0041] Furthermore, a heat dissipation component channel 34 is provided on the heat dissipation plate 31 and the heat conducting plate 33. The heat dissipation component channel 34 is connected to the heat dissipation channel 11. The heat dissipation component channel 34 is provided with an inlet end and an outlet end. The heat dissipation component channel 34 and the heat dissipation channel 11 form a medium circulation passage. By forming a medium circulation passage between the heat dissipation component channel 34 and the heat dissipation channel 11, the heat dissipation efficiency can be further improved by circulating the heat exchange medium in the circulation passage.
[0042] The specific formation method of the heat dissipation channel 11 in the substrate 1 is as follows: a cavity structure is provided in the substrate 1, and a plurality of staggered baffles are provided in the cavity structure, and the plurality of baffles divide the cavity structure into the heat dissipation channel 11. By providing a plurality of staggered baffles in the cavity structure, a curved heat dissipation channel 11 can be formed in the cavity structure. Therefore, the length of the heat dissipation channel 11 can be increased, and the heat exchange efficiency between the medium and the chip can be improved.
[0043] A heat dissipation layer 4 is provided between the substrate 1, the heat dissipation plate 31 and the 3D DRAM device 2. The heat dissipation layer 4 comprises a thermal interface material layer and a heat dissipation plate.
[0044] The thermal interface material layer is used to fill the air gap between the chip and the heat sink to improve the heat conduction efficiency of the contact surface. The thermal interface material layer can minimize the contact thermal resistance, thereby improving the heat dissipation efficiency.
[0045] Common thermal interface material layers (TIM) include thermal pads, thermal grease, thermal gel, phase change materials, graphite sheets and films. Each TIM has its own unique advantages and applicable scenarios. For example, thermal grease provides good thermal performance and a short manufacturing cycle, but may be affected by oil seepage or drying failure; thermal gel is easy to process and shape, but has weak bonding properties; thermal phase change materials have low cost and temperature control functions, but their thermal conductivity is relatively weak.
[0046] The vapor chamber is used to evenly distribute the heat generated by the chip across the heat sink, thus avoiding the generation of hot spots. The vapor chamber is usually made of highly thermally conductive materials, such as copper or aluminum, and may contain microchannels inside to enhance heat dissipation.
[0047] like Figure 2 As shown, the 3D DRAM device 2 includes a plurality of stacked device layers, and the 3D DRAM device 2 also includes a heat conducting structure 5 that penetrates a portion of the plurality of stacked device layers, and an end of the heat conducting structure 5 is connected to the heat dissipation component 3 .
[0048] The heat-conducting structure 5 runs through multiple stacked device layers. The heat-conducting structure 5 is a heat-dissipating silicon via. The heat-dissipating silicon via is set by TSV (Through-Silicon Via) technology. TSV (Through-Silicon Via) technology is a method of drilling holes on the chip to achieve heat dissipation by establishing vertical connection channels between chips. This technology not only improves the heat dissipation performance of the device, but also improves signal transmission delay and bandwidth. In addition, studies have shown that by inserting heat-conducting TSVs between chip layers, the maximum temperature inside the chip can be effectively reduced, thereby improving heat dissipation performance. Therefore, 3D DRAM can indeed dissipate heat by drilling holes on the chip.
[0049] Each device layer is a dynamic random access memory chip. Some of the multiple device layers are logic chips.
[0050] An insulation layer 6 is provided between adjacent device layers. By providing the insulation layer 6, heat conduction in the vertical direction can be suppressed. The insulation layer 6 includes a material with low thermal conductivity. Specifically, the insulation layer 6 includes an oxide, a nitride or a nitride oxide, etc. Alternatively, the insulation layer 6 includes a polymer, such as a silicone resin or an epoxy resin.
[0051] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.
Claims
1. A three-dimensional dynamic random access memory packaging structure, characterized in that: Including a substrate, a 3D DRAM device and a heat dissipation component; The 3D DRAM device is arranged on a substrate, and the heat dissipation component is arranged on an upper surface of the 3D DRAM device; A heat dissipation channel is arranged on the substrate, and a part of the structure of the heat dissipation component is in contact with the open end of the heat dissipation channel.
2. The three-dimensional dynamic random access memory package structure according to claim 1, characterized in that: The heat dissipation component includes a heat dissipation plate, heat dissipation fins and a heat conducting plate; The heat dissipation fins are arranged on the upper side of the heat dissipation plate; One end of the heat conducting plate is connected to the heat dissipation plate, and the other end is in contact with the open end of the heat dissipation channel.
3. The three-dimensional dynamic random access memory package structure according to claim 2, characterized in that: The heat dissipation plate and the heat conduction plate are provided with heat dissipation component channels; The heat dissipation component channel is communicated with the heat dissipation channel. The heat dissipation component channel is provided with an inlet end and an outlet end. The heat dissipation component channel and the heat dissipation channel form a medium circulation passage.
4. The three-dimensional dynamic random access memory package structure according to claim 2, characterized in that: A cavity structure is arranged in the substrate, and a plurality of staggered baffles are arranged in the cavity structure, and the plurality of baffles divide the cavity structure into heat dissipation channels.
5. The three-dimensional dynamic random access memory package structure according to claim 2, characterized in that: A heat dissipation layer is arranged between the heat dissipation plate and the 3D DRAM device.
6. The three-dimensional dynamic random access memory package structure according to claim 1, characterized in that: The 3DDRAM device includes a plurality of device layers stacked in layers; The 3D DRAM device further includes a heat-conducting structure disposed through a portion of the plurality of stacked device layers, and an end of the heat-conducting structure is connected to a heat dissipation component.
7. The three-dimensional dynamic random access memory package structure according to claim 6, characterized in that: The heat-conducting structure runs through a plurality of stacked device layers.
8. The three-dimensional dynamic random access memory package structure according to claim 6, characterized in that: The heat-conducting structure is a heat-dissipating through silicon via.
9. The three-dimensional dynamic random access memory package structure according to claim 6, characterized in that: Each of the device layers is a dynamic random access memory chip.
10. The three-dimensional dynamic random access memory package structure according to claim 6, characterized in that: Some of the plurality of device layers are logic chips.