Techniques and driver circuits configured to monitor load current through gate injection transistor (GIT)

Abstract

The present disclosure relates to techniques and driver circuits configured to monitor a load current through a gate injection transistor (GIT). The present disclosure describes a driver circuit configured to control a gate injection transistor (GIT). The driver circuit is configured to output a control current to a gate of the GIT, detect a voltage at the gate of the GIT, and determine a load current through the GIT based on the detected voltage at the gate of the GIT. The voltage at the gate of the GIT may depend on both the load current and the control current.

Description

Technical Field

[0001] The present disclosure relates to transistors that can be used as power switches, and more particularly, to a gate injection transistor (GIT) that is controlled by injecting current into the gate of the transistor. Background Art

[0002] Power switches are used in various applications to control the power delivered to a load. Field effect transistors (FETs), such as metal oxide field effect transistors (MOSFETs), are commonly used as power switches. FETs may be formed in silicon (Si), gallium nitride (GaN), silicon carbide (SiC), or another semiconductor material. Examples of MOSFETs may include, but are not limited to, PMOS, NMOS, DMOS, or any other type of MOSFET, or any combination thereof.

[0003] The power switch is usually controlled by one or more driver circuits via a voltage signal applied to the gate of the power switch to control the on / off switching of the power switch. The microcontroller can provide control signals to the driver circuit to provide system-level control of the power switch.

[0004] Some power switches, including some FETs formed in GaN materials, are controlled by injecting a constant current at the gate of the power switch. These so-called gate injection transistors (GITs) can offer advantages in efficiency, switching speed, power density, and load current capability relative to conventional voltage-controlled MOSFETs. Summary of the invention

[0005] The present disclosure describes techniques and driver circuits for controlling a gate injection transistor (GIT). The driver circuit can be configured to control the GIT by injecting current at the gate of the GIT. In addition, according to the present disclosure, the driver circuit can be configured to determine the load current through the GIT without any additional components, such as a shunt or Hall sensor that is typically used for load current monitoring. Therefore, the circuit can achieve efficiency by eliminating the need for a shunt or Hall sensor. In addition, the driver circuit can be configured to determine a temperature associated with the GIT based on the measured load current.

[0006] In some examples, the present disclosure describes a driver circuit configured to control a GIT, wherein the driver circuit is configured to: output a control current to a gate of the GIT; detect a voltage at the gate of the GIT; and determine a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

[0007] In some examples, the present disclosure describes a method performed by a gate driver circuit configured to control a GIT, the method comprising: outputting a control current to a gate of the GIT; detecting a voltage at the gate of the GIT; and determining a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

[0008] In some examples, the present disclosure describes a system comprising: a GIT configured to be controlled by a current signal at a gate of the GIT; and a driver circuit configured to control the GIT, wherein the driver circuit is configured to: output a control current to the gate of the GIT; detect a voltage at the gate of the GIT; and determine a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

[0009] The details of these and other examples are set forth in the drawings and the description that follows.Other features, objects, and advantages will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 is a block diagram of a system for controlling a gate injection transistor (GIT) consistent with the present disclosure.

[0011] Figure 2 is a conceptual cross-sectional side view of a GIT consistent with the present disclosure.

[0012] Figure 3 is shown with Figure 2 The circuit diagram of the GIT consistent equivalent circuit model diagram is shown in the figure.

[0013] Figure 4A and Figure 4B is an example transfer function of an example GIT consistent with the present disclosure.

[0014] Figure 5 is a block diagram of a GIT driver circuit for controlling a GIT consistent with the present disclosure.

[0015] Fig. 6A and Figure 6B are two correlation diagrams showing parameters associated with the control of the GIT. Fig. 6A shows the gate voltage varying with time, and Figure 6B The load current is shown as a function of time.

[0016] Figure 7-Figure 9 is a block diagram illustrating different examples of GIT driver circuits for controlling a GIT consistent with the present disclosure.

[0017] Fig.10 and Fig.11 is an equivalent circuit model diagram consistent with the present disclosure, which shows the electrical characteristics of the GIT.

[0018] Fig.12 is a flow diagram illustrating a technique consistent with the present disclosure. DETAILED DESCRIPTION

[0019] The present disclosure describes techniques and driver circuits for controlling a gate injection transistor (GIT). When controlling a transistor (such as a GIT), it is desirable to monitor the load current through the transistor and the temperature of the transistor. This is particularly desirable when the transistor is used as a power switch (e.g., delivering power to a load). In many cases, the load current and temperature of the power switch are monitored by external components (such as a shunt resistor or a Hall sensor).

[0020] The techniques and circuits described in this disclosure recognize and exploit special input characteristics associated with the structure of a GIT. In particular, the structure of a GIT can be used to monitor the load current and temperature of the GIT without the need for shunts, Hall sensors, or other external current monitoring structures. By eliminating the need for shunts, Hall sensors, or other external current monitoring structures, the circuits and techniques of this disclosure can achieve efficiencies relative to conventional circuits.

[0021] According to the present disclosure, the driver circuit can be configured to control the GIT by injecting current at the gate of the GIT. In addition, according to the present disclosure, the driver circuit can be configured to determine the load current through the GIT without any additional components, such as shunts or Hall sensors. In addition, the driver circuit can be configured to determine the temperature associated with the GIT based on the measured load current.

[0022] The GIT has a unique characteristic that the load current and the gate current flow through a portion of the GIT. When the transistor is turned on, the load current flows from the drain of the GIT to the source of the transistor. In addition, when the transistor is turned on, the control current flows from the gate of the GIT to the source. Therefore, for the GIT, when the transistor is turned on, both the load current and the control current pass through a portion of the load current path. In some examples, the technology of the present disclosure utilizes the GIT structure to achieve load current sensing without the need for external shunts or Hall sensors. The GIT acts as a level shifter relative to the load current, and since the gate injection current is known, the load current can be determined by monitoring the portion of the GIT through which both the load current and the control current pass.

[0023] Figure 11 is a block diagram of a system 10 for controlling a GIT 16 consistent with the present disclosure. The system 10 includes a processor 12 configured to generate a control signal for controlling an on / off state of the GIT 16. A driver circuit 14 receives the control signal from the processor 12 and generates a gate control signal (I gate ). Gate control signal (I gate ) includes a constant current delivered to the gate at a defined voltage level. In some cases, the voltage at the gate can be raised for an initial boost phase, followed by a lower gate voltage to provide a constant gate control current (I gate ) is delivered to the gate of GIT 16.

[0024] Figure 2 is a conceptual cross-sectional side view of a GIT 20 consistent with the present disclosure. The GIT 20 may correspond to Figure 1 GIT10. Figure 2 In an example of , GIT 20 includes a field effect transistor (FET) formed in gallium nitride (GaN). Aluminum gallium nitride layer (AlGaN) 204 is formed on GaN layer 202 to separate source contact 204 from drain contact 206. Source contact 204 and drain contact 206 can be formed of conductive metal material. Drain contact 206 can be electrically connected to P-GaN layer 214 on the drain side. P-GaN layer 214 can include doped GaN material. P-GaN layer 214 on the drain side can help reduce current collapse effects that may otherwise occur due to exposure to high blocking voltages. Another P-GaN layer 212 is formed on AlGaN layer 204, and gate contact 208 is formed on P-GaN layer 212. Gate-to-source current is shown by element 216, and drain-to-source voltage is shown by element 218.

[0025] Figure 3 is shown with Figure 2 An equivalent circuit model of the GIT 20 illustrated in FIG. 30 is consistent with the circuit diagram of FIG. Figure 3 The source contact 304, gate contact 308 and drain contact 306 may generally correspond to Figure 2 The source contact 204, the gate contact 208 and the drain contact 206 are shown in FIG. Figure 3As shown in FIG. 1 , a set of diodes 324 can be used to model the reverse behavior of the gate-to-source path of the GIT 10, and the forward behavior of the gate-to-source path can be modeled by resistor 320 and diode 322. As further shown, for the GIT, the load current path from the drain contact 306 to the source contact 304 includes two portions. The first portion corresponds to the portion of the load current path between the drain contact 306 and the gate contact 308. The second portion is defined as R S , and R S The part includes the load current I when the GIT is turned on load and the gate current I GATE Both. Gate current I gate is the control current delivered to the gate contact 308, which also passes through the second portion R of the GIT 30. S .

[0026] Figure 4A and Figure 4B is an example transfer function of an example GIT consistent with the present disclosure. Figure 4A and Figure 4B In the transfer function of GS ) is shown by lines 42, 44. As V GS The gate current as a function of is shown by lines 46, 48. Both the gate current and the load current are functions of temperature, as can be seen by Figure 4A Line 46 with Figure 4B Line 48 is compared and Figure 4A Line 42 with Figure 4B Line 44 can be understood by comparison. Figure 4A The transfer function at 25 degrees Celsius is shown, and Figure 4B The transfer function at 125 degrees Celsius is shown.

[0027] Figure 5 is a block diagram of a GIT driver circuit 54 consistent with the present disclosure for controlling a GIT 56. The GIT driver circuit 54 is one example of a driver circuit configured to output a control current to a gate of the GIT 56, detect a voltage at the gate of the GIT 56, and determine a load current through the GIT 56 based on the detected voltage at the gate of the GIT 56, wherein the voltage at the gate of the GIT 56 depends on both the load current and the control current.

[0028] In particular, the GIT driver circuit 54 includes a turn-on circuit 504 including a current delivery circuit, wherein the turn-on circuit 504 is configured to output a control current to turn on the GIT 56. For example, the turn-on circuit 504 can be connected to a current source 508, so that the turn-on circuit 504 can be turned on to become a current delivery circuit from the current source 508 to the gate of the GIT 56.

[0029] The GIT driver circuit 54 also includes a shutdown circuit 506 that can be configured to short-circuit a control current from a current source 508 to quickly and effectively shut down the GIT 56. Furthermore, consistent with the present disclosure, the GIT driver circuit 54 includes a detection circuit 502 that is configured to determine a load current through the GIT 56 based on a detected voltage at a gate of the GIT 56.

[0030] In some examples, to determine the load current, the detection circuit 502 can be configured to compare the detected voltage at the gate of the GIT 56 with a fixed reference voltage and to determine the load current based on a predefined transfer function associated with the GIT (e.g., such as a voltage similar to Figure 4A and Figure 4B In this example, the predefined transfer function defines both the load current through the GIT and the control current at the gate when the detected voltage at the gate is greater than a threshold value (e.g., 3.3 volts) defined in the predefined transfer function associated with the GIT.

[0031] In some examples, to determine the load current, the detection circuit 502 can be configured to determine the voltage passing through a portion of the GIT 56 (eg, Figure 2 The portion R shown in s ) and determines the load current based on the difference between the total current and the control current. Additional details about the comparison are discussed in more detail below.

[0032] Fig. 6A and Figure 6B are two correlation diagrams showing parameters associated with the control of the GIT. Fig. 6A shows the gate voltage varying with time, Figure 6B The load current is shown as a function of time. Fig. 6A and Figure 6B Will be from Figure 56. In some examples, to control the GIT 56, the GIT driver circuit 54 controls the conduction circuit 504 to output a control current in an initial boost phase 602, wherein the initial boost phase defines a first gate voltage. Then, the GIT driver circuit 54 controls the conduction circuit 504 to output a control current in a drive phase 604 following the boost phase 602, wherein the drive phase defines a second gate voltage that is lower than the first gate voltage. In this case, to detect the voltage at the gate of the GIT, the detection circuit 502 can be configured to detect a second gate voltage, for example, corresponding to a voltage in a constant current drive phase 604. For example, the detection circuit 502 can detect a sense overload 606, 608 based on a rise in the detected gate voltage relative to an expected gate voltage in the drive phase. The voltage measurement result can also be mapped to a temperature measurement result, for example, based on a known or predefined transfer function (such as Figure 4A , Figure 4B ). Thus, in some examples, the GIT driver circuit 54 may also be configured to determine a temperature associated with the GIT 56 based on the determined load current.

[0033] Figure 7-Figure 9 is a block diagram illustrating different examples of GIT driver circuits for controlling a GIT consistent with the present disclosure.

[0034] Figure 7 The GIT driver 74 is an example of a driver circuit configured to control the GIT 76, wherein the driver circuit is configured to: output a control current to the gate of the GIT; detect a voltage at the gate of the GIT; and determine a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current. The turn-on transistor 704 and the current source 708 (e.g., a current delivery circuit) form a turn-on circuit that is configured to output a control current to turn the GIT 76 on. The turn-on transistor 704 may include an inverting input so that a turn-on signal turns the transistor 704 off to deliver current from the current source 708 to the gate of the GIT 76. The turn-off transistor 706 may be configured to turn off the current delivery, for example, turning on to short-circuit the control current, which may turn the GIT 76 off.

[0035] Figure 7Units 710 and 712 form a detection circuit that is configured to determine the load current through the GIT 76 based on the detected voltage at the gate of the GIT. For example, unit 710 may include a comparator or an analog-to-digital converter (ADC) configured to compare the detected voltage at the gate of the GIT 76 with a fixed reference voltage (Vref). Unit 712 may be configured to determine the load current through the GIT 76 based on a predefined transfer function associated with the GIT (such as, similar to Figure 4A and Figure 4B The load current is determined by using the transfer function of those transfer functions shown in FIG. 1 . When the voltage at the sensed gate is greater than a threshold value (e.g., Figure 4A and Figure 4B 3.3 volts in the example of ), the predefined transfer function defines both the load current through the GIT 76 (e.g., line 42 and line 44) and the control current at the gate (line 46 and line 48), and the threshold value is defined in the predefined transfer function associated with the GIT. For example, to determine the load current, the unit 712 of the driver circuit 74 can be configured to: determine the portion of the GIT 76 (e.g., line 46) based on the detected voltage at the gate. Figure 3 and determining the load current based on the total current and the difference between the control current delivered by the driver circuit 74 to the GIT 76.

[0036] The detected voltage at the gate can also be mapped to a temperature measurement, for example based on a known or predefined transfer function at different temperatures (e.g. Figure 4A , Figure 4B ). Thus, in some examples, the GIT driver circuit 74 can also be configured to determine a temperature associated with the GIT 76 based on the determined load current. In still other examples, some of the functions of the units 710, 712 can be handled by an external processor (e.g., Figure 1 12), in which case unit 710 may include an ADC configured to generate a measured voltage at the gate of GIT 76 and output a digital representation of that voltage to an external processor for comparison with a fixed voltage reference.

[0037] Figure 8The GIT driver 84 is another example of a driver circuit configured to control the GIT 86, wherein the driver circuit is configured to: output a control current to a gate of the GIT; detect a voltage at the gate of the GIT; and determine a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current. The turn-on transistor 804 and the current source 808 (e.g., a current delivery circuit) form a turn-on circuit that is configured to output a control current to turn the GIT 86 on. The turn-on transistor 804 may include an inverting input so that a turn-on signal turns the transistor 804 off to deliver current from the current source 808 to the gate of the GIT 86. The turn-off transistor 806 may be configured to turn off the current delivery, for example, turning on to short-circuit the control current, which may turn the GIT 86 off.

[0038] Figure 8 Units 810 and 812 form a detection circuit that is configured to determine the load current through GIT 86 based on the detected voltage at the gate of GIT. For example, unit 810 may include a comparator or ADC that is configured to compare the detected voltage at the gate of GIT 86 with a reference voltage. However, in this example, the reference voltage is not as Figure 7 Instead, the reference voltage is determined (eg, measured) based on the floating reference structure 88. The reference structure 88 substantially mimics the GIT 86 from its gate to its source (eg, as Figure 3 80, from gate 308 to source 304). In addition, the reference structure 88 is formed on the same circuit die 820 as the GIT 86, which ensures that process variations do not affect any measurements or results. The driver circuit 84 may include an additional current source 814 for controlling the reference structure 88. The turn-on transistor 804 and the turn-off transistor 806 are configured to turn the GIT 86 on and simultaneously deliver a DC bias current from the current source 814 to the reference structure 88. The reference structure 88 may include a switch configured to provide a reference or a different type of circuit topology.

[0039] Units 810 and 812 may be configured to determine a load current through the GIT. In particular, by controlling an additional current source 814 for the reference structure 88 simultaneously with controlling the current source 808 for the GIT 86, the driver circuit is configured to generate a reference voltage based on a voltage drop across the reference structure 88. In this case, to generate the reference voltage, the driver circuit 84 is configured to deliver a second current from the current source 814 to the reference structure 88, wherein the second current matches the control current from the current source 808 to the GIT 86. The reference structure 88 defines a portion of the GIT (e.g., Figure 3 The portion Rs shown in FIG. 8 is a portion of the GIT 86 through which both the load current and the control current flow (eg, Figure 3 The portion Rs shown in FIG.

[0040] The detected voltage at the gate can also be mapped to a temperature measurement, for example based on a known or predefined transfer function at different temperatures (e.g. Figure 4A , Figure 4B ). Thus, in some examples, the GIT driver circuit 84 can also be configured to determine a temperature associated with the GIT 86 based on the determined load current. In still other examples, some of the functions of the units 810, 812 can be handled by an external processor (e.g., Figure 1 In the example embodiment, the unit 810 may be executed by the processor 12 shown in FIG. 8 , in which case the unit 810 may include an ADC configured to generate a measured voltage at the gate of the GIT 86 and output a digital representation of the voltage to an external processor for comparison with a fixed voltage reference.

[0041] In some examples, to determine the load current, the driver circuit 84 can be configured to compare the detected voltage at the gate with a reference voltage defined by a voltage drop across the reference structure 88, and determine the load current based on comparing the detected voltage at the gate with the reference voltage. More specifically, to determine the load current, the driver circuit 84 can be configured to determine a voltage drop associated with the load current based on subtracting the reference voltage from the detected voltage at the gate of the GIT 86, and determine the load current based on the voltage drop associated with the load current.

[0042] In some examples, reference structure 88 operates like a Zener diode, e.g., in a manner equivalent to the operation of a Zener diode. Reference structure 88 may include any structure configured to have a transfer characteristic similar to GIT 86, such as a Figure 4A and Figure 4B The transfer characteristic shown in the gate current transfer function shown in . For example, the reference structure 88 can operate in a manner equivalent to a Zener diode having a Zener breakdown voltage of approximately 3.3 volts. In some examples, the reference structure 88 includes a conventional diode having a breakdown voltage of approximately 3.3 volts and a very large forward voltage rating. In some examples, the reference structure 88 may include a FET (such as a MOSFET) having a drain and a gate connected together so that the drain to source operates as an active (controllable) MOS diode. The transfer function of the reference structure 88 can be modeled as a Zener diode type operating in reverse, or as a forward biased pn diode (e.g., with an abnormally high forward bias voltage drop).

[0043] Fig. 9 The GIT driver 94 is another example of a driver circuit configured to control the GIT 96, wherein the driver circuit is configured to: output a control current to a gate of the GIT; detect a voltage at the gate of the GIT; and determine a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current. Fig. 9 The driver circuit 94 and Figure 8 The driver circuit 94 is very similar to the driver circuit 84 of FIG. 1 , and the driver circuit 94 operates in a similar manner to the driver circuit 84 explained above. Therefore, the description will not be repeated here. Figure 8 The above details of the driver circuit operation.

[0044] Driver circuit 94 operates like driver circuit 84, and GIT 96 operates like GIT 86. Current sources 908, 914 operate like current sources 808, 814. Transistors 904, 906 operate like transistors 804, 806. Cells 910, 912 operate like cells 810, 812. Reference structure 98 is formed on the same circuit die 920 as GIT 96. Figure 8 and Fig. 9 The only difference between Figure 8 , the reference structure 88 is floating, its drain node is floating, and for Fig. 9 , reference structure 98 has its drain and source nodes connected to the same circuit node on the low side of turn-off transistor 906. In other words, Fig. 9 In the reference structure 98, the drain and the source are short-circuited to each other.

[0045] for Figure 8 and Fig. 9 In the example shown in FIG. 8 , the gate of the GIT 86, 96 acts as a level shifter, and when the driver is in current drive mode, load current or overheating can be detected by the driver 84, 94 due to the GIT behavior. The comparator or ADC 810, 910 can detect the overcurrent. For calibration when no current is flowing (e.g., for an example in a motor control application), the calibration can be stored in the driver circuit as a "reference" value for use by the comparator or ADC 810, 910 when the GIT 86, 96 is operating.

[0046] Fig.10 and Fig.111 is an equivalent circuit model diagram consistent with the present disclosure, which shows the electrical characteristics of the GIT. In particular, the GIT equivalent circuit 102 represents the following circuit equivalent to the GIT, which has resistors 114, 116, 118, and the resistors 114, 116, 118 define a load current path from the drain to the source, and the resistor Rs 118 defines a portion of the load current path, which includes both the load current and the control current (Igate) applied at the gate of the GIT. The gate-to-source path of the GIT is modeled by the diode 112 and the resistor Rs 118. Therefore, by using a reference structure matched to the elements 112, 118, the driver circuit can zero the voltage drop associated with the control current through the resistor Rs 118 to determine the actual load current through the resistor Rs 118 without any shunt or Hall sensor.

[0047] For example, Fig.11 As shown in , the reference structure can be configured to model diode 172 and resistor 174 in a manner that matches diode 162 and resistor Rs 168. The reference structure can be formed on the same circuit die as the GIT (which is modeled by elements 162, 164, 166, 168). The driver circuit can then use the voltage drop across the reference structure (modeled by elements 172, 174) to zero the voltage drop across the portion of the GIT modeled by elements 162, 168. This can produce an accurate measurement of the voltage drop associated with the load current through resistor Rs without the influence of the control current (Igate).

[0048] The above-described techniques and circuits utilize the special characteristics of the GIT structure to essentially level shift the voltage drop across the source portion of the channel resistance Rs. No shunt is required, and no additional sensing structure is required. In addition, the measurements described herein can be more accurate relative to measurements made by a desaturation (DESAT) detection function sometimes used in driver circuits. The voltage drop across the channel resistance Rs relative to the increase in load current across the source portion of the channel resistance Rs is naturally level shifted to the gate by the GIT structure, which can be measured inside the driver according to the present disclosure.

[0049] Fig.12 is a flow chart illustrating a technique that may be performed by driver circuits 14 , 54 , 74 , 84 , 94 consistent with the present disclosure. Fig.12 Will be from Figure 1 The driver circuit 14 is described from the perspective of FIG. 1 , but the technique can be accomplished by Figure 5 , Figure 7 , Figure 8 or Fig. 9driver circuit 54, 74, 84, 94 or another type of driver circuit is applied.

[0050] Fig.12 1 is a diagram showing a method performed by a driver circuit 14 (eg, a gate driver circuit) configured to control a GIT 16. Fig.12 As shown in FIG. 1 , the driver circuit 14 is configured to output a control current (1201) to the gate of the GIT 16 and detect a voltage (1202) at the gate of the GIT 16. The driver circuit 14 is further configured to determine a load current through the GIT 16 based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

[0051] In some examples, determining the load current by the driver circuit 14 includes comparing the detected voltage at the gate with a fixed reference voltage, and determining the load current based on a predefined transfer function associated with the GIT 16, wherein the predefined transfer function defines both a load current through the GIT 16 and a control current at the gate when the detected voltage at the gate is greater than a threshold defined in the predefined transfer function associated with the GIT 16. In some examples, determining the load current by the driver circuit 14 includes determining the load current based on the predefined function, including determining a total current through a portion of the GIT 16 based on the detected voltage at the gate, and determining the load current based on a difference between the total current and the control current.

[0052] and Fig. 6A and Figure 6B In accordance with the above, in some examples, the process of outputting the control current by the driver circuit 14 includes: outputting the control current in an initial boost phase, wherein the initial boost phase defines a first gate voltage; and outputting a constant current in a driving phase following the boost phase, wherein the driving phase defines a second gate voltage lower than the first gate voltage. In this case, detecting the voltage at the gate of the GIT includes: the driver circuit 14 detecting the second gate voltage.

[0053] In some examples, Fig.12The method shown in also includes: generating a reference voltage based on a voltage drop across a reference structure, wherein generating the reference voltage includes delivering a second current to the reference structure, wherein the second current matches the control current, wherein the reference structure defines a resistance that matches a resistance of a portion of the GIT, and wherein both the load current and the control current flow through the portion of the GIT. In this case, the process of determining the load current by the driver circuit 14 may include: comparing the detected voltage at the gate with the reference voltage, and determining the load current based on comparing the detected voltage at the gate with the reference voltage. In addition, the process of determining the load current may include: determining a voltage drop associated with the load current based on subtracting the reference voltage from the detected voltage at the gate; and determining the load current based on the voltage drop associated with the load current.

[0054] According to the present disclosure, constant current biasing of the GIT structure can be used to switch the GIT in the form of a GaN transistor in an on state and can be used as a level shifter to detect load current and / or overheating from the source portion of the channel resistance Rs. In some examples, the circuit of the present disclosure can achieve very accurate K ILIS , the K ILIS is the load current I L With the sensing current I IS The ratio between them.

[0055] The technology described in the present disclosure may be implemented at least in part with circuit devices, hardware, software, firmware, or any combination thereof. Such hardware, software, and firmware may be implemented in the same device or in separate devices to support the various operations and functions described in the present disclosure. In addition, any of the units, modules, or components may be implemented together, or separately implemented as discrete but interoperable circuits or devices. Describing different features as modules or units is intended to highlight different functional aspects, and does not necessarily mean that such modules or units must be implemented by separate components. On the contrary, the functions associated with one or more modules or units may be performed by separate components or circuits, or integrated in common components or circuits. One or more aspects of the present disclosure may also be performed in software, particularly for examples in which functions may be performed by a processor, in which case those aspects of the technology described in the present disclosure may also be embodied or encoded in a computer-readable medium that stores instructions executed by a processor to implement the described functions.

[0056] The following numbered aspects illustrate one or more aspects of the disclosure.

[0057] Item 1. A driver circuit configured to control a GIT, wherein the driver circuit is configured to: output a control current to a gate of the GIT; detect a voltage at the gate of the GIT; and determine a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

[0058] Item 2. A driver circuit according to Item 1, wherein the driver circuit comprises: a turn-on circuit including a current delivery circuit, wherein the turn-on circuit is configured to output the control current to turn on the GIT; a turn-off circuit configured to short-circuit the control current to turn off the GIT; and a detection circuit configured to determine the load current passing through the GIT based on a detected voltage at the gate of the GIT.

[0059] Clause 3. A driver circuit according to clause 1 or 2, wherein the driver circuit is configured to determine the load current by: comparing the detected voltage at the gate with a fixed reference voltage; and determining the load current based on a predefined transfer function associated with the GIT, wherein when the detected voltage at the gate is greater than a threshold defined in the predefined transfer function associated with the GIT, the predefined transfer function defines both the load current through the GIT and the control current at the gate.

[0060] Clause 4. A driver circuit according to any one of clauses 1-3, wherein the driver circuit is configured to determine the load current as follows: determine a total current through a portion of the GIT based on a detected voltage at the gate; and determine the load current based on a difference between the total current and the control current.

[0061] Clause 5. A driver circuit according to any one of clauses 1-4, wherein the driver circuit is configured to output the control current as follows: output the control current in an initial boost phase, wherein the initial boost phase defines a first gate voltage; and output the control current in a drive phase following the boost phase, wherein the drive phase defines a second gate voltage, the second gate voltage being lower than the first gate voltage, wherein the driver circuit is configured to detect the voltage at the gate of the GIT as follows: detect the second gate voltage.

[0062] Clause 6. A driver circuit according to any one of clauses 1-5, wherein the driver circuit is configured to output the control current as follows: output the control current in an overload phase that occurs during the driving phase, wherein the driver circuit is configured to: identify the overload phase based on the load current and disable the control current in response to identifying the overload phase.

[0063] Clause 7. The driver circuit of any of Clauses 1-6, wherein the driver circuit is further configured to determine a temperature associated with the GIT based on the load current.

[0064] Clause 8. A driver circuit according to any one of clauses 1-2 or 4-7, wherein the driver circuit is configured to: generate a reference voltage based on a voltage drop across a reference structure, wherein the driver circuit is configured to generate the reference voltage as follows: deliver a second current to the reference structure, wherein the second current matches the control current, and wherein the reference structure defines a resistance that matches the resistance of a portion of the GIT, wherein both the load current and the control current flow through the portion of the GIT.

[0065] Item 9. A driver circuit according to Item 8, wherein the driver circuit is configured to determine the load current as follows: compare the detected voltage at the gate with the reference voltage; and determine the load current based on comparing the detected voltage at the gate with the reference voltage.

[0066] Clause 10. A driver circuit according to any one of clauses 8 or 9, wherein the driver circuit is configured to determine the load current as follows: determine a voltage drop associated with the load current based on subtracting the reference voltage from the detected voltage at the gate; and determine the load current based on the voltage drop associated with the load current.

[0067] Item 11. A method performed by a gate driver circuit configured to control a GIT, the method comprising: outputting a control current to a gate of the GIT; detecting a voltage at the gate of the GIT; and determining a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

[0068] Clause 12. A method according to clause 11, wherein determining the load current includes: comparing the detected voltage at the gate with a fixed reference voltage; and determining the load current based on a predefined transfer function associated with the GIT, wherein when the detected voltage at the gate is greater than a threshold defined in the predefined transfer function associated with the GIT, the predefined transfer function defines both the load current through the GIT and the control current at the gate.

[0069] Clause 13. A method according to clause 11 or 12, wherein determining the load current based on the predefined function includes: determining a total current through a portion of the GIT based on the detected voltage at the gate; and determining the load current based on a difference between the total current and the control current.

[0070] Item 14. A method according to any one of items 11-13, wherein outputting the control current includes: outputting the control current in an initial boost phase, wherein the initial boost phase defines a first gate voltage; and outputting a constant current in a drive phase following the boost phase, wherein the drive phase defines a second gate voltage, the second gate voltage being lower than the first gate voltage, wherein detecting the voltage at the gate of the GIT includes: detecting the second gate voltage.

[0071] Clause 15. A method according to any one of clauses 11, 13 or 14, the method further comprising: generating a reference voltage based on a voltage drop across a reference structure, wherein generating the reference voltage comprises: delivering a second current to the reference structure, wherein the second current matches the control current, wherein the reference structure defines a resistance that matches the resistance of a portion of the GIT, and wherein both the load current and the control current flow through the portion of the GIT.

[0072] Clause 16. A method according to any one of clauses 11 or 13-15, wherein determining the load current comprises: comparing the detected voltage at the gate with the reference voltage; and determining the load current based on comparing the detected voltage at the gate with the reference voltage.

[0073] Clause 17. A method according to any one of clauses 11 or 13-16, wherein determining the load current comprises: determining a voltage drop associated with the load current based on subtracting the reference voltage from the detected voltage at the gate; and determining the load current based on the voltage drop associated with the load current.

[0074] Item 18. A system comprising: a GIT configured to be controlled by a current signal at a gate of the GIT; and a driver circuit configured to control the GIT, wherein the driver circuit is configured to: output a control current to the gate of the GIT; detect a voltage at the gate of the GIT; and determine a load current through the GIT based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

[0075] Clause 19. The system of Clause 18, wherein the GIT comprises a FET formed in GaN.

[0076] Various devices, circuits, methods and features are described in this disclosure. These and other devices, circuits, methods and features are within the scope of the following claims.

Claims

1. A driver circuit configured to control a gate injection transistor GIT, wherein the driver circuit is configured to: outputting a control current to a gate of the GIT; detecting a voltage at the gate of the GIT; and A load current through the GIT is determined based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

2. The driver circuit according to claim 1, wherein the driver circuit comprises: a turn-on circuit, comprising a current delivery circuit, wherein the turn-on circuit is configured to output the control current to turn on the GIT; a shut-off circuit configured to short-circuit the control current to shut down the GIT; as well as A detection circuit is configured to determine the load current through the GIT based on the detected voltage at the gate of the GIT.

3. The driver circuit of claim 1 , wherein the driver circuit is configured to determine the load current as follows: comparing the detected voltage at the gate with a fixed reference voltage; and The load current is determined based on a predefined transfer function associated with the GIT, wherein the predefined transfer function defines both the load current through the GIT and the control current at the gate when the detected voltage at the gate is greater than a threshold defined in the predefined transfer function associated with the GIT.

4. The driver circuit according to claim 3, wherein the driver circuit is configured to determine the load current as follows: determining a total current through a portion of the GIT based on the detected voltage at the gate; and The load current is determined based on a difference between the total current and the control current.

5. The driver circuit according to claim 1 , wherein the driver circuit is configured to output the control current as follows: outputting the control current in an initial boost phase, wherein the initial boost phase defines a first gate voltage; and outputting the control current in a driving phase following the boost phase, wherein the driving phase defines a second gate voltage, the second gate voltage being lower than the first gate voltage, Wherein the driver circuit is configured to detect the voltage at the gate of the GIT as follows: detecting the second gate voltage.

6. The driver circuit according to claim 1, wherein the driver circuit is configured to output the control current as follows: The control current is output in an overload phase occurring during the driving phase, wherein the driver circuit is configured to identify the overload phase based on the load current and disable the control current in response to identifying the overload phase. 7 . The driver circuit of claim 1 , wherein the driver circuit is further configured to determine a temperature associated with the GIT based on the load current.

8. The driver circuit according to claim 1, wherein the driver circuit is configured as: Based on the voltage drop across the reference structure, a reference voltage is generated. wherein the driver circuit is configured to generate the reference voltage by delivering a second current to the reference structure, wherein the second current matches the control current, and Wherein the reference structure defines a resistance that matches a resistance of a portion of the GIT through which both the load current and the control current flow.

9. The driver circuit of claim 8, wherein the driver circuit is configured to determine the load current as follows: comparing the detected voltage at the gate with the reference voltage; and The load current is determined based on comparing the detected voltage at the gate with the reference voltage.

10. The driver circuit of claim 9, wherein the driver circuit is configured to determine the load current as follows: determining a voltage drop associated with a load current based on subtracting the reference voltage from the detected voltage at the gate; and The load current is determined based on the voltage drop associated with the load current.

11. A method performed by a gate driver circuit, the gate driver circuit being configured to control a gate injection transistor GIT, the method comprising: outputting a control current to a gate of the GIT; detecting a voltage at the gate of the GIT; as well as A load current through the GIT is determined based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

12. The method of claim 11 , wherein determining the load current comprises: comparing the detected voltage at the gate with a fixed reference voltage; as well as The load current is determined based on a predefined transfer function associated with the GIT, wherein the predefined transfer function defines both the load current through the GIT and the control current at the gate when the detected voltage at the gate is greater than a threshold defined in the predefined transfer function associated with the GIT.

13. The method of claim 12, wherein determining the load current based on the predefined function comprises: determining a total current through a portion of the GIT based on the detected voltage at the gate; as well as The load current is determined based on a difference between the total current and the control current.

14. The method according to claim 11, wherein outputting the control current comprises: outputting the control current in an initial boost phase, wherein the initial boost phase defines a first gate voltage; as well as outputting a constant current in a driving phase following the boost phase, wherein the driving phase defines a second gate voltage that is lower than the first gate voltage, The detecting the voltage at the gate of the GIT includes: detecting the second gate voltage.

15. The method according to claim 11, further comprising: Based on the voltage drop across the reference structure, a reference voltage is generated. wherein generating the reference voltage comprises: delivering a second current to the reference structure, wherein the second current matches the control current, wherein the reference structure defines a resistance that matches a resistance of a portion of the GIT, and Wherein both the load current and the control current flow through the portion of the GIT.

16. The method of claim 15, wherein determining the load current comprises: comparing the detected voltage at the gate with the reference voltage; as well as The load current is determined based on comparing the detected voltage at the gate with the reference voltage.

17. The method of claim 16, wherein determining the load current comprises: determining a voltage drop associated with a load current based on subtracting the reference voltage from the detected voltage at the gate; as well as The load current is determined based on the voltage drop associated with the load current.

18. A system comprising: a gate injection transistor GIT configured to be controlled by a current signal at a gate of said GIT; as well as a driver circuit configured to control the GIT, wherein the driver circuit is configured to: outputting a control current to the gate of the GIT; detecting a voltage at the gate of the GIT; and A load current through the GIT is determined based on the detected voltage at the gate of the GIT, wherein the voltage at the gate of the GIT depends on both the load current and the control current.

19. The system of claim 18, wherein the GIT comprises a field effect transistor (FET) formed in gallium nitride (GaN).

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