MBUS host end received signal anti-interference working method and system

Abstract

The invention provides an MBUS host end received signal anti-interference working method and system, and relates to the technical field of intelligent instruments, and the method comprises the steps: an MBUS receives a current signal of a slave, obtains a voltage signal through sampling, and carries out the filtering of the voltage signal through a filter circuit; performing in-phase amplification on the filtered voltage signal through an in-phase amplification circuit, and filtering the in-phase amplified voltage signal to obtain an NOW signal; buffering and isolating the NOW signal, carrying out voltage division on the NOW signal through a voltage division circuit to obtain an LAST1 signal, and carrying out buffering delay on the LAST1 signal through tantalum capacitors connected in parallel in the voltage division circuit to obtain a smooth LAST1 signal; a smooth LAST1 signal is input into the bleeder circuit for voltage maintenance, then the smooth LAST1 signal is input into the voltage boosting circuit, the smooth LAST1 signal is boosted to obtain an LAST2 signal, the anti-interference capability of a subsequent TTL conversion circuit is improved to a certain extent, and finally the smooth LAST1 signal is converted into a TTL level through the TTL conversion circuit and sent to a single-chip microcomputer for processing.

Description

Technical Field

[0001] The present disclosure relates to the technical field of intelligent instruments, and in particular to a working method and system for anti-interference of received signals at an MBUS host end. Background Art

[0002] The statements in this section merely provide background information related to the present disclosure and do not necessarily constitute prior art.

[0003] MBUS is a bus structure specially used for public utility meters, designed to meet the needs of network systems and remote meter reading. It has the characteristics of simple wiring, strong anti-interference ability, and long communication distance, and is widely used in data collection of various intelligent meters. MBUS has been widely used in the field of data collection of intelligent meters for its efficient data transmission capability and reliability.

[0004] The development focus of existing MBUS technology is to improve its load capacity. However, in actual application scenarios, due to the complexity of the on-site environment, the MBUS bus is often subject to various interferences, especially power frequency interference, which will not only lead to a decrease in the success rate of meter reading, but also significantly affect work efficiency. In addition, the current method is to use discrete components with an amplifier as the core to build an MBUS host circuit, which is equivalent to building an MBUS host circuit with discrete components inside the dedicated MBUS host IC chip. The circuit is relatively simple and has poor reliability. Summary of the invention

[0005] In order to solve the above problems, the present invention proposes a working method and system for anti-interference of MBUS host-side receiving signals. By designing a host-side MBUS circuit, a filtering circuit, a discharge circuit and a voltage boosting circuit are used, and the voltage is boosted by the voltage boosting circuit, so as to increase the anti-interference ability of the subsequent TTL conversion circuit to a certain extent.

[0006] According to some embodiments, the present disclosure adopts the following technical solutions:

[0007] An anti-interference working system for receiving signals at an MBUS host end includes an MBUS, a filtering circuit, a common-phase amplifier circuit, a voltage divider circuit, a discharge circuit, a voltage raising circuit and a conversion circuit. The MBUS receives a current signal from a slave and obtains a voltage signal by sampling, and filters the voltage signal by a filtering circuit; the filtered voltage signal is amplified by a common-phase amplifier circuit, and the voltage signal after the common-phase amplification is filtered to obtain a NOW signal;

[0008] The NOW signal is buffered and isolated, and the NOW signal is divided by a voltage divider circuit to obtain a LAST1 signal, and the LAST1 signal is buffered and delayed by a tantalum capacitor connected in parallel in the voltage divider circuit to obtain a smooth LAST1 signal;

[0009] The smooth LAST1 signal is input into the discharge circuit for voltage maintenance, and then input into the voltage raising circuit to raise the smooth LAST1 signal to obtain the LAST2 signal, thereby increasing the anti-interference ability of the subsequent TTL conversion circuit to a certain extent, and finally converted into TTL level through the TTL conversion circuit and sent to the microcontroller for processing.

[0010] According to some embodiments, the present disclosure adopts the following technical solutions:

[0011] A working method for anti-interference of a signal received by an MBUS host, comprising:

[0012] MBUS receives the current signal of the slave and obtains the voltage signal through sampling, and filters the voltage signal through the filter circuit;

[0013] The filtered voltage signal is amplified in phase by a common-phase amplifier circuit, and the voltage signal after common-phase amplification is filtered to obtain a NOW signal;

[0014] The NOW signal is buffered and isolated, and the NOW signal is divided by a voltage divider circuit to obtain a LAST1 signal, and the LAST1 signal is buffered and delayed by a tantalum capacitor connected in parallel in the voltage divider circuit to obtain a smooth LAST1 signal;

[0015] The smooth LAST1 signal is input into the discharge circuit for voltage maintenance, and then input into the voltage raising circuit to raise the smooth LAST1 signal to obtain the LAST2 signal, thereby increasing the anti-interference ability of the subsequent TTL conversion circuit to a certain extent, and finally converted into TTL level through the TTL conversion circuit and sent to the microcontroller for processing.

[0016] According to some embodiments, the present disclosure adopts the following technical solutions:

[0017] A computer program product includes a computer program. When the computer program is executed by a processor, the computer program implements a working method for preventing interference of a received signal at an MBUS host end.

[0018] According to some embodiments, the present disclosure adopts the following technical solutions:

[0019] A non-transitory computer-readable storage medium is used to store computer instructions. When the computer instructions are executed by a processor, a working method for anti-interference of a signal received by an MBUS host end is implemented.

[0020] According to some embodiments, the present disclosure adopts the following technical solutions:

[0021] An electronic device comprises: a processor, a memory and a computer program; wherein the processor is connected to the memory, the computer program is stored in the memory, and when the electronic device is running, the processor executes the computer program stored in the memory, so that the electronic device executes the working method for anti-interference of MBUS host-side received signals.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] The present invention discloses an anti-interference working system for an MBUS host-side receiving signal. The host-side MBUS circuit is designed, including an MBUS, a filtering circuit, a common-phase amplifier circuit, a voltage divider circuit, a discharge circuit, a voltage raising circuit and a conversion circuit. The filtering circuit can filter out high-frequency and low-frequency interference introduced into the MBUS receiving signal; the common-phase amplifier circuit can amplify the sampled weak voltage signal to a NOW signal, so as to facilitate the subsequent circuit to process the signal; the voltage divider circuit can divide and buffer the amplified signal to obtain a relatively smooth LAST1 signal; the discharge circuit is used to reduce the interference of the slave to the MBUS bus when the host sends; the voltage raising circuit can raise the voltage of the relatively smooth LAST1 signal to a certain extent, so as to improve the anti-interference ability during TTL conversion; the TTL conversion circuit can compare the NOW signal with the LAST2 signal to obtain a TTL signal, so as to improve the reliability and stability of the circuit and the work efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The accompanying drawings constituting a part of the present disclosure are used to provide a further understanding of the present disclosure. The illustrative embodiments of the present disclosure and their descriptions are used to explain the present disclosure and do not constitute an improper limitation on the present disclosure.

[0025] Figure 1 A schematic diagram of a filter circuit and a sampling circuit according to an embodiment of the present disclosure;

[0026] Figure 2 is a circuit diagram of a common-mode amplifier circuit according to an embodiment of the present disclosure;

[0027] Figure 3 is a circuit diagram of a voltage divider circuit according to an embodiment of the present disclosure;

[0028] Figure 4 is a circuit diagram of a discharge circuit according to an embodiment of the present disclosure;

[0029] Figure 5 is a circuit diagram of a voltage boosting circuit according to an embodiment of the present disclosure;

[0030] Figure 6 Schematic diagram of a TTL conversion circuit according to an embodiment of the present disclosure;

[0031] Figure 7 Schematic diagram of the overall circuit of the host-side MBUS circuit of the embodiment of the present disclosure. DETAILED DESCRIPTION

[0032] The present disclosure is further described below in conjunction with the accompanying drawings and embodiments.

[0033] It should be noted that the following detailed descriptions are all illustrative and are intended to provide further explanation of the present disclosure. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present disclosure belongs.

[0034] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0035] Example 1

[0036] In one embodiment of the present disclosure, a working system for anti-interference of an MBUS host-side receiving signal is provided, and a host-side MBUS circuit with a simple and reliable structure, complete functions, strong anti-interference ability, and good compatibility with slaves is provided, which specifically includes an MBUS, a filtering circuit, a common-phase amplifier circuit, a voltage divider circuit, a discharge circuit, a voltage raising circuit, and a conversion circuit. The MBUS receives a current signal from a slave and obtains a voltage signal by sampling, and filters the voltage signal by a filtering circuit; the filtered voltage signal is amplified by a common-phase amplifier circuit, and the voltage signal after the common-phase amplification is filtered to obtain a NOW signal;

[0037] The NOW signal is buffered and isolated, and the NOW signal is divided by a voltage divider circuit to obtain a LAST1 signal, and the LAST1 signal is buffered and delayed by a tantalum capacitor connected in parallel in the voltage divider circuit to obtain a smooth LAST1 signal;

[0038] The smooth LAST1 signal is input into the discharge circuit for voltage maintenance, and then input into the voltage raising circuit to raise the smooth LAST1 signal to obtain the LAST2 signal, thereby increasing the anti-interference ability of the subsequent TTL conversion circuit to a certain extent, and finally converted into TTL level through the TTL conversion circuit and sent to the microcontroller for processing.

[0039] As an embodiment, a host-side MBUS circuit of a working system for anti-interference of an MBUS host-side receiving signal includes an MBUS, a filtering circuit, a common-phase amplifier circuit, a voltage divider circuit, a discharge circuit, a voltage raising circuit, and a conversion circuit. First, the filtering circuit is connected to the MBUS, and the filtering circuit includes a resistor R3, a tantalum capacitor CT1, and a tantalum capacitor CT2. The resistor R3, the tantalum capacitor CT1, and the tantalum capacitor CT2 are connected in parallel. The current signal received by the MBUS from the slave is sampled through the resistor R3 to obtain a voltage signal, and the tantalum capacitors CT1 and CT2 perform high-frequency and low-frequency filtering on the voltage signal. Among them, the values ​​of CT1 and CT2, CT1 is a large capacitor that can filter low frequencies, and CT2 is a small capacitor that can filter high frequencies, which can be selected according to filtering high-frequency and low-frequency filtering noise.

[0040] Specifically, Figure 1 As shown, the resistor R3, the tantalum capacitor CT1 and the tantalum capacitor CT2 are connected in parallel, and one end pin of the resistor R3, the tantalum capacitor CT1 and the tantalum capacitor CT2 are connected to the MBUS, and the other ends are connected to the ground wire respectively. The current signal received by the MBUS from the slave is sampled through the resistor R3 to obtain a voltage signal, and the voltage signal is filtered at high frequency and low frequency through the tantalum capacitors CT1 and CT2.

[0041] Furthermore, if Figure 2 As shown, the in-phase amplifier circuit includes a capacitor C1, a resistor R6, a resistor R8, a resistor R10 and an amplifier U2, which amplifies the sampled voltage signal in-phase, controls the amplification factor through resistors R8 and R10, and the amplified voltage signal is RC filtered through resistor R6 and capacitor C1 to obtain a NOW signal.

[0042] Specifically, the sampled voltage signal enters the input pin of the amplifier U2 for in-phase amplification and is output through the OUT / A output pin. The first end of the resistor R6 is connected to the first end of the resistor R8 and is also connected to the output pin 1 of the amplifier U2. The other end of the resistor R6 is connected to one end of the capacitor C1, and the other end of the capacitor C1 is connected to the ground wire. The first end of the resistor R8 is connected to the resistor R6, and the other end is connected to one end of the resistor R10, and the other end of the resistor R10 is connected to the ground wire. At the same time, the pin 4 of the amplifier U2 is also connected to the ground wire, and the pin 8 is connected to the 24V power supply. The sampled voltage signal is amplified in-phase, and the amplification factor can be controlled by R8 and R10. The amplified signal is RC filtered by R6 and C1 to obtain the NOW signal.

[0043] As an example, regarding the selection of parameters of R3, R10, and R8, it is assumed that a single MBUS is mounted with N slaves during normal operation, and the maximum current of each slave is 1.5 mA. During communication, the maximum current increases by 20 mA, so the current of MBUS- is theoretically:

[0044] A=N*1.5+20

[0045] The voltage of NOW is:

[0046]

[0047] However, according to the working principle of the comparator chip, the input signal must be less than Vcc-V (where Vcc is the chip power supply voltage and V is the limit voltage), otherwise the comparator will not work properly.

[0048] Furthermore, if Figure 3 As shown, the voltage divider circuit includes resistors R13, R15, R16, tantalum capacitor CT3 and amplifier U4. After the NOW signal enters the voltage divider circuit, it is buffered and isolated by the voltage follower on the amplifier U4, and then the signal is divided by resistors R13 and R16 to obtain the LAST1 signal, and then the LAST1 signal is buffered and delayed by the tantalum capacitor in parallel in the voltage divider circuit to obtain a smooth LAST1 signal.

[0049] Specifically, resistor R16 and tantalum capacitor CT3 are connected in parallel, a first end of resistor R13 is connected to one end of resistor R16, the other end of resistor R13 is connected to output pin 1 of amplifier U4, a NOW signal is input at one end of resistor R15, the other end of resistor R15 is connected to input pin 3 of amplifier U4, the other end of resistor R16 is connected to ground, and pin 4 of amplifier U4 is grounded, and pin 8 of amplifier U4 is connected to 24v power supply. NOW signal is buffered and isolated through a voltage follower. Subsequently, the signal is divided by resistor R13 and resistor R16 to obtain LAST1. In addition, a tantalum capacitor CT3 is connected in parallel on resistor R16, the purpose is to play a role of buffering delay to LAST1 signal, and obtain a relatively gentle LAST1 signal.

[0050] Furthermore, if Figure 4 As shown, the discharge circuit includes resistors R1, R2, R4, R5, NPN transistor Q1, and comparator U1. When the serial port of the microcontroller sends data, that is, when MBUS sends data to the slave, the TTL-Tx signal is higher than VCC_TTL / 2, and pin 1 of the U1 comparator will be pulled high by VCC_TTL, then Q1 is turned on, the discharge circuit is turned on, and the voltage of LAST1 will be discharged through the NPN transistor Q1.

[0051] Specifically, one end of resistor R2 is connected to the VCC_TTL signal, and the other end is connected to the output pin 1 of comparator U1 and one end of Q1 respectively. The other end of Q1 is connected to resistor R1 and grounded. The other end of resistor R1 is connected to the LAST1 signal. One end of resistor R4 is connected to the TTL-Tx signal, and the other end is connected to comparator pin 2. Pin 3 of comparator U1 is connected to resistor R5. The other end of resistor R5 is connected to the VCC_TTL / 2 signal. Pin 4 of comparator U1 is grounded, and pin 8 is connected to a 24V power supply. Among them, TTL-Tx and TTL-Rx are serial port TTL signals of the microcontroller, VCC_TTL is the high level voltage of TTL, and VCC_TTL / 2 is half the high level voltage of TTL. VCC_T is the raised voltage.

[0052] When the serial port of the microcontroller sends data, that is, when MBUS sends data to the slave, the TTL-Tx signal is higher than VCC_TTL / 2, and the 1st pin of the U1 comparator will be pulled high by VCC_TTL, causing Q1 to turn on, and the LAST1 signal will be pulled to the ground through the resistor R1, but the minimum voltage will not be lower than

[0053] Furthermore, the function of the discharge circuit is: if there is no discharge circuit in the circuit, in the case of inductive characteristics of the slave, when the host sends data through the MBUS bus, NOW will slowly increase during the period of sending data and then slowly decrease. This will cause the voltage of LAST1 to slowly increase with NOW, but due to the presence of CT3 capacitor on LAST1, this will cause LAST1 to not decrease with NOW, but will maintain for a period of time. In addition, there will be a voltage increase from LAST1 to LAST2 later. If VCC_T is not selected properly, the voltage of LAST2 will be higher than the highest voltage of NOW, and the analysis cannot be successful, so it is difficult to control without a discharge circuit.

[0054] If there is a discharge circuit in the circuit, when the host sends data through MBUS, the voltage of LAST1 will be discharged through Q1, but its minimum voltage will not be lower than In addition, the selection of the resistance value of R13 is very important. Due to the existence of the discharge circuit, if the charging is too slow and the slave device replies with data quickly, the voltage of LAST2 will not exceed the minimum voltage of NOW in time, resulting in failure to parse the data replied by the slave device.

[0055] As an embodiment, when the slave has a resistive characteristic, the absence of a discharge circuit does not affect the host's parsing of data. The reason is that when MBUS+ sends data, the current on the bus will decrease, thereby causing the voltage of NOW to decrease, so it does not affect the host's subsequent parsing of the data sent by the slave.

[0056] As an example, regarding the selection of parameters of R1, R13, and R16, the resistance of R16 should be much larger than that of R13, in order to make the voltage of LAST1 as close to the voltage of NOW as possible. Since LAST1 needs to meet the characteristics of fast charging and slow discharge, the resistance of R13 determines the charging speed of CT3, and the resistance of R1 determines the discharge speed of CT3, so R13 <R1。

[0057] Furthermore, the voltage raising circuit includes resistors R7, R9, R11, R12 and amplifier U3, and the voltage of the smooth LAST1 signal is raised to LAST2 through the in-phase adder on the amplifier U3, thereby increasing the anti-interference capability of the subsequent TTL conversion circuit to a certain extent.

[0058] Specifically, Figure 5 As shown, one end of the resistor R7 is grounded, and the other end is connected to one end of the resistor R9. The other end of the resistor R9 is respectively connected to the output pin 1 of the amplifier U3 and the output LAST2 signal. The pin 4 of the amplifier U3 is grounded, and the pin 3 of the amplifier U3 is respectively connected to one end of the resistor R12 and the resistor R11. The other end of the resistor R12 is connected to the LAST1 signal, and the other end of the resistor R11 is connected to the VCC_T signal. The pin 8 of the amplifier U3 is connected to the 24V power supply. LAST1 is raised to LAST2 through the same direction addition circuit, where VCC_T can be selected according to the actual situation. The purpose of raising the LAST1 signal is to prevent NOW from carrying clutter that has not been filtered out by the first and second level filters, which affects the comparison of the NOW and LAST2 signals. The voltage of VCC_T determines the anti-interference ability to a certain extent.

[0059] Furthermore, the TTL conversion circuit includes a resistor R14 and a capacitor C2, one end of the resistor R14 is connected to the output pin 1 of the comparator U5 and connected to the TTL-Rx signal, and the other end is connected to the VCC_TTL signal; one end of the capacitor C2 is grounded, and the other end is connected to the TTL-Rx signal; the pin 2 of the comparator U5 is connected to the NOW signal, the pin 3 of the comparator U5 is connected to the LAST2 signal, the pin 4 of the comparator U5 is grounded, and the pin 8 of the comparator U5 is connected to the 24V power supply. The NOW and LAST2 signals are compared and converted to TTL level to the Rx of the microcontroller.

[0060] Furthermore, regarding the selection of R7, R9, R11, R12, and VCC_T lift voltage, when R7=R9=R11=R12,

[0061] V LAST2 =V LAST1 +VCC_T

[0062] Among them, VCC_T can be selected according to the actual situation. Since the NOW signal will be distorted after RC filtering, subsequent calculation is required to give the value of VCC_T.

[0063] As an embodiment, regarding the selection of parameters in the filter, the values ​​of CT1 and CT2 can be selected based on filtering out high-frequency and low-frequency filter noise. The values ​​of R6 and C1 in the RC filter need to be calculated later.

[0064] Example 2

[0065] In one embodiment of the present disclosure, a method for preventing interference of a received signal at an MBUS host is provided, comprising:

[0066] MBUS receives the current signal of the slave and obtains the voltage signal through sampling, and filters the voltage signal through the filter circuit;

[0067] The filtered voltage signal is amplified in phase by a common-phase amplifier circuit, and the voltage signal after common-phase amplification is filtered to obtain a NOW signal;

[0068] The NOW signal is buffered and isolated, and the NOW signal is divided by a voltage divider circuit to obtain a LAST1 signal, and the LAST1 signal is buffered and delayed by a tantalum capacitor connected in parallel in the voltage divider circuit to obtain a smooth LAST1 signal;

[0069] The smooth LAST1 signal is input into the discharge circuit for voltage maintenance, and then input into the voltage raising circuit to raise the smooth LAST1 signal to obtain the LAST2 signal, thereby increasing the anti-interference ability of the subsequent TTL conversion circuit to a certain extent, and finally converted into TTL level through the TTL conversion circuit and sent to the microcontroller for processing.

[0070] As an example, Figure 7 The circuit shown works as follows:

[0071] When the host receives data from the slave, some interference may be introduced on MBUS-. First, the current is converted to voltage and sampled through the R3 resistor. Then, the data is filtered through CT1 and CT2 to remove high and low frequency interference.

[0072] The filtered signal AV is amplified by the same-direction amplifier on U2, and then filtered by the RC filter composed of R6 and C1 to obtain the NOW signal.

[0073] The NOW signal first passes through the voltage follower on U4, then passes through R13 and R16 for voltage division, and CT3 is added on R16 for buffering delay to obtain LAST1.

[0074] When the host sends data on the MBUS bus, Q1 will be turned on, opening the discharge circuit and pulling the NOW signal low to prevent the inductive slave from causing the LAST1 signal to rise and affecting the host's analysis of the slave's reply data.

[0075] The voltage of LAST1 is raised to LAST2 through the in-phase adder on U3, in order to increase the anti-interference ability of the subsequent TTL conversion circuit to a certain extent.

[0076] Finally, the NOW and LAST2 signals are compared by the comparator on U5 to obtain the TTL level.

[0077] Example 3

[0078] In one embodiment of the present disclosure, a computer program product is provided, including a computer program. When the computer program is executed by a processor, the working method for preventing interference of a received signal at an MBUS host end is implemented.

[0079] Example 4

[0080] In one embodiment of the present disclosure, a non-transitory computer-readable storage medium is provided, wherein the non-transitory computer-readable storage medium is used to store computer instructions. When the computer instructions are executed by a processor, the working method of anti-interference of a received signal of an MBUS host end is implemented.

[0081] Example 5

[0082] In one embodiment of the present disclosure, an electronic device is provided, including: a processor, a memory, and a computer program; wherein the processor is connected to the memory, the computer program is stored in the memory, and when the electronic device is running, the processor executes the computer program stored in the memory, so that the electronic device executes the working method for anti-interference of MBUS host-side received signals.

[0083] The present disclosure is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present disclosure. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0084] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0085] Although the above describes the specific implementation methods of the present disclosure in conjunction with the accompanying drawings, it is not intended to limit the scope of protection of the present disclosure. Technical personnel in the relevant field should understand that on the basis of the technical solution of the present disclosure, various modifications or variations that can be made by those skilled in the art without creative work are still within the scope of protection of the present disclosure.

Claims

1. A working system for anti-interference of MBUS host-side receiving signals, characterized in that: It includes MBUS, filtering circuit, common-phase amplifier circuit, voltage divider circuit, discharge circuit, voltage raising circuit and conversion circuit. The MBUS receives the current signal of the slave and obtains the voltage signal through sampling, and filters the voltage signal through the filtering circuit; the filtered voltage signal is amplified in the same phase by the common-phase amplifier circuit, and the voltage signal after the common-phase amplification is filtered to obtain the NOW signal; The NOW signal is buffered and isolated, and the NOW signal is divided by a voltage divider circuit to obtain a LAST1 signal, and the LAST1 signal is buffered and delayed by a tantalum capacitor connected in parallel in the voltage divider circuit to obtain a smooth LAST1 signal; The smooth LAST1 signal is input into the discharge circuit for voltage maintenance, and then input into the voltage raising circuit to raise the smooth LAST1 signal to obtain the LAST2 signal, thereby increasing the anti-interference ability of the subsequent TTL conversion circuit to a certain extent, and finally converted into TTL level through the TTL conversion circuit and sent to the microcontroller for processing.

2. The MBUS host-side receiving signal anti-interference working system as claimed in claim 1, characterized in that: The filtering circuit is connected to MBUS, and the filtering circuit includes a resistor R3, a tantalum capacitor CT1 and a tantalum capacitor CT2. The resistor R3, the tantalum capacitor CT1 and the tantalum capacitor CT2 are connected in parallel. The MBUS receives the current signal from the slave and samples it through the resistor R3 to obtain a voltage signal. The tantalum capacitors CT1 and CT2 perform high-frequency and low-frequency filtering on the voltage signal.

3. The MBUS host-side receiving signal anti-interference working system as claimed in claim 1, characterized in that: The in-phase amplifier circuit includes capacitor C1, resistor R6, resistor R8, resistor R10 and amplifier U2, which amplifies the sampled voltage signal in-phase, controls the amplification factor through resistor R8 and resistor R10, and then passes through resistor R6 and capacitor C1 for RC filtering to obtain the NOW signal.

4. The MBUS host-side receiving signal anti-interference working system as claimed in claim 1, characterized in that: The voltage divider circuit includes resistor R13, resistor R15, resistor R16, tantalum capacitor CT3 and amplifier U4. After the NOW signal enters the voltage divider circuit, it is buffered and isolated by the voltage follower on the amplifier U4, and then the signal is divided by R13 and R16 to obtain the LAST1 signal. The LAST1 signal is then buffered and delayed by the tantalum capacitor in parallel in the voltage divider circuit to obtain a smooth LAST1 signal.

5. The MBUS host-side receiving signal anti-interference working system as claimed in claim 1, characterized in that: The discharge circuit includes resistors R1, R2, R4, R5, Q1, and comparator U1. When the serial port of the microcontroller sends data, that is, when MBUS sends data to the slave, the TTL-Tx signal is higher than VCC_TTL / 2, and pin 1 of the U1 comparator will be pulled high by VCC_TTL, then Q1 is turned on, the discharge circuit is turned on, and the voltage of LAST1 will be discharged through Q1.

6. The MBUS host-side receiving signal anti-interference working system as claimed in claim 1, characterized in that: The voltage raising circuit includes resistors R7, R9, R11, R12 and amplifier U3. The voltage of the smooth LAST1 signal is raised to LAST2 through the in-phase adder on the amplifier U3, thereby increasing the anti-interference capability of the subsequent TTL conversion circuit to a certain extent.

7. A working method for anti-interference of received signals at an MBUS host end, characterized in that: include: MBUS receives the current signal of the slave and obtains the voltage signal through sampling, and filters the voltage signal through the filter circuit; The filtered voltage signal is amplified in phase by a common-phase amplifier circuit, and the voltage signal after common-phase amplification is filtered to obtain a NOW signal; The NOW signal is buffered and isolated, and the NOW signal is divided by a voltage divider circuit to obtain a LAST1 signal, and the LAST1 signal is buffered and delayed by a tantalum capacitor connected in parallel in the voltage divider circuit to obtain a smooth LAST1 signal; The smooth LAST1 signal is input into the discharge circuit for voltage maintenance, and then input into the voltage raising circuit to raise the smooth LAST1 signal to obtain the LAST2 signal, thereby increasing the anti-interference ability of the subsequent TTL conversion circuit to a certain extent, and finally converted into TTL level through the TTL conversion circuit and sent to the microcontroller for processing.

8. A computer program product, comprising a computer program, characterized in that When the computer program is executed by the processor, the working method for anti-interference of MBUS host receiving signals as described in claim 7 is implemented.

9. A non-transitory computer-readable storage medium, characterized in that: The non-transitory computer-readable storage medium is used to store computer instructions. When the computer instructions are executed by the processor, the working method for anti-interference of MBUS host receiving signals as claimed in claim 7 is implemented.

10. An electronic device, characterized in that: include: A processor, a memory and a computer program; wherein the processor is connected to the memory, the computer program is stored in the memory, and when the electronic device is running, the processor executes the computer program stored in the memory, so that the electronic device executes the working method of anti-interference of MBUS host-side receiving signals as described in claim 7.

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