PWM (Pulse Width Modulation) signal generation method and device, control equipment and control system
By re-arrangeing the data in the frame signal and combining it with the carrier signal, high-resolution PWM signals are generated, solving the problem of how to improve the resolution of the PWM signal to reduce EMI while keeping the frequency unchanged, achieving better EMI level and application experience.
Patent Information
- Application Number
- CN202510346751.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-21
- Publication Date
- 2025-05-02
AI Technical Summary
While keeping the frequency of the PWM signal unchanged, how to increase the resolution of the PWM signal to reduce electromagnetic interference (EMI), while avoiding adverse application experiences, such as howling sounds.
By cyclically counting the obtained clock signal, a carrier signal is obtained; cyclically counting the carrier period of the carrier signal is obtained to obtain a frame signal; at least two data in the frame signal are rearranged, and the rearranged frame signal is combined with the carrier signal to obtain a combination result; the combination result is compared with the modulation parameters, and a high-resolution PWM signal is generated based on the comparison results.
It is realized that the resolution is increased without reducing the PWM signal frequency, thereby breaking down the signal spectrum, reducing the EMI level, and improving the application experience.
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Figure CN119922791A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application relate to the field of electrical control technology, and in particular to a PWM signal generation method, device, control equipment and control system. Background Art
[0002] When controlling the brightness of a controlled device (such as a breathing light), the current size of the current source can be directly controlled, or the output waveform duty cycle of the pulse width modulation (PWM) signal can be controlled to switch the current source, thereby adjusting the average current to control the brightness. This control method is simpler and more flexible.
[0003] The higher the resolution of the PWM signal, the higher the duty cycle of the PWM signal output waveform, which means that the brightness of the controlled device can be set at more levels, which is more beneficial to the controlled device; however, when the frequency of the PWM signal is reduced to the audio range (such as 20Hz~20KHz) and reaches a certain intensity, it may be heard by the human ear, causing a bad application experience. Therefore, how to increase the resolution of the PWM signal and reduce electromagnetic interference (EMI) without reducing the frequency of the PWM signal is an urgent problem to be solved. Summary of the invention
[0004] In view of this, the present application provides a PWM signal generation method, apparatus, control device and control system, which can increase the resolution of the PWM signal and reduce EMI without reducing the frequency of the PWM signal.
[0005] In a first aspect, the present application provides a PWM signal generation method, comprising: cyclically counting the clock period of an acquired clock signal to obtain a carrier signal; cyclically counting the carrier period of the carrier signal to obtain a frame signal; rearranging at least two data in the frame signal, and combining each data of the rearranged frame signal with each data of the carrier signal to obtain a first combination result; comparing the first combination result with the acquired modulation parameters, and generating a first PWM signal based on the first comparison result.
[0006] In a second aspect, the present application provides a PWM signal generating device, comprising: a counting module, used to cyclically count the clock period of the acquired clock signal to obtain a carrier signal; and cyclically count the carrier period of the carrier signal to obtain a frame signal; an arrangement module, used to rearrange at least two data in the frame signal; a combination module, used to combine each data of the rearranged frame signal with each data of the carrier signal to obtain a first combination result; a comparison module, used to compare the first combination result with the acquired modulation parameters; a generation module, used to generate a first PWM signal based on the first comparison result.
[0007] In a third aspect, the present application provides a control device, comprising: a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the method of the first aspect mentioned above.
[0008] In a fourth aspect, the present application provides a computer-readable storage medium, which stores a computer program, and when the computer program is executed by at least one processor, the method of the first aspect is implemented.
[0009] In a fifth aspect, the present application provides a computer program product, comprising computer program instructions, which enable a computer to execute the method of the first aspect.
[0010] In a sixth aspect, the present application provides a computer program, which, when executed on a computer, enables the computer to execute the method of the first aspect.
[0011] In a seventh aspect, the present application provides a control system, comprising a controlled device and a control device, wherein the control device is used to control the controlled device by executing a first PWM signal obtained by the method of the first aspect above.
[0012] The embodiments of the present application provide a PWM signal generation method, device, control equipment and control system. The clock period of the acquired clock signal can be cyclically counted to obtain a carrier signal; the carrier period of the carrier signal can be cyclically counted to obtain a frame signal; at least two data in the frame signal are rearranged, and each data of the rearranged frame signal is combined with each data of the carrier signal to obtain a first combination result; the first combination result is compared with the acquired modulation parameters, and based on the first comparison result, a first PWM signal is generated. In this way, by rearranging at least two data in the frame signal, the generated first PWM signal can further break up the signal spectrum while increasing the resolution and not reducing the frequency, so that the period of the first PWM signal is more dispersed, thereby achieving a better EMI level (corresponding to lower EMI).
[0013] In addition, compared with other solutions in the related technology, the complexity of this technical solution is not high and the circuit area is small. By modifying the original resolution of the PWM signal in the technical solution and the resolution that needs to be increased, the brightness control of the controlled device can be achieved through the first PWM signal generated by the technical solution, which shows that the portability and consistency of this technical solution are also high. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of the present application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings.
[0015] Figure 1 It is a schematic diagram of a scenario for generating a PWM signal provided in an embodiment of the present application;
[0016] Figure 2 It is a waveform diagram of generating a PWM signal provided in an embodiment of the present application;
[0017] Figure 3 It is a flowchart of a PWM signal generation method provided in an embodiment of the present application;
[0018] Figure 4 is a schematic diagram of a scenario for generating a frame signal provided in an embodiment of the present application;
[0019] Figure 5 is a schematic diagram of rearranging first data provided by an embodiment of the present application;
[0020] Figure 6 It is a schematic diagram of combining two data provided by an embodiment of the present application;
[0021] Figure 7 This is another schematic diagram of a scenario for generating a PWM signal provided in an embodiment of the present application;
[0022] Figure 8 It is another waveform schematic diagram of generating a PWM signal provided in an embodiment of the present application;
[0023] Fig. 9 It is a schematic diagram of the composition structure of a PWM signal generating device provided in an embodiment of the present application;
[0024] Fig.10 is a structural schematic diagram of a control device provided in an embodiment of the present application;
[0025] Fig.11It is a structural diagram of a control system provided in an embodiment of the present application. DETAILED DESCRIPTION
[0026] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be described clearly and in detail below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the embodiments of the present application should fall within the scope of protection of the embodiments of the present application.
[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.
[0028] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0029] It should also be pointed out that the terms "first\second\third" involved in the embodiments of the present application are only used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present application described here can be implemented in an order other than that illustrated or described here.
[0030] In addition, the term "and / or" in the embodiments of the present application is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.
[0031] To facilitate understanding of the technical solutions of the embodiments of the present application, the relevant technologies of the embodiments of the present application are described below. The following related technologies can be arbitrarily combined with the technical solutions of the embodiments of the present application as optional solutions, and they all belong to the protection scope of the embodiments of the present application.
[0032] When controlling the brightness of a controlled device (such as a breathing light), the current size of the current source can be directly controlled, or the output waveform duty cycle of the pulse width modulation (PWM) signal can be controlled to switch the current source, thereby adjusting the average current to control the brightness. This control method is simpler and more flexible.
[0033] In the process of controlling the brightness of controlled devices through PWM signals, the resolution and frequency of PWM signals are very important parameters. The resolution of PWM signals directly affects the control effect of the brightness of controlled devices. The higher the resolution of PWM signals, the higher the duty cycle of the output waveform of PWM signals, which means that the brightness of controlled devices can be set at more levels, which is more beneficial to controlled devices. The frequency of PWM signals is often related to an abnormal state of controlled devices, namely howling. When the PWM signal modulates the output to control the brightness of controlled devices, a voltage disturbance with a certain spectrum distribution will be formed in the power supply. The increase in the resolution of PWM signals may cause the frequency of PWM signals to decrease. When the frequency of PWM signals decreases to the audio range (such as 20Hz~20KHz) and reaches a certain intensity, howling may occur, which can be heard by human ears and cause a bad application experience.
[0034] Therefore, in the process of controlling the brightness of a controlled device through a PWM signal, how to increase the resolution of the PWM signal and reduce EMI without reducing the frequency of the PWM signal is an urgent problem to be solved.
[0035] In addition, on this basis, how to reduce the complexity of the technical solution and improve the portability and consistency of the technical solution while increasing the resolution of the PWM signal, reducing EMI, and not reducing the frequency of the PWM signal (such as by modifying the original resolution of the PWM signal in the technical solution and the resolution that needs to be increased, the brightness control of the controlled device can be achieved through the PWM signal generated by the technical solution), is also a technical problem to be solved.
[0036] Figure 1 Schematic diagram of a scenario for generating a PWM signal provided by an embodiment of the present application. Figure 1As shown, the clock period of the acquired clock signal (clk) can be cyclically counted to obtain a carrier signal; when the resolution of the PWM signal to be generated needs to be increased, the carrier period of the carrier signal is cyclically counted to obtain a frame signal, and each data of the frame signal is combined with each data of the carrier signal to obtain a combination result, and then the combination result is compared with the acquired modulation parameters, and based on the comparison result, a PWM signal with increased resolution is generated; when the resolution of the PWM signal to be generated does not need to be increased (corresponding to the original resolution), each data of the frame signal is assigned a value of 0, at this time, each data of the carrier signal can be directly compared with the modulation parameters after truncating, and based on the comparison result, a PWM signal with no increased resolution is generated.
[0037] It should be noted that based on dither_en, the dither mode can be turned on or off. When the dither mode is turned on, the resolution of the PWM signal to be generated needs to be increased; when the dither mode is turned off, the resolution of the PWM signal to be generated does not need to be increased.
[0038] It should also be noted that, when the resolution of the PWM signal to be generated needs to be increased, the bits of the original resolution of the PWM signal are recorded as nm bits, and the bits of the increased resolution are recorded as m bits. Then the bits of each data of the carrier signal can be the bits of the original resolution of the PWM signal, that is, nm bits, which can be recorded as carrier[nm-1:0]; the bits of each data of the frame signal can be the bits of the increased resolution of the PWM signal, that is, m bits, which can be recorded as frame_cnt[m-1:0]; the bits of the combination result can be the sum of the bits of each data of the carrier signal and the bits of each data of the frame signal, that is, n bits, which can be recorded as carrier_comb[n-1:0]; the bits of the modulation parameter can be the same as the bits of the combination result, that is, n bits, which can be recorded as pwn_value[n-1:0].
[0039] Furthermore, when the resolution of the PWM signal to be generated does not need to be increased, the bits of the original resolution of the PWM signal are recorded as nm bits, and the bits of each data of the carrier signal can be the bits of the original resolution of the PWM signal, that is, nm bits, which can be recorded as carrier[nm-1:0]; the data of the frame signal are assigned a value of 0; the bits of the modulation parameter can be n bits, which can be recorded as pwn_value[n-1:0]; the bits of the modulation parameter are truncated by m bits, and the bits of the modulation parameter after truncating are nm, which can be recorded as pwn_value[n-1:m].
[0040] Wherein, n and m are both positive integers, and n is greater than m.
[0041] It should be noted that cyclically counting the clock cycles of the acquired clock signal to obtain the carrier signal may include: after the first clock cycle of the clock signal, setting the data of the carrier signal to 0; after the first clock cycle, performing an add 1 operation on the data of the carrier signal every clock cycle of the clock signal until the data of the carrier signal is equal to the first value, thereby obtaining the data of the carrier signal within a carrier cycle.
[0042] It can be understood that the clock signal can trigger the cycle counting of the carrier signal.
[0043] Among them, the first value can be the data when the bits in each data of the carrier signal are full. It can be understood that when the bits of each data of the carrier signal are nm bits, the first value can be the data when nm bits are full. Taking n=5 and m=2 as an example, the first value can be the data when 3 bits are full, the corresponding binary value is 111, and the corresponding decimal value is 7. At this time, the data in one carrier cycle can include (expressed in decimal) 0 to 7.
[0044] By this method, since the clock cycle of the clock signal can be accurately counted, the accuracy of generating the carrier signal can be improved by cyclically counting the clock cycle of the clock signal. In addition, by utilizing the stability of the clock signal, the generated carrier signal can also have high stability and reliability.
[0045] It should be noted that, when the resolution of the PWM signal to be generated needs to be increased, the carrier period of the carrier signal is cyclically counted to obtain a frame signal, which may include: when the resolution of the PWM signal to be generated needs to be increased, after the first carrier period of the carrier signal, setting the data of the frame signal to 0; after the first carrier period, after each carrier period of the carrier signal, performing an add 1 operation on the data of the frame signal until the data of the frame signal is equal to a third value, thereby obtaining the data of the frame signal within one frame period.
[0046] The third value may be data when the bits in each data of the frame signal are full. It can be understood that, in the case where the bits of each data of the frame signal are m bits, the third value may be data when the m bits are full. Taking m=2 as an example, the third value may be data when 2 bits are full, the corresponding binary value is 11, and the corresponding decimal value is 3. At this time, the data in one frame period may include (expressed in decimal) 0 to 3.
[0047] It should be noted that, when the resolution of the PWM signal to be generated needs to be increased, the data of the frame signal are combined with the data of the carrier signal to obtain a combination result, which may include: when the resolution of the PWM signal to be generated needs to be increased, each bit in a data of the frame signal is used as a low bit, and each bit in a data of the corresponding carrier signal is used as a high bit to obtain data after the two data are combined.
[0048] For example, taking binary value representation as an example, assuming that one data of the frame signal is 01, and the corresponding data of the carrier signal is 001, 01 is used as the low bit and 001 is used as the high bit, the data after the two data are combined is 00101, and the corresponding decimal value is 5.
[0049] It should be noted that, when the resolution of the PWM signal to be generated needs to be increased, the combination result is compared with the acquired modulation parameter, and based on the comparison result, a PWM signal with increased resolution is generated, which may include: when the data in the combination result is greater than or equal to the modulation parameter, a low-level PWM signal with increased resolution is generated; and / or, when the data in the combination result is less than the modulation parameter, a high-level PWM signal with increased resolution is generated.
[0050] Exemplarily, taking n=5 and m=2 as an example, when the resolution of the PWM signal to be generated needs to be increased, assuming that the data of the frame signal is (expressed in decimal) 0, corresponding to the data of the carrier signal in one carrier cycle (corresponding to decimal values 0 to 7), the data 0 of the frame signal is combined with the data of the carrier signal in one carrier cycle, and the combined result may include (expressed in binary): 00000, 00100, 01000, 01100, 10000, 10100, 11000, 11100. Assuming that the modulation parameter is 01000 (corresponding to the decimal value 8), comparing the combination result with the modulation parameter, it can be obtained that 00000 and 00100 in the combination result are both smaller than the modulation parameter 01000, so the PWM signals corresponding to 00000 and 00100 in the combination result are high-level PWM signals; and 01000, 01100, 10000, 10100, 11000, and 11100 in the combination result are all greater than or equal to the modulation parameter 01000, so the PWM signals corresponding to 01000, 01100, 10000, 10100, 11000, and 11100 in the combination result are low-level PWM signals.
[0051] It should be noted that, when the resolution of the PWM signal to be generated does not need to be increased and the data of the frame signal are assigned a value of 0, the data of the carrier signal are directly compared with the modulation parameters after truncation, and based on the comparison result, a PWM signal with no increased resolution is generated, which may include: when the data in the carrier signal is greater than or equal to the modulation parameters after truncation, a low-level PWM signal with no increased resolution is generated; and / or, when the data in the carrier signal is less than the modulation parameters, a high-level PWM signal with no increased resolution is generated.
[0052] Exemplarily, taking n=5 and m=2 as an example, when the resolution of the PWM signal to be generated does not need to be increased and each data of the frame signal is assigned a value (expressed in decimal) of 0, the data (corresponding to the binary value) of the carrier signal in one carrier cycle is 000-111, and assuming that the modulation parameter is 01000, the modulation parameter is truncated by 2 bits, and the modulation parameter after truncation can be obtained as 010. By comparing each data of the carrier signal in one carrier cycle with the modulation parameter after truncation, it can be obtained that 000 and 001 in the carrier signal are both less than the modulation parameter 010 after truncation, so the PWM signals corresponding to 000 and 001 in the carrier signal are high-level PWM signals; and 010, 011, 100, 101, 110, 111 in the carrier signal are all greater than or equal to the modulation parameter 010, so the PWM signals corresponding to 010, 011, 100, 101, 110, 111 in the carrier signal are low-level PWM signals.
[0053] Figure 2 is a waveform diagram of generating a PWM signal provided by an embodiment of the present application. Figure 2 As shown in the figure (corresponding to decimal value), taking n=5 and m=2 as an example, when dither_en is 0, the dither mode is turned off, and the resolution of the generated PWM signal (pwm_out) is the original resolution (corresponding to 3 bits); when dither_en is 1, the dither mode is turned on, and the resolution of the generated PWM signal is the increased resolution (corresponding to 5 bits, the bit of the resolution is increased by 2 bits), and as the resolution of the PWM signal increases, the frequency of the PWM signal does not decrease. However, from Figure 2 It can be seen that the periods of the PWM signal are relatively concentrated, which may result in a poor EMI level (corresponding to higher EMI).
[0054] Based on this, Figure 1 to Figure 2On the basis of the technical solution shown, the embodiment of the present application provides a PWM signal generation method, which can cyclically count the clock period of the acquired clock signal to obtain a carrier signal; cyclically count the carrier period of the carrier signal to obtain a frame signal; rearrange at least two data in the frame signal, and combine each data of the rearranged frame signal with each data of the carrier signal to obtain a first combination result; compare the first combination result with the acquired modulation parameter, and generate a first PWM signal based on the first comparison result. In this way, by rearranging at least two data in the frame signal, the generated first PWM signal can further break up the signal spectrum while increasing the resolution and not reducing the frequency, so that the period of the first PWM signal is more dispersed, thereby achieving a better EMI level (corresponding to lower EMI).
[0055] In addition, compared with other solutions in the related technology, the complexity of this technical solution is not high and the circuit area is small. By modifying the original resolution of the PWM signal in the technical solution and the resolution that needs to be increased, the brightness control of the controlled device can be achieved through the first PWM signal generated by the technical solution, which shows that the portability and consistency of this technical solution are also high.
[0056] To facilitate understanding of the technical solutions of the embodiments of the present application, the technical solutions of the present application are described in detail below through specific embodiments. The above related technologies can be combined arbitrarily with the technical solutions of the embodiments of the present application as optional solutions, and they all belong to the protection scope of the embodiments of the present application. The embodiments of the present application include at least part of the following contents.
[0057] Figure 3 is a flow chart of a PWM signal generation method provided in an embodiment of the present application, such as Figure 3 As shown, the method may include the following steps.
[0058] S310 , cyclically count the clock period of the acquired clock signal to obtain a carrier signal.
[0059] It should be noted that, in the embodiment of the present application, the PWM signal generation method can be applied to a PWM signal generation device, or a control device integrated with the device. The control device can be used to control the controlled device by executing the first PWM signal obtained by the PWM signal generation method provided in the embodiment of the present application.
[0060] S320, cyclically counting the carrier period of the carrier signal to obtain a frame signal.
[0061] It can be understood that, in the process of generating the first PWM signal (corresponding to the PWM signal after the resolution is increased), the frame signal is obtained by cyclically counting the carrier period of the carrier signal.
[0062] In some embodiments, cyclically counting the carrier period of the carrier signal to obtain the frame signal may include: after the first carrier period of the carrier signal, setting the data of the frame signal to 0; after the first carrier period, performing an add 1 operation on the data of the frame signal every time a carrier period of the carrier signal passes, until the data of the frame signal is equal to a third value, thereby obtaining the data of the frame signal within a frame period.
[0063] The third value may be data when the bits in each data of the frame signal are full. It can be understood that, in the case where the bits of each data of the frame signal are m bits, the third value may be data when the m bits are full. Taking m=2 as an example, the third value may be data when 2 bits are full, the corresponding binary value is 11, and the corresponding decimal value is 3. At this time, the data in one frame period may include (expressed in decimal) 0 to 3.
[0064] Through this method, the frame signal is generated by cyclically counting the carrier period of the carrier signal, so that the generation of the frame signal can be synchronized with the carrier period, thereby improving the stability and reliability of the frame signal generation.
[0065] In some other embodiments, in the process of generating the second PWM signal (corresponding to the PWM signal whose resolution is not increased), each data of the frame signal is assigned a second value.
[0066] It should be noted that, unlike the aforementioned embodiment in which each data of the frame signal is assigned a value of 0, after each data of the frame signal is assigned a value of the second value, there is no need to subsequently truncate the modulation parameters, nor is there any need to directly compare the data of the carrier signal with the truncated modulation parameters. Instead, the second value is combined with the data of the carrier signal to obtain a second combination result, and the second combination result is compared with the acquired modulation parameters to obtain a second PWM signal.
[0067] For example, when the original resolution of the PWM signal is recorded as nm bits, the second value may be 2 m For example, if m=2, the second value may be (corresponding to the decimal value) 3.
[0068] By using this method, each data of the frame signal is directly assigned to the second value, which can simplify the processing flow of obtaining the frame signal through other means, thereby improving the efficiency of obtaining the frame signal.
[0069] Figure 4 Schematic diagram of a scenario for generating a frame signal provided by an embodiment of the present application. Figure 4As shown, based on dither_en, the dither mode can be turned on or off. When the dither mode is turned on (corresponding to dither_en=1), the resolution of the first PWM signal to be generated needs to be increased. At this time, the carrier period of the carrier signal can be cyclically counted by the period counter to obtain the frame signal; when the dither mode is turned off (corresponding to dither_en=0), the resolution of the second PWM signal to be generated does not need to be increased. At this time, each data of the frame signal can be assigned a value of 2 m -1. It is understood that other structures of the scheme can be Figure 1 The structure shown remains consistent, which promotes design consistency and portability.
[0070] S330. Rearrange at least two data in the frame signal to obtain a rearranged frame signal.
[0071] It should be noted that, in the process of generating the second PWM signal (corresponding to the PWM signal whose resolution is not increased), since each data of the frame signal is assigned the second value, the data of the frame signal may not be rearranged.
[0072] It should also be noted that the order of each data of the frame signal can affect the spectrum of the PWM signal finally generated, and thus affect the EMI level. Further, without rearranging the data of the frame signal, the spectrum of the generated PWM signal can be more concentrated, and the EMI level is poor (corresponding to higher EMI); when at least two data in the frame signal are rearranged, the spectrum of the generated PWM signal can be dispersed, so that the period of the PWM signal (such as the first PWM signal) is more dispersed, thereby achieving a better EMI level (corresponding to lower EMI).
[0073] In some embodiments, rearranging at least two data in a frame signal may include any of the following: rearranging at least two bits in the first data of the frame signal; inverting at least one bit in the first data of the frame signal, and rearranging at least two bits in the inverted first data; inverting at least one bit in the first data of the frame signal; rearranging at least two bits in the first data of the frame signal, and inverting at least one bit in the rearranged first data; wherein the first data is any one of the at least two data.
[0074] It should be noted that inverting at least one bit in the first data of the frame signal may include: when the first bit is 0, determining that the first bit after inversion is 1; or, when the first bit is 1, determining that the first bit after inversion is 0; wherein the first bit is any one of the at least one bit.
[0075] It should also be noted that at least one of the selection of at least two data to be rearranged in the frame signal, the selection of at least two bits in any one of the at least two data (such as the first data), and the selection of at least one bit to be inverted in any one of the at least two data can be arbitrarily selected or selected according to the empirical rules of those skilled in the art, and the embodiments of the present application are not limited to this. It can be understood that different selection methods can obtain different rearranged frame signals, which can cause the final generated PWM signal to produce different spectrum distributions, thereby affecting the EMI level.
[0076] Further, rearranging at least two bits in the first data of the frame signal may include: determining at least two bits in the first data of the frame signal that need to be swapped, and swapping the positions of the at least two bits.
[0077] That is to say, rearranging at least two bits in the first data of the frame signal can be considered as swapping the positions of at least two bits in the first data of the frame signal.
[0078] Figure 5 is a schematic diagram of rearranging first data provided by an embodiment of the present application. Figure 5As shown, assuming that the first data of the frame signal has m bits, which can be recorded as frame_cnt[m-1:0], and frame_cnt[m-1:0]={frame_cnt[0],frame_cnt[1],frame_cnt[2]……frame_cnt[m-3],frame_cnt[m-2],frame_cnt[m-1]}, the m bits of the first data can be rearranged, or at least one of the m bits of the first data can be inverted, and the m inverted bits can be rearranged to obtain the rearranged first data. The rearranged first data has m bits, which can be recorded as dither[m-1:0], and dither[m-1:0]={frame_cnt[m-1],frame_cnt[m-2],frame_cnt[m-3]……frame_cnt[2],frame_cnt[1],frame_cnt[0]}. By rearranging the first data, the first PWM signal can be finally generated. m The cycles will be distributed more evenly.
[0079] Exemplarily, assuming that the first data is (corresponding to the binary value) 10, the two bits of 10 may be swapped, and the first data after rearrangement may be 01.
[0080] Through this method, by rearranging at least two data in the frame signal, the spectrum of the generated first PWM signal can be broken up, so that the period of the first PWM signal is more dispersed, thereby achieving a better EMI level (corresponding to lower EMI).
[0081] S340, combining each data of the rearranged frame signal with each data of the carrier signal to obtain a first combination result.
[0082] It should be noted that the data of the rearranged frame signal and the data of the carrier signal may be combined in terms of high and low bits to obtain a first combination result.
[0083] In some embodiments, combining each data of the rearranged frame signal with each data of the carrier signal to obtain a first combination result may include: taking each bit in a data of the rearranged frame signal as a low bit, and taking each bit in a data of the corresponding carrier signal as a high bit, so as to obtain data obtained by combining the two data.
[0084] Figure 6 This is a schematic diagram of combining two data provided by an embodiment of the present application. Figure 6As shown, the bit of each data of the carrier signal can be recorded as carrier[nm-1:0], the bit of each data of the rearranged frame signal can be recorded as dither[m-1:0], and the bit of each data in the first combination result can be recorded as carrier_comb[n-1:0]. Using carrier[nm-1:0] as the high bit of the combined data, that is, the n-1 to m bits in the combined data, and using dither[m-1:0] as the low bit of the combined data, that is, the m-1 to 0 bits in the combined data, the combined data carrier_comb[n-1:0] = {carrier[nm-1:0], dither[m-1:0]} can be obtained.
[0085] For example, taking binary value representation as an example, assuming n=5, m=2, one data of the rearranged frame signal is 01, and one data of the corresponding carrier signal is 001. Taking 01 as the low bit and 001 as the high bit, the data after the two data are combined is 00101, and the corresponding decimal value is 5.
[0086] By using this method, the data of the rearranged frame signal are combined with the data of the carrier signal, so that the anti-interference ability and stability of the first PWM signal finally generated can be enhanced.
[0087] It can be understood that in the process of generating the second PWM signal (corresponding to the PWM signal with unchanged resolution), each data of the frame signal is assigned a second value, at which time the second value can be directly combined with each data of the carrier signal to obtain a second combination result.
[0088] In other embodiments, combining the second value with each data of the carrier signal to obtain a second combination result may include: taking each bit in the second value as a low bit, and taking each bit in a data of the corresponding carrier signal as a high bit, so as to obtain data obtained by combining the two data.
[0089] It should be noted that since the bit positions of each data of the frame signal before rearrangement and the frame signal after rearrangement are the same, the second value is combined with the data of the carrier signal, and the bit positions of each data in the second combination result obtained are the same as the bit positions of each data in the first combination result.
[0090] For example, taking binary value representation as an example, assuming n=5, m=2, the second value can be 11, and the corresponding data of the carrier signal is 001. Taking 11 as the low bit and 001 as the high bit, the data after the two data are combined is 00111, and the corresponding decimal value is 7.
[0091] By using this method, the second value is combined with each data of the carrier signal, so that the anti-interference ability and stability of the second PWM signal finally generated can be enhanced.
[0092] S350: Compare the first combination result with the acquired modulation parameter, and generate a first PWM signal based on the first comparison result.
[0093] It can be understood that the first PWM signal may be a PWM signal with increased resolution.
[0094] It should be noted that, when the data in the first combination result is greater than or equal to the modulation parameter, a low-level first PWM signal is generated; and / or, when the data in the first combination result is less than the modulation parameter, a high-level first PWM signal is generated.
[0095] It can be understood that the exemplary description of generating the first PWM signal based on the first comparison result can refer to the description in the aforementioned embodiment, and will not be repeated here.
[0096] Through this method, by comparing the first combination result with the acquired modulation parameters to generate the first PWM signal, accurate mapping of data to the PWM signal can be achieved, ensuring the stability and reliability of the generation of the first PWM signal.
[0097] It can be understood that the second combination result can be compared with the acquired modulation parameter, and the second PWM signal can be generated based on the second comparison result.
[0098] Further, the second PWM signal may be a PWM signal whose resolution is not increased, and thus, the resolution of the first PWM signal is greater than the resolution of the second PWM signal.
[0099] In some embodiments, when the data in the second combination result is greater than or equal to the modulation parameter, a low-level second PWM signal is generated; and / or, when the data in the second combination result is less than the modulation parameter, a high-level second PWM signal is generated.
[0100] Exemplarily, the bits of the original resolution of the PWM signal are recorded as nm bits, taking n=5 and m=2 as an example. In the process of generating the second PWM signal, it is assumed that the second value assigned to each data of the frame signal is 3 (expressed in decimal), corresponding to the data of the carrier signal in one carrier cycle (corresponding to decimal values 0 to 7). The data 3 of the frame signal is combined with the data of the carrier signal in one carrier cycle, and the second combination result may include (expressed in binary): 00011, 00111, 01011, 01111, 10011, 10111, 11011, 11111. Assuming that the modulation parameter is 01000 (corresponding to a decimal value of 8), the second combination result is compared with the modulation parameter, and it can be obtained that 00011 and 00111 in the second combination result are both smaller than the modulation parameter 01000, so the second PWM signals corresponding to 00011 and 00111 in the second combination result are high-level second PWM signals; and 01011, 01111, 10011, 10111, 11011, and 11111 in the second combination result are all greater than or equal to the modulation parameter 01000, so the second PWM signals corresponding to 01011, 01111, 10011, 10111, 11011, and 11111 in the combination result are low-level second PWM signals.
[0101] Through this method, by comparing the second combination result with the acquired modulation parameters to generate the second PWM signal, accurate mapping of data to the second PWM signal can be achieved, ensuring the stability and reliability of the generation of the second PWM signal.
[0102] Figure 7 FIG. 1 is another schematic diagram of a scenario for generating a PWM signal provided by an embodiment of the present application. Figure 7 As shown, the clock cycle of the acquired clock signal can be cyclically counted to obtain a carrier signal; the carrier cycle of the carrier signal can be cyclically counted to obtain a frame signal; at least two data in the frame signal are rearranged to obtain a rearranged frame signal, and each data of the rearranged frame signal is combined with each data of the carrier signal, and the obtained combination result is a first combination result, and then the first combination result is compared with the acquired modulation parameters, and based on the first comparison result, a PWM signal (corresponding to the first PWM signal) is generated; each data of the frame signal is assigned a second value; each data of the frame signal can be assigned a second value, and the second value can be combined with each data of the carrier signal, and the obtained combination result is a second combination result, and then the second combination result is compared with the acquired modulation parameters, and based on the second comparison result, a PWM signal (corresponding to the second PWM signal) is generated.
[0103] Figure 8FIG. 1 is another waveform diagram of generating a PWM signal provided in an embodiment of the present application. Figure 8 As shown (corresponding to decimal value), taking n=5 and m=2 as an example, when dither_en takes a value of 0, the dither mode is turned off, and each data of the frame signal is assigned a value of 3. At this time, the resolution of the generated PWM signal is the original resolution (corresponding to 3 bits); when dither_en takes a value of 1, the dither mode is turned on, and the carrier period of the carrier signal can be cyclically counted to obtain the frame signal, and then the data 1 and data 2 of the frame signal are rearranged to obtain the rearranged frame signal. At this time, data 1 corresponds to the rearranged data 2, and data 2 corresponds to the rearranged data 1. The resolution of the PWM signal finally generated is the increased resolution (corresponding to 5 bits, and the bit of the resolution is increased by 2 bits), and as the resolution of the PWM signal increases, the frequency of the PWM signal does not decrease. In addition, from Figure 8 It can be seen that the period distribution of the PWM signal is relatively uniform, resulting in a higher EMI level (corresponding to lower EMI).
[0104] It can be understood that for a controlled device that needs to provide a DC output, all bits of the modulation parameter can be set to 1. At this time, the PWM signal always outputs a high level, the current source of the controlled device is controlled to be DC, and the controlled device is always lit.
[0105] It can also be understood that for the critical point in the embodiment of the present application (the data in the combination result (such as the first combination result, and the second combination result) is equal to the modulation parameter), the generated PWM signal can be a high-level PWM signal or a low-level PWM signal, and the embodiment of the present application is not limited to this.
[0106] The embodiment of the present application provides a PWM signal generation method, which can count the clock period of the acquired clock signal in a loop to obtain a carrier signal; count the carrier period of the carrier signal in a loop to obtain a frame signal; rearrange at least two data in the frame signal, and combine each data of the rearranged frame signal with each data of the carrier signal to obtain a first combination result; compare the first combination result with the acquired modulation parameter, and generate a first PWM signal based on the first comparison result. In this way, by rearranging at least two data in the frame signal, the generated first PWM signal can further break up the spectrum of the first PWM signal while increasing the resolution and not reducing the frequency, so that the period of the first PWM signal is more dispersed, thereby achieving a better EMI level (corresponding to lower EMI).
[0107] In addition, compared with other solutions in the related technology, the complexity of this technical solution is not high and the circuit area is small. By modifying the original resolution of the PWM signal in the technical solution and the resolution that needs to be increased, the brightness control of the controlled device can be achieved through the first PWM signal generated by the technical solution, which shows that the portability and consistency of this technical solution are also high.
[0108] The preferred embodiments of the present application are described in detail above in conjunction with the accompanying drawings. However, the present application is not limited to the specific details in the above embodiments. Within the technical concept of the present application, the technical solution of the present application can be subjected to a variety of simple modifications, and these simple modifications all belong to the protection scope of the present application. For example, the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. In order to avoid unnecessary repetition, the present application will not further explain various possible combinations. For another example, the various different embodiments of the present application can also be arbitrarily combined, as long as they do not violate the idea of the present application, they should also be regarded as the contents disclosed in the present application. For another example, under the premise of no conflict, the various embodiments and / or the technical features in the various embodiments described in the present application can be arbitrarily combined with the prior art, and the technical solution obtained after the combination should also fall within the protection scope of the present application.
[0109] It should also be understood that in the various method embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.
[0110] Based on the same inventive concept as the above embodiments, Fig. 9 is a schematic diagram of the composition structure of a PWM signal generating device provided in an embodiment of the present application, such as Fig. 9 As shown, the PWM signal generating device 900 may include a counting module 910, an arrangement module 920, a combination module 930, a comparison module 940 and a generation module 950, wherein:
[0111] The counting module 910 is used to cyclically count the clock period of the acquired clock signal to obtain a carrier signal; and cyclically count the carrier period of the carrier signal to obtain a frame signal;
[0112] An arrangement module 920, configured to rearrange at least two data in the frame signal;
[0113] A combining module 930, configured to combine each data of the rearranged frame signal with each data of the carrier signal to obtain a first combination result;
[0114] A comparison module 940, configured to compare the first combination result with the acquired modulation parameters;
[0115] The generating module 950 is configured to generate a first PWM signal based on the first comparison result.
[0116] In some embodiments, the arrangement module 920 is also used to rearrange at least two bits in the first data of the frame signal; or, to invert at least one bit in the first data of the frame signal, and rearrange at least two bits in the inverted first data; to invert at least one bit in the first data of the frame signal; to rearrange at least two bits in the first data of the frame signal, and invert at least one bit in the rearranged first data; wherein the first data is any one of the at least two data.
[0117] In some embodiments, Fig. 9 As shown, the PWM signal generating device 900 may further include a determining module 960, wherein:
[0118] A determination module 960, configured to determine at least two bits in the first data of the frame signal that need to be swapped;
[0119] The arrangement module 920 is further configured to perform position swapping between at least two bits.
[0120] In some embodiments, the determination module 960 is also used to determine that the first bit after inversion is 1 when the first bit is 0; or, when the first bit is 1, determine that the first bit after inversion is 0; wherein the first bit is any one of at least one bit.
[0121] In some embodiments, the combining module 930 is further used to use each bit in a data of the rearranged frame signal as a low bit, and each bit in a data of the corresponding carrier signal as a high bit, so as to obtain data after combining the two data.
[0122] In some embodiments, the generating module 950 is further used to generate a low-level first PWM signal when the data in the first combination result is greater than or equal to the modulation parameter; and / or to generate a high-level first PWM signal when the data in the first combination result is less than the modulation parameter.
[0123] In some embodiments, the counting module 910 is also used to set the data of the carrier signal to 0 after the first clock cycle of the clock signal; after the first clock cycle, the data of the carrier signal is added by 1 every time a clock cycle of the clock signal passes until the data of the carrier signal is equal to the first value, thereby obtaining the data of the carrier signal within a carrier cycle.
[0124] In some embodiments, Fig. 9 As shown, the PWM signal generating device 900 may further include an assignment module 970, wherein:
[0125] An assignment module 970, configured to assign each data of the frame signal to a second value after obtaining the carrier signal;
[0126] The combining module 930 is further used to combine the second value with each data of the carrier signal to obtain a second combined result;
[0127] The comparison module 940 is further configured to compare the second combination result with the acquired modulation parameters;
[0128] The generating module 950 is further configured to generate a second PWM signal based on the second comparison result.
[0129] Through the technical solution provided by the embodiment of the present application, by rearranging at least two data in the frame signal, the generated first PWM signal can further break up the spectrum of the first PWM signal while increasing the resolution and not reducing the frequency, so that the period of the first PWM signal is more dispersed, thereby achieving a better EMI level (corresponding to lower EMI). In addition, compared with other solutions in the related art, the complexity of the technical solution is not high, the circuit area is also small, and by modifying the original resolution of the PWM signal in the technical solution and the resolution to be increased, the brightness control of the controlled device can be achieved through the first PWM signal generated by the technical solution, indicating that the portability and consistency of the technical solution are also high.
[0130] Those skilled in the art should understand that the relevant description of the above-mentioned PWM signal generating device in the embodiment of the present application can be understood by referring to the relevant description of the PWM signal generating method in the embodiment of the present application.
[0131] Fig.10 It is a structural diagram of a control device provided in an embodiment of the present application. The control device 1000 may include: a processor (Processor) 1010, a communication interface (Communications Interface) 1020, a memory (Memory) 1030 storing a program 1050, and a communication bus 1040.
[0132] The processor 1010 , the communication interface 1020 , and the memory 1030 communicate with each other via the communication bus 1040 .
[0133] The communication interface 1020 is used to communicate with other control devices or servers.
[0134] The processor 1010 is used to execute the program 1050, and specifically can execute the relevant steps in the above method embodiment.
[0135] Specifically, the program 1050 may include a program code, which includes at least one executable computer operation instruction.
[0136] The processor 1010 may be a central processing unit (CPU), or an application specific integrated circuit (ASIC), or at least one integrated circuit configured to implement the embodiments of the present application. The at least one processor included in the smart device may be a processor of the same type, such as at least one CPU; or may be a processor of different types, such as at least one CPU and at least one ASIC.
[0137] The memory 1030 is used to store at least one executable instruction. The memory 1030 may include a high-speed random access memory (RAM), and may also include a non-volatile memory (Non-Volatile Memory), such as at least one disk memory.
[0138] At least one executable instruction can be specifically used to enable the processor 1010 to execute the method provided in the embodiment of the present application.
[0139] In addition, the specific implementation of each step in at least one executable instruction can refer to the corresponding description of the corresponding steps and units in the above method embodiment, which will not be repeated here. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working process of the above-described devices and modules can refer to the corresponding process description in the above method embodiment, which will not be repeated here.
[0140] Fig.11 is a schematic diagram of a control system provided in an embodiment of the present application, such as Fig.11 As shown, the control system 1100 may include a controlled device 1110 and a control device 1000 . The control device 1000 may be used to control the controlled device 1110 by obtaining a first PWM signal through executing various methods of the embodiments of the present application.
[0141] An embodiment of the present application also provides a computer-readable storage medium for storing a computer program.
[0142] In some embodiments, the computer-readable storage medium can be applied to the control device in the embodiments of the present application, and when the computer program is executed by at least one processor, it implements the corresponding processes implemented by the control device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.
[0143] An embodiment of the present application also provides a computer program product, including computer program instructions.
[0144] In some embodiments, the computer program product can be applied to the control device in the embodiments of the present application, and the computer program instructions enable the computer to execute the corresponding processes implemented by the control device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.
[0145] The embodiment of the present application also provides a computer program.
[0146] In some embodiments, the computer program can be applied to the control device in the embodiments of the present application. When the computer program runs on a computer, the computer executes the corresponding processes implemented by the control device in the various methods of the embodiments of the present application. For the sake of brevity, they will not be repeated here.
[0147] Those of ordinary skill in the art will appreciate that the units and method steps of each example described in conjunction with the embodiments disclosed in this application can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the embodiments of this application.
[0148] It should be noted that, in this application, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.
[0149] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.
[0150] The methods disclosed in several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.
[0151] The features disclosed in several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.
[0152] The features disclosed in several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.
[0153] The above implementation methods are only used to illustrate the embodiments of the present application, and are not limitations on the embodiments of the present application. Ordinary technicians in the relevant technical field can make various changes and modifications without departing from the spirit and scope of the embodiments of the present application. Therefore, all equivalent technical solutions also belong to the scope of the embodiments of the present application. The scope of patent protection of the embodiments of the present application should be limited by the claims.
Claims
1. A PWM signal generation method, characterized in that: include: Cycle counting of the clock cycle of the acquired clock signal to obtain a carrier signal; Cyclic counting of the carrier period of the carrier signal to obtain a frame signal; Rearrange at least two data in the frame signal, and combine the rearranged data of the frame signal with the data of the carrier signal to obtain a first combination result; The first combination result is compared with the acquired modulation parameter, and a first PWM signal is generated based on the first comparison result.
2. The method according to claim 1, characterized in that The rearranging of at least two data in the frame signal includes any one of the following: Rearranging at least two bits in the first data of the frame signal; Inverting at least one bit in the first data of the frame signal, and rearranging at least two bits in the inverted first data; Inverting at least one bit in the first data of the frame signal; Rearrange at least two bits in the first data of the frame signal, and invert at least one bit in the rearranged first data; The first data is any one of the at least two data.
3. The method according to claim 2, characterized in that The rearranging of at least two bits in the first data of the frame signal comprises: The at least two bits in the first data of the frame signal that need to be swapped are determined, and the positions of the at least two bits are swapped.
4. The method according to any one of claims 1 to 3, characterized in that The step of combining the rearranged data of the frame signal with the data of the carrier signal to obtain a first combination result includes: Each bit in one data of the rearranged frame signal is used as a low bit, and each bit in one data corresponding to the carrier signal is used as a high bit, so as to obtain data after combining the two data.
5. The method according to any one of claims 1 to 3, characterized in that The step of comparing the first combination result with the acquired modulation parameter and generating a first PWM signal based on the first comparison result includes: In the case where the data in the first combination result is greater than or equal to the modulation parameter, generating the first PWM signal at a low level; and / or, In a case where the data in the first combination result is smaller than the modulation parameter, the first PWM signal of a high level is generated.
6. The method according to any one of claims 1 to 3, characterized in that The step of cyclically counting the clock period of the acquired clock signal to obtain the carrier signal includes: After a first clock cycle of the clock signal, setting the data of the carrier signal to 0; After the first clock cycle, the data of the carrier signal is added by 1 every time a clock cycle of the clock signal passes until the data of the carrier signal is equal to the first value, thereby obtaining the data of the carrier signal in one carrier cycle.
7. The method according to any one of claims 1 to 3, characterized in that After obtaining the carrier signal, the method further includes: Assigning each data of the frame signal to a second value; Combining the second value with each data of the carrier signal to obtain a second combination result; The second combination result is compared with the acquired modulation parameter, and a second PWM signal is generated based on the second comparison result.
8. A PWM signal generating device, characterized in that: include: A counting module, used for cyclically counting the clock period of the acquired clock signal to obtain a carrier signal; and cyclically counting the carrier period of the carrier signal to obtain a frame signal; An arrangement module, used for rearranging at least two data in the frame signal; A combining module, used for combining the rearranged data of the frame signal with the data of the carrier signal to obtain a first combination result; A comparison module, used for comparing the first combination result with the acquired modulation parameters; A generating module is used to generate a first PWM signal based on the first comparison result.
9. A control device, characterized in that: include: A processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other via the communication bus; The memory is used to store at least one executable instruction, and the executable instruction enables the processor to execute the method according to any one of claims 1 to 7.
10. A control system, characterized in that: include: Controlled equipment; A control device, wherein the control device is used to control the controlled device by executing a first PWM signal obtained by the method according to any one of claims 1 to 6.