Semiconductor device, method for manufacturing semiconductor device, semiconductor module, and electronic apparatus

Abstract

The semiconductor device includes: a first compound semiconductor; a first electrode disposed on the first compound semiconductor and connected to the first compound semiconductor through a Schottky contact; a second compound semiconductor disposed on the first compound semiconductor, disposed spaced apart from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and a second electrode disposed on the second compound semiconductor, formed using the same conductive material as the first electrode, and connected to the second compound semiconductor through an ohmic contact.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor device, a method of manufacturing a semiconductor device, a semiconductor module, and an electronic device. Background Art

[0002] Patent Document 1 discloses a semiconductor element as a power diode. The semiconductor element includes a semiconductor layer, an anode portion, and a cathode portion.

[0003] The semiconductor layer is formed using a wide bandgap material and using electrons as the main carrier. The anode portion is formed by forming a junction on the main surface of the semiconductor layer and serves as the anode of the semiconductor element. The cathode portion is formed by forming a junction on another area of ​​the main surface of the semiconductor layer and serves as the cathode of the semiconductor element.

[0004] The semiconductor element configured in this way can obtain good characteristics as a power diode.

[0005] Reference List

[0006] Patent Literature

[0007] Patent Document 1: Japanese Unexamined Patent Application Publication No. 2007-249919 Summary of the invention

[0008] In the above-mentioned semiconductor element, the anode portion and the cathode portion are respectively formed of two different types of electrode materials. In view of this, it is desired to use a compound semiconductor and include a semiconductor device including a diode formed of a single type of electrode material, a method for manufacturing a semiconductor device, a semiconductor module implemented using the semiconductor device, and an electronic device.

[0009] A semiconductor device according to a first aspect of the present disclosure includes: a first compound semiconductor; a first electrode, arranged on the first compound semiconductor, the first electrode coupled to the first compound semiconductor through a Schottky junction; a second compound semiconductor, arranged on the first compound semiconductor at a certain distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and a second electrode, arranged on the second compound semiconductor, the second electrode including the same conductive material as the first electrode, and coupled to the second compound semiconductor through an ohmic junction.

[0010] According to the second aspect of the present disclosure, a method for manufacturing a semiconductor device includes: forming a second compound semiconductor on a portion of a first compound semiconductor, the second compound semiconductor having a higher impurity density than the first compound semiconductor; forming a first electrode on the first compound semiconductor at a certain distance from the second compound semiconductor, the first electrode forming a Schottky junction; and forming a second electrode on the second compound semiconductor in the same process as forming the first electrode, the second electrode forming an ohmic junction.

[0011] A semiconductor module according to a third aspect of the present disclosure includes a semiconductor device. The semiconductor device includes: a first compound semiconductor; a first electrode arranged on the first compound semiconductor, the first electrode coupled to the first compound semiconductor through a Schottky junction; a second compound semiconductor arranged on the first compound semiconductor at a distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and a second electrode arranged on the second compound semiconductor, the second electrode including the same conductive material as the first electrode, and coupled to the second compound semiconductor through an ohmic junction.

[0012] An electronic device according to a third aspect of the present disclosure includes a semiconductor device. The semiconductor device includes: a first compound semiconductor; a first electrode arranged on the first compound semiconductor, the first electrode coupled to the first compound semiconductor through a Schottky junction; a second compound semiconductor arranged on the first compound semiconductor at a distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and a second electrode arranged on the second compound semiconductor, the second electrode including the same conductive material as the first electrode, and coupled to the second compound semiconductor through an ohmic junction. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a circuit diagram including an electrostatic discharge protection circuit and an internal circuit installed in the semiconductor device according to the first embodiment of the present disclosure.

[0014] Figure 2 is included in Figure 1 A longitudinal cross-sectional view of an electrostatic discharge protection circuit and a semiconductor element in an internal circuit is shown in FIG.

[0015] Figure 3 is included in Figure 2 An enlarged longitudinal cross-sectional view of a semiconductor element in an electrostatic discharge protection circuit shown in FIG.

[0016] Figure 4 yes Figure 2 FIG. 4 is a diagram showing the current-voltage characteristics of the electrostatic discharge protection circuit.

[0017] Figure 5 yes Figure 2 FIG. 4 is a diagram showing the current-voltage characteristics of the electrostatic discharge protection circuit.

[0018] Figure 6 is corresponding to Figure 2 A first process cross-sectional view illustrating a process by process of the method for manufacturing a semiconductor device according to the first embodiment.

[0019] Figure 7 This is a cross-sectional view of the second process.

[0020] Figure 8 This is a cross-sectional view of the third process.

[0021] Fig. 9 This is a cross-sectional view of the fourth process.

[0022] Fig.10 This is a cross-sectional view of the fifth process.

[0023] Fig.11 is corresponding to Figure 1 A circuit diagram including an electrostatic discharge protection circuit and an internal circuit installed in a semiconductor device according to a second embodiment of the present disclosure.

[0024] Fig.12 is corresponding to Figure 2 Included in Fig.11 A longitudinal cross-sectional view of an electrostatic discharge protection circuit and a semiconductor element in an internal circuit is shown in FIG.

[0025] Fig.13 is a circuit diagram including an electrostatic discharge protection circuit installed in a semiconductor device according to a third embodiment of the present disclosure.

[0026] Fig.14 is included in Fig.13 A longitudinal cross-sectional view of a semiconductor element in an electrostatic discharge protection circuit is shown in FIG.

[0027] Fig.15 is corresponding to Fig.13 A circuit diagram of an electrostatic discharge protection circuit installed in a semiconductor device according to a fourth embodiment of the present disclosure.

[0028] Fig.16 is corresponding to Fig.14 Included in Fig.15 A longitudinal cross-sectional view of a semiconductor element in an electrostatic discharge protection circuit is shown in FIG.

[0029] Fig.17 is a perspective view of a semiconductor module according to a fifth embodiment of the present disclosure.

[0030] Fig.18 is a block diagram of the configuration of an electronic device according to a sixth embodiment of the present disclosure. DETAILED DESCRIPTION

[0031] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Note that the description will be given in the following order.

[0032] 1. First Implementation

[0033] The first embodiment is the first example of the present technology applied to a semiconductor device, which includes an electrostatic discharge protection circuit and an internal circuit installed therein. Here, the circuit configuration, cross-sectional configuration, and manufacturing method of the electrostatic discharge protection circuit and the internal circuit are described. In particular, the operating characteristics of the electrostatic discharge protection circuit are also described.

[0034] 2. Second Implementation

[0035] The second embodiment is a second example in which the configuration of the electrostatic discharge protection circuit in the semiconductor device according to the first embodiment is changed.

[0036] 3. Third Implementation

[0037] The third embodiment is a third example in which the configuration of the electrostatic discharge protection circuit in the semiconductor device according to the first embodiment is changed.

[0038] 4. Fourth Implementation

[0039] The fourth embodiment is a fourth example in which the configuration of the electrostatic discharge protection circuit in the semiconductor device according to the first embodiment is changed.

[0040] 5. Fifth Implementation

[0041] The fifth embodiment is a fifth example for describing a semiconductor module implemented using the semiconductor device according to any one of the first to fourth embodiments.

[0042] 6. Sixth Implementation

[0043] The sixth embodiment is a sixth example for describing an electronic device implemented using the semiconductor device according to any one of the first to fourth embodiments.

[0044] 7. Other Implementation Methods

[0045] <1. First Embodiment>

[0046] Will refer to Figures 1 to 10 A semiconductor device 1 according to a first embodiment of the present disclosure is described.

[0047] Here, the arrow X direction indicated appropriately in the drawings represents one plane direction of the semiconductor device 1 conveniently placed on a plane. The arrow Y direction represents another plane direction orthogonal to the arrow X direction. In addition, the arrow Z direction represents an upward direction orthogonal to the arrow X direction and the arrow Y direction. In other words, the arrow X direction, the arrow Y direction, and the arrow Z direction accurately correspond to the X-axis direction, the Y-axis direction, and the Z-axis direction in the three-dimensional coordinate system, respectively.

[0048] Note that these directions are shown to help understand the description, and are not intended to limit the directions in the present technology.

[0049] [Configuration of Semiconductor Device 1]

[0050] (1) Circuit configuration of electrostatic discharge protection circuit 2 and internal circuit 3

[0051] Figure 1 An example of a circuit configuration including an electrostatic discharge (ESD) protection circuit 2 and an internal circuit 3 installed in the semiconductor device 1 according to the first embodiment is shown.

[0052] like Figure 1 As shown, the semiconductor device 1 includes an electrostatic discharge protection circuit 2 and an internal circuit 3 .

[0053] In the first embodiment, the internal circuit 3 includes, as a main component, a field effect transistor Tr included in, for example, a power device, a high frequency device, etc. As the field effect transistor Tr, for example, a high electron mobility transistor (HEMT) is used. Here, the field effect transistor Tr is of n-channel conductivity type.

[0054] The field effect transistor Tr includes a gate electrode and a pair of main electrodes.

[0055] A gate electrode of the field effect transistor Tr serving as an input stage of the internal circuit 3 is coupled to the input terminal Pin. The input terminal Pin receives a signal from the outside of the semiconductor device 1.

[0056] For example, one of the main electrodes of the field effect transistor Tr is used as a source region (source electrode). One of the main electrodes is coupled to a power supply terminal Vss. For example, the power supply terminal Vss supplies a fixed potential, specifically a ground voltage 0V of the circuit. For example, another of the main electrodes is used as a drain region (drain electrode). Another of the main electrodes is used as an output terminal Pout and is coupled to a next-stage circuit or a next-stage element.

[0057] Here, the electrostatic discharge protection circuit 2 includes a Schottky barrier diode SBD.

[0058] The anode region (or anode electrode) of the Schottky barrier diode SBD is electrically connected in parallel between the input terminal Pin and the gate electrode of the field effect transistor Tr. At the same time, the cathode region (cathode electrode) of the Schottky barrier diode SBD is electrically connected in parallel between one of the main electrodes of the field effect transistor Tr and the power supply terminal Vss.

[0059] (2) Specific device configuration of field effect transistor Tr

[0060] Figure 2 An example of a longitudinal cross-sectional configuration of the field effect transistor Tr included in the internal circuit 3 and the Schottky barrier diode SBD included in the electrostatic discharge protection circuit 2 is shown.

[0061] like Figure 2 As shown, the semiconductor device 1 is provided with a substrate 10 as a base. Here, in the first embodiment, the substrate 10 is formed of gallium nitride (GaN), which is a semiconductor material of a III-V compound as a first compound semiconductor. The first compound semiconductor is formed as i-GaN, which is a so-called intrinsic semiconductor. For example, the first compound semiconductor has a 1×10 17 [atoms / cm 3 ] below the impurity density.

[0062] Note that the substrate 10 may be formed by stacking or bonding a GaN layer as the first compound semiconductor on a silicon (Si) substrate, a silicon carbide (SiC) substrate, or a diamond substrate.

[0063] Here, the first compound semiconductor corresponds to the “first compound semiconductor” according to the present technology.

[0064] The field effect transistor Tr includes a channel layer 31 , a barrier layer 33 , a gate insulating layer 36 , a gate electrode 37 , and a pair of main electrodes 34 as main components.

[0065] The channel layer 31 is provided at least in the main surface portion of the substrate 10. In other words, here, the channel layer 31 is formed of GaN.

[0066] In the channel layer 31 , near the barrier layer 33 , carriers are accumulated, and a two-dimensional electron gas (2DEG) 32 serving as a channel region of carriers is generated.

[0067] The barrier layer 33 is arranged on the channel layer 31. The barrier layer 33 is formed of a compound semiconductor material that accumulates carriers in the channel layer 31 by polarization with the channel layer 31. For example, the barrier layer 33 is made of Al 1-x-y Ga x In y N(0≤x<1, 0≤y<1) is formed.

[0068] The gate insulating layer 36 is arranged on the barrier layer 33 on the side opposite to the channel layer 31. Here, the gate insulating layer 36 is formed by the opening 11H penetrating the interlayer insulator 11 in the width direction. For the gate insulating layer 36, one or more insulating materials selected from, for example, aluminum oxide (Al2O3), hafnium oxide (HfO2), silicon oxide (SiO2), and silicon nitride (SiN) are used.

[0069] The gate electrode 37 is arranged on the gate insulating layer 36 at least in the opening 11H on the side opposite to the barrier layer 33. Here, the gate electrode 37 includes a composite film obtained by sequentially stacking, for example, nickel (Ni) and gold (Au) in the direction of the arrow Z. In other words, the field effect transistor Tr is configured as a gate insulation type field effect transistor.

[0070] A pair of main electrodes 34 is arranged at respective ends of the gate length direction of the gate electrode 37. For example, one of the main electrodes 34 is used as a source electrode (S). For example, the other of the main electrodes 34 is used as a drain electrode (D).

[0071] A pair of main electrodes 34 are each arranged on a main surface portion of the substrate 10. In the first embodiment, specifically, the main electrodes 34 are each arranged in a recess 10R obtained by digging downward from the surface of the substrate 10 in the width direction of the substrate 10.

[0072] Each main electrode 34 is formed of GaN as the second compound semiconductor. The main electrode 34 has an impurity density higher than that of the substrate 10. In other words, the second compound semiconductor included in the main electrode 34 has an impurity density higher than that of the first compound semiconductor included in the substrate 10.

[0073] Furthermore, the main electrode 34 is formed by regrowth of GaN in the recess 10R provided in the substrate 10. For the growth of GaN, an epitaxial growth method is used.

[0074] For example, the main electrode 34 has a 1×10 19 [atoms / cm 3 ] or greater n-type impurity density.

[0075] Here, the second compound semiconductor corresponds to the “second compound semiconductor” according to the present technology.

[0076] The pair of main electrodes 34 are each provided with an arranged electrode 35. The electrode 35 is formed of an electrode material that forms an ohmic junction or a junction close to an ohmic junction with respect to the main electrode 34. For the electrode 35, a composite film obtained by sequentially stacking, for example, titanium (Ti), molybdenum (Mo), aluminum (Al), nickel (Ni), and gold (Au) is used.

[0077] Here, the electrode 35 corresponds to the “third electrode” according to the present technology.

[0078] (3) Specific device configuration of Schottky barrier diode SBD

[0079] Figure 3 An example of an enlarged longitudinal cross-sectional configuration of a Schottky barrier diode SBD included in the electrostatic discharge protection circuit 2 is shown.

[0080] like Figure 2 and Figure 3 As shown, the Schottky barrier diode SBD includes an anode electrode 35A, a cathode region 31C, an extraction electrode 34C, and a cathode electrode 35C as main components.

[0081] First, the cathode region 31C is provided in the main surface portion of the substrate 10. In other words, the cathode region 31C is formed of GaN as the first compound semiconductor.

[0082] Furthermore, the cathode region 31C includes the same conductive layer as that of the channel layer 31 in the field effect transistor Tr, and includes the same conductive material as that of the channel layer 31 .

[0083] The anode electrode 35A is arranged on the cathode region 31C. Specifically, the anode electrode 35A contacts the surface of the cathode region 31C, and a junction is formed between the anode electrode 35A and the cathode region 31C. The anode electrode 35A is coupled to the surface of the cathode region 31C through a Schottky junction. The anode electrode 35A also serves as an anode region. In other words, a Schottky barrier diode SBD is basically formed near the junction between the anode electrode 35A and the cathode region 31C.

[0084] The anode electrode 35A includes the same conductive layer as that of the electrode 35 in the field effect transistor Tr, and includes the same conductive material as that of the electrode 35 .

[0085] Here, the anode electrode 35A corresponds to a “first electrode” according to the present technology.

[0086] The extraction electrode 34C is arranged on the substrate 10 at a distance from the anode electrode 35A. The extraction electrode 34C is formed of GaN as a second compound semiconductor arranged in the recess 10R provided in the substrate 10. The extraction electrode 34C includes the same conductive layer as that of the main electrode 34 in the field effect transistor Tr, and includes the same conductive material as that of the main electrode 34. The extraction electrode 34C has an impurity density higher than that of the substrate 10. In the first embodiment, the extraction electrode 34C is formed integrally with and shared with the main electrode 34 in the field effect transistor Tr.

[0087] The extraction electrode 34C serves as a current path connecting the cathode region 31C of the Schottky barrier diode SBD and the cathode electrode 35C, and forms an ohmic junction with respect to the cathode electrode 35C.

[0088] The cathode electrode 35C is arranged on the extraction electrode 34C. Specifically, the cathode electrode 35C contacts the surface of the extraction electrode 34C, and a junction is formed between the cathode electrode 35C and the extraction electrode 34C. The cathode electrode 35C is coupled to the surface of the extraction electrode 34C through an ohmic junction.

[0089] The cathode electrode 35C includes the same conductive layer as the main electrode 34 and the anode electrode 35A in the field effect transistor Tr, and includes the same conductive material as the main electrode 34 and the anode electrode 35A. In the first embodiment, the cathode electrode 35C is formed integrally with the electrode 35 in the field effect transistor Tr and is shared.

[0090] Here, the cathode electrode 35C corresponds to a “second electrode” according to the present technology.

[0091] (4) Current-voltage characteristics of Schottky barrier diode SBD

[0092] Figure 4 and Figure 5 Each shows an example of current-voltage characteristics of a Schottky barrier diode SBD.

[0093] exist Figure 4 and Figure 5 In each of , the horizontal axis indicates the driving voltage [V] of the Schottky barrier diode SBD, and the vertical axis indicates the driving current [mA] flowing through the Schottky barrier diode SBD.

[0094] like Figure 4 As shown in data D1 in , in the Schottky barrier diode SBD, the driving voltage increases and reaches a certain threshold voltage, and then the driving current flows. The amount of the driving current increases as the driving voltage increases.

[0095] By adjusting the above Figure 3 The gap La of the Schottky barrier diode SBD shown in FIG. 1 can control the drive current relative to the drive voltage. The gap La corresponds to the distance along the surface of the substrate 10 between the end of the extraction electrode 34C on the anode electrode 35A side and the end of the anode electrode 35A on the extraction electrode 34C side.

[0096] In the first embodiment, the gap La is set within a range greater than 0 [μm] and less than or equal to 0.9 [μm].

[0097] like Figure 5As shown in data D2 in , the shorter the gap La is, the lower the threshold voltage is. In the case where the gap La is 0 or less, the extraction electrode 34C and the anode electrode 35A are in contact with each other, providing characteristics close to an ohmic junction. In other words, this case does not generate a Schottky barrier diode SBD, and therefore the gap La needs to be longer than 0.

[0098] At the same time, if Figure 5 As shown in the data D3 in , the longer the gap La is, the higher the threshold voltage is. The operating voltage of the Schottky barrier diode SBD is set to be equal to or lower than the withstand voltage of the internal circuit 3. For example, when the gap La is greater than 1 [μm], the operating voltage is about 40 [V] or more. For example, in the case where the semiconductor device 1 is used in a mobile terminal, the operating voltage is set to not more than 40 [V]. Therefore, the gap La is adjusted to be less than 0.9 [μm]. This allows both electrostatic discharge protection performance and device performance to be taken into account in the semiconductor device 1.

[0099] [Method of Manufacturing Semiconductor Device 1]

[0100] Next, a method for manufacturing the above-mentioned semiconductor device 1 will be described. Figures 6 to 10 An example of a cross section during a process-by-process description of a method for manufacturing a field effect transistor Tr included in the internal circuit 3 and a Schottky barrier diode SBD included in the electrostatic discharge protection circuit 2 is shown, respectively.

[0101] First, prepare the substrate 10 (see Figure 6 ). A GaN substrate is used as the first compound semiconductor for the substrate 10. The substrate 10 is formed as a channel layer 31 in a region where the field effect transistor Tr is to be formed. In addition, the substrate 10 is formed as a cathode region 31C (first compound semiconductor) in a region where the Schottky barrier diode SBD is to be formed.

[0102] The recessed portion 10R is formed in the main surface portion of the substrate 10 in respective regions where the field effect transistor Tr and the Schottky barrier diode SBD are to be formed (see Figure 6 ). For example, each recess 10R is formed using a photolithography technique and an etching technique.

[0103] In the recessed portion 10R, GaN (see Figure 6 ). GaN has an impurity density higher than that of the substrate 10. GaN is formed using an epitaxial growth method.

[0104] GaN is formed as the main electrode 34 in the region where the field effect transistor Tr is to be formed. In addition, GaN is formed as the extraction electrode 34C (second compound semiconductor) in the region where the Schottky barrier diode SBD is to be formed. In other words, the main electrode 34 and the extraction electrode 34C are formed in the same manufacturing process.

[0105] like Figure 6 As shown, the barrier layer 33 is formed on the main surface of the substrate 10 except for the regions of the main electrode 34 and the extraction electrode 34C. Once the barrier layer 33 is formed, a two-dimensional electron gas 32 is generated near the surface of the channel layer 31 in the region where the field effect transistor Tr is to be formed.

[0106] like Figure 7 As shown, the barrier layer 33 is selectively removed in a region where the Schottky barrier diode SBD is to be formed.

[0107] like Figure 8 As shown, in the region where the field effect transistor Tr is to be formed, the electrode 35 (third electrode) is formed on each main electrode 34. In the same process of forming the electrode 35, the anode electrode 35A (first electrode) is formed on the cathode region 31C, and further the cathode electrode 35C (second electrode) is formed on the extraction electrode 34C. In other words, the electrode 35, the anode electrode 35A and the cathode electrode 35C are formed in the same manufacturing process.

[0108] The anode electrode 35A and the cathode electrode 35C are formed, and thereby the Schottky barrier diode SBD is completed.

[0109] Subsequently, an interlayer insulator 11 is formed on the entire surface of the substrate 10, and the interlayer insulator 11 covers the electrode 35, the anode electrode 35A, and the cathode electrode 35C (see FIG. Fig. 9 ).

[0110] Next, in the region where the field effect transistor Tr is to be formed, an opening 11H is formed in the interlayer insulator 11 (see Fig. 9 ).

[0111] like Fig. 9 As shown, in a region where the field effect transistor Tr is to be formed, a gate insulating layer 36 is formed on the barrier layer 33 through the opening 11H.

[0112] like Fig.10 As shown, in a region where the field effect transistor Tr is to be formed, a gate electrode 37 is formed on the gate insulating layer 36 .

[0113] The gate electrode 37 is formed, and thereby the field effect transistor Tr is completed.

[0114] Thereafter, the wirings indicated simply by solid lines (their reference numerals are omitted) are connected, and thereby the above-mentioned Figures 1 to 3 The internal circuit 3 and the electrostatic discharge protection circuit 2 are shown in FIG. When the above-described series of manufacturing processes are completed, the semiconductor device 1 according to the first embodiment is completed, and the manufacturing method of the semiconductor device 1 is completed.

[0115] [Function and Effect]

[0116] like Figure 2 and Figure 3 As shown, the semiconductor device 1 according to the first embodiment includes a first compound semiconductor, a first electrode, a second compound semiconductor, and a second electrode.

[0117] The first compound semiconductor corresponds to the cathode region 31C.

[0118] The first electrode corresponds to the anode electrode 35 A. The anode electrode 35A is disposed on the cathode region 31C and is coupled to the cathode region 31C through a Schottky junction.

[0119] The second compound semiconductor corresponds to the extraction electrode 34C. The extraction electrode 34C is arranged on the cathode region 31C (substrate 10) at a distance from the anode electrode 35A. The extraction electrode 34C has an impurity density higher than that of the cathode region 31C.

[0120] The second electrode corresponds to the cathode electrode 35C. The cathode electrode 35C is arranged on the extraction electrode 34C. The cathode electrode 35C includes the same conductive material as that of the anode electrode 35A. The cathode electrode 35C is coupled to the extraction electrode 34C through an ohmic junction. In other words, the cathode electrode 35C includes the same conductive layer as that of the anode electrode 35A.

[0121] Here, the anode electrode 35A, the cathode region 31C, the extraction electrode 34C, and the cathode electrode 35C are included in the Schottky barrier diode SBD including electrodes as semiconductor elements. Therefore, the anode electrode 35A and the cathode electrode 35C each include the same conductive material, and this allows the provision of a semiconductor device 1 including a Schottky barrier diode SBD having a simple structure, which includes a compound semiconductor and is formed of a single type of electrode material.

[0122] Furthermore, in the semiconductor device 1, as Figure 2 and Figure 3 As shown, the first compound semiconductor of the cathode region 31C in the Schottky barrier diode SBD is GaN. Specifically, the first compound semiconductor is i-GaN. More specifically, the first compound semiconductor has a 1×10 17 [atoms / cm 3 ] below the impurity density.

[0123] Meanwhile, in the semiconductor device 1, the second compound semiconductor of the extraction electrode 34C in the Schottky barrier diode SBD is GaN. Specifically, the second compound semiconductor has a 1×10 19 [atoms / cm 3 ] or above n-type impurity density.

[0124] This allows providing the semiconductor device 1 having a simple structure of the Schottky barrier diode SBD which includes a compound semiconductor and is formed of a single type of electrode material.

[0125] In addition, if Figure 2 and Figure 3 As shown, in the semiconductor device 1, the substrate 10 has a recess 10R formed by digging downward from the surface of the substrate 10 in the width direction in a region at a certain distance from the anode electrode 31A. The extraction electrode 34C (second compound semiconductor) is arranged in the recess 10R.

[0126] Therefore, the surface of the cathode region 31C is at a height substantially equal to the surface height of the extraction electrode 34C, and this forms a flat region. The anode electrode 31A is formed on the cathode region 31C in such a flat region, and the cathode electrode 35C is formed on the extraction electrode 34C. This allows the anode electrode 31A and the cathode region 31C to include the same conductive material, allowing the semiconductor device 1 including the Schottky barrier diode SBD formed of a single type of electrode material to be provided.

[0127] Furthermore, in the semiconductor device 1, as Figure 2 and Figure 3 As shown, the extraction electrode 34C (second compound semiconductor) in the Schottky barrier diode SBD is provided along the surface of the substrate 10 at a distance within a range of greater than 0 [μm] and less than or equal to 0.9 [μm] from the anode electrode 35A.

[0128] like Figure 4 and Figure 5 As shown, adjusting the gap La allows the operating voltage and operating current of the Schottky barrier diode SBD to be appropriately controlled.

[0129] Furthermore, in the semiconductor device 1, as Figure 1 As shown, a Schottky barrier diode SBD is included in the electrostatic discharge protection circuit 2 .

[0130] This allows providing the semiconductor device 1 which makes it possible to improve the electrostatic discharge protection performance.

[0131] In addition, if Figure 1As shown, the semiconductor device 1 includes a field effect transistor Tr included in an internal circuit 3. Here, the field effect transistor Tr includes a high electron mobility transistor (HEMT). The field effect transistor Tr includes a channel layer 31, a barrier layer 33, a gate insulating layer 36, a gate electrode 37 and a pair of main electrodes 34.

[0132] The channel layer 31 includes a first compound semiconductor. The barrier layer 33 is arranged on the channel layer 31. The gate insulating layer 36 is arranged on the barrier layer 33 on the side opposite to the channel layer 31. The gate electrode 37 is provided on the gate insulating layer 36 on the side opposite to the barrier layer 33. A pair of main electrodes 34 are arranged at respective ends of the gate electrode 37 in the gate length direction on the substrate 10.

[0133] The cathode region 31C of the Schottky barrier diode SBD and the channel layer 31 of the field effect transistor Tr each include the same conductive layer, and each include the same conductive material. In addition, the extraction electrode 35 of the Schottky barrier diode SBD and the main electrode 35 of the field effect transistor Tr each include the same conductive layer, and each include the same conductive material. In addition, the main electrode 35 of the field effect transistor Tr and the anode electrode 35A and the cathode electrode 35C of the Schottky barrier diode SBD each include the same conductive layer, and each include the same conductive material. Here, the main electrode 35, the anode electrode 35A and the cathode electrode 35C each include, for example, Ti, Mo, Al, Ni and Au stacked in sequence.

[0134] Therefore, components of the Schottky barrier diode SBD are configured using components of the field effect transistor Tr, allowing the semiconductor device 1 to be provided with a simple structure.

[0135] In addition, the manufacturing method of the semiconductor device 1 includes at least the following processes. Figure 6 FIG. 2 shows a process of forming an extraction electrode 34C having a higher impurity density than the impurity density of the cathode region 31C on a portion of the cathode region 31C (substrate 10). Figure 8 FIG. 2 shows a process of forming an anode electrode 35A on the cathode region 31C at a certain distance from the extraction electrode 34C, and the anode electrode 35A forms a Schottky junction. Figure 8 Shown is a process of forming a cathode electrode 35C on the extraction electrode 34C in the same process as the formation of the anode electrode 35A, and the cathode electrode 35C forms an ohmic junction.

[0136] This makes it possible to provide a method for manufacturing the semiconductor device 1 including the Schottky barrier diode SBD formed of a single type of electrode material.

[0137] <2. Second Embodiment>

[0138] Will refer to Fig.11and Fig.12 A semiconductor device 1 , an electrostatic discharge protection circuit 2 , and an internal circuit 3 according to a second embodiment of the present disclosure are described.

[0139] Note that, in the second embodiment and the embodiments described thereafter, components that are the same as or substantially the same as those in the first embodiment are denoted by the same reference numerals, and duplicate description is omitted.

[0140] [Configuration of Semiconductor Device 1]

[0141] (1) Circuit configuration of electrostatic discharge protection circuit 2 and internal circuit 3

[0142] Fig.11 An example of a circuit configuration including the electrostatic discharge protection circuit 2 and the internal circuit 3 mounted in the semiconductor device 1 according to the second embodiment is shown.

[0143] According to the above Figure 1 Compared with the semiconductor device 1 of the first embodiment shown in Fig.11 As shown, the Schottky barrier diode SBD of the electrostatic discharge protection circuit 2 in the semiconductor device 1 is opposite in the insertion direction. In other words, the cathode region of the Schottky barrier diode SBD is electrically connected in parallel between the input terminal Pin and the gate electrode of the field effect transistor Tr. At the same time, the anode region of the Schottky barrier diode SBD is electrically connected in parallel between one of the main electrodes of the field effect transistor Tr and the power supply terminal Vss.

[0144] (2) Specific device configuration of Schottky barrier diode SBD

[0145] Fig.12 An example of a longitudinal cross-sectional configuration of the field effect transistor Tr included in the internal circuit 3 and the Schottky barrier diode SBD included in the electrostatic discharge protection circuit 2 is shown.

[0146] like Fig.12 As shown, in the Schottky barrier diode SBD in the electrostatic discharge protection circuit 2, the anode electrode 31A is formed integrally with the electrode 35 of the field effect transistor Tr. The electrode 35 is arranged on one of the main electrodes 34 serving as the source region (S).

[0147] In other words, the electrode 35 arranged on one of the main electrodes 34 of the field effect transistor Tr is provided to extend to the cathode region 31C, and the extended electrode 35 is formed as the cathode electrode 35C.

[0148] Components other than the above-described components are the same as or substantially the same as those of the semiconductor device 1 according to the above-described first embodiment.

[0149] [Function and Effect]

[0150] The semiconductor device 1 according to the second embodiment makes it possible to obtain actions and effects similar to those obtainable in the semiconductor device 1 according to the first embodiment.

[0151] <3. Third Embodiment>

[0152] Reference Fig.13 and Fig.14 A semiconductor device 1 , an electrostatic discharge protection circuit 2 , and an internal circuit 3 according to a third embodiment of the present disclosure are described.

[0153] [Configuration of Semiconductor Device 1]

[0154] (1) Circuit Configuration of Electrostatic Discharge Protection Circuit 2

[0155] Fig.13 An example of a circuit configuration including the electrostatic discharge protection circuit 2 mounted in the semiconductor device 1 according to the third embodiment is shown.

[0156] like Fig.13 As shown, the electrostatic discharge protection circuit 2 mounted in the semiconductor device 1 includes a plurality of Schottky barrier diodes SBD. Here, the electrostatic discharge protection circuit 2 includes three Schottky barrier diodes SBD electrically connected in parallel.

[0157] (2) Specific device configuration of Schottky barrier diode SBD

[0158] Fig.14 An example of a longitudinal cross-sectional configuration of a Schottky barrier diode SBD included in the electrostatic discharge protection circuit 2 is shown.

[0159] like Fig.14 As shown, the electrostatic discharge protection circuit 2 includes three Schottky barrier diodes SBD electrically connected in parallel.

[0160] Components other than the above-described components are the same or substantially the same as those of the semiconductor device 1 according to the above-described first embodiment or second embodiment.

[0161] Note that the number of connected Schottky barrier diodes SBD may be 2 or 4 or more.

[0162] [Function and Effect]

[0163] The semiconductor device 1 according to the third embodiment makes it possible to obtain actions and effects similar to those obtainable in the semiconductor device 1 according to the first embodiment or the semiconductor device 1 according to the second embodiment.

[0164] Furthermore, in the semiconductor device 1 according to the third embodiment, as Fig.13 and Fig.14 As shown, a plurality of Schottky barrier diodes SBD electrically connected in parallel are included in the electrostatic discharge protection circuit 2. The current characteristics of the Schottky barrier diode SBD are optimally designed by a trade-off between the protection characteristics and the current leakage in the device operation. The arranged plurality of Schottky barrier diodes SBD allow the current amount to be increased. In addition, in the electrostatic discharge protection circuit 2, the plurality of Schottky barrier diodes SBD make it possible to adjust the aspect ratio of the entire protection element as needed. This allows the space of the electrostatic discharge protection circuit 2 to be saved in the semiconductor device 1.

[0165] <4. Fourth Embodiment>

[0166] Reference Fig.15 and Fig.16 A semiconductor device 1 , an electrostatic discharge protection circuit 2 , and an internal circuit 3 according to a fourth embodiment of the present disclosure are described.

[0167] [Configuration of Semiconductor Device 1]

[0168] (1) Circuit Configuration of Electrostatic Discharge Protection Circuit 2

[0169] Fig.15 An example of a circuit configuration including the electrostatic discharge protection circuit 2 mounted in the semiconductor device 1 according to the fourth embodiment is shown.

[0170] like Fig.15 As shown, the electrostatic discharge protection circuit 2 mounted in the semiconductor device 1 includes a plurality of Schottky barrier diodes SBD. Here, the electrostatic discharge protection circuit 2 includes three Schottky barrier diodes SBD electrically connected in series.

[0171] (2) Specific device configuration of Schottky barrier diode SBD

[0172] Fig.16 An example of a longitudinal cross-sectional configuration of a Schottky barrier diode SBD included in the electrostatic discharge protection circuit 2 is shown.

[0173] like Fig.16 As shown, the electrostatic discharge protection circuit 2 includes three Schottky barrier diodes SBD electrically connected in series.

[0174] In the fourth embodiment, the cathode electrode 35C of any one of the Schottky barrier diodes SBD is provided to extend to the cathode region 31C of the next-stage Schottky barrier diode SBD, and is used as the anode electrode 35A in the extended region.

[0175] Components other than the above-described components are the same or substantially the same as those of the semiconductor device 1 according to the above-described first embodiment or second embodiment.

[0176] Note that the number of connected Schottky barrier diodes SBD may be 2 or 4 or more.

[0177] [Function and Effect]

[0178] The semiconductor device 1 according to the fourth embodiment can obtain actions and effects similar to those obtainable in the semiconductor device 1 according to the first embodiment or the semiconductor device 1 according to the second embodiment.

[0179] Furthermore, in the semiconductor device 1 according to the fourth embodiment, as Fig.15 and Fig.16 As shown, multiple single Schottky barrier diodes SBD each having an arbitrary gap size La are connected in series, allowing the operating voltage of the entire Schottky barrier diode SBD set to be controlled. In other words, adjustment of the number of stages allows easy control of the operating voltage of the entire Schottky barrier diode SBD set.

[0180] Furthermore, in the semiconductor device 1, as Fig.16 As shown, the cathode electrode 35C of any one of the Schottky barrier diodes SBD is integrally arranged with the anode electrode 35A of the next-stage Schottky barrier diode SBD.

[0181] Thereby, a separate area is not provided between the cathode electrode 35C and the anode electrode 35A, allowing the area occupied by the electrostatic discharge protection circuit 2 to be reduced.

[0182] <5. Fifth embodiment>

[0183] Reference Fig.17 A semiconductor module 100 according to a fifth embodiment of the present disclosure is described. Fig.17 A schematic structure of a semiconductor module 100 according to a fifth embodiment is shown.

[0184] [Configuration of Semiconductor Module 100]

[0185] For example, the semiconductor module 100 according to the fifth embodiment is an antenna integrated module including edge antennas 101 arranged in an array and front-end components implemented on a substrate 110 as one module. For example, the front-end components include a switch 102, a low-noise amplifier 103, a bandpass filter 104, and a power amplifier 105. For example, the semiconductor module 100 can be used as a transceiver for communication.

[0186] For example, the semiconductor module 100 includes the semiconductor device 1 according to any one of the first to fourth embodiments as a transistor included in the switch 102 , the low-noise amplifier 103 , or the power amplifier 105 .

[0187] [Function and Effect]

[0188] According to the semiconductor module 100 of the fifth embodiment, with the included semiconductor device 1 , it is possible to achieve higher speed, higher efficiency, and lower power consumption in wireless communication.

[0189] Furthermore, the electrostatic discharge protection circuit 2 according to any one of the first to fourth embodiments is installed in the semiconductor device 1. Thus, in the semiconductor module 100, the area occupied by the electrostatic discharge protection circuit 2 can be reduced while simplifying the structure of the electrostatic discharge protection circuit 2 and enhancing the electrostatic breakdown protection resistance.

[0190] <6. Sixth Implementation>

[0191] Will refer to Fig.18 A wireless communication device 300 according to a sixth embodiment of the present disclosure is described. Fig.18 A block diagram schematically shows a configuration of a wireless communication device 300 according to the sixth embodiment.

[0192] [Configuration of Wireless Communication Device 300]

[0193] The wireless communication device 300 according to the sixth embodiment includes an antenna ANT, an antenna switch circuit 301, a high power amplifier HPA, a high frequency integrated circuit (radio frequency integrated circuit) RFIC, a baseband unit BB, a voice output unit MIC, a data output unit DT, and an interface I / F. For example, the interface I / F includes a wireless local area network (W-LAN) and Bluetooth (registered trademark). For example, the wireless communication device 300 is a mobile phone system with multiple functions such as voice, data communication, or LAN connection.

[0194] For example, the wireless communication device 300 includes the semiconductor device 1 according to any one of the first to fourth embodiments as a transistor included in the antenna switch circuit 301 , the high power amplifier HPA, the high frequency integrated circuit RFIC, or the baseband part BB.

[0195] [Function and Effect]

[0196] According to the wireless communication device 300 of the sixth embodiment, a higher speed, higher efficiency and lower power consumption can be achieved in wireless communication by utilizing the semiconductor device 1 included. Thus, when the wireless communication device 300 is a mobile communication terminal, the wireless communication device 300 makes it possible to further extend the usage time and allows further enhancement of portability.

[0197] Furthermore, the electrostatic discharge protection circuit 2 according to any one of the first to fourth embodiments is installed in the semiconductor device 1. Thus, in the wireless communication device 300, the area occupied by the electrostatic discharge protection circuit 2 can be reduced while simplifying the structure of the electrostatic discharge protection circuit 2 and enhancing the electrostatic breakdown protection resistance.

[0198] <7. Other Implementation Methods>

[0199] The present technology is not limited to the above-described embodiments and may be modified in various ways within the scope not departing from the gist.

[0200] For example, in the semiconductor device according to the present technology, a compound semiconductor other than GaN that allows similar actions and effects to be provided can be used.

[0201] Furthermore, in the present technology, the main electrode of the field effect transistor and the extraction electrode of the Schottky barrier diode can be stacked on the compound semiconductor instead of in the recess.

[0202] As described above, the semiconductor device according to the first embodiment includes the first compound semiconductor, the first electrode, the second compound semiconductor, and the second electrode.

[0203] The first electrode is arranged on the first compound semiconductor and is coupled to the first compound semiconductor through a Schottky junction. The second compound semiconductor is arranged on the first compound semiconductor at a distance from the first electrode. The second compound semiconductor has an impurity density higher than that of the first compound semiconductor. The second electrode is arranged on the second compound semiconductor. The second electrode includes a conductive material that is the same as the conductive material of the first electrode and is coupled to the second compound semiconductor through an ohmic junction.

[0204] Therefore, the first electrode and the second electrode each include the same conductive material, and this allows providing a semiconductor device including a Schottky barrier diode having a simple structure, which includes a compound semiconductor and is formed of a single type of electrode material.

[0205] In the method for manufacturing a semiconductor device according to the second embodiment of the present disclosure, first, a second compound semiconductor having a higher impurity density than the first compound semiconductor is formed on a portion of the first compound semiconductor. Next, a first electrode is formed on the first compound semiconductor at a certain distance from the second compound semiconductor, and the first electrode forms a Schottky junction. Here, in the same process as forming the first electrode, a second electrode is formed on the second compound semiconductor, and the second electrode forms an ohmic junction.

[0206] Therefore, the first electrode and the second electrode are each formed in the same process, allowing the number of manufacturing processes for the semiconductor device to be reduced.

[0207] A semiconductor module according to a third embodiment of the present invention includes a semiconductor device. The semiconductor device is the semiconductor device according to the first embodiment.

[0208] Thereby, the semiconductor module makes it possible to obtain actions and effects similar to those obtainable by the semiconductor device according to the first embodiment.

[0209] An electronic device according to a fourth embodiment of the present disclosure includes a semiconductor device. The semiconductor device is the semiconductor device according to the first embodiment.

[0210] Thereby, the electronic device makes it possible to obtain operations and effects similar to those obtainable by the semiconductor device according to the first embodiment.

[0211] <Configuration of this technology>

[0212] The present technology includes the following configuration. The present technology using the following configuration makes it possible to provide a Schottky barrier diode having a simple structure, which includes a compound semiconductor and is formed of a single type of electrode material, in a semiconductor device, a method of manufacturing a semiconductor device, a semiconductor module, and an electronic device. (1)

[0214] A semiconductor device comprising:

[0215] The first compound semiconductor;

[0216] A first electrode is arranged on the first compound semiconductor, and the first electrode is coupled to the first compound semiconductor through a Schottky junction;

[0217] a second compound semiconductor disposed on the first compound semiconductor at a distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and

[0218] The second electrode is disposed on the second compound semiconductor, the second electrode includes the same conductive material as the first electrode, and is coupled to the second compound semiconductor through an ohmic junction. (2)

[0220] The semiconductor device according to (1), wherein the first compound semiconductor includes GaN. (3)

[0222] The semiconductor device according to (1) or (2), wherein the first compound semiconductor includes i-GaN. (4)

[0224] The semiconductor device according to any one of (1) to (3), wherein the first compound semiconductor has 1×10 17 [atoms / cm 3 ] below the impurity density. (5)

[0226] The semiconductor device according to any one of (1) to (4), wherein the second compound semiconductor includes GaN. (6)

[0228] The semiconductor device according to any one of (1) to (5), wherein the second compound semiconductor has 1×10 19 [atoms / cm 3 ] or above n-type impurity density. (7)

[0230] The semiconductor device according to any one of (1) to (6), further comprising: a recess dug downward from a surface of the first compound semiconductor in a width direction in a region on the first compound semiconductor at a distance from the first electrode, and

[0231] The second compound semiconductor is arranged in the recess. (8)

[0233] The semiconductor device according to any one of (1) to (7), wherein the first electrode and the second electrode are respectively provided in the same conductive layer. (9)

[0235] The semiconductor device according to any one of (1) to (8), wherein the Schottky barrier diode is provided at a junction of the first electrode and the first compound semiconductor. (10)

[0237] The semiconductor device according to any one of (1) to (9), wherein:

[0238] The first electrode includes an anode electrode, and

[0239] The second electrode includes a cathode electrode. (11)

[0241] The semiconductor device according to any one of (1) to (10), wherein the second compound semiconductor is provided along the surface of the first compound semiconductor at a distance in a range greater than 0 [μm] and less than or equal to 0.9 [μm] from the first electrode. (12)

[0243] The semiconductor device according to (9) or (10), wherein:

[0244] Arrange a plurality of Schottky barrier diodes, and

[0245] A plurality of Schottky barrier diodes are electrically coupled to each other in parallel. (13)

[0247] The semiconductor device according to (9) or (10), wherein:

[0248] Arrange a plurality of Schottky barrier diodes, and

[0249] A plurality of Schottky barrier diodes are electrically coupled to each other in series. (14)

[0251] The semiconductor device according to any one of (9) to (13), wherein the Schottky barrier diode is included in the electrostatic discharge protection circuit. (15)

[0253] The semiconductor device according to any one of (1) to (14), further comprising:

[0254] a channel layer including a first compound semiconductor;

[0255] A barrier layer, disposed on the channel layer;

[0256] a gate insulating layer disposed on a side of the barrier layer opposite to the channel layer;

[0257] a gate electrode disposed on a side of the gate insulating layer opposite to the barrier layer; and

[0258] The high electron mobility transistor includes a pair of main electrodes arranged on a first compound semiconductor at both ends of a gate electrode in a gate length direction. (16)

[0260] The semiconductor device according to (15), wherein

[0261] The first compound semiconductor and the channel layer each include the same conductive layer, and each include the same conductive material,

[0262] The second compound semiconductor and the main electrode each include the same conductive layer, and each include the same conductive material, and

[0263] The first electrode, the second electrode, and the third electrode coupled to any one of the main electrodes each include the same conductive layer, and each include the same conductive material. (17)

[0265] The semiconductor device according to (16), wherein the first electrode, the second electrode, and the third electrode each include Ti, Mo, Al, Ni, and Au stacked in this order. (18)

[0267] A method for manufacturing a semiconductor device, the method comprising:

[0268] forming a second compound semiconductor on a portion of the first compound semiconductor, the second compound semiconductor having a higher impurity density than the first compound semiconductor;

[0269] forming a first electrode on the first compound semiconductor at a distance from the second compound semiconductor, the first electrode forming a Schottky junction; and

[0270] In the same process as forming the first electrode, a second electrode is formed on the second compound semiconductor, and the second electrode forms an ohmic junction. (19)

[0272] A semiconductor module, comprising:

[0273] A semiconductor device, wherein

[0274] Semiconductor devices include:

[0275] The first compound semiconductor,

[0276] A first electrode is arranged on the first compound semiconductor, and the first electrode is coupled to the first compound semiconductor through a Schottky junction.

[0277] a second compound semiconductor disposed on the first compound semiconductor at a distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and

[0278] The second electrode is disposed on the second compound semiconductor, the second electrode includes the same conductive material as the first electrode, and is coupled to the second compound semiconductor through an ohmic junction. (20)

[0280] An electronic device, comprising:

[0281] A semiconductor device, wherein

[0282] Semiconductor devices include:

[0283] The first compound semiconductor,

[0284] A first electrode is arranged on the first compound semiconductor, and the first electrode is coupled to the first compound semiconductor through a Schottky junction.

[0285] a second compound semiconductor disposed on the first compound semiconductor at a distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and

[0286] The second electrode is disposed on the second compound semiconductor, the second electrode includes the same conductive material as the first electrode, and is coupled to the second compound semiconductor through an ohmic junction.

[0287] This application claims the benefit of Japanese Priority Patent Application JP2022-149237 filed in the Japan Patent Office on September 20, 2022, the entire contents of which are incorporated herein by reference.

[0288] It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alterations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

Claims

1. A semiconductor device comprising: The first compound semiconductor; A first electrode is arranged on the first compound semiconductor, and the first electrode is coupled to the first compound semiconductor through a Schottky junction; a second compound semiconductor disposed on the first compound semiconductor at a distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; as well as A second electrode is disposed on the second compound semiconductor, the second electrode includes the same conductive material as the first electrode, and is coupled to the second compound semiconductor through an ohmic junction.

2. The semiconductor device according to claim 1, wherein The first compound semiconductor includes GaN.

3. The semiconductor device according to claim 1, wherein The first compound semiconductor includes i-GaN.

4. The semiconductor device according to claim 1, wherein The first compound semiconductor has a 1×10 17 [atoms / cm 3 ] below the impurity density.

5. The semiconductor device according to claim 1, wherein The second compound semiconductor includes GaN.

6. The semiconductor device according to claim 1, wherein The second compound semiconductor has a 1×10 19 [atoms / cm 3 ] or above n-type impurity density.

7. The semiconductor device according to claim 1, further comprising: A concave portion dug downward from the surface of the first compound semiconductor in a region on the first compound semiconductor at a certain distance from the first electrode in a width direction, and The second compound semiconductor is arranged in the recess.

8. The semiconductor device according to claim 1, wherein The first electrode and the second electrode are respectively provided in the same conductive layer.

9. The semiconductor device according to claim 1, wherein: A Schottky barrier diode is provided at a junction of the first electrode and the first compound semiconductor.

10. The semiconductor device according to claim 9, wherein The first electrode comprises an anode electrode, and The second electrode includes a cathode electrode.

11. The semiconductor device according to claim 1, wherein The second compound semiconductor is provided at a distance in a range of greater than 0 [μm] and less than or equal to 0.9 [μm] from the first electrode along a surface of the first compound semiconductor.

12. The semiconductor device according to claim 9, wherein: arranging a plurality of the Schottky barrier diodes, and The plurality of Schottky barrier diodes are electrically coupled to each other in parallel.

13. The semiconductor device according to claim 9, wherein: arranging a plurality of the Schottky barrier diodes, and The plurality of Schottky barrier diodes are electrically coupled to each other in series.

14. The semiconductor device according to claim 9, wherein The Schottky barrier diode is included in an electrostatic discharge protection circuit.

15. The semiconductor device according to claim 1, further comprising: a channel layer including the first compound semiconductor; A barrier layer, arranged on the channel layer; a gate insulating layer, arranged on a side of the barrier layer opposite to the channel layer; a gate electrode disposed on a side of the gate insulating layer opposite to the barrier layer; as well as The high electron mobility transistor includes a pair of main electrodes arranged on the first compound semiconductor at both ends of the gate electrode in a gate length direction.

16. The semiconductor device according to claim 15, wherein: The first compound semiconductor and the channel layer each include the same conductive layer, and each include the same conductive material, The second compound semiconductor and the main electrode each include the same conductive layer, and each include the same conductive material, and The first electrode, the second electrode, and a third electrode coupled to any one of the main electrodes each include a same conductive layer and each include a same conductive material.

17. The semiconductor device according to claim 16, wherein: The first electrode, the second electrode, and the third electrode each include Ti, Mo, Al, Ni, and Au stacked in sequence.

18. A method for manufacturing a semiconductor device, the method comprising: forming a second compound semiconductor on a portion of the first compound semiconductor, the second compound semiconductor having a higher impurity density than the first compound semiconductor; forming a first electrode on the first compound semiconductor and at a certain distance from the second compound semiconductor, wherein the first electrode forms a Schottky junction; and In the same process as forming the first electrode, a second electrode is formed on the second compound semiconductor, the second electrode forming an ohmic junction.

19. A semiconductor module, comprising: A semiconductor device, wherein The semiconductor device comprises: The first compound semiconductor, a first electrode disposed on the first compound semiconductor, wherein the first electrode is coupled to the first compound semiconductor via a Schottky junction, a second compound semiconductor disposed on the first compound semiconductor at a distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and A second electrode is disposed on the second compound semiconductor, the second electrode includes the same conductive material as the first electrode, and is coupled to the second compound semiconductor through an ohmic junction.

20. An electronic device, comprising: A semiconductor device, wherein The semiconductor device comprises: The first compound semiconductor, a first electrode disposed on the first compound semiconductor, wherein the first electrode is coupled to the first compound semiconductor via a Schottky junction, a second compound semiconductor disposed on the first compound semiconductor at a distance from the first electrode, the second compound semiconductor having a higher impurity density than the first compound semiconductor; and A second electrode is disposed on the second compound semiconductor, the second electrode includes the same conductive material as the first electrode, and is coupled to the second compound semiconductor through an ohmic junction.

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