Semiconductor device and display device

Abstract

Provided is a semiconductor device occupying a small area. The semiconductor device includes a first transistor, a second transistor, a first insulating layer, and a second insulating layer. The first transistor includes a metal oxide layer and a first conductive layer. The first insulating layer is disposed on the first conductive layer. The second insulating layer is disposed on the first insulating layer. The first insulating layer and the second insulating layer have openings reaching the first conductive layer. The metal oxide layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second insulating layer. The first insulating layer contains oxygen. The second insulating layer contains nitrogen. The metal oxide layer has a region in contact with the second insulating layer and in contact with any one of the gate, source, and drain of the second transistor.

Description

Technical Field

[0001] One embodiment of the present invention relates to a semiconductor device and a method for manufacturing the same. One embodiment of the present invention relates to a transistor and a method for manufacturing the same. One embodiment of the present invention relates to a display device including a semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. As an example of the technical field of one embodiment of the present invention, a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, an electronic device, a lighting device, an input device (e.g., a touch sensor), an input-output device (e.g., a touch panel), and a driving method or a manufacturing method of the above-mentioned device can be cited.

[0003] Note that in this specification, etc., a semiconductor device refers to a device that utilizes semiconductor characteristics, a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device including the circuit, etc. In addition, a semiconductor device refers to all devices that can function by utilizing semiconductor characteristics. For example, as examples of semiconductor devices, there are integrated circuits, chips with integrated circuits, and electronic components that contain chips in packages. In addition, storage devices, display devices, light-emitting devices, lighting devices, and electronic devices themselves are semiconductor devices, and sometimes all include semiconductor devices. Background Art

[0004] Semiconductor devices including transistors are widely used in electronic devices. In recent years, the use of display devices has been diversified. For example, display devices are used in portable information terminals, television devices (also called television receivers), digital signage (Digital Signage: electronic billboards) and PID (Public Information Display: public information displays). As display devices, for example, display devices including organic EL (Electro Luminescence) elements or light emitting diodes (LED: Light Emitting Diode), display devices including liquid crystal elements, and electronic paper that displays by electrophoresis are cited.

[0005] In a display device, by reducing the area occupied by a transistor, the pixel size can be reduced, thereby improving the resolution. In addition, by reducing the area occupied by a transistor, the aperture ratio can be improved. Therefore, micro transistors are required.

[0006] As devices requiring a high-definition display apparatus, for example, devices for virtual reality (VR: Virtual Reality), augmented reality (AR: Augmented Reality), alternative reality (SR: Substitutional Reality), and mixed reality (MR: Mixed Reality) are being actively developed.

[0007] Patent Document 1 discloses a high-definition display device using an organic EL element. [Prior technical literature] [Patent Document]

[0008] [Patent Document 1] International Patent Application Publication No. 2016 / 038508 Summary of the invention Technical problem to be solved by the invention

[0009] One of the purposes of one embodiment of the present invention is to provide a micro transistor. One of the purposes of one embodiment of the present invention is to provide a transistor with a short channel length. One of the purposes of one embodiment of the present invention is to provide a transistor with a large on-state current. One of the purposes of one embodiment of the present invention is to provide a transistor with good electrical characteristics. One of the purposes of one embodiment of the present invention is to provide a semiconductor device with a small footprint. One of the purposes of one embodiment of the present invention is to provide a semiconductor device with low wiring resistance. One of the purposes of one embodiment of the present invention is to provide a semiconductor device or display device with low power consumption. One of the purposes of one embodiment of the present invention is to provide a transistor, semiconductor device or display device with high reliability. One of the purposes of one embodiment of the present invention is to provide a high-definition display device. One of the purposes of one embodiment of the present invention is to provide a method for manufacturing a semiconductor device or display device with high productivity. One of the purposes of one embodiment of the present invention is to provide a novel transistor, semiconductor device, display device or a method for manufacturing them.

[0010] Note that the description of these objectives does not prevent the existence of other objectives. One embodiment of the present invention does not need to achieve all of the above objectives. Objectives other than the above objectives can be extracted from the description of the specification, drawings, and claims. Solutions to technical problems

[0011] One embodiment of the present invention is a semiconductor device including a first transistor, a second transistor, a first insulating layer and a second insulating layer. The first transistor includes a metal oxide layer and a first conductive layer. The first insulating layer is disposed on the first conductive layer. The second insulating layer is disposed on the first insulating layer. The first insulating layer and the second insulating layer have an opening that reaches the first conductive layer. The metal oxide layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen. The second insulating layer contains nitrogen. The metal oxide layer has a region that is in contact with the second insulating layer and in contact with any one of the gate, source and drain of the second transistor.

[0012] One embodiment of the present invention is a semiconductor device including a first transistor, a second transistor, a first insulating layer, and a second insulating layer. The first transistor includes a metal oxide layer and a first conductive layer. The second transistor includes a metal oxide layer and a second conductive layer. The first insulating layer is disposed on the first conductive layer. The second insulating layer is disposed on the first insulating layer. The first insulating layer and the second insulating layer have a first opening that reaches the first conductive layer and a second opening that reaches the second conductive layer. The metal oxide layer is in contact with a top surface of the first conductive layer, a top surface of the second conductive layer, a side surface of the first insulating layer, and a top surface and a side surface of the second insulating layer. The first insulating layer contains oxygen. The second insulating layer contains nitrogen.

[0013] One embodiment of the present invention is a semiconductor device including a first transistor, a second transistor, a first insulating layer and a second insulating layer. The first transistor includes a metal oxide layer and a first conductive layer. The second transistor includes a metal oxide layer, a gate insulating layer and a gate electrode. The first insulating layer is disposed on the first conductive layer. The second insulating layer is disposed on the first insulating layer. The first insulating layer and the second insulating layer have an opening that reaches the first conductive layer. The metal oxide layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen. The second insulating layer contains nitrogen. The metal oxide layer has a region that overlaps with the gate electrode through the gate insulating layer.

[0014] One embodiment of the present invention is a semiconductor device including a transistor, a capacitor, a first insulating layer and a second insulating layer. The transistor includes a metal oxide layer and a first conductive layer. The capacitor includes a metal oxide layer, a second conductive layer and a dielectric sandwiched between the metal oxide layer and the second conductive layer. The first insulating layer is disposed on the first conductive layer. The second insulating layer is disposed on the first insulating layer. The first insulating layer and the second insulating layer have an opening that reaches the first conductive layer. The metal oxide layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen. The second insulating layer contains nitrogen. The metal oxide layer has a region that is in contact with the second insulating layer and overlaps with the second conductive layer and the dielectric.

[0015] In the above semiconductor device, a third insulating layer is preferably included. The third insulating layer is preferably provided between the first insulating layer and the second insulating layer. The third insulating layer preferably contains nitrogen. The second insulating layer preferably has a region having a higher hydrogen concentration than the third insulating layer.

[0016] In the semiconductor device, the metal oxide layer preferably contains indium, tin, and zinc. In the metal oxide layer, the content of tin is preferably 0.1% or more and 2% or less.

[0017] In the semiconductor device, the metal oxide layer preferably includes indium, tin, and silicon. In the metal oxide layer, the content of silicon is preferably 1% or more and 20% or less.

[0018] One embodiment of the present invention is a display device including a transistor, a display element, a first insulating layer and a second insulating layer. The transistor includes a metal oxide layer and a first conductive layer. The first insulating layer is disposed on the first conductive layer. The second insulating layer is disposed on the first insulating layer. The first insulating layer and the second insulating layer have an opening that reaches the first conductive layer. The metal oxide layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen. The second insulating layer contains nitrogen. The metal oxide layer has a region that is in contact with the second insulating layer and with a pixel electrode included in the display element.

[0019] In the above display device, a third insulating layer is preferably included. The third insulating layer is preferably provided between the first insulating layer and the second insulating layer. The third insulating layer preferably contains nitrogen. The second insulating layer preferably has a region whose hydrogen concentration is higher than that of the third insulating layer.

[0020] In the above display device, the metal oxide layer preferably contains indium, tin, and zinc. In the metal oxide layer, the content of tin is preferably 0.1% or more and 2% or less.

[0021] In the above display device, the metal oxide layer preferably includes indium, tin, and silicon. In the metal oxide layer, the content of silicon is preferably 1% or more and 20% or less. Effects of the Invention

[0022] According to one embodiment of the present invention, a micro transistor can be provided. According to one embodiment of the present invention, a transistor with a short channel length can be provided. According to one embodiment of the present invention, a transistor with a large on-state current can be provided. According to one embodiment of the present invention, a transistor with good electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device with a small footprint can be provided. According to one embodiment of the present invention, a semiconductor device with low wiring resistance can be provided. According to one embodiment of the present invention, a semiconductor device or a display device with low power consumption can be provided. According to one embodiment of the present invention, a transistor, a semiconductor device or a display device with high reliability can be provided. According to one embodiment of the present invention, a high-definition display device can be provided. According to one embodiment of the present invention, a method for manufacturing a semiconductor device or a display device with high productivity can be provided. According to one embodiment of the present invention, a novel transistor, a semiconductor device, a display device or a method for manufacturing them can be provided.

[0023] Note that the description of these effects does not prevent the existence of other effects. One embodiment of the present invention does not necessarily have all of the above effects. Effects other than the above effects can be extracted from the description of the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1A is a plan view showing an example of a semiconductor device. Figure 1B and Figure 1C is a cross-sectional view showing an example of a semiconductor device. FIG. 2A to FIG. 2D It is a perspective view showing an example of a semiconductor device. Figure 3A and Figure 3B is a cross-sectional view showing an example of a semiconductor device. Figure 4A is a plan view showing an example of a semiconductor device. Figure 4B is a cross-sectional view showing an example of a semiconductor device. FIG. 5A to FIG. 5C is a cross-sectional view showing an example of a semiconductor device. Fig. 6A and Figure 6B is a cross-sectional view showing an example of a semiconductor device. Fig. 7A and Figure 7B is a cross-sectional view showing an example of a semiconductor device. FIG. 8A to FIG. 8C is a cross-sectional view showing an example of a semiconductor device. Fig. 9A is a plan view showing an example of a semiconductor device. Fig. 9B and Fig. 9Cis a cross-sectional view showing an example of a semiconductor device. FIG. 10A to FIG. 10H is a circuit diagram showing an example of a semiconductor device. FIG. 11A to FIG. 11G is a circuit diagram showing an example of a semiconductor device. Fig. 12A is a plan view showing an example of a semiconductor device. Fig. 12B and Fig. 12C is a cross-sectional view showing an example of a semiconductor device. Fig.13A is a plan view showing an example of a semiconductor device. Fig. 13B and Fig. 13C is a cross-sectional view showing an example of a semiconductor device. Fig.14A is a plan view showing an example of a semiconductor device. Fig. 14B is a cross-sectional view showing an example of a semiconductor device. Fig.15A is a plan view showing an example of a semiconductor device. Fig. 15B is a cross-sectional view showing an example of a semiconductor device. Fig.16A is a plan view showing an example of a semiconductor device. Fig. 16B and Fig. 16C is a cross-sectional view showing an example of a semiconductor device. Fig.17A is a plan view showing an example of a semiconductor device. Fig. 17B is a cross-sectional view showing an example of a semiconductor device. Fig.18A is a plan view showing an example of a semiconductor device. Fig.18B and Fig.18C is a cross-sectional view showing an example of a semiconductor device. Fig.19A is a plan view showing an example of a semiconductor device. Fig.19B and Fig.19C is a cross-sectional view showing an example of a semiconductor device. Fig. 20A and Fig. 20B is a cross-sectional view showing an example of a semiconductor device. Fig.21A is a plan view showing an example of a semiconductor device. Fig.21B and Fig. 21C is a cross-sectional view showing an example of a semiconductor device. Fig.22A is a plan view showing an example of a semiconductor device. Fig. 22B is a cross-sectional view showing an example of a semiconductor device. Fig.23A is a plan view showing an example of a semiconductor device. Fig. 23B is a cross-sectional view showing an example of a semiconductor device. Fig.24A is a plan view showing an example of a semiconductor device. Fig. 24B is a cross-sectional view showing an example of a semiconductor device. FIG. 25A to FIG. 25C is a cross-sectional view showing an example of a semiconductor device. Fig.26A and Fig.26B It is an equivalent circuit diagram of a semiconductor device. Fig.26C is a plan view showing an example of a semiconductor device. Fig. 27 is a cross-sectional view showing an example of a semiconductor device. Fig.28 It is a perspective view showing an example of a semiconductor device. FIG. 29A to FIG. 29D It is a perspective view showing an example of a semiconductor device. Fig. 30A and Fig. 30B It is an equivalent circuit diagram of a semiconductor device. Fig. 30C is a plan view showing an example of a semiconductor device. Fig.31 is a cross-sectional view showing an example of a semiconductor device. Fig.32 It is a perspective view showing an example of a semiconductor device. FIG. 33A to FIG. 33D It is a perspective view showing an example of a semiconductor device. FIG. 34A to FIG. 34D is a cross-sectional view showing an example of a method for manufacturing a semiconductor device. FIG. 35A to FIG. 35D is a cross-sectional view showing an example of a method for manufacturing a semiconductor device. Fig.36 It is a perspective view showing an example of a display device. Fig.37A and Fig.37B is a cross-sectional view showing an example of a display device. Fig.38 is a cross-sectional view showing an example of a display device. FIG. 39A to FIG. 39C is a cross-sectional view showing an example of a display device. Fig.40A and Fig.40B is a cross-sectional view showing an example of a display device. Fig.41is a cross-sectional view showing an example of a display device. Fig.42 is a cross-sectional view showing an example of a display device. Fig.43 is a cross-sectional view showing an example of a display device. Fig.44 is a cross-sectional view showing an example of a display device. FIG. 45A to FIG. 45F This is a cross-sectional view showing an example of a method for manufacturing a display device. FIG. 46A to FIG. 46D is a diagram showing an example of an electronic device. FIG. 47A to FIG. 47F is a diagram showing an example of an electronic device. FIG. 48A to FIG. 48G is a diagram showing an example of an electronic device. Fig.49A and Fig.49B is a graph showing Id-Vg characteristics of a transistor. Fig.50 is a cross-sectional STEM image of a transistor. Fig.51A and Fig.51B is a cross-sectional STEM image of a transistor. Fig.52 is a cross-sectional STEM image of a transistor. Fig.53A and Fig.53B is a cross-sectional STEM image of a transistor. Modes for Carrying Out the Invention

[0025] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and a person skilled in the art can easily understand that the mode and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below.

[0026] Note that in the invention structure described below, the same symbol is shared in different drawings to show the same part or part with the same function, and repeated description is omitted. In addition, when representing a part with the same function, the same hatching is sometimes used without adding a special reference numeral.

[0027] In addition, for ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent its actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

[0028] Note that in this specification, etc., ordinal numbers such as "first" and "second" are added for convenience, but they do not limit the number of components or the order of components (for example, process order or stacking order). In addition, the ordinal numbers added to components in one part of this specification may not be consistent with the ordinal numbers added to the components in other parts of this specification or claims.

[0029] In addition, depending on the situation or state, the "film" and the "layer" may be interchanged. For example, the "conductive layer" may be replaced with the "conductive film". Also, the "insulating film" may be replaced with the "insulating layer".

[0030] A transistor is a type of semiconductor element and can realize functions of amplifying current or voltage, controlling switching operations of conduction or non-conduction, etc. The transistor in this specification includes IGFET (Insulated Gate Field Effect Transistor) and thin film transistor (TFT: Thin Film Transistor).

[0031] In the case of using transistors with different polarities or when the current direction of the circuit operation changes, the functions of "source" and "drain" are sometimes interchanged. Therefore, in this specification, "source" and "drain" can be interchanged. Note that the source and drain of the transistor can be appropriately replaced by source terminal and drain terminal or source electrode and drain electrode, etc., depending on the situation.

[0032] In this specification, "electrical connection" includes connection through "an element having some kind of electrical function". Here, "an element having some kind of electrical function" is not particularly limited as long as it can transmit and receive electrical signals between the connected objects. For example, "an element having some kind of electrical function" includes switching elements such as transistors, resistor elements, coils, capacitor elements, and other elements having various functions in addition to electrodes and wiring.

[0033] In addition, in this specification, unless otherwise specified, the off-state current refers to the leakage current between the source and the drain when the transistor is in the off state (also called the non-conducting state or the blocking state). In an n-channel transistor, the off state refers to the voltage V between the gate and the source. gs Below the threshold voltage V th (In a p-channel transistor, V gs Higher than V th ) status.

[0034] In this specification, etc., "the top surface shapes are roughly consistent" means that at least a portion of the edges of each layer in the stack overlap. For example, it includes the case where the upper layer and the lower layer are processed by the same mask pattern or a portion of the same mask pattern. However, in reality, there are cases where the edges do not overlap, and sometimes the upper layer is located on the inside of the lower layer or the upper layer is located on the outside of the lower layer. In this case, it can also be said that "the top surface shapes are roughly consistent". When the top surface shapes are consistent or roughly consistent, it can also be said that the ends are aligned or roughly aligned.

[0035] In this specification, etc., a tapered shape refers to a shape in which at least a portion of the side surface of a constituent element is inclined relative to the substrate surface or the formed surface. For example, it is preferred to have a region in which the angle (also referred to as a taper angle) formed by the inclined side surface and the substrate surface or the formed surface is less than 90 degrees. Here, the side surface, substrate surface, and formed surface of the constituent element do not necessarily have to be completely flat, and may also be a substantially planar shape with a slight curvature or a substantially planar shape with fine concave-convex shapes.

[0036] In this specification, etc., a device manufactured using a metal mask or FMM (Fine Metal Mask) is sometimes referred to as a device having an MM (Metal Mask) structure. In addition, in this specification, etc., a device manufactured without using a metal mask or FMM is sometimes referred to as a device having an MML (Metal Mask Less) structure.

[0037] In this specification, etc., a structure in which light-emitting layers are separately manufactured in light-emitting elements (also called light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. Since the SBS structure can optimize the materials and structures of each light-emitting element, the freedom of choice of materials and structures is increased, and it is easy to achieve improved brightness and reliability.

[0038] In this specification, holes or electrons are sometimes referred to as "carriers". Specifically, a hole injection layer or an electron injection layer is sometimes referred to as a "carrier injection layer", a hole transport layer or an electron transport layer is sometimes referred to as a "carrier transport layer", and a hole blocking layer or an electron blocking layer is sometimes referred to as a "carrier blocking layer". Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier blocking layer are sometimes not clearly distinguishable based on their cross-sectional shape or characteristics. In addition, sometimes one layer has the functions of two or three of a carrier injection layer, a carrier transport layer, and a carrier blocking layer.

[0039] In this specification, etc., a light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer. Here, as the layer included in the EL layer (also referred to as a functional layer), a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer) and a carrier blocking layer (hole blocking layer and electron blocking layer) can be cited. In this specification, etc., a light-receiving element (also referred to as a light-receiving device) includes at least an active layer used as a photoelectric conversion layer between a pair of electrodes. In this specification, etc., one of a pair of electrodes is sometimes referred to as a pixel electrode, and the other is referred to as a common electrode.

[0040] In this specification, etc., the sacrificial layer (also referred to as a mask layer) is located at least above the light-emitting layer (more specifically, a layer processed into an island shape among the layers constituting the EL layer) and has a function of protecting the light-emitting layer during the manufacturing process.

[0041] In this specification and the like, disconnection refers to a phenomenon in which a layer, a film, or an electrode is disconnected due to the shape of a formed surface (for example, a step, etc.).

[0042] (Implementation Method 1) In this embodiment, refer to Figures 1A to 33D A semiconductor device according to one embodiment of the present invention will be described.

[0043] <Structural Example 1> [Structure example 1-1] A transistor that can be used in a semiconductor device according to one embodiment of the present invention will be described. Figure 1A A top view (also referred to as a plan view) of transistor 100 is shown. Figure 1B Shown along Figure 1A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Figure 1C A cross-sectional view along the dot-dash line B1-B2 is shown. Figure 1A In the diagram, a portion of the components of the transistor 100 (such as the gate insulating layer) is omitted. Figure 1A Similarly, some components are omitted in the following drawings.

[0044] FIG. 2A to FIG. 2D 1 shows a perspective view of transistor 100. Note that Figure 2B Shown along Figure 2A The cross section of the dotted line C1-C2 is shown. Figure 2C Shown in perspective Figure 2A The insulating layer shown in FIG. 1 is shown with its outline shown in dotted lines. Figure 2D Shown in perspective Figure 2B The insulating layer is shown with its outline shown in dotted lines.

[0045] The transistor 100 is provided on a substrate 102. The transistor 100 includes a conductive layer 104, an insulating layer 106, a layer 108, and a conductive layer 112. The layer 108 contains a semiconductor material. A channel formation region is provided in a portion of the layer 108, and a region used as one of a source electrode and a drain electrode is provided in another portion. The conductive layer 112 is used as the other of the source electrode and the drain electrode. A portion of the insulating layer 106 is used as a gate insulating layer (also referred to as a first gate insulating layer) of the transistor 100, and the conductive layer 104 is used as a gate electrode (also referred to as a first gate electrode).

[0046] A conductive layer 112 is disposed on the substrate 102, and an insulating layer 110 is disposed on the conductive layer 112. The insulating layer 110 includes an opening 141 that reaches the conductive layer 112. It can also be said that the conductive layer 112 is exposed in the opening 141.

[0047] Layer 108 is provided so as to cover opening 141. Layer 108 includes a region in contact with the top surface and side surfaces of insulating layer 110 and the top surface of conductive layer 112. Layer 108 is electrically connected to conductive layer 112 through opening 141. Layer 108 has a shape along the top surface and side surfaces of insulating layer 110 and the top surface of conductive layer 112. Layer 108 has a region overlapping conductive layer 112 via insulating layer 110. It can also be said that insulating layer 110 has a region sandwiched between conductive layer 112 and layer 108.

[0048] The insulating layer 106 is provided to cover the opening 141. The insulating layer 106 is provided on the layer 108 and the insulating layer 110. The insulating layer 106 includes a region in contact with the top surface and the side surface of the layer 108 and the top surface of the insulating layer 110. The insulating layer 106 has a shape along the top surface and the side surface of the layer 108 and the top surface of the insulating layer 110.

[0049] Conductive layer 104 is provided on insulating layer 106 and includes a region in contact with the top surface of insulating layer 106. Conductive layer 104 includes a region overlapping layer 108 via insulating layer 106. Conductive layer 104 has a shape along the shape of the top surface of insulating layer 106.

[0050] There is no particular limitation on the semiconductor material used for layer 108. For example, a semiconductor composed of a single element or a compound semiconductor can be used. Examples of semiconductors composed of a single element include silicon or germanium. Examples of compound semiconductors include gallium arsenide and silicon germanium. In addition, examples of compound semiconductors include organic semiconductors, nitride semiconductors, and oxide semiconductors. Note that these semiconductor materials may also contain impurities as dopants.

[0051] There is no particular limitation on the crystallinity of the semiconductor material used for the layer 108, and an amorphous semiconductor, a single crystal semiconductor, or a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part thereof) can be used. When a single crystal semiconductor or a crystalline semiconductor is used, it is preferred because it can suppress the degradation of transistor characteristics.

[0052] Silicon can be used for layer 108. Examples of silicon include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polycrystalline silicon (LTPS). A transistor using amorphous silicon as a channel formation region can be formed on a large glass substrate and can be manufactured at low cost. A transistor using polycrystalline silicon as a channel formation region has high field effect mobility and can operate at high speed. In addition, a transistor using microcrystalline silicon as a channel formation region has high field effect mobility and can operate at high speed compared to a transistor using amorphous silicon.

[0053] The semiconductor layer 108 preferably includes a metal oxide (also referred to as an oxide semiconductor) having semiconductor characteristics. When a metal oxide is used for the layer 108, the layer 108 can be said to be a metal oxide layer.

[0054] The band gap of the metal oxide used for the semiconductor layer 108 is preferably 2.0 eV or more, more preferably 2.5 eV or more.

[0055] Compared with transistors using amorphous silicon, transistors using oxide semiconductors (hereinafter referred to as OS transistors) have a very high field effect mobility. In addition, the off-state current of the OS transistor is extremely small, and the charge stored in the capacitor connected in series with the transistor can be maintained for a long period of time. In addition, by using OS transistors, the power consumption of semiconductor devices can be reduced.

[0056] The insulating layer 110 preferably has one or more layers of inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitrides. Examples of oxides include silicon oxide, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, cerium oxide, gallium zinc oxide, and hafnium aluminate. Examples of nitrides include silicon nitride and aluminum nitride. Examples of oxynitrides include silicon oxynitride, aluminum oxynitride, gallium oxynitride, yttrium oxynitride, and hafnium oxynitride. Examples of oxynitrides include silicon oxynitride and aluminum oxynitride.

[0057] Note that in this specification and the like, an oxynitride refers to a material containing more oxygen than nitrogen in its composition, and an oxynitride refers to a material containing more nitrogen than oxygen in its composition.

[0058] The insulating layer 110 has a region in contact with the layer 108. When a metal oxide is used as the layer 108, in order to improve the interface characteristics between the layer 108 and the insulating layer 110, at least a portion of the region in contact with the layer 108 of the insulating layer 110 preferably contains oxygen. Specifically, the portion in contact with the channel formation region of the layer 108 in the insulating layer 110 preferably contains oxygen. The portion in contact with the channel formation region of the layer 108 in the insulating layer 110 can be made of one or more of an oxide and an oxynitride as appropriate.

[0059] The insulating layer 110 preferably has a stacked-layer structure. Figure 1B etc. show an example in which the insulating layer 110 includes an insulating layer 110a, an insulating layer 110b on the insulating layer 110a, an insulating layer 110c on the insulating layer 110b, and an insulating layer 110d on the insulating layer 110c.

[0060] Figure 3A Show Figure 1B The region 108C in the layer 108 that contacts the insulating layer 110b is used as a channel formation region. The insulating layer 110b preferably uses any one or more of the above-mentioned oxides and oxynitrides. Specifically, the insulating layer 110b can use one or both of silicon oxide and silicon oxynitride as appropriate. Note that Figure 3A Although a plurality of regions 108C are shown in the cross-sectional views of FIG. 1 , the region 108C is continuous.

[0061] The insulating layer 110b is preferably a film that releases oxygen by heating. Since the insulating layer 110b releases oxygen due to heat applied in the manufacturing process of the transistor 100, oxygen can be supplied to the layer 108. By supplying oxygen from the insulating layer 110b to the layer 108, especially to the region 108C serving as the channel formation region, oxygen vacancies (V O :Oxygen Vacancy), which can reduce oxygen vacancies (V O ). Thus, a transistor having good electrical characteristics and high reliability can be realized.

[0062] For example, oxygen can be supplied to the insulating layer 110 b by performing a heat treatment in an oxygen-containing atmosphere or performing a plasma treatment in an oxygen-containing atmosphere. Alternatively, oxygen can be supplied by forming an oxide film on the top surface of the insulating layer 110 b by sputtering in an oxygen-containing atmosphere. Then, the oxide film can also be removed. In Embodiment 2 described later, an example of forming a metal oxide layer 130 to supply oxygen to the insulating layer 110 b will be shown.

[0063] The insulating layer 110b is preferably formed by a deposition method such as a sputtering method or a plasma enhanced chemical vapor deposition (PECVD) method. In particular, by forming the insulating layer 110b by a method using a sputtering method and not using a hydrogen-containing gas as a deposition gas, a film containing very little hydrogen can be achieved. Therefore, the region 108C can be suppressed from being supplied with hydrogen, thereby stabilizing the electrical characteristics of the transistor 100.

[0064] Here, by using a material with high conductivity for layer 108, a transistor with a large on-state current can be realized. However, when a material with high conductivity is used, oxygen vacancies (V O ) and the oxygen vacancies (V O ) increases, the threshold voltage of the transistor sometimes drifts, and the drain current (hereinafter also referred to as the off-state current) flowing when the gate voltage is 0V increases. For example, in an n-channel transistor, when the threshold voltage drifts to the negative side, the off-state current sometimes increases. By providing the insulating layer 110b, oxygen is supplied to at least the region 108C in contact with the insulating layer 110b in the layer 108, that is, the channel formation region, so that the oxygen vacancies (V O ). Thus, the threshold voltage drift can be suppressed, so a transistor with a small off-state current and a large on-state current can be realized. Thus, a semiconductor device with low power consumption and high performance can be realized.

[0065] The region in the layer 108 that is in contact with the uppermost layer of the insulating layer 110 (here, the insulating layer 110 d ) has a region 108M. Figure 3A The cross-sectional views of FIG. 100 and FIG. 101 show a plurality of regions 108M, but the regions 108M are connected to one in a top view (also referred to as a plan view) of the transistor 100. That is, the layer 108 may have one region 108M. Note that the layer 108 may also have a plurality of regions 108M separated from each other.

[0066] The insulating layer 110d in contact with the region 108M preferably uses a material that releases impurities. When a metal oxide is used for the layer 108, as the element contained in the impurity (hereinafter, also referred to as the impurity element), one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, magnesium, silicon and a noble gas can be used. As typical examples of noble gases, helium, neon, argon, krypton and xenon can be cited. The impurity element is preferably one or more of hydrogen, boron, phosphorus, aluminum, magnesium and silicon, and hydrogen is particularly preferred. Specifically, the insulating layer 110d preferably uses a material that releases one or both of hydrogen and water. Note that in this specification, hydrogen is sometimes used as an example of the impurity.

[0067] Oxygen and hydrogen bonded to metal atoms in metal oxides react to form water, forming oxygen vacancies (V O ). Moreover, when hydrogen enters the oxygen vacancy defect (hereinafter, referred to as V O H) is used as a donor to generate electrons as carriers. In addition, since part of the hydrogen is bonded to the oxygen bonded to the metal atom, electrons as carriers are generated. Therefore, the metal oxide exhibits conductivity and can be used as a conductor. In addition, the metal oxide used as a conductor can be called an oxide conductor (OC: Oxide Conductor). Generally speaking, since the band gap of metal oxides is large, they transmit visible light (it can also be said that they are translucent to visible light). In addition, an oxide conductor is a metal oxide having a donor energy level near the conduction band. Therefore, in oxide conductors, the influence caused by the absorption of the donor energy level is small, and it has a translucency to visible light that is roughly the same as that of metal oxides.

[0068] By diffusing impurities released from the insulating layer 110d into the region 108M, the carrier concentration of the region 108M is increased, and thus the conductivity can be improved. Thus, the region 108M is used as a conductor, and the region 108M can be used as one of a source electrode and a drain electrode in the transistor 100. In addition, the conductive layer 112 is used as the other of the source electrode and the drain electrode, and a region of the layer 108 in contact with the conductive layer 112 is used as a source region or a drain region.

[0069] The region 108M contains an element (impurity element) among impurities released from the insulating layer 110d. Specifically, when a material that releases one or both of hydrogen and water from the insulating layer 110d is used, the region 108M contains hydrogen as the impurity element.

[0070] In the transistor 100, a region 108C in the layer 108 that is in contact with the insulating layer 110b is used as a channel formation region, and oxygen vacancies (V O ). Thus, a transistor having good electrical characteristics can be realized. On the other hand, since the conductivity is improved by supplying impurities from the insulating layer 110d, the region 108M in the layer 108 that is in contact with the insulating layer 110d can be used as one of a source electrode and a drain electrode.

[0071] Since a portion of the layer 108 (here, the region 108M) is used as one of the source electrode and the drain electrode, there is no need to provide one of the source electrode and the drain electrode outside the layer 108, so the manufacturing process of the semiconductor device is simplified and the manufacturing cost can be reduced. In addition, the yield of the semiconductor device can be improved.

[0072] The region 108M serving as one of the source electrode and the drain electrode preferably has a portion having a higher concentration of an impurity element than the region 108C serving as a channel formation region. Specifically, the region 108M preferably has a portion having a higher hydrogen concentration than the region 108C.

[0073] The thickness T108 of the region 108M may be, for example, 5 nm or more, 10 nm or more, 15 nm or more, or 20 nm or more and 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 150 nm or less, 120 nm or less, or 100 nm or less. Figure 3B As shown, when viewed from a cross section, the thickness T108 may be the shortest distance between the top surface of the insulating layer 110 (specifically, the top surface of the insulating layer 110 d ) and the bottom surface of the insulating layer 106 .

[0074] When the thickness T108 of the region 108M is thin, the resistance of the region 108M serving as one of the source electrode and the drain electrode may become high. On the other hand, when the thickness T108 is thick, the thickness of the region 108C also becomes thick, and oxygen vacancies (V O By setting the thickness T108 to the above range, a transistor having good electrical characteristics can be realized while reducing the resistance of either the source electrode or the drain electrode.

[0075] The sheet resistance (also referred to as surface resistivity, surface resistivity) of the region 108M is preferably 1000Ω / □ or less, more preferably 500Ω / □ or less, more preferably 300Ω / □ or less, more preferably 200Ω / □ or less, and more preferably 100Ω / □ or less. Note that the resistance of the region 108M is preferably low, so there is no limit to the lower limit of the sheet resistance.

[0076] As described above, the insulating layer 110d in contact with the region 108M preferably uses a material that releases impurities. As the insulating layer 110d, any one or more of the above-mentioned oxides, oxynitrides, nitrides, and oxynitrides can be used. The insulating layer 110d preferably contains nitrogen, and further preferably contains any one or more of the above-mentioned nitrides and oxynitrides. Specifically, silicon nitride or silicon oxynitride can be used appropriately for the insulating layer 110d.

[0077] The amount of impurities released from the insulating layer 110d can be adjusted according to the thickness of the insulating layer 110d. Specifically, by making the thickness of the insulating layer 110d thick, the amount of impurities released from the insulating layer 110d increases, and thus the resistivity of the region 108M can be reduced. Figure 3BAs shown, when viewed from a cross section, the thickness T110d of the insulating layer 110d may be the shortest distance between the formed surface of the insulating layer 110d (here, the top surface of the insulating layer 110c) and the bottom surface of the layer 108. The thickness T110d of the insulating layer 110d may be, for example, 10 nm or more, 20 nm or more, 50 nm or more, or 70 nm or more and less than 1 μm, 500 nm or less, 400 nm or less, 300 nm or less, 200 nm or less, 150 nm or less, or 120 nm or less.

[0078] Here, impurities released from the insulating layer 110d may diffuse to the region 108C through the region 108M. However, oxygen vacancies (V O ), so when the impurities diffuse into the region 108C, the V O H increases. In addition, even if oxygen vacancies (V O ) and V O H, oxygen vacancies (V O ) and V O H, thus suppressing the oxygen vacancies (V O ) and V O H increases. Thus, the region 108C in the layer 108 that is in contact with the insulating layer 110b is used as at least a channel formation region, and a transistor having good electrical characteristics and high reliability can be realized. Note that in the layer 108, the diffusion coefficient of oxygen is smaller than the diffusion coefficient of hydrogen, and therefore the resistance of the region 108M is unlikely to increase due to oxygen released from the insulating layer 110b. Thus, the resistance of the region 108M can be kept low.

[0079] However, when the thickness T110d is large and the amount of impurities diffused from the insulating layer 110d through the region 108M to the region 108C is too large, oxygen vacancies (V O ) and V O The amount of H is likely to be greater than the oxygen vacancies (V O ) and V O On the other hand, when the thickness T110d is thin, the amount of impurities diffused into the region 108M decreases, and the resistance of the region 108M sometimes increases. By setting the thickness T110d to the above range, it is possible to suppress oxygen vacancies (V O ) and V O The increase in H can also reduce the resistance of the region 108M.

[0080] The insulating layer 110c is provided between the insulating layer 110b and the insulating layer 110d. Preferably, the amount of impurities (e.g., hydrogen and water) released from the insulating layer 110c itself is small and the impurities are not easily permeable. Thus, it is possible to suppress the impurities in the insulating layer 110d from diffusing to the region 108C through the insulating layer 110c and the insulating layer 110b. Therefore, a transistor having good electrical characteristics and high reliability can be realized.

[0081] The insulating layer 110c is preferably a film that is not easily permeable to oxygen. This can prevent oxygen in the insulating layer 110b from diffusing to the region 108M through the insulating layer 110c and the insulating layer 110d, and can prevent the resistance of the region 108M from increasing. At the same time, the oxygen in the insulating layer 110b can be prevented from diffusing to the insulating layer 110c and the insulating layer 110d, so that the amount of oxygen supplied from the insulating layer 110b to the region 108C increases, and the oxygen vacancies (V O ) and V O H.

[0082] The insulating layer 110c preferably contains nitrogen, and preferably contains any one or more of the above-mentioned nitrides and nitride oxides. For example, the insulating layer 110c can appropriately use silicon nitride or silicon nitride oxide. In addition, any one or more of oxides and oxynitrides can be used as the insulating layer 110c. For example, aluminum oxide can be appropriately used for the insulating layer 110c. Note that the insulating layer 110c can use the same material as the insulating layer 110d, or a different material.

[0083] Note that in this specification and the like, different materials refer to materials having different constituent elements in part or all or materials having the same constituent elements but different compositions.

[0084] The thickness T110c of the insulating layer 110c may be, for example, 3 nm or more, 5 nm or more, 10 nm or more, 15 nm or more, or 20 nm or more and 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 150 nm or less, 120 nm or less, or 100 nm or less. Figure 3B As shown, when viewed from a cross section, thickness T110c may be the shortest distance between a formed surface of insulating layer 110c (here, the top surface of insulating layer 110b) and a bottom surface of insulating layer 110d.

[0085] When the thickness T110c of the insulating layer 110c is thick, the amount of impurities released from the insulating layer 110c increases, and sometimes the amount of impurities diffused to the region 108C increases. On the other hand, when the thickness T110c is thin, the impurities released from the insulating layer 110d diffuse to the region 108C through the insulating layer 110c and the insulating layer 110b. By setting the thickness T110c to the above range, the oxygen vacancies (VO ) and V O H.

[0086] The insulating layer 110d preferably has a region having a higher impurity element concentration than the insulating layer 110c. Specifically, the insulating layer 110d preferably has a region having a higher hydrogen concentration than the insulating layer 110c. The impurity element concentration of each layer constituting the insulating layer 110 can be analyzed by, for example, secondary ion mass spectrometry (SIMS).

[0087] The insulating layer 110d preferably has an impurity element concentration of 1×10 21 atoms / cm 3 The region above 1×10 22 atoms / cm 3 The region above 1×10 23 atoms / cm 3 Specifically, the insulating layer 110d preferably has a hydrogen concentration of 1×10 21 atoms / cm 3 The region with a hydrogen concentration of 1×10 22 atoms / cm 3 The region above 1×10 23 atoms / cm 3 Note that the concentration of the impurity element in the insulating layer 110d is preferably high, and therefore there is no upper limit on the concentration of the impurity element.

[0088] The concentration of impurity elements in the insulating layer 110 c is preferably lower than that in the insulating layer 110 d. Furthermore, the concentration of impurity elements in the insulating layer 110 c is preferably lower than 1×10 21 atoms / cm 3 Specifically, the hydrogen concentration of the insulating layer 110 c is preferably less than 1×10 21 atoms / cm 3 Note that the concentration of the impurity element in the insulating layer 110 c is preferably low, and therefore the lower limit of the concentration of the impurity element is not limited. Note that in the insulating layer 110 c, the concentrations of all the above impurity elements are preferably low. For example, the carbon concentration in the insulating layer 110 c is preferably less than 1×10 21 atoms / cm 3 .

[0089] By making the deposition conditions of the insulating layer 110c different from the deposition conditions of the insulating layer 110d, the amount of hydrogen released can be adjusted. Specifically, any one or more of the deposition power (deposition power density), deposition pressure, deposition gas type, deposition gas flow ratio, deposition temperature, and the distance between the substrate and the electrode during formation can be made different between the insulating layer 110c and the insulating layer 110d. For example, by making the deposition power density of the insulating layer 110d smaller than the deposition power density of the insulating layer 110c, the hydrogen content in the insulating layer 110d can be greater than the hydrogen content in the insulating layer 110c. Thus, the amount of hydrogen released from the insulating layer 110d itself can be increased by applying heat to the insulating layer 110d.

[0090] The hydrogen content in the deposition gas used to form the insulating layer 110d is preferably greater than that in the deposition gas used to form the insulating layer 110c. Specifically, when a silicon nitride film or a silicon nitride oxide film is formed in each of the insulating layer 110c and the insulating layer 110d by the PECVD method, the ratio of the flow rate of ammonia gas to the entire deposition gas used to form the insulating layer 110d (hereinafter, also referred to as the ammonia flow ratio) is higher than the ammonia flow ratio of the deposition gas used to form the insulating layer 110c. By forming the insulating layer 110d under the condition of a high ammonia flow ratio, the hydrogen content in the insulating layer 110d can be increased. In addition, the amount of hydrogen released from the insulating layer 110d itself can be increased by applying heat to the insulating layer 110d.

[0091] The film density of the insulating layer 110c is preferably higher than the film density of the insulating layer 110d. Thus, the hydrogen in the insulating layer 110d can be suppressed from diffusing to the region 108C through the insulating layer 110c and the insulating layer 110b. In addition, the oxygen in the insulating layer 110b can be suppressed from diffusing to the region 108M through the insulating layer 110c and the insulating layer 110d. The film density can be evaluated, for example, using Rutherford backscattering analysis (RBS: Rutherford Backscattering Spectrometry) or X-ray reflection (XRR: X-Ray Reflection). The difference in film density can sometimes be evaluated by a cross-sectional transmission electron microscope (TEM: Transmission Electron Microscopy) image. In TEM observation, the transmission electron (TE) image is darker (darker) when the film density is high, and the transmission electron (TE) image is lighter (brighter) when the film density is low. Therefore, in the transmission electron (TE) image, the insulating layer 110c sometimes appears as a darker (darker) image compared to the insulating layer 110d. Note that even if the insulating layer 110 c and the insulating layer 110 d are made of the same material, the film densities are different, so that the boundary between them may be observed as a difference in contrast in a cross-sectional TEM image.

[0092] Compared to the region 108C, the region in contact with the insulating layer 110c in the layer 108 is a region whose resistance is substantially equal to or lower, whose interception carrier concentration is substantially equal to or higher, and whose oxygen vacancy density is substantially equal to or higher. Furthermore, compared to the region 108M, this region is a region whose resistance is higher, whose interception carrier concentration is lower, and whose oxygen vacancy density is lower.

[0093] By using a material that releases impurities for the insulating layer 110c, the resistance of the region in contact with the insulating layer 110c in the layer 108 is sometimes low. Compared with the region 108c, this region is a region whose resistance is low, a region whose interceptor concentration is high, and a region whose oxygen vacancy density is high. And, compared with the region 108m, this region is a region whose resistance is high, a region whose interceptor concentration is low, and a region whose oxygen vacancy density is low. Note that the amount of impurities released from the insulating layer 110c is preferably less than the amount of impurities released from the insulating layer 110d.

[0094] By using a material with a small amount of released impurities for the insulating layer 110c, the resistance, interception carrier concentration, and oxygen vacancy density of the region in contact with the insulating layer 110c in the layer 108 may be substantially equal to those of the region 108C. In this case, the region in contact with the insulating layer 110c can also be used as a channel formation region together with the region 108C in contact with the insulating layer 110b.

[0095] The insulating layer 110a is provided between the substrate 102 and the conductive layer 112 and the insulating layer 110b. Preferably, the amount of impurities (for example, hydrogen and water) released from the insulating layer 110a itself is small and the impurities are not easily permeable. Thus, it is possible to suppress the impurities contained in the substrate 102 from diffusing to the region 108C through the insulating layer 110a and the insulating layer 110b, and a transistor having good electrical characteristics and high reliability can be realized. In addition, by providing the insulating layer 110a, it is possible to suppress the impurities from the outside of the transistor 100 from diffusing to the region 108C through the substrate 102.

[0096] The insulating layer 110a is preferably a film that does not easily diffuse oxygen. Here, due to the oxygen contained in the insulating layer 110b, the conductive layer 112 is oxidized, and the resistance may increase. In addition, the amount of oxygen supplied from the insulating layer 110b to the region 108C may be reduced. By providing the insulating layer 110a between the insulating layer 110b and the conductive layer 112, it is possible to suppress the conductive layer 112 from being oxidized and the resistance from increasing. At the same time, the amount of oxygen supplied from the insulating layer 110b to the region 108C is increased, and oxygen vacancies (V O ).

[0097] By using a film that does not diffuse oxygen easily for the insulating layer 110a and the insulating layer 110c, oxygen in the insulating layer 110b can be prevented from passing through the insulating layer 110a to the substrate 102 side and passing through the insulating layer 110c and the insulating layer 110d to the insulating layer 106 side. In other words, by sandwiching the insulating layer 110b with the insulating layer 110a and the insulating layer 110c that do not diffuse oxygen easily, oxygen in the insulating layer 110b can be confined. Thus, oxygen can be efficiently supplied from the insulating layer 110b to the region 108C.

[0098] The insulating layer 110a can use a material that can be used for the insulating layer 110c as appropriate. Note that the insulating layer 110a, the insulating layer 110c, and the insulating layer 110d can also use the same material or different materials from each other.

[0099] The thickness T110a of the insulating layer 110a may be, for example, 3 nm or more, 5 nm or more, 10 nm or more, 20 nm or more, 50 nm or more, or 70 nm or more and less than 1 μm, or 500 nm or less, 400 nm or less, 300 nm or less, 200 nm or less, 150 nm or less, or 120 nm or less. Figure 3B As shown, thickness T110a can be set to the shortest distance between the formed surface of insulating layer 110a (here, the top surface of conductive layer 112) and the bottom surface of insulating layer 110b when viewed in cross section.

[0100] When the thickness T110a of the insulating layer 110a is thick, the amount of impurities released from the insulating layer 110a increases, and the amount of impurities diffused into the region 108C may increase. On the other hand, when the thickness T110a is thin, oxygen diffuses from the insulating layer 110b into the conductive layer 112, and the conductive layer 112 is oxidized, so that the resistance of the conductive layer 112 may increase. By setting the thickness T110a to the above range, it is possible to suppress the reduction of oxygen vacancies (V O ) and V O H, the resistance of the conductive layer 112 becomes higher.

[0101] The insulating layer 110d preferably includes a region whose hydrogen concentration is higher than that of the insulating layer 110a. In addition, the film density of the insulating layer 110a is preferably higher than that of the insulating layer 110d.

[0102] Transistor 100 is a so-called top-gate transistor having a gate electrode above layer 108. Furthermore, since the bottom surface of layer 108 is in contact with the conductive layer 112 serving as the other of the source electrode and the drain electrode, it can be said to be a TGBC (Top Gate Bottom Contact) type transistor. In addition, in transistor 100, the heights of the source electrode and the drain electrode relative to the surface of the substrate 102 on which the surface is formed are different from each other, and the drain current flows in a direction perpendicular to or approximately perpendicular to the surface of the substrate 102. It can also be said that in transistor 100, the drain current can flow in the longitudinal direction or the approximately longitudinal direction. Therefore, a transistor of one embodiment of the present invention can be said to be a vertical channel transistor, a vertical transistor, or a VFET (Vertical Field Effect Transistor).

[0103] The channel length of the transistor 100 can be controlled by the thickness of the insulating layer 110 (specifically, the insulating layer 110b) disposed between the conductive layer 112 and the region 108M. Therefore, a transistor having a channel length shorter than the limiting resolution of an exposure device used to manufacture the transistor can be manufactured with high precision. In addition, the non-uniformity of characteristics between the plurality of transistors 100 can be reduced. Therefore, the operation of the semiconductor device including the transistor 100 is stable and the reliability can be improved. In addition, when the non-uniformity of characteristics is reduced, the freedom of circuit design is improved, and the operating voltage of the semiconductor device can also be reduced. Thus, the power consumption of the semiconductor device can be reduced.

[0104] Since the source electrode, the layer having the channel formation region, and the drain electrode can be overlapped, the occupied area of ​​the transistor of one embodiment of the present invention can be made much smaller than that of a so-called planar transistor in which the layer having the channel formation region is arranged in a planar shape.

[0105] The region 108M, the conductive layer 112, and the conductive layer 104 of the layer 108 can all be used as wiring, and the transistor 100 can be set in the region where these wirings overlap. That is, in a circuit including the transistor 100 and the wiring, the area occupied by the transistor 100 and the wiring can be reduced. Therefore, the area occupied by the circuit can be reduced to realize a small semiconductor device. In addition, by using a portion of the layer 108 (here, the region 108M) as one of the source electrode and the drain electrode, there is no need to set one of the source electrode and the drain electrode outside the layer 108, so the manufacturing process of the semiconductor device is simplified, and the manufacturing cost can be reduced. In addition, the yield of the semiconductor device can be improved.

[0106] For example, when a semiconductor device according to one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced, and a high-definition display device can be realized. In addition, for example, when a semiconductor device according to one embodiment of the present invention is used in a drive circuit (for example, one or both of a gate line drive circuit and a source line drive circuit) of a display device, the area occupied by the drive circuit can be reduced, so a display device with a narrow frame can be realized.

[0107] Note that, although an example of a four-layer structure of the insulating layer 110 including the insulating layer 110a, the insulating layer 110b, the insulating layer 110c, and the insulating layer 110d is shown here, one embodiment of the present invention is not limited to this. It is also possible not to provide at least one of the insulating layer 110a, the insulating layer 110c, and the insulating layer 110d. The insulating layer 110 preferably includes at least the insulating layer 110b.

[0108] In addition, the insulating layer 110 may not include the insulating layer 110 d . Figure 5A and Figure 5B The insulating layer 110 is shown to have a stacked structure of an insulating layer 110 a , an insulating layer 110 b , and an insulating layer 110 c .

[0109] Figure 5C Show Figure 5A The region 108M is provided in the region of the uppermost layer of the insulating layer 110 in contact with the insulating layer 110c. In the case where the region 108M has a desired resistance even when a material with high conductivity is used for the layer 108 and impurities are not supplied from the insulating layer 110d, the structure may also have a structure without providing the insulating layer 110d. When a material with high conductivity is used for the layer 108, it is preferable to increase the amount of oxygen supplied from the insulating layer 110b to the region 108C. As a result, the oxygen vacancies (V O ) is reduced, and region 108C can be used as a channel formation region. Regarding the method of supplying oxygen to the insulating layer 110b, the above description can be referred to. For example, by lengthening the processing time for supplying oxygen to the insulating layer 110b, the amount of oxygen supplied to the insulating layer 110b can be increased. Alternatively, a variety of methods for supplying oxygen can be used. Thus, the amount of oxygen supplied from the insulating layer 110b to the region 108C can be increased.

[0110] It is preferable to provide an insulating layer 110c on the insulating layer 110b. By providing an insulating layer 110c that is not easily permeable to oxygen, it is possible to suppress the diffusion of oxygen in the insulating layer 110b to the region 108M through the insulating layer 110c. Thus, it is possible to suppress the increase in resistance of the region 108M due to the oxygen in the insulating layer 110b. Similarly, it is preferable to provide an insulating layer 110a between the insulating layer 110b and the conductive layer 112. By providing an insulating layer 110a that is not easily permeable to oxygen, it is possible to suppress the diffusion of oxygen in the insulating layer 110b to the conductive layer 112 through the insulating layer 110a. Thus, it is possible to suppress the increase in resistance of the conductive layer 112 due to the oxygen in the insulating layer 110b. In addition, since the insulating layer 110b is sandwiched between the insulating layer 110a and the insulating layer 110c, diffusion of oxygen in the insulating layer 110b to the insulating layer 110a side and diffusion to the insulating layer 110c side is suppressed, the amount of oxygen supplied from the insulating layer 110b to the region 108C increases, and thus the oxygen vacancies (V O ) and V O H.

[0111] Figure 1B The example in which the layer 108, the insulating layer 106 and the conductive layer 104 cover the opening 141 is shown in the figure, but one embodiment of the present invention is not limited thereto. In addition, the structure may also be such that the insulating layer 110 and the conductive layer 112 form a step, and the layer 108, the insulating layer 106 and the conductive layer 104 are arranged along the step.

[0112] [Layer 108] The metal oxide that can be used for layer 108 is specifically described. As metal oxides, for example, indium oxide, gallium oxide and zinc oxide can be cited. The metal oxide preferably contains at least indium or zinc. In addition, the metal oxide preferably contains two or three selected from indium, element M and zinc. Element M is a metal element or a semi-metal element with a high bond energy with oxygen, for example, a metal element or a semi-metal element with a higher bond energy with oxygen than indium. As element M, specifically, aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium and antimony can be cited. The element M contained in the metal oxide is preferably any one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin and yttrium, and further preferably one or more of gallium and tin. Note that in this specification, etc., metal elements and semi-metal elements are sometimes collectively referred to as "metal elements", and the "metal elements" recorded in this specification, etc. sometimes include semi-metal elements.

[0113] The layer 108 may be made of, for example, indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide, also referred to as ITO), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium tungsten oxide (In-W oxide, also referred to as IWO), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide, also referred to as AZO), Indium aluminum zinc oxide (In-Al-Zn oxide, also recorded as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also recorded as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also recorded as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also recorded as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also recorded as IGAZO, IGZAO or IAGZO), etc. Alternatively, indium tin oxide (also recorded as ITSO), gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide) and the like containing silicon can be used.

[0114] When the ratio of the number of atoms of indium to the total number of atoms of all metal elements in the metal oxide is increased, the field effect mobility of the transistor can be increased, and a transistor with a large on-state current can be realized.

[0115] Note that the metal oxide may also replace indium or contain one or more metal elements with a large period number in the periodic table in addition to indium. There is a tendency that the greater the orbital overlap of the metal element, the greater the carrier conduction in the metal oxide. Therefore, by including a metal element with a large period number, the field effect mobility of the transistor can sometimes be improved. As metal elements with a large period number, metal elements belonging to the 5th period and metal elements belonging to the 6th period can be cited. As the metal element, specifically, yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, lanthanum, cerium, praseodymium, neodymium, promethium, samarium and europium can be cited. Note that lanthanum, cerium, praseodymium, neodymium, promethium, samarium and europium are called light rare earth elements.

[0116] The metal oxide may also contain one or more non-metallic elements. When the metal oxide contains non-metallic elements, the field effect mobility of the transistor may be improved by increasing the carrier concentration or narrowing the band gap. Examples of non-metallic elements include carbon, nitrogen, phosphorus, sulfur, selenium, fluorine, chlorine, bromine, and hydrogen.

[0117] When the ratio of the number of zinc atoms to the total number of atoms of all metal elements in the metal oxide is increased, the metal oxide has high crystallinity and diffusion of impurities in the metal oxide can be suppressed. Therefore, the variation of the electrical characteristics of the transistor is suppressed and the reliability can be improved.

[0118] When the ratio of the number of atoms of the element M to the total number of atoms of all metal elements in the metal oxide is increased, the formation of oxygen vacancies (V) in the metal oxide can be suppressed. O ). Therefore, due to oxygen vacancies (V O ) is suppressed, and a transistor with a small off-state current can be formed. In addition, the variation of the electrical characteristics of the transistor is suppressed, and the reliability can be improved.

[0119] The electrical characteristics and reliability of the transistor differ depending on the composition of the metal oxide used for the layer 108. Therefore, by varying the composition of the metal oxide according to the electrical characteristics and reliability required for the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be achieved.

[0120] When the metal oxide is an In-M-Zn oxide, the atomic ratio of In in the In-M-Zn oxide is preferably greater than the atomic ratio of the element M. Examples of the atomic ratio of the metal elements in such an In-M-Zn oxide include In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=10:1:1, In:M:Zn=10:1:3, In:M:Zn=10:1:4, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10 and compositions near them. In addition, the composition near them includes a range of ±30% of the desired atomic ratio. By increasing the atomic ratio of indium in the metal oxide, the on-state current or field effect mobility of the transistor can be increased.

[0121] The atomic ratio of In in the In-M-Zn oxide may be smaller than the atomic ratio of the element M. Examples of the atomic ratio of the metal elements in such an In-M-Zn oxide include In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4, and compositions near these. By increasing the atomic ratio of M in the metal oxide, oxygen vacancies (V O ) is generated.

[0122] Note that when a plurality of metal elements are included as the element M, the total of the ratios of the number of atoms of the metal elements may be the ratio of the number of atoms of the element M.

[0123] In this specification, etc., the ratio of the number of atoms of indium to the total number of atoms of all metal elements contained may be described as the content rate of indium. The same applies to other metal elements.

[0124] By using a material having a high indium content for the layer 108, the on-state current and field effect mobility of the transistor can be improved. In addition, by including the element M, the generation of oxygen vacancies (V O ). The content of element M (the ratio of the number of atoms of element M relative to the sum of the number of atoms of all metal elements) is preferably not less than 0.1% and not more than 3%, and more preferably not less than 0.1% and not more than 2%. Thus, a transistor with good electrical characteristics can be realized. For example, it is preferred to use metal oxides of In:M:Zn=40:1:10 and the like. Element M is preferably any one or more of the above-mentioned elements, and more preferably one or more selected from aluminum, gallium, tin and yttrium. Specifically, metal oxides of In:Sn:Zn=40:1:10 and the like can be appropriately used. Alternatively, metal oxides of In:Al:Zn=40:1:10 and the like can be appropriately used.

[0125] Here, by using a metal oxide with a polycrystalline structure for layer 108, the grain boundaries become recombination centers and capture carriers, so that the on-state current of the transistor sometimes decreases. When using a metal oxide with a composition that easily forms a polycrystalline structure, it is preferable to contain an element that hinders crystallization. For example, compared with indium tin oxide (ITO), indium tin oxide (ITSO) containing silicon is not easy to form a polycrystalline structure, so it can be appropriately used for layer 108. When using ITSO, the silicon content (the ratio of the number of silicon atoms relative to the sum of the number of atoms of all metal elements contained) is preferably 1% to 20%, more preferably 3% to 20%, more preferably 3% to 15%, and more preferably 5% to 15%. Specifically, metal oxides of In:Sn:Si=45:5:4, In:Sn:Si=95:5:8 and their vicinities can be appropriately used.

[0126] In the analysis of the composition of layer 108, for example, energy dispersive X-ray analysis (EDX: Energy Dispersive X-ray Spectrometry), X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectrometry), inductively coupled plasma mass spectrometry (ICP-MS: Inductively Coupled Plasma-Mass Spectrometry) or inductively coupled plasma atomic emission spectrometry (ICP-AES: Inductively Coupled Plasma-Atomic Emission Spectrometry) can be used. Alternatively, a combination of multiple of the above methods can be used for analysis. Note that the actual content of an element with a low content is sometimes different from the content obtained by analysis due to the influence of analysis accuracy. For example, when the content of element M is low, the content of element M obtained by analysis is sometimes lower than the actual content, quantification is difficult, or element M cannot be detected.

[0127] The metal oxide can be formed by sputtering or atomic layer deposition (ALD) as appropriate. Note that when the metal oxide is formed by sputtering, the composition of the metal oxide after formation is sometimes different from the composition of the sputtering target. In particular, the zinc content in the metal oxide after formation is sometimes reduced to about 50% of that in the sputtering target.

[0128] The layer 108 may also have a stacked structure including two or more metal oxide layers. The compositions of the two or more metal oxide layers included in the layer 108 may also be the same or substantially the same as each other. By adopting a stacked structure of metal oxide layers with the same composition, for example, the same sputtering target can be used to form the layer, thereby reducing the manufacturing cost.

[0129] The compositions of the two or more metal oxide layers included in layer 108 may also be different from each other. For example, a stacked structure of a first metal oxide layer having a composition of In:M:Zn=1:3:4 [atomic ratio] or thereabouts and a second metal oxide layer having a composition of In:M:Zn=1:1:1 [atomic ratio] or thereabouts disposed on the first metal oxide layer may be appropriately used. In addition, gallium, aluminum or tin is particularly preferably used as the element M. The element M in the first metal oxide layer and the second metal oxide layer may be the same or different from each other. For example, the first metal oxide layer and the second metal oxide layer may also be IGZO layers having different compositions from each other.

[0130] For example, a stacked structure of a first metal oxide layer having a composition of In:Zn=4:1 [atomic ratio] or thereabouts and a second metal oxide layer having a composition of In:M:Zn=1:1:1 [atomic ratio] or thereabouts provided on the first metal oxide layer can be appropriately used.

[0131] For example, a stacked-layer structure selected from any one of indium oxide, indium gallium oxide, and IGZO, and any one of IAZO, IAGZO, and ITZO (registered trademark) can be used.

[0132] Note that in the case of a stacked structure having a first metal oxide layer including a first metal oxide and a second metal oxide layer including a second metal oxide, and the composition of the first metal oxide is the same as or approximately the same as the composition of the second metal oxide, the boundary (interface) between the first metal oxide layer and the second metal oxide layer cannot sometimes be clearly confirmed.

[0133] The layer 108 preferably includes a crystalline metal oxide. Examples of the structure of the crystalline metal oxide include a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, and a nanocrystal (nc: nano-crystal) structure. By using a crystalline metal oxide for the layer 108, the defect state density in the layer 108 can be reduced, thereby realizing a semiconductor device with high reliability.

[0134] By using a metal oxide with high crystallinity in the channel formation region, the defect state density in the channel formation region can be reduced. On the other hand, by using a metal oxide with low crystallinity, a transistor capable of passing a large current can be realized.

[0135] The higher the substrate temperature when forming the metal oxide, the more crystalline metal oxide can be formed. The substrate temperature during formation can be adjusted, for example, according to the temperature of the stage on which the substrate is placed during formation. In addition, the higher the flow rate ratio of the oxygen gas relative to the entire deposition gas used during formation (hereinafter also referred to as the oxygen flow rate ratio) or the oxygen partial pressure in the processing chamber, the more crystalline metal oxide can be formed.

[0136] The crystallinity of the layer 108 can be analyzed, for example, by X-ray diffraction (XRD), transmission electron microscope (TEM), or electron diffraction (ED), or a combination of a plurality of the above methods.

[0137] When a metal oxide is used as the layer 108, it is preferable to minimize the V in the region 108C serving as the channel formation region.O H to make it high purity intrinsic or substantially high purity intrinsic. In order to obtain this V O In order to obtain a metal oxide with a sufficiently reduced H, it is important to: remove impurities such as water and hydrogen in the metal oxide (sometimes described as dehydration or dehydrogenation treatment); and supply oxygen to the metal oxide to repair oxygen vacancies (V O ). By setting V O A metal oxide in which impurities such as H are sufficiently reduced is used in the channel formation region of a transistor to impart stable electrical characteristics. Note that oxygen is sometimes supplied to the metal oxide to repair oxygen vacancies (V O ) is recorded as oxidation treatment.

[0138] When a metal oxide is used as the layer 108, the carrier concentration of the metal oxide in the region 108C serving as the channel formation region is preferably 1×10 18 cm -3 Below, more preferably below 1×10 17 cm -3 , and more preferably less than 1×10 16 cm -3 , more preferably less than 1×10 13 cm -3 , and more preferably less than 1×10 12 cm -3 Note that there is no limit on the lower limit of the carrier concentration in region 108C, and it can be, for example, 1×10 -9 cm -3 .

[0139] OS transistors have little change in electrical characteristics due to exposure to radiation, that is, they have high tolerance to radiation, so they can be appropriately used in environments where radiation may be incident. OS transistors can also be said to have high reliability with respect to radiation. For example, OS transistors can be appropriately used in pixel circuits of flat-panel detectors for X-rays. In addition, OS transistors can be appropriately used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton radiation, and neutron radiation).

[0140] Layer 108 may also include a layered material used as a semiconductor. A layered material is a general term for a group of materials having a layered crystalline structure. A layered crystalline structure is a structure in which layers formed by covalent bonds or ionic bonds are stacked by bonds such as van der Waals bonds that are weaker than covalent bonds and ionic bonds. The layered material has high conductivity in a unit layer, that is, has high two-dimensional conductivity. By using a material used as a semiconductor and having high two-dimensional conductivity in a channel formation region, a transistor with a large on-state current can be provided.

[0141] Examples of the layered material include graphene, silicene, and chalcogenides. Chalcogenides are compounds containing oxygen group elements (elements belonging to Group 16). In addition, examples of chalcogenides include transition metal chalcogenides and Group 13 chalcogenides. Examples of transition metal chalcogenides that can be used as a channel formation region of a transistor include molybdenum sulfide (typically MoS 2 ), Molybdenum selenide (typically MoSe 2 ), molybdenum telluride (typically MoTe 2 ), tungsten sulfide (typically WS 2 ), tungsten selenide (typically WSe 2 ), tungsten telluride (typically WTe 2 ), hafnium sulfide (typically HfS 2 ), hafnium selenide (typically HfSe 2 ), zirconium sulfide (typically ZrS 2 ), zirconium selenide (typically ZrSe 2 )wait.

[0142] [Opening 141] There is no limitation on the top surface shape of the opening 141, for example, it can be a polygon such as a circle, an ellipse, a triangle, a quadrangle (including a rectangle, a rhombus, a square), a pentagon, or a shape with rounded corners. The polygon can also be a concave polygon (a polygon with at least one internal angle exceeding 180 degrees) or a convex polygon (a polygon with internal angles less than 180 degrees). Figure 1A As shown in FIG. 1 , the top surface of the opening 141 is preferably circular. The top surface of the opening is circular, so that the processing accuracy when forming the opening can be improved, and a fine opening can be formed. Note that in this specification, etc., a circle is not limited to a perfect circle.

[0143] In this specification and the like, the top surface shape of the opening 141 refers to the shape of the top surface end portion of the insulating layer 110 on the opening 141 side.

[0144] Reference Figure 4A and Figure 4B The channel length and channel width of transistor 100 are described. Figure 4A and Figure 4B yes Figure 1A and Figure 1B Magnified image of .

[0145] exist Figure 4BThe double-headed arrow with a dotted line in the figure represents the channel length L100 of the transistor 100. The channel length L100 of the transistor 100 is equivalent to the length of the side surface of the opening 141 side of the insulating layer 110b when viewed from a cross section. That is, the channel length L100 is determined by the thickness T110b of the insulating layer 110b and the angle θ141 formed by the side surface of the opening 141 side of the insulating layer 110b and the formed surface of the insulating layer 110b (here, the top surface of the insulating layer 110a). Therefore, for example, the channel length L100 can be set to a value smaller than the limiting resolution of the exposure device, and a fine transistor can be realized. Specifically, a transistor with an extremely short channel length that cannot be realized in the exposure device used in the mass production of existing flat-panel displays (for example, a minimum line width of about 2μm or 1.5μm) can be realized. In addition, a transistor with a channel length shorter than 10nm can be realized without using a very expensive exposure device used in the most advanced LSI technology.

[0146] The channel length L100 may be, for example, 5 nm or more, 7 nm or more, or 10 nm or more and less than 3 μm, 2.5 μm or less, 2 μm or less, 1.5 μm or less, 1.2 μm or less, 1 μm or less, 500 nm or less, 300 nm or less, 200 nm or less, 100 nm or less, 50 nm or less, 30 nm or less, or 20 nm or less. For example, the channel length L100 may be set to be 100 nm or more and 1 μm or less.

[0147] By shortening the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, a small semiconductor device can be realized. For example, when a semiconductor device of one embodiment of the present invention is used in a large display device or a high-definition display device, the signal delay of each wiring can be reduced when the number of wirings increases, thereby suppressing display unevenness. In addition, since the area occupied by the circuit can be reduced, the frame of the display device can be reduced.

[0148] By adjusting the thickness T110b and the angle θ141 of the insulating layer 110b, the channel length L100 can be controlled. Figure 4B In FIG. 1 , a double-pointed arrow indicates a thickness T110b of the insulating layer 110b.

[0149] The thickness T110b of the insulating layer 110b can be, for example, greater than 5 nm, greater than 7 nm or greater than 10 nm and smaller than 3 μm, less than 2.5 μm, less than 2 μm, less than 1.5 μm, less than 1.2 μm, less than 1 μm, less than 500 nm, less than 300 nm, less than 200 nm, less than 100 nm, less than 50 nm, less than 30 nm or less than 20 nm.

[0150] The side surface of the opening 141 of the insulating layer 110 preferably has a tapered shape. The angle θ141 is preferably less than 90 degrees. By reducing the angle θ141, the coverage of the layer (e.g., layer 108) formed on the insulating layer 110 can be improved. In addition, the smaller the angle θ141, the longer the channel length L100 can be, and the larger the angle θ141, the shorter the channel length L100 can be.

[0151] The angle θ141 may be, for example, greater than 30 degrees, greater than 35 degrees, greater than 40 degrees, greater than 45 degrees, greater than 50 degrees, greater than 55 degrees, greater than 60 degrees, greater than 65 degrees, or greater than 70 degrees and less than 90 degrees, less than 85 degrees, or less than 80 degrees. The angle θ141 may also be less than 75 degrees, less than 70 degrees, less than 65 degrees, or less than 60 degrees.

[0152] Note that Figure 1B In the embodiment of the present invention, the side surface of the opening 141 of the insulating layer 110 is a straight line when viewed from a cross section, but one embodiment of the present invention is not limited to this. When viewed from a cross section, the side surface of the opening 141 of the insulating layer 110 may be a curved line, or may have both a straight line region and a curved line region.

[0153] exist Figure 4A and Figure 4B The double-pointed arrow in FIG. 1 represents the width D141 of the opening 141 . Figure 4A An example is shown in which the top surface shape of the opening 141 is circular. In this case, the width D141 is equivalent to the diameter of the circle, and the channel width W100 of the transistor 100 is equivalent to the length of the circumference of the circle. That is, the channel width W100 is π×D141. In this way, when the top surface shape of the opening 141 is circular, a transistor with a smaller channel width W100 can be realized compared to other shapes.

[0154] Note that the width D141 of the opening 141 may vary in the depth direction. As the width D141 of the opening 141, for example, the average value of the diameter of the highest position, the diameter of the lowest position, and the diameter of the position of the middle point of the insulating layer 110 (or the insulating layer 110b) when viewed from the cross section may be used. Alternatively, as the diameter of the opening, for example, any of the diameter of the highest position, the diameter of the lowest position, and the diameter of the position of the middle point of the insulating layer 110 (or the insulating layer 110b) when viewed from the cross section may be used.

[0155] When the opening 141 is formed by photolithography, the width D141 of the opening 141 is greater than the limiting resolution of the exposure device. The width D141 may be, for example, greater than 200 nm, greater than 300 nm, greater than 400 nm, or greater than 500 nm and less than 5 μm, less than 4.5 μm, less than 4 μm, less than 3.5 μm, less than 3 μm, less than 2.5 μm, less than 2 μm, less than 1.5 μm, or less than 1 μm.

[0156] Note that when the channel length L100 of the transistor 100 is shortened, the amount of hydrogen released from the insulating layer 110d is preferably small. Specifically, the thickness T110d of the insulating layer 110d is preferably thin. For example, when the channel length L100 is less than 100nm, the thickness T110d of the insulating layer 110d is preferably greater than 1nm and less than 50nm, more preferably greater than 3nm and less than 50nm, more preferably greater than 3nm and less than 40nm, more preferably greater than 3nm and less than 30nm, more preferably greater than 3nm and less than 20nm, more preferably greater than 3nm and less than 15nm, more preferably greater than 3nm and less than 10nm, more preferably greater than 5nm and less than 10nm. In this way, the amount of hydrogen diffused into the region 108C can be reduced, and a transistor having good electrical characteristics and high reliability can be realized even when the channel length L100 is short.

[0157] When the channel length L100 of the transistor 100 is shortened, the insulating layer 110a and the insulating layer 110c preferably use a material that releases less hydrogen from the insulating layer 110a and the insulating layer 110c. When a material that releases a small amount of hydrogen is used for the insulating layer 110a and the insulating layer 110c, the thickness thereof is preferably thin. For example, when the channel length L100 is less than 100nm, the thickness T110a of the insulating layer 110a and the thickness T110c of the insulating layer 110c are preferably both greater than 1nm and less than 50nm, more preferably greater than 3nm and less than 50nm, more preferably greater than 3nm and less than 40nm, more preferably greater than 3nm and less than 30nm, more preferably greater than 3nm and less than 20nm, more preferably greater than 3nm and less than 15nm, more preferably greater than 3nm and less than 10nm, and more preferably greater than 5nm and less than 10nm. In this way, the amount of hydrogen diffused into the region 108C can be reduced, and a transistor having good electrical characteristics and high reliability can be realized even when the channel length L100 is short.

[0158] Note that, here, the structure in which the region 108C in contact with the insulating layer 110b in the layer 108 is used as the channel formation region is described as an example, but one embodiment of the present invention is not limited to this. The region in contact with the insulating layer 110a in the layer 108 can also be used as the channel formation region. Similarly, the region in contact with the insulating layer 110c can also be used as the channel formation region.

[0159] [Conductive layer 112, conductive layer 104] The conductive layer 112 and the conductive layer 104 may have a single-layer structure or a stacked-layer structure of two or more layers. As materials that can be used for the conductive layer 112 and the conductive layer 104, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum and niobium and alloys containing one or more of the above metals as components can be cited. A low-resistance conductive material containing one or more of copper, silver, gold and aluminum can be appropriately used for the conductive layer 112 and the conductive layer 104. Among them, copper or aluminum is particularly advantageous in mass productivity and is therefore preferred.

[0160] Conductive metal oxides (oxide conductors) can be used for the conductive layer 112 and the conductive layer 104. Examples of the oxide conductor (OC) include indium oxide, zinc oxide, In-Sn oxide (ITO), In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn-Si oxide (ITO containing silicon, also referred to as ITSO), zinc oxide to which gallium is added, and In-Ga-Zn oxide. In particular, an oxide conductor containing indium is preferably used because it has high conductivity.

[0161] A stacked-layer structure of a conductive film containing the above-mentioned oxide conductor (metal oxide) and a conductive film containing a metal or an alloy may be used as the conductive layer 112 and the conductive layer 104. By using a conductive film containing a metal or an alloy, wiring resistance can be reduced.

[0162] A Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta or Ti) may be applied as the conductive layer 112 and the conductive layer 104. By using the Cu-X alloy film, processing by a wet etching method can be performed, thereby reducing manufacturing costs.

[0163] Note that the materials used for the conductive layer 112 and the conductive layer 104 may be the same or different.

[0164] The conductive layer 112 has a region in contact with the layer 108. When a metal oxide is used as the layer 108, there is a concern that when an easily oxidized metal (e.g., aluminum) is used as the conductive layer 112, an insulating oxide (e.g., aluminum oxide) is formed between the conductive layer 112 and the layer 108, thereby hindering conduction between them. Therefore, the conductive layer 112 preferably uses a conductive material that is not easily oxidized, a conductive material that maintains low resistance even when oxidized, or an oxide conductor.

[0165] As the conductive layer 112, for example, titanium, tantalum nitride, titanium nitride, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium, and oxide containing lanthanum and nickel are preferably used. These materials are conductive materials that are not easily oxidized or materials that maintain low resistance even if oxidized, so they are preferred. Note that when the conductive layer 112 has a stacked structure, at least the layer in contact with the layer 108 is preferably a conductive material that is not easily oxidized.

[0166] The above-mentioned oxide conductors can be used for the conductive layer 112. Specifically, indium oxide, zinc oxide, ITO, In-Zn oxide, In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Sn oxide containing silicon, zinc oxide added with gallium, or the like can be used.

[0167] A nitride conductor may be used for the conductive layer 112. Examples of the nitride conductor include tantalum nitride and titanium nitride.

[0168] The conductive layer 112 and the conductive layer 104 may also have a stacked structure. Fig. 6A and Figure 6B The conductive layer 112 has a stacked-layer structure of a conductive layer 112A and a conductive layer 112B on the conductive layer 112A.

[0169] The conductive layer 112B having a region in contact with the layer 108 is preferably made of a conductive material that is not easily oxidized, a conductive material that can maintain low resistance even if oxidized, or an oxide conductor. Materials that can be used for the conductive layer 112B can be found in the description of the conductive layer 112.

[0170] The conductive layer 112A does not have a region in contact with the layer 108, so there is no particular limitation on the material used. For example, the conductive layer 112A preferably uses a material having a lower resistivity than the conductive layer 112B. Thus, the resistance of the conductive layer 112 can be reduced. For example, the conductive layer 112B can be appropriately made of In-Sn-Si oxide (ITSO), and the conductive layer 112A can be appropriately made of copper or tungsten.

[0171] also, Fig. 6A and Figure 6B Although the structure in which the thickness of the conductive layer 112A is the same as or substantially the same as the thickness of the conductive layer 112B is shown, one embodiment of the present invention is not limited thereto. The thickness of the conductive layer 112A may be different from the thickness of the conductive layer 112B. For example, a material having a lower resistivity than the conductive layer 112B may be used for the conductive layer 112A and the thickness of the conductive layer 112A may be thicker than the thickness of the conductive layer 112B. Thus, the resistance of the conductive layer 112 can be reduced.

[0172] like Fig. 6A As shown, the end of the conductive layer 112B may be aligned or substantially aligned with the end of the conductive layer 112A. For example, the conductive layer 112 may be formed by forming a first film to be the conductive layer 112A and a second film to be the conductive layer 112B and processing the first film and the second film.

[0173] The end of the conductive layer 112B may not be aligned with the end of the conductive layer 112A. Figure 6B As shown, the conductive layer 112B may be provided so as to cover the conductive layer 112A. The conductive layer 112B is in contact with the top surface and the side surface of the conductive layer 112A. It can also be said that the conductive layer 112B has a portion protruding from the end of the conductive layer 112A. For example, the conductive layer 112B may be formed by forming the conductive layer 112A, forming a film to be the conductive layer 112B on the conductive layer 112A, and processing the film.

[0174] [Insulating layer 106] The insulating layer 106 may have a single-layer structure or a stacked-layer structure of two or more layers. The insulating layer 106 preferably includes one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitrides. The insulating layer 106 may use a material that can be used for the insulating layer 110.

[0175] The insulating layer 106 has a region in contact with the layer 108. When a metal oxide is used for the layer 108, at least one of the films constituting the insulating layer 106 that is in contact with the layer 108 is preferably made of the above-mentioned oxide and oxynitride. In addition, the insulating layer 106 is preferably made of a film that releases oxygen by heating.

[0176] Specifically, when the insulating layer 106 has a single-layer structure, the insulating layer 106 is preferably made of silicon oxide or silicon oxynitride.

[0177] When the insulating layer 106 has a stacked-layer structure, the insulating film on the side in contact with the layer 108 preferably includes an oxide or an oxynitride, and the insulating film on the side in contact with the conductive layer 104 preferably includes a nitride or an oxynitride. As the oxide or oxynitride, for example, silicon oxide or silicon oxynitride can be suitably used. As the nitride or oxynitride, for example, silicon nitride or silicon oxynitride can be suitably used.

[0178] Silicon nitride and silicon nitride oxide have characteristics of releasing very little impurities (for example, water and hydrogen) and not easily permeating oxygen and hydrogen, and can therefore be suitably used as the insulating layer 106. Since diffusion of impurities from the insulating layer 106 to the layer 108 is suppressed, good electrical characteristics of the transistor can be achieved and reliability can be improved.

[0179] Note that in a micro transistor, when the thickness of the gate insulating layer is small, the leakage current sometimes increases. By using a material with a high relative dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to achieve low voltage when the transistor is operating while maintaining the physical thickness. As high-k materials that can be used for the insulating layer 106, for example, gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, and nitrides containing silicon and hafnium can be cited.

[0180] [Substrate 102] Although there is no particular limitation on the material of the substrate 102, it is at least required to have heat resistance sufficient to withstand subsequent heat treatment. For example, a single crystal semiconductor substrate or polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate can be used as the substrate 102. In addition, a semiconductor element may be provided on the substrate 102. Note that the shape of the semiconductor substrate and the insulating substrate may be circular or angular.

[0181] As the substrate 102, a flexible substrate may be used, and the transistor 100 and the like may be directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100 and the like. By providing a peeling layer, a part or all of the semiconductor device may be manufactured on the peeling layer, and then it may be separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like may also be transferred to a substrate with low heat resistance or a flexible substrate.

[0182] The following describes a structural example in which a part of the structure is different from the structural example 1-1 described above. The following description of the parts repeated with the structural example 1-1 described above is sometimes omitted. In addition, in the drawings shown below, the same hatching is used for the parts having the same functions as the structural example 1-1 described above, and sometimes no figure mark is attached.

[0183] 〔Structural example 1-2〕 Fig. 7A and Figure 7B A cross-sectional view of a transistor 100A that can be used in a semiconductor device according to one embodiment of the present invention is shown. Figure 1A . Fig. 7A It is along Figure 1A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Figure 7B yes Figure 1A The cross-sectional view is a cross-sectional view taken along the dashed line B1 - B2 shown.

[0184] Transistor 100A and Figure 1BThe main difference of the transistor 100 shown in FIG. 1 is that the insulating layer 110 includes an insulating layer 110 e .

[0185] The insulating layer 110e is disposed between the substrate 102 and the conductive layer 112 and the insulating layer 110a. The insulating layer 110 includes the insulating layer 110e, the insulating layer 110a on the insulating layer 110e, the insulating layer 110b on the insulating layer 110a, the insulating layer 110c on the insulating layer 110b, and the insulating layer 110d on the insulating layer 110c.

[0186] The insulating layer 110e can use the material that can be used for the insulating layer 110d. For example, silicon nitride or silicon nitride oxide can be used as appropriate for the insulating layer 110e. Note that the insulating layer 110e can use the same material as the insulating layer 110d or a different material. In addition, the insulating layer 110e can use the same material as the insulating layer 110a or a different material.

[0187] By using a material that releases impurities (e.g., water and hydrogen) for the insulating layer 110e, a region in the layer 108 that contacts the insulating layer 110e can be used as a low resistance region. The layer 108 can have a low resistance region between a region (the other of the source region and the drain region) that contacts the conductive layer 112 and a channel formation region. The low resistance region can be used as a buffer region for mitigating the drain electric field. Note that these low resistance regions can also be used as a source region or a drain region.

[0188] By providing a low resistance region between the drain region and the channel formation region, a high electric field is not easily generated near the drain region, and the generation of hot carriers is suppressed, so that the degradation of the transistor can be suppressed. For example, when the conductive layer 112 is used as a drain electrode and the region 108M is used as a source electrode, the region in the layer 108 that contacts the insulating layer 110e is a low resistance region, and a high electric field is not easily generated near the drain region, and the generation of hot carriers is suppressed, so that the degradation of the transistor can be suppressed.

[0189] When the region of the layer 108 in contact with the insulating layer 110e is used as a source region or a drain region, the distance from the source region to the gate electrode and the distance from the drain region to the gate electrode of the layer 108 can be made more uniform. Thus, the electric field applied to the gate electrode in the channel formation region can be made more uniform.

[0190] The insulating layer 110e preferably has a region having a higher concentration of impurity elements than that of the insulating layer 110a. Specifically, the insulating layer 110e preferably has a region having a higher hydrogen concentration than that of the insulating layer 110a.

[0191] The film density of the insulating layer 110a is preferably higher than the film density of the insulating layer 110e. Thus, hydrogen in the insulating layer 110e can be prevented from diffusing through the insulating layer 110a and the insulating layer 110b to the region 108C. In addition, oxygen in the insulating layer 110b can be prevented from diffusing through the insulating layer 110a and the insulating layer 110e to the conductive layer 112 and oxidizing the conductive layer 112.

[0192] Note that the structure of the insulating layer 110 described in Structural Example 1-2 can also be applied to other structural examples.

[0193] 〔Structural Examples 1-3〕 Fig. 8A and Figure 8B A cross-sectional view of a transistor 100B that can be used in a semiconductor device of one embodiment of the present invention is shown. Figure 1A . Fig. 8A It is along Figure 1A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Figure 8B It is a cross-sectional view along the cut surface along the dashed line B1 - B2 .

[0194] Transistor 100B and Figure 1B The main difference of transistor 100 shown in FIG. 1 is that the thickness of conductive layer 112 in the area that contacts the bottom surface of layer 108 is different from the thickness in the area that does not contact layer 108 .

[0195] like Fig. 8A As shown in , etc., the thickness of the conductive layer 112 in a region in contact with the bottom surface of the layer 108 is preferably thinner than the thickness of a region not in contact with the layer 108 .

[0196] Figure 8C Show Fig. 8A Magnified image of . Figure 8C 104 is a height H104 from the formed surface of the conductive layer 112 (here, the top surface of the substrate 102) to the lowest position of the bottom surface of the conductive layer 104. In addition, a height H112 is a height H112 from the formed surface of the conductive layer 112 (here, the top surface of the substrate 102) to the highest position of the region where the conductive layer 112 contacts the layer 108. Figure 8C As shown, a height H104 from the lowest position of the bottom surface of the conductive layer 104 is equal to or lower than a height H112 from the highest position of the region where the conductive layer 112 contacts the layer 108 .

[0197] By making the height H104 of the lowest position to the bottom surface of the conductive layer 104 equal to or lower than the height H112 of the highest position to the region where the conductive layer 112 contacts the layer 108, the electric field of the gate electrode in the channel formation region near the conductive layer 112 can be enhanced, thereby increasing the on-state current of the transistor 100B. In addition, the electric field applied to the gate electrode in the channel formation region can be further made uniform.

[0198] Here, when the electric field applied to the gate electrode in the channel formation region is made non-uniform, the electrical characteristics in the case where the conductive layer 112 is used as the source electrode and the region 108M is used as the drain electrode may be different from the electrical characteristics in the case where the conductive layer 112 is used as the drain electrode and the region 108M is used as the source electrode. By further making the electric field applied to the gate electrode in the channel formation region of the transistor 100B uniform, the electrical characteristics can be made equal. Therefore, the transistor 100B can be appropriately used in a circuit structure in which the source and the drain are replaced.

[0199] Note that the thickness of the conductive layer 112 may be appropriately adjusted so that the height H104 is equal to or lower than the height H112.

[0200] Note that the structure of the conductive layer 112 described in Structural Examples 1 to 3 can also be applied to other structural examples.

[0201] 〔Structural Examples 1-4〕 Fig. 9A A top view of a transistor 100C that can be used in a semiconductor device according to one embodiment of the present invention is shown. Fig. 9B Shown along Fig. 9A The cross-sectional view along the dotted line A1-A2 shown in FIG. Fig. 9C A cross-sectional view along the dashed line B1 - B2 is shown.

[0202] Transistor 100C and Figure 1B The transistor 100 shown in FIG. 1 is mainly different in that it includes a conductive layer 103 and an insulating layer 107 .

[0203] In the transistor 100C, the conductive layer 103 and the insulating layer 107 are included between the conductive layer 112 and the insulating layer 110 .

[0204] The insulating layer 107 is located on the conductive layer 112. The insulating layer 107 is provided so as to cover the top surface and the side surfaces of the conductive layer 112.

[0205] Conductive layer 103 is located on insulating layer 107. Conductive layer 112 and conductive layer 103 are electrically insulated from each other by insulating layer 107. An opening 148 that reaches insulating layer 107 is provided in a region of conductive layer 103 that overlaps with conductive layer 112.

[0206] The insulating layer 110 is provided on the insulating layer 107 and the conductive layer 103. The insulating layer 110 is provided to cover the top and side surfaces of the conductive layer 103 and the top surface of the insulating layer 107. An opening 141 reaching the conductive layer 112 is provided in the region where the insulating layer 110 and the insulating layer 107 overlap with the conductive layer 112.

[0207] The insulating layer 110a is located on the insulating layer 107 and the conductive layer 103. The insulating layer 110a is provided to cover the top surface and the side surface of the conductive layer 103. In addition, the insulating layer 110a is provided to cover a part of the opening 148. The insulating layer 110a is in contact with the insulating layer 107 through the opening 148.

[0208] The top surface shape of the opening 148 is not particularly limited. The top surface shape of the opening 148 may be a shape that can be used for the opening 141. Fig. 9A As shown, the top surface shapes of the openings 141 and 148 are both circular. By making the top surface shape of the openings circular, the processing accuracy when forming the openings is improved, and micro openings can be formed.

[0209] In this specification and the like, the top surface shape of the opening 148 refers to the shape of the top surface end portion or the shape of the bottom surface end portion of the conductive layer 103 on the opening 148 side.

[0210] When the top surfaces of openings 141 and 148 are circular, openings 141 and 148 are preferably concentric circles. Thus, the shortest distance between layer 108 and conductive layer 103 when viewed in cross section can be the same on the left and right sides of opening 141. In addition, openings 141 and 148 may not be concentric circles.

[0211] In the transistor 100C, the layer 108 has a region that overlaps with the conductive layer 104 via the insulating layer 106 and overlaps with the conductive layer 103 via a portion of the insulating layer 110 (particularly, the insulating layer 110a and the insulating layer 110b). In other words, the layer 108 has a region that is sandwiched between the conductive layer 104 via the insulating layer 106 and the conductive layer 103 via a portion of the insulating layer 110 (particularly, the insulating layer 110a and the insulating layer 110b).

[0212] The conductive layer 103 functions as a back gate electrode (or a second gate electrode) of the transistor 100C. In addition, a portion of the insulating layer 110 functions as a back gate insulating layer (or a second gate insulating layer) of the transistor 100C. The conductive layer 103 can use a material that can be used for the conductive layer 112 and the conductive layer 104. Note that the conductive layer 103 may not be provided.

[0213] By providing the back gate electrode in the transistor 100C, the potential on the back gate side (also referred to as the back channel side) of the layer 108 is fixed, so that the saturation of the Id-Vd characteristic can be improved.

[0214] Note that in this specification and the like, a state in which a change in current in a saturation region of the Id-Vd characteristics of a transistor is small may be described as “high saturation”.

[0215] The transistor 100C includes a back gate electrode, so the potential on the back channel side of the layer 108 can be fixed, and the threshold voltage drift can be suppressed. Here, when the threshold voltage of the transistor drifts, the drain current (hereinafter also referred to as the cut-off current) that flows when the gate voltage is 0V sometimes increases. By suppressing the threshold voltage drift, a transistor with a small cut-off current can be realized. Thus, a semiconductor device with low power consumption can be realized.

[0216] The insulating layer 107 can use a material that can be used for the insulating layer 110. The conductive layer 112, the conductive layer 103, and the insulating layer 107 in contact with the conductive layer 112 preferably use an insulating layer containing nitrogen. The insulating layer 107 can use a material that can be used for the insulating layer 110a and the insulating layer 110c as appropriate. For example, silicon nitride can be used as appropriate for the insulating layer 107. Note that although the insulating layer 107 having a single-layer structure is shown in this embodiment, one embodiment of the present invention is not limited to this. The insulating layer 107 may have a stacked-layer structure of two or more layers.

[0217] The conductive layer 103 may also be electrically connected to the conductive layer 112. For example, by providing an opening in the region of the insulating layer 107 that overlaps with the conductive layer 112 and providing the conductive layer 103 in a manner that covers the opening, a structure in which the conductive layer 103 is in contact with the conductive layer 112 may be provided. By electrically connecting the conductive layer 112 used as a source electrode or a drain electrode to the conductive layer 103 used as a back gate electrode, the source electrode or the drain electrode and the back gate electrode may have the same potential. For example, when the conductive layer 112 is used as a source electrode, the threshold voltage drift of the transistor 100C may be suppressed. In addition, the reliability of the transistor 100C may be improved. Note that the conductive layer 103 in contact with the top surface of the conductive layer 112 may be formed without providing the insulating layer 107.

[0218] The conductive layer 103 may be electrically connected to the conductive layer 104. For example, by providing an opening in the region where the insulating layer 106 and the insulating layer 110 overlap with the conductive layer 103 and providing the conductive layer 104 to cover the opening, a structure in which the conductive layer 103 is in contact with the conductive layer 104 may be provided. By electrically connecting the conductive layer 104 serving as a gate electrode and the conductive layer 103 serving as a back gate electrode, the back gate electrode and the gate electrode can have the same potential, thereby increasing the on-state current of the transistor 100C.

[0219] The thickness of the conductive layer 103 may be greater than the thickness T110b of the insulating layer 110. Thus, the potential on the back channel side of the layer 108 can be fixed over a wide range between the source region and the drain region in the layer 108.

[0220] The transistor 100C has a region in which the conductive layer 103, the insulating layer 110, the insulating layer 120, the layer 108, the insulating layer 106, and the conductive layer 104 are stacked in order in one direction without any other layers therebetween. As the direction, a direction perpendicular to the channel length direction can be cited. By expanding the region, the potential on the back channel side of the layer 108 can be more reliably controlled.

[0221] The thickness of conductive layer 103 is preferably larger than the sum of the thickness of the portion in contact with conductive layer 112 inside opening 141 in layer 108 and the thickness of insulating layer 106 in contact with the portion.

[0222] Note that the structures of the conductive layer 103 and the insulating layer 107 described in Structural Examples 1 to 4 can also be applied to other structural examples.

[0223] <Structure Example 2> FIG. 10A to FIG. 10H and FIG. 11A to FIG. 11G A circuit diagram of a semiconductor device according to one embodiment of the present invention is shown. FIGS. 12 to 33 show a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. Hereinafter, transistor 100 is mainly used as an example of a transistor included in a semiconductor device according to one embodiment of the present invention. A semiconductor device according to one embodiment of the present invention is not limited thereto, and may also include any one or more of the above-mentioned transistors 100 to 100C.

[0224] A semiconductor device according to one embodiment of the present invention includes at least two transistors, wherein any one of the gate, source, and drain of one transistor is electrically connected to any one of the gate, source, and drain of another transistor. Alternatively, a semiconductor device according to one embodiment of the present invention includes a transistor and a capacitor, wherein any one of the gate, source, and drain of the transistor is electrically connected to one terminal of the capacitor.

[0225] A semiconductor device according to one embodiment of the present invention can be applied to a display device. The display device includes a transistor and a display element. A source or a drain of the transistor is electrically connected to a pixel electrode included in the display element.

[0226] 〔Structural Example 2-1〕 Fig. 10A A circuit diagram of a semiconductor device 10 according to one embodiment of the present invention is shown. Fig. 12A A top view of a semiconductor device 10 according to one embodiment of the present invention is shown. Fig. 12B Shown along Fig. 12AThe cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Fig. 12C The cross-sectional views are shown along the dashed-dotted line B1 - B2 and the dashed-dotted line B3 - B4 .

[0227] The semiconductor device 10 includes a transistor 100 and a transistor 200. One of a source and a drain of the transistor 100 is electrically connected to one of a source and a drain of the transistor 200.

[0228] The transistor 100 and the transistor 200 are both formed on a substrate 102 .

[0229] Since the transistor 100 can refer to the above description, detailed description is omitted.

[0230] The transistor 200 includes the conductive layer 112A, the layer 108, the insulating layer 106, and the conductive layer 104A. The transistor 200 may have the same structure as the transistor 100.

[0231] The transistor 100 and the transistor 200 include a layer 108 in common. The region 108M included in the layer 108 is used as one of the source electrode and the drain electrode of the transistor 100 and one of the source electrode and the drain electrode of the transistor 200. It can be said that one of the source and the drain of the transistor 100 is used in common with one of the source and the drain of the transistor 200. The transistor 100 and the transistor 200 use the layer 108 in common, so that the occupied area of ​​the semiconductor device can be reduced.

[0232] The conductive layer 112A serves as the other of the source electrode and the drain electrode of the transistor 200. The conductive layer 112A can be formed using the same material as the conductive layer 112. The conductive layer 112A can be formed by the same process as the conductive layer 112. For example, the conductive layer 112 and the conductive layer 112A can be formed by forming a film to be the conductive layer 112 and the conductive layer 112A and processing the film.

[0233] The insulating layer 110 has an opening 141A that reaches the conductive layer 112A. The opening 141A can be formed by the same process as the opening 141. The top surface shape of the opening 141A is not limited, but is preferably circular. Here, a structure in which the top surface shape of the opening 141 is the same as the top surface shape and size of the opening 141A is shown, but one embodiment of the present invention is not limited to this. The top surface shape of the opening 141 may be different from one or both of the top surface shape and size of the opening 141A. By making the top surface shape of the opening 141 different from one or both of the top surface shape and size of the opening 141A, two transistors with different channel widths can be manufactured.

[0234] The layer 108 is provided so as to cover the opening 141 and the opening 141A.

[0235] An insulating layer 106 is provided over the layer 108 . A portion of the insulating layer 106 is used as a gate insulating layer of the transistor 200 , and another portion of the insulating layer 106 is used as a gate insulating layer of the transistor 200 .

[0236] The conductive layer 104 and the conductive layer 104A are provided over the insulating layer 106. The conductive layer 104A can be formed using the same material as that of the conductive layer 104. The conductive layer 104A can be formed by the same process as that of the conductive layer 104. For example, the conductive layer 104 and the conductive layer 104A can be formed by forming a film to be the conductive layer 104 and the conductive layer 104A and processing the film. The conductive layer 104A serves as a gate electrode of the transistor 200.

[0237] An insulating layer 195 is provided in a manner covering the transistor 100 and the transistor 200. The insulating layer 195 is used as a protective layer for the transistor 100 and the transistor 200. The insulating layer 195 is preferably made of a material in which impurities do not diffuse easily. By providing the insulating layer 195, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, thereby improving the reliability of the semiconductor device. As impurities, water and hydrogen can be cited, for example. For example, the insulating layer 195 includes one or both of an inorganic insulating layer and an organic insulating layer. The insulating layer 195 may also have a stacked structure of an inorganic insulating layer and an organic insulating layer.

[0238] As a material that can be used for the inorganic insulating film included in the insulating layer 195, for example, oxides, nitrides, oxynitrides, and oxynitrides can be cited. Specific examples of materials that can be used for the inorganic insulating film have been cited in the description of the insulating layer 110. More specifically, one or more of silicon nitride, silicon nitride oxide, silicon oxynitride, aluminum oxide, aluminum oxynitride, aluminum nitride, hafnium oxide, and hafnium aluminum oxide can be used for the insulating layer 195. For example, one or more of acrylic resin and polyimide resin can be used for the insulating layer 195 as an organic material.

[0239] The following describes a structural example in which a part of the structure is different from the structural example 2-1 described above. The following description of the parts repeated with the structural example 2-1 described above is sometimes omitted. In addition, in the drawings shown below, the same hatching is used for the parts having the same functions as the structural example 2-1 described above, and sometimes no figure mark is attached.

[0240] 〔Structural Example 2-2〕 Fig. 10B A circuit diagram of a semiconductor device 10A according to one embodiment of the present invention is shown. Fig.13A A top view of the semiconductor device 10A is shown. Fig. 13B Shown along Fig.13A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Fig. 13CThe cross-sectional views are shown along the dashed-dotted line B1 - B2 and the dashed-dotted line B3 - B4 .

[0241] The semiconductor device 10A includes a transistor 100 and a transistor 200 . The other of the source and the drain of the transistor 100 is electrically connected to the other of the source and the drain of the transistor 200 .

[0242] The transistor 100 and the transistor 200 are both formed on a substrate 102 .

[0243] Since the transistor 100 can refer to the above description, detailed description is omitted.

[0244] The transistor 200 includes the conductive layer 112 , the layer 108A, the insulating layer 106 , and the conductive layer 104A. The transistor 200 may have the same structure as the transistor 100 .

[0245] The insulating layer 110 has the opening 141 and the opening 141A which reach the conductive layer 112. The opening 141A can be formed by the same process as the opening 141. The opening 141A can be referred to the above description, and thus detailed description is omitted.

[0246] The layer 108 and the layer 108A are provided so as to cover the opening 141 and the opening 141A. The layer 108A can be made of the same material as the conductive layer 108. The layer 108A can be formed by the same process as the layer 108. For example, the layer 108 and the layer 108A can be formed by forming a film to be the layer 108 and the conductive layer 108A and processing the film.

[0247] The region 108AM is a region in contact with the top surface of the insulating layer 110 (here, the top surface of the insulating layer 110 d ) in the layer 108A. The region 108AM is used as one of the source electrode and the drain electrode of the transistor 200 .

[0248] An insulating layer 106 is provided over the layer 108 and the layer 108A. A portion of the insulating layer 106 is used as a gate insulating layer of the transistor 200 , and another portion of the insulating layer 106 is used as a gate insulating layer of the transistor 200 .

[0249] The conductive layer 104 and the conductive layer 104A are provided over the insulating layer 106. The conductive layer 104A can be formed using the same material as that of the conductive layer 104. The conductive layer 104A can be formed by the same process as that of the conductive layer 104. The conductive layer 104A serves as a gate electrode of the transistor 200.

[0250] The transistor 100 and the transistor 200 include a conductive layer 112 in common. The conductive layer 112 is used as the other of the source electrode and the drain electrode of the transistor 100 and the other of the source electrode and the drain electrode of the transistor 200. It can be said that the other of the source and the drain of the transistor 100 is used in common with the other of the source and the drain of the transistor 200. The transistor 100 and the transistor 200 use the conductive layer 112 in common, so that the occupied area of ​​the semiconductor device can be reduced.

[0251] 〔Structural Example 2-3〕 Fig.14A A plan view of a semiconductor device 10B according to one embodiment of the present invention is shown. Fig. 14B Shown along Fig.14A The cross-sectional view is a cross-sectional view of the section along the dot-dash line A1-A2 shown. Fig.14A The cross-sectional view of the cross-section taken along the dot-dash line B1-B2 and the dot-dash line B3-B4 can be referred to. Fig. 12C The circuit diagram of the semiconductor device 10B can be found in Fig. 10A .

[0252] The semiconductor device 10B includes the transistor 100, the transistor 200, and the conductive layer 193. One of the source and the drain of the transistor 100 is electrically connected to one of the source and the drain of the transistor 200 through the conductive layer 193. The conductive layer 193 functions as a wiring for electrically connecting the transistor 200 to each other.

[0253] Since the transistor 100 can refer to the above description, detailed description is omitted.

[0254] The transistor 200 includes the conductive layer 112A, the layer 108A, the insulating layer 106, and the conductive layer 104A. The transistor 200 may have the same structure as the transistor 100.

[0255] The region in contact with the top surface of the insulating layer 110 (here, the top surface of the insulating layer 110d) in the layer 108 has a region 108M. The region 108M is used as one of the source electrode and the drain electrode of the transistor 100. The region in contact with the top surface of the insulating layer 110 (here, the top surface of the insulating layer 110d) in the layer 108A has a region 108AM. The region 108AM is used as one of the source electrode and the drain electrode of the transistor 200.

[0256] The insulating layer 106 has an opening 145 that reaches the region 108M and an opening 145A that reaches the region 108AM. The conductive layer 104, the conductive layer 104A, and the conductive layer 193 are provided on the insulating layer 106. The conductive layer 193 is provided in a manner covering the opening 145 and the opening 145A. The conductive layer 193 is in contact with the region 108M in the opening 145, and is in contact with the region 108AM in the opening 145A. The conductive layer 193 is electrically connected to the region 108M through the opening 145, and the conductive layer 193 is electrically connected to the region 108AM through the opening 145A. That is, the region 108M is electrically connected to the region 108AM through the conductive layer 193. The conductive layer 193 can be formed, for example, by the same process as the conductive layer 104 and the conductive layer 104A. In addition, the conductive layer 193 can also be formed by a process different from that of the conductive layer 104 and the conductive layer 104A. For example, after the conductive layers 104 and 104A are formed and the insulating layer 195 is formed, the openings 145 and 145A may be formed in the insulating layers 106 and 195 to form the conductive layer 193 so as to cover the openings 145 and 145A.

[0257] Here, when an oxide conductor (OC) is used for wiring, the resistance of the wiring may be higher than when a metal or an alloy is used. When the distance between the transistor 100 and the transistor 200 is long and the wiring resistance required for the wiring that electrically connects the transistor 100 and the transistor 200 is relatively low, a metal or an alloy can be appropriately used as the conductive layer 193 used as the wiring.

[0258] When the distance between the transistor 100 and the transistor 200 is short and the wiring resistance required for the wiring electrically connecting the transistor 100 and the transistor 200 is relatively high, as in Fig. 12B The conductive layer 193 may not be provided as shown in FIG. 104. By using the region 108M included in the layer 108 in common for the transistor 100 and the transistor 200 and using the region 108M as the wiring, one of the source and the drain of the transistor 100 and one of the source and the drain of the transistor 200 may be electrically connected.

[0259] The method of electrical connection between transistor 100 and transistor 200 may be determined based on the material used for layer 108 and based on the wiring resistance required for wiring that electrically connects transistor 100 to transistor 200.

[0260] 〔Structural Examples 2-4〕 Fig. 10C A circuit diagram of a semiconductor device 10C according to one embodiment of the present invention is shown. Fig.15A A top view of the semiconductor device 10C is shown. Fig. 15B Shown along Fig.15A The cross-sectional view is a cross-sectional view taken along the dashed line A1 - A2 shown.

[0261] The semiconductor device 10C includes a transistor 100 and a transistor 200 . One of a source and a drain of the transistor 100 is electrically connected to a gate of the transistor 200 .

[0262] The transistor 100 and the transistor 200 are both formed on a substrate 102 .

[0263] Since the transistor 100 can refer to the above description, detailed description is omitted.

[0264] The transistor 200 includes the conductive layer 112A, the layer 108A, the insulating layer 106, and the conductive layer 104A. The transistor 200 may have the same structure as the transistor 100.

[0265] The region 108AM in the layer 108A is used as one of the source electrode and the drain electrode of the transistor 200 , and the conductive layer 112A is used as the other of the source electrode and the drain electrode of the transistor 200 .

[0266] An insulating layer 106 is provided on the layer 108 and the layer 108A. The insulating layer 106 has an opening 145 that reaches the region 108M in the layer 108.

[0267] The conductive layer 104 and the conductive layer 104A are provided over the insulating layer 106. The conductive layer 104A is provided so as to cover the opening 145. The conductive layer 104A is in contact with the region 108M in the opening 145. The conductive layer 104A is electrically connected to the region 108M through the opening 145.

[0268] 〔Structural Examples 2-5〕 Fig.16A A plan view of a semiconductor device 10D according to one embodiment of the present invention is shown. Fig. 16B Shown along Fig.16A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Fig. 16C The cross-sectional view along the dot-dash line B1-B2 and the dot-dash line B3-B4 is shown. Fig. 10A .

[0269] The semiconductor device 10D includes the transistor 100 and the transistor 200A. The transistor 200A corresponds to Fig. 10A The transistor 200 shown in FIG. 1 has one of the source and the drain of the transistor 100 electrically connected to one of the source and the drain of the transistor 200A.

[0270] Transistor 200A and Fig. 12B The transistor 200 shown in FIG. 1 is mainly different in that the shape of the opening 141A is different from the shape of the opening 141 when viewed in cross section.

[0271] Regarding the detailed structure of transistor 200A, use Fig.17A and Fig. 17B Provide explanation. Fig.17A and Fig. 17B yes Fig.16A and Fig. 16B An enlarged view of transistor 200A is shown.

[0272] The angle θ141A formed by the side surface of the opening 141A of the insulating layer 110b and the formed surface of the insulating layer 110b (here, the top surface of the insulating layer 110a) is different from the angle θ141 formed by the side surface of the opening 141 of the insulating layer 110b and the formed surface of the insulating layer 110b (see Figure 4B ).

[0273] The channel length L200 of the transistor 200A is determined by the thickness T110b of the insulating layer 110b and the angle θ141A. By making the angle θ141A of the transistor 200A different from the angle θ141 of the transistor 100 , the channel length L200 of the transistor 200A can be made different from the channel length L100 of the transistor 100 .

[0274] Angle θ141A is preferably smaller than angle θ141. Furthermore, angle θ141A is preferably less than 55 degrees, more preferably less than 50 degrees, more preferably less than 45 degrees, and even more preferably less than 40 degrees. In addition, angle θ141A may be, for example, greater than 10 degrees, greater than 15 degrees, or greater than 20 degrees.

[0275] By making the angle θ141A smaller than the angle θ141, the channel length L200 of the transistor 200A can be made longer than the channel length L100 of the transistor 100.

[0276] Fig.17A An example in which the top surface shape of the opening 141A is circular is shown in FIG. 141A , etc. In this case, the width D141A of the opening 141A corresponds to the diameter of the circle, and the channel width W200 of the transistor 200A is π×D141A.

[0277] Here, because the angle θ141A is small, the shape of the top surface end portion and the shape of the bottom surface end portion of the insulating layer 110 on the opening 141A side have greatly different dimensions. Fig.17AThe shape 141Ab of the bottom surface end portion on the side of the opening 141A of the insulating layer 110b is also shown. The length of the bottom surface end portion on the side of the opening 141A of the insulating layer 110b can also be used as the channel width of the transistor 200. When the top surface shape of the shape 141Ab is circular, the width D141Ab of the shape 141Ab is equivalent to the diameter of the circle. The channel width W200b of the transistor 200 calculated based on the length of the bottom surface end portion on the side of the opening 141A of the insulating layer 110b is π×D141Ab. In addition, the average value of the channel width W200 and the channel width W200b can also be the channel width of the transistor 200.

[0278] The opening 141 and the opening 141A are preferably formed by different processes. For example, a first resist mask is formed on an insulating film that will become the insulating layer 110, and the opening 141 is formed by removing a portion of the insulating film using the first resist mask as a mask, thereby removing the first resist mask. Next, a second resist mask is formed, and the opening 141A is formed by removing a portion of the insulating film using the second resist mask as a mask, thereby removing the second resist mask. It is preferred that the processing is performed in a manner that the angle θ141A of the opening 141A is smaller than the angle θ141 of the opening 141. Here, the angle θ141A is reduced by processing the insulating film under the condition that the second resist mask is easy to retreat (it can also be said that the second resist mask is easy to shrink). In addition, there is no particular restriction on the order in which the opening 141 and the opening 141A are formed. The opening 141 can also be formed after the opening 141A is formed.

[0279] In the manufacture of the semiconductor device 10D, the transistor 100 with a short channel length and the transistor 200A with a long channel length can be formed on the same substrate by using a portion of the same process. For example, by using the transistor 100 as a transistor required to have a large on-state current and using the transistor 200A as a transistor required to have a high saturation, a high-performance semiconductor device can be realized.

[0280] 〔Structural Example 2-6〕 Fig.18A A plan view of a semiconductor device 10E according to one embodiment of the present invention is shown. Fig.18B Shown along Fig.18A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Fig.18C The cross-sectional view along the dot-dash line B1-B2 and the dot-dash line B3-B4 is shown. Fig. 10B .

[0281] The semiconductor device 10E includes the transistor 100 and the transistor 200A. The transistor 200A corresponds to Fig. 10BThe transistor 200 shown in FIG. 1 is a transistor 200A in which the other of the source and the drain of the transistor 100 is electrically connected to the other of the source and the drain of the transistor 200A.

[0282] The semiconductor device 10E is Fig. 16B The semiconductor device 10D shown in FIG. 10A mainly differs in that the transistor 200A includes a layer 108A instead of the layer 108 ; and the transistor 100 and the transistor 200A share a conductive layer 112 .

[0283] The layer 108A can be formed by the same process as the layer 108. After the opening 141 and the opening 141A are formed, a film to be the layer 108 and the layer 108A is formed, and the film is processed to form the layer 108 and the layer 108A. The description of the structural example 2-5 can be referred to for the layer 108A in the transistor 200A, so detailed description is omitted.

[0284] 〔Structural Example 2-7〕 Fig. 10D A circuit diagram of a semiconductor device 10F according to one embodiment of the present invention is shown. Fig.19A A top view of the semiconductor device 10F is shown. Fig.19B Shown along Fig.19A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Fig.19C The cross-sectional views are shown along the dashed-dotted line B1 - B2 and the dashed-dotted line B3 - B4 .

[0285] The semiconductor device 10F includes a transistor 100 and a transistor 150 . One of a source and a drain of the transistor 100 is electrically connected to one of a source and a drain of the transistor 150 .

[0286] The transistor 100 and the transistor 150 are both formed on a substrate 102 .

[0287] Since the transistor 100 can refer to the above description, detailed description is omitted.

[0288] The transistor 150 includes a conductive layer 202, an insulating layer 110, an insulating layer 120, a layer 208, an insulating layer 106, a conductive layer 204, a conductive layer 212a, and a conductive layer 212b. Each layer constituting the transistor 150 may have a single layer structure or a stacked layer structure.

[0289] A conductive layer 202 is provided over the substrate 102. The conductive layer 202 serves as a back gate electrode (second gate electrode) of the transistor 150. The conductive layer 202 can be formed using the same material as that of the conductive layer 112 included in the transistor 100. The conductive layer 202 can be formed by the same process as that of the conductive layer 112. For example, by forming a film to be the conductive layer 112 and the conductive layer 202 and processing the film, the conductive layer 112 and the conductive layer 202 can be formed. Note that the transistor 150 does not necessarily have to include a back gate electrode.

[0290] The insulating layer 110 is provided so as to cover the conductive layer 202, and the insulating layer 120 is provided over the insulating layer 110. Part of the insulating layer 110 and the insulating layer 120 is used as a back gate insulating layer (second gate insulating layer) of the transistor 150. Since the insulating layer 120 is a layer in contact with the channel formation region of the layer 208, it is preferably an insulating layer containing oxygen. For example, the insulating layer 120 can use a material that can be appropriately used for the insulating layer 110b.

[0291] Layer 208 is provided on insulating layer 120. Layer 208 has a region overlapping conductive layer 202 via insulating layer 110 and insulating layer 120. Layer 208 can be made of the same material as layer 108. Layer 208 can be formed by the same process as layer 108.

[0292] The insulating layer 106 is provided so as to cover the insulating layer 120 and the layer 208. The insulating layer 106 functions as a gate insulating layer (first gate insulating layer) of the transistor 150. The insulating layer 106 has an opening 145 that reaches the region 108M in the layer 108, and an opening 147a and an opening 147b that reach the region 208D in the layer 208.

[0293] The conductive layer 204, the conductive layer 212a, and the conductive layer 212b are provided over the insulating layer 106. The conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed using the same material as the conductive layer 104. The conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed by the same process as the conductive layer 104. For example, the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b can be formed by forming a film to be the conductive layer 104, the conductive layer 204, the conductive layer 212a, and the conductive layer 212b and processing the film.

[0294] The conductive layer 212a is provided so as to cover at least a portion of the opening 147a and the opening 145. The conductive layer 212b is provided so as to cover at least a portion of the opening 147b. The conductive layer 212a is electrically connected to the layer 208 through the opening 147a. The conductive layer 212b is electrically connected to the layer 208 through the opening 147b. The conductive layer 212a is used as one of the source electrode and the drain electrode of the transistor 150, and the conductive layer 212b is used as the other of the source electrode and the drain electrode of the transistor 150.

[0295] The conductive layer 212a is in contact with the region 108M in the opening 145. The conductive layer 212a serving as one of the source electrode and the drain electrode of the transistor 150 is electrically connected to the region 108M serving as one of the source electrode and the drain electrode of the transistor 100 through the opening 145.

[0296] The conductive layer 204 has a region overlapping with the layer 208 with the insulating layer 106 interposed therebetween. The conductive layer 204 serves as a gate electrode (first gate electrode) of the transistor 150.

[0297] like Fig.19C As shown, the conductive layer 204 may be electrically connected to the conductive layer 202. Thus, the same potential may be supplied to the conductive layer 204 and the conductive layer 202. By supplying the same potential to the conductive layer 204 and the conductive layer 202, the current that can flow when the transistor 200 is in the on state may be increased. The conductive layer 204 may be in contact with the conductive layer 202 via the opening 149 provided in the insulating layer 106, the insulating layer 120, and the insulating layer 110.

[0298] The conductive layer 202 preferably overlaps with the channel formation region and extends beyond the end of the channel formation region. In other words, the conductive layer 202 is preferably larger than the channel formation region. In addition, the conductive layer 202 may also extend beyond the end of the semiconductor layer 253. In other words, the conductive layer 202 may also be larger than the semiconductor layer 253.

[0299] like Fig. 10E As shown in the circuit diagram shown in FIG. 1 , the conductive layer 212 a or the conductive layer 212 b may be electrically connected to the conductive layer 202. By supplying the same potential to the source and the back gate, the back channel potential is stabilized, and the saturation of the Id-Vd characteristic of the transistor can be improved. The conductive layer 212 a or the conductive layer 212 b is in contact with the conductive layer 202 via the openings provided in the insulating layer 106 and the insulating layer 110.

[0300] like Fig.10FAs shown in the circuit diagram, the conductive layer 202 may not be electrically connected to the conductive layer 204, the conductive layer 212a, and the conductive layer 212b. For example, a constant potential may be supplied to the back gate and a signal for driving the transistor 150 may be supplied to the gate. Thus, the potential supplied to the back gate may control the threshold voltage when driving the transistor 150.

[0301] like Figure 10G As shown in the circuit diagram, a structure in which the conductive layer 202 is not provided in the transistor 150 may be adopted.

[0302] In the layer 208, the entire region overlapping the gate electrode with the gate insulating layer between the source electrode and the drain electrode is used as a channel formation region. The layer 208 has a pair of regions 208L sandwiching the channel formation region and a pair of regions 208D outside the region.

[0303] The region 208D can be said to be a region having a higher carrier concentration than the channel formation region, a low resistance region, or an n-type region. The region in contact with the conductive layer 212a in the layer 208 and the region 208D adjacent to the region are used as one of the source region and the drain region. The region in contact with the conductive layer 212b in the layer 208 and the region 208D adjacent to the region are used as the other of the source region and the drain region.

[0304] The region 208L can be said to be a region having a resistance equal to or lower than that of the channel formation region, a region having a carrier concentration equal to or higher than that of the channel formation region, a region having an oxygen vacancy density equal to or higher than that of the impurity element, and a region having an impurity element concentration equal to or higher than that of the region 208D. Furthermore, the region 208L can be said to be a region having a resistance equal to or higher than that of the region 208D, a region having a carrier concentration equal to or lower than that of the region 208D, a region having an oxygen vacancy density equal to or lower than that of the impurity element, and a region having an impurity element concentration equal to or lower than that of the region 208D.

[0305] Region 208L is used as a buffer region for relieving the drain electric field. Since region 208L does not overlap with conductive layer 204, a channel is hardly formed when gate voltage is supplied to conductive layer 204. The carrier concentration in region 208L is preferably higher than that in the channel formation region. Thus, region 208L can be used as an LDD (Lightly Doped Drain) region. By providing region 208L used as an LDD region between the channel formation region and region 208D, transistor 150 with a high drain withstand voltage can be realized.

[0306] For example, after the conductive layer 204, the conductive layer 212a, and the conductive layer 212b are formed, an impurity element is added to the layer 208 using these conductive layers as masks, so that the region 208L and the region 208D are formed. The region 208L is a region of the layer 208 that overlaps with the insulating layer 106 and does not overlap with the conductive layer 204. The region 208D is a region of the layer 208 that does not overlap with the insulating layer 106 and the conductive layer 204. Note that the impurity element included in the insulating layer 110d and the region 108M is referred to as a first impurity element, and the impurity element included in the region 208L and the region 208D is referred to as a second impurity element.

[0307] like Fig.19A and Fig.19B As shown, the ends of a portion of the conductive layer 212a and the conductive layer 212b are preferably located inside the openings 147a and the openings 147b. In other words, in the openings 147a and the openings 147b, the ends of a portion of the conductive layer 212a and the conductive layer 212b are preferably in contact with the layer 208. Thus, the region in contact with the conductive layer 212a can be adjacent to one of the pair of regions 208D, and similarly, the region in contact with the conductive layer 212b can be adjacent to the other of the pair of regions 208D. Note that there is no particular limitation on the top surface shape of the openings 147a and the openings 147b.

[0308] The region 208L and the region 208D include a second impurity element. As the second impurity element, one or more of hydrogen, boron, carbon, nitrogen, fluorine, phosphorus, sulfur, arsenic, aluminum, magnesium, silicon, or a noble gas can be used. Typical examples of noble gases include helium, neon, argon, krypton, and xenon. As the impurity element, one or more of boron, phosphorus, aluminum, magnesium, or silicon is particularly preferably used. Note that the first impurity element included in the insulating layer 110d and the region 108M may be the same as or different from the second impurity element included in the region 208L and the region 208D. When one or both of the first impurity element and the second impurity element include a plurality of elements, the first impurity element and the second impurity element may be the same, partly the same, partly different, or both different.

[0309] When the second impurity element is added to the layer 208 to form the region 208L and the region 208D, the second impurity element may be supplied to the layer 108 through the insulating layer 106 using the conductive layer 104 as a mask. Thus, a region containing the second impurity element is formed in a region of the layer 108 that does not overlap with the conductive layer 104. Note that the region containing the second impurity element in the layer 108 is formed in a portion of the region 108M. Thus, the layer 108 may include a portion containing the first impurity element and the second impurity element.

[0310] The transistor 150 is a so-called top-gate transistor having a gate electrode above the layer 208. For example, by adding the second impurity element to the layer 208 using the conductive layer 204 serving as the gate electrode as a mask, a source region and a drain region can be formed in a self-aligned manner. The transistor 150 can be said to be a TGSA (Top Gate Self-Aligned) type transistor.

[0311] The channel length of transistor 150 can be controlled by the width of conductive layer 204 in the channel length direction. Thus, the channel length of transistor 150 is a value greater than the limit resolution of an exposure device used in manufacturing the transistor. By increasing the channel length, a transistor with high saturation can be realized.

[0312] As described above, transistor 100 is a vertical channel transistor. On the other hand, in transistor 150, the current flowing through the channel formation region flows in a lateral direction, that is, in a direction parallel or substantially parallel to the surface of substrate 102. Such a transistor may be referred to as a lateral channel transistor or a lateral transistor. Thus, a semiconductor device according to one embodiment of the present invention may include a lateral channel transistor in addition to a vertical channel transistor.

[0313] The insulating layer 195 is provided so as to cover the transistor 100 and the transistor 150 .

[0314] In the manufacture of the semiconductor device 10F, the transistor 100 with a short channel length and the transistor 150 with a long channel length can be formed together on the same substrate through a part of the process. For example, by applying the transistor 100 to a transistor that requires a large on-state current and applying the transistor 150 to a transistor that requires a high saturation, a high-performance semiconductor device can be realized.

[0315] Here, a structure in which the conductive layers 212a and 212b are formed by the same process as the conductive layers 104 and 204 is shown, but one embodiment of the present invention is not limited to this. For example, the conductive layers 212a and 212b may be formed after the insulating layer 195 is formed. Specifically, after the insulating layer 195 is provided so as to cover the conductive layers 104 and 204, an opening reaching the layer 208 is provided in the insulating layer 195 and the insulating layer 106, and the conductive layers 212a and 212b are provided so as to cover the opening, and the conductive layers 212a and 212b are electrically connected to the layer 208. Note that after the conductive layer 204 is formed, an impurity element is added to the layer 208 using the conductive layer 204 as a mask, so that a low resistance region can be formed in the layer 208.

[0316] 〔Structural Example 2-8〕 Fig. 20A and Fig. 20BFIG. 1 is a cross-sectional view of a semiconductor device 10G according to one embodiment of the present invention. Fig.19A . Fig. 20A It is along Fig.19A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Fig. 20B It is along Fig.19A The cross-sectional view is a cross-sectional view taken along the dashed line B1 - B2 shown.

[0317] The semiconductor device 10G includes the transistor 100 and the transistor 150A. Fig.19B The transistor 150 shown in FIG. 1 is mainly different in that the conductive layer 202 is disposed between the insulating layer 110 and the insulating layer 120 .

[0318] The conductive layer 202 is provided over the insulating layer 110. The conductive layer 202 can use a material that can be used for the conductive layer 112.

[0319] An insulating layer 120 is provided on the conductive layer 202. The insulating layer 120 is provided in a manner covering the top surface and the side surface of the conductive layer 202. In the transistor 150A, a portion of the insulating layer 120 is used as a back gate insulating layer. By providing the conductive layer 202 between the insulating layer 110 and the insulating layer 120, the thickness of the back gate insulating layer of the transistor 150A can be made thin. Thus, the electric field of the back gate electrode is enhanced. In addition, the saturation of the Id-Vd characteristic of the transistor 150A can be improved. In addition, the threshold voltage drift can be suppressed, and a transistor with a small cut-off current can be realized.

[0320] The insulating layer 120 preferably has a stacked structure. Fig. 20A , etc., show an example in which the insulating layer 120 has a stacked-layer structure of an insulating layer 120 a and an insulating layer 120 b on the insulating layer 120 a .

[0321] The insulating layer 120a provided in contact with the conductive layer 202 is preferably made of a material in which the metal element included in the conductive layer 202 is not easily diffused. This can suppress the diffusion of the metal element included in the conductive layer 202 into the channel formation region in the layer 208. The insulating layer 120a can be made of a material that can be used for the insulating layer 110a and the insulating layer 110c. For example, silicon nitride can be used as the insulating layer 120a.

[0322] The insulating layer 120b in the portion of the layer 208 in contact with the channel formation region is an insulating layer containing oxygen. The insulating layer 120b can use a material that can be used for the insulating layer 110b as appropriate. For example, silicon oxynitride can be used as appropriate for the insulating layer 120b.

[0323] Regarding the transistor 100 , reference can be made to the above description, and thus detailed description thereof will be omitted.

[0324] 〔Structural Example 2-9〕 Fig.21A A plan view of a semiconductor device 10H according to one embodiment of the present invention is shown. Fig.21B Shown along Fig.21A The cross-sectional view of the cut surface along the dot-dash line A1-A2 shown in FIG. Fig. 21C The cross-sectional views are shown along the dashed-dotted line B1 - B2 and the dashed-dotted line B3 - B4 .

[0325] The semiconductor device 10H includes the transistor 100 and a transistor 150B. Fig.19B The transistor 150 shown in FIG. 1 is mainly different in that it includes layer 108 instead of layer 208 and does not include conductive layer 212a.

[0326] The transistor 100 and the transistor 150B share the layer 108. When the transistor 100 and the transistor 200 share the layer 108, the occupied area of ​​the semiconductor device can be reduced.

[0327] Layer 108 has region 108M, region 208L, and region 208D. Fig.21B As shown, a portion of the region 108M may overlap a portion of the region 208D.

[0328] Region 108M serving as one of the source electrode and the drain electrode of transistor 100 and region 208D serving as one of the source region and the drain region of transistor 150B are continuously provided and electrically connected in the same layer 108. Since there is no need to provide a separate conductive layer for electrically connecting region 108M and region 208D, the occupied area of ​​the semiconductor device can be reduced.

[0329] Regarding the transistor 100 , reference can be made to the above description, and thus detailed description thereof will be omitted.

[0330] 〔Structural Example 2-10〕 Fig. 10H A circuit diagram of a semiconductor device 10J according to one embodiment of the present invention is shown. Fig.22A A top view of the semiconductor device 10J is shown. Fig. 22B Shown along Fig.22A A cross-sectional view of a section taken along the dashed line C1 - C2 is shown.

[0331] The semiconductor device 10J includes a transistor 100 and a transistor 150 . One of a source and a drain of the transistor 100 is electrically connected to a gate of the transistor 150 .

[0332] The insulating layer 106 has an opening 145 that reaches the region 108M of the layer 108, and an opening 147a and an opening 147b that reach the region 208D of the layer 208. The conductive layer 204 is provided so as to cover the opening 145. The conductive layer 204 is in contact with the region 108M in the opening 145. The conductive layer 204 serving as the gate electrode of the transistor 200 is electrically connected to the region 108M serving as one of the source electrode and the drain electrode of the transistor 100 through the opening 145.

[0333] Since the above description can be referred to for the opening 147 a and the opening 147 b , detailed description thereof will be omitted. Since the above description can be referred to for the transistor 100 , detailed description thereof will be omitted.

[0334] Notice, FIG. 10A to FIG. 10C The transistor 100 and the transistor 200 shown are n-channel transistors, but one embodiment of the present invention is not limited to this. The transistor 100 and the transistor 200 may also be p-channel transistors. FIG. 10D to FIG. 10H Although the transistor 100 and the transistor 150 shown in the figure are n-channel transistors, one embodiment of the present invention is not limited thereto and the transistor 100 and the transistor 150 may be p-channel transistors.

[0335] 〔Structural Example 2-11〕 Fig.11A A circuit diagram of a semiconductor device 10K according to one embodiment of the present invention is shown. Fig.23A A top view of the semiconductor device 10K is shown. Fig. 23B Shown along Fig.23A A cross-sectional view along the dot-dash line A1-A2 in FIG.

[0336] The semiconductor device 10K includes the transistor 100 and the transistor 250 . One of the source and the drain of the transistor 250 is electrically connected to the other of the source and the drain of the transistor 100 .

[0337] The transistor 100 and the transistor 250 are both disposed on a substrate 102 .

[0338] A conductive layer 259 is provided over the substrate 102. An insulating layer 252 is provided over the substrate 102 and the conductive layer 259, and a semiconductor layer 253 is provided over the insulating layer 252. In addition, an insulating layer 254 is provided over the insulating layer 252 and the semiconductor layer 253, and a conductive layer 255 is provided over the insulating layer 254. The semiconductor layer 253 and the conductive layer 255 have a region overlapping each other. The conductive layer 259 serves as a back gate electrode of the transistor 250, and a portion of the insulating layer 252 serves as a back gate insulating layer. A portion of the insulating layer 254 serves as a gate insulating layer, and the conductive layer 255 serves as a gate electrode.

[0339] An insulating layer 256 is provided over the insulating layer 254 and the conductive layer 255. In addition, an opening 257a is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with a portion of the semiconductor layer 253. In addition, an opening 257b is provided in the insulating layer 254 and the insulating layer 256 in a region overlapping with another portion of the semiconductor layer 253.

[0340] A conductive layer 258a is provided on the insulating layer 256 and the opening 257a, and a conductive layer 258b is provided on the insulating layer 256 and the opening 257b. The conductive layer 258a is electrically connected to the semiconductor layer 253 in the opening 257a. In addition, the conductive layer 258b is electrically connected to the semiconductor layer 253 in the opening 257b.

[0341] In the semiconductor layer 253, the region overlapping with the conductive layer 255 is used as a channel formation region. The semiconductor layer 253 has a pair of regions 253D sandwiching the channel formation region. One of the pair of regions 253D is used as one of the source region and the drain region, and is electrically connected to the conductive layer 258a. The other of the pair of regions 253D is used as the other of the source region and the drain region, and is electrically connected to the conductive layer 258b.

[0342] The insulating layer 110 is provided over the insulating layer 256 , the conductive layer 258 a , and the conductive layer 258 b .

[0343] The insulating layer 110 has an opening 146 in a region overlapping with a portion of the conductive layer 258a. The layer 108 is provided so as to cover the opening 146.

[0344] The insulating layer 106 is provided over the insulating layer 110 and the layer 108, and the conductive layer 104 is provided over the insulating layer 106. In addition, an insulating layer 195 is provided over the insulating layer 106 and the conductive layer 104.

[0345] The conductive layer 259 preferably overlaps with the channel formation region and extends beyond the end of the channel formation region. In other words, the conductive layer 259 is preferably larger than the channel formation region. In addition, the conductive layer 259 preferably extends beyond the end of the semiconductor layer 253. In other words, the conductive layer 259 is preferably larger than the semiconductor layer 253.

[0346] The back gate electrode is arranged so as to sandwich the channel formation region with the gate electrode. In addition, by changing the potential of the back gate electrode, the threshold voltage of the transistor can be changed. The potential of the back gate electrode can be the ground potential or any potential.

[0347] The back gate electrode can be formed using the same material and method as the gate electrode, source electrode, drain electrode, etc. In addition, since the gate electrode and the back gate electrode are conductive layers, they have the function of preventing the electric field generated outside the transistor from affecting the layer forming the channel (especially the electric field shielding function against static electricity). That is, it is possible to prevent the electrical characteristics of the transistor from changing due to the influence of external electric fields such as static electricity. In addition, by providing a back gate electrode, the change in the threshold voltage of the transistor before and after the BT (Bias Temperature) stress test can be reduced. By providing a back gate electrode, the unevenness of the characteristics of the transistor is reduced, and the reliability of the semiconductor device can be improved.

[0348] like Fig. 11B As shown, the back gate and gate of transistor 250 may also be electrically connected to each other. Fig. 11C As shown, the back gate and the source or drain of the transistor 250 are electrically connected to each other. Fig.11D As shown, transistor 250 may also not include a back gate.

[0349] Similar to the transistor 100 , an OS transistor can also be used as the transistor 250 .

[0350] Here, the layer 108 and the semiconductor layer 253 may be made of the same material or different materials. The structures of the layer 108 and the semiconductor layer 253 can refer to the description of the layer 108 and the layer 208 in the semiconductor device 10 .

[0351] Alternatively, as the transistor 250 , a transistor in which silicon is used for a channel formation region (hereinafter also referred to as a Si transistor) may be used.

[0352] Examples of silicon include single crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor including an LTPS in a channel formation region (hereinafter also referred to as an LTPS transistor) can be used. The LTPS transistor has high field effect mobility and good frequency characteristics.

[0353] The transistor 100 includes a conductive layer 258a instead of the conductive layer 112, and the structure other than that is the same as that described above (see Figure 1B ).

[0354] The conductive layer 258a is used as the other of the source electrode and the drain electrode of the transistor 100 and is used as one of the source electrode and the drain electrode of the transistor 250. When the transistor 100 and the transistor 250 use the conductive layer 258a in common, the occupied area of ​​the semiconductor device can be reduced.

[0355] In addition, the transistor 100 may also be in a region overlapping with the opening 257a. Specifically, the following structure may be adopted: the opening 146 is provided in the region overlapping with the opening 257a, and the conductive layer 258a is in contact with the layer 108 in the opening 257a. In addition, a structure may be adopted in which the conductive layer 258a is not provided and the region 253D is in contact with the layer 108 in the opening 257a. By adopting such a structure, a semiconductor device with a smaller occupied area can be realized.

[0356] 〔Structural Example 2-12〕 Fig.11E A circuit diagram of a semiconductor device 10L according to one embodiment of the present invention is shown. Fig.24A A top view of the semiconductor device 10L is shown. Fig. 24B Shown along Fig.24A A cross-sectional view along the dot-dash line A1-A2 in FIG.

[0357] The semiconductor device 10L includes a transistor 100 and a transistor 250 . The gate of the transistor 250 is electrically connected to the other of the source and the drain of the transistor 100 .

[0358] The semiconductor device 10L is mainly different from the semiconductor device 10K in that the opening 146 is provided so as to overlap with the conductive layer 255 serving as the gate electrode of the transistor 250. Therefore, in the semiconductor device 10L, the transistor 100 is provided so as to overlap on the gate electrode of the transistor 250.

[0359] exist Fig.24A and Fig. 24B In the embodiment of the present invention, the opening 146 is provided so as to overlap with the channel formation region of the transistor 250, but the present invention is not limited thereto. The opening 146 may be provided so as not to overlap with the channel formation region of the transistor 250 but to overlap with the conductive layer 255. In the semiconductor device 10L, the conductive layer 255 is used as the gate electrode of the transistor 250 and is used as the other of the source electrode and the drain electrode of the transistor 100.

[0360] By overlapping the transistor 250 and the transistor 100 , a semiconductor device with a further reduced occupied area can be realized.

[0361] The semiconductor device 10L is different from the semiconductor device 10E in the structures of the opening 257 a , the opening 257 b , the conductive layer 258 a , and the conductive layer 258 b .

[0362] Openings 257a and 257b are formed in a region overlapping region 253D of semiconductor layer 253 by selectively removing portions of insulating layer 254 and insulating layer 110. Conductive layers 258a and 258b are provided on insulating layer 110 and are electrically connected to region 253D through openings 257a and 257b.

[0363] In the semiconductor device 10L, the conductive layer 258a and the conductive layer 258b can also be formed by the same process as the conductive layer 104. Specifically, after the insulating layer 106 is formed on the layer 108, an opening reaching the region 253D is formed. A film to be the conductive layer 104, the conductive layer 258a, and the conductive layer 258b is formed so as to cover the opening, and the conductive layer 104, the conductive layer 258a, and the conductive layer 258b are formed by processing the film. By forming the conductive layer 104, the conductive layer 258a, and the conductive layer 258b in the same process, the manufacturing process of the semiconductor device is shortened and the productivity of the semiconductor device is improved.

[0364] Notice, FIG. 11A to FIG. 11E The transistor 100 shown is an n-channel transistor and the transistor 250 is a p-type transistor, but one embodiment of the present invention is not limited to this. The transistor 100 and the transistor 250 may both be n-channel transistors or p-channel transistors. In addition, the transistor 100 may also be a p-channel transistor and the transistor 250 may also be an n-channel transistor.

[0365] The transistor of one embodiment of the present invention is a type of vertical transistor. Since the source electrode, the layer having the channel formation region, and the drain electrode can be overlapped, the occupied area can be made much smaller than that of a planar transistor. In addition, the transistor of one embodiment of the present invention can also be combined with a planar transistor. For example, by using a p-channel Si transistor as a planar transistor and an n-channel OS transistor as a vertical transistor, a CMOS (Complementary Metal Oxide Semiconductor) circuit can be formed. In addition, by adopting this structure and overlapping the planar transistor and the vertical transistor, the occupied area of ​​the CMOS circuit can be reduced.

[0366] 〔Structural Example 2-13〕 Fig.11F A circuit diagram of a semiconductor device 10M according to one embodiment of the present invention is shown. Fig.25A A cross-sectional view of a semiconductor device 10M is shown.

[0367] The semiconductor device 10M includes a transistor 100 and a capacitor 190. The capacitor 190 includes a pair of electrodes and a dielectric sandwiched between the pair of electrodes. The source or drain of the transistor 100 is electrically connected to one of the pair of electrodes of the capacitor 190.

[0368] The region 108M included in the layer 108 is used as one of the source electrode and the drain electrode of the transistor 100 and one of the pair of electrodes of the capacitor 190. The conductive layer 191 used as the other of the pair of electrodes of the capacitor 190 is provided on the insulating layer 106. The conductive layer 191 can be formed by the same process as that of the conductive layer 104 included in the transistor 100. The insulating layer 106 in the region sandwiched between the region 108M and the conductive layer 191 is used as a dielectric of the capacitor 190.

[0369] Note that Fig.25B As shown, conductive layer 191 may also be provided on substrate 102. Conductive layer 191 may be formed by the same process as conductive layer 112 included in transistor 100. Insulating layer 110 in a region sandwiched between region 108M and conductive layer 191 functions as a dielectric of capacitor 190.

[0370] Since the transistor 100 and the capacitor 190 share the region 108M, it is not necessary to provide one of the pair of electrodes of the capacitor 190 outside the layer 108 (specifically, the region 108M), thereby simplifying the manufacturing process of the semiconductor device and improving the manufacturing cost. In addition, the yield of the semiconductor device can be improved.

[0371] 〔Structural Example 2-14〕 Fig.11G A circuit diagram of a semiconductor device 10N according to one embodiment of the present invention is shown. Fig.25C A cross-sectional view of a semiconductor device 10N is shown.

[0372] The semiconductor device 10N includes a transistor 100 and a capacitor 190 .

[0373] The conductive layer 112 included in the layer 108 is used as the other of the source electrode and the drain electrode of the transistor 100 and one of the pair of electrodes of the capacitor 190. The conductive layer 192 used as the other of the pair of electrodes of the capacitor 190 is provided on the insulating layer 110. The conductive layer 192 can be formed by the same process as the region 108M included in the transistor 100. Specifically, after the opening 141 is formed in the insulating layer 110, a film to be the layer 108 and the conductive layer 192 is formed, and the film is processed to form the layer 108 and the conductive layer 192. The conductive layer 192 is provided in a region in contact with the uppermost layer of the insulating layer 110 (here, the insulating layer 110d). The insulating layer 110 in the region sandwiched between the conductive layer 112 and the conductive layer 192 is used as a dielectric of the capacitor 190.

[0374] 〔Structural Example 2-15〕 Fig.26A The equivalent circuit diagram of the semiconductor device 30 according to one embodiment of the present invention is shown. The semiconductor device 30 includes transistors 100_1 to 100_p (p is an integer greater than or equal to 2). The transistors 100_1 to 100_p are connected in parallel, and the semiconductor device 30 can be regarded as one transistor.

[0375] The gate electrodes of the transistors 100_1 to 100_p are electrically connected to each other. The source electrodes of the transistors 100_1 to 100_p are electrically connected to each other. The drain electrodes of the transistors 100_1 to 100_p are electrically connected to each other.

[0376] Note that Fig.26A In the embodiment, the transistors 100_1 to 100_p are n-channel transistors, but one embodiment of the present invention is not limited thereto. The transistors 100_1 to 100_p may also be p-channel transistors.

[0377] A specific description will be given by taking the case where p is 4 as an example. Fig.26B An equivalent circuit diagram of a semiconductor device 30 according to one embodiment of the present invention is shown. Fig.26C A top view of the semiconductor device 30 is shown. Fig. 27 Shown along Fig.26C A cross-sectional view of the section taken along the dot-dash line A3-A4 in FIG. Fig.28 A perspective view of the semiconductor device 30 is shown.

[0378] The semiconductor device 30 includes transistors 100_1 to 100_4. The transistors 100_1 to 100_4 may adopt the structure of the transistor 100 described above. Note that the transistor 100 is used as an example for description, but one embodiment of the present invention is not limited thereto. Either the transistor 100A or the transistor 100C may be applied to the transistors 100_1 to 100_4.

[0379] Fig.26C The transistors 100_1 to 100_4 are arranged in two rows and two columns, but the arrangement of the transistors is not particularly limited. For example, the transistors 100_1 to 100_4 may be arranged in one row and four columns.

[0380] Each of the transistors 100_1 to 100_4 includes a conductive layer 104, an insulating layer 106, a layer 108, and a conductive layer 112. The conductive layer 104 is used as a gate electrode of the transistors 100_1 to 100_4. A portion of the insulating layer 106 is used as a gate insulating layer of the transistors 100_1 to 100_4. A region 108M of the layer 108 is used as one of a source electrode and a drain electrode of the transistors 100_1 to 100_4, and the conductive layer 112 is used as the other of the source electrode and the drain electrode.

[0381] Fig.29A is a perspective view schematically showing the conductive layer 112 .

[0382] Fig.29B 1 is a perspective view schematically showing the conductive layer 112 and the openings 141_1 to 141_4. Note that the openings 141_1 to 141_4 provided in the insulating layer 110 are shown by dotted lines. The openings 141_1 to 141_4 are provided in a region overlapping the conductive layer 112. The description of the opening 141 can be referred to for the opening 141, so detailed description is omitted.

[0383] When the semiconductor device 30 is regarded as a transistor, the channel width of the transistor is the sum of the channel widths of the transistors 100_1 to 100_4. For example, when the top surface shapes of the openings 141_1 to 141_4 are circular and the widths of the openings 141_1 to 141_4 are each described as width D141, the semiconductor device 30 can be regarded as a transistor with a channel width of "D141×π×4" (see Figure 4A and Figure 4B ). The semiconductor device 30 composed of p transistors can be regarded as a transistor with a channel width of "D141×π×p". In addition, the semiconductor device 30 can be regarded as a transistor with a channel length L100 (refer to Figure 4B ). By connecting multiple transistors in parallel, the channel width becomes larger, and the on-state current can be increased. In addition, the channel width can be made different by adjusting the number of transistors connected in parallel (p). The number of transistors connected in parallel (p) can be determined in a way to achieve the desired on-state current.

[0384] Fig.29C 1 is a three-dimensional diagram showing the conductive layer 112 and the layer 108. The layer 108 is provided in a manner covering the openings 141_1 to 141_4. Fig.26C As shown, a region 108M is provided in a region of the layer 108 that is in contact with the insulating layer 110d.

[0385] Fig.29D1 is a perspective view schematically showing the conductive layer 112 and the conductive layer 104. The conductive layer 104 is provided to cover the openings 141_1 to 141_4.

[0386] Note that the structure of the semiconductor device 30 shown in the structural examples 2 to 15 can be applied to other structural examples. For example, the semiconductor device 30 can also be applied to FIG. 10A to FIG. 10H and FIG. 11A to FIG. 11G The semiconductor device shown includes one or more transistors.

[0387] 〔Structural Example 2-16〕 Fig. 30A An equivalent circuit diagram of a semiconductor device 40 according to one embodiment of the present invention is shown. The semiconductor device 40 includes transistors 100_1 to 100_q (q is an integer greater than or equal to 2). The transistors 100_1 to 100_q are connected in series, and the semiconductor device 40 can be regarded as one transistor.

[0388] Note that Fig. 30A In the embodiment, the transistors 100_1 to 100_q are n-channel transistors, but one embodiment of the present invention is not limited thereto. The transistors 100_1 to 100_q may be p-channel transistors.

[0389] A specific description will be given by taking the case where q is 4 as an example. Fig. 30B An equivalent circuit diagram of a semiconductor device 40 according to one embodiment of the present invention is shown. Fig. 30C A top view of the semiconductor device 40 is shown. Fig.31 Shown along Fig. 30C A cross-sectional view of the section taken along the dot-dash line A5-A6 in FIG. Fig.32 A perspective view of a semiconductor device 40 is shown.

[0390] The semiconductor device 40 includes transistors 100_1 to 100_4. The transistors 100_1 to 100_4 may adopt the structure of the transistor 100 described above. Note that the transistor 100 is used as an example for description, but one embodiment of the present invention is not limited thereto. Either the transistor 100A or the transistor 100C may be applied to the transistors 100_1 to 100_4.

[0391] Fig. 30C The transistors 100_1 to 100_4 are arranged in two rows and two columns, but the arrangement of the transistors is not particularly limited. For example, the transistors 100_1 to 100_4 may be arranged in one row and four columns.

[0392] The transistor 100_1 includes a conductive layer 104, an insulating layer 106, a layer 108, and a conductive layer 112. A region 108M included in the layer 108 functions as one of a source electrode and a drain electrode of the transistor 100_1, and the conductive layer 112 functions as the other of the source electrode and the drain electrode.

[0393] The transistor 100_2 includes a conductive layer 104, an insulating layer 106, a layer 108A, and a conductive layer 112. A region 108AM of the layer 108A is used as one of a source electrode and a drain electrode of the transistor 100_2, and the conductive layer 112 is used as the other of the source electrode and the drain electrode. The conductive layer 112 is used by the transistor 100_1 and the transistor 100_2. The conductive layer 112 is used as the other of the source electrode and the drain electrode of the transistor 100_2 and is also used as the other of the source electrode and the drain electrode of the transistor 100_1. That is, the other of the source electrode and the drain electrode of the transistor 100_2 is electrically connected to the other of the source electrode and the drain electrode of the transistor 100_1.

[0394] The transistor 100_3 includes a conductive layer 104, an insulating layer 106, a layer 108A, and a conductive layer 112A. A region 108AM of the layer 108A is used as one of the source electrode and the drain electrode of the transistor 100_3, and the conductive layer 112A is used as the other of the source electrode and the drain electrode. The layer 108 is used by the transistor 100_2 and the transistor 100_3. The region 108AM of the layer 108 is used as one of the source electrode and the drain electrode of the transistor 100_3 and is also used as one of the source electrode and the drain electrode of the transistor 100_2. That is, one of the source electrode and the drain electrode of the transistor 100_3 is electrically connected to one of the source electrode and the drain electrode of the transistor 100_2.

[0395] The transistor 100_4 includes a conductive layer 104, an insulating layer 106, a layer 108B, and a conductive layer 112A. The region 108BM of the layer 108B is used as one of the source electrode and the drain electrode of the transistor 100_4, and the conductive layer 112A is used as the other of the source electrode and the drain electrode. The conductive layer 112A is used by the transistor 100_3 and the transistor 100_4. The conductive layer 112A is used as the other of the source electrode and the drain electrode of the transistor 100_4 and is also used as the other of the source electrode and the drain electrode of the transistor 100_3. That is, the other of the source electrode and the drain electrode of the transistor 100_4 is electrically connected to the other of the source electrode and the drain electrode of the transistor 100_3.

[0396] Fig.33A 112 is a perspective view schematically showing the conductive layer 112 and the conductive layer 112A. The conductive layer 112 and the conductive layer 112A can be formed through the same process.

[0397] Fig.33B 1 is a perspective view schematically showing the conductive layer 112, the conductive layer 112A, and the openings 141_1 to 141_4. The openings 141_1 and 141_2 are provided in a region overlapping with the conductive layer 112, and the openings 141_3 and 141_4 are provided in a region overlapping with the conductive layer 112A.

[0398] Fig.33C 1 is a perspective view schematically showing the conductive layer 112, the conductive layer 112A, the layer 108, the layer 108A, and the layer 108B. The layer 108 is provided to cover the opening 141_1, the layer 108A is provided to cover the opening 141_2 and the opening 141_3, and the layer 108B is provided to cover the opening 141_4. The layer 108, the layer 108A, and the layer 108B can be formed by the same process.

[0399] Fig.33D 1 is a perspective view schematically showing the conductive layer 112, the conductive layer 112A, and the conductive layer 104. The conductive layer 104 serves as gate electrodes of the transistors 100_1 to 100_4.

[0400] When the semiconductor device 40 is regarded as a transistor, the channel length of the transistor is the sum of the channel lengths of the transistors 100_1 to 100_4. For example, when the channel lengths of the transistors 100_1 to 100_4 are each described as a channel length L100, the semiconductor device 40 can be regarded as a transistor with a channel length of "L100×4" (see Figure 4B ). The semiconductor device 40 composed of q transistors can be regarded as a transistor having a channel length of "L100×q". In addition, the semiconductor device 40 can be regarded as a transistor having a channel width of W100 (see Figure 4A and Figure 4B ). By connecting a plurality of transistors in series, the channel length becomes longer, and the saturation can be improved. In addition, by adjusting the number (q) of transistors connected in series, the channel length can be made different. The number (q) of transistors connected in series can be determined in a manner to achieve the desired saturation.

[0401] Note that the structure of the semiconductor device 40 shown in the structural examples 2 to 16 can be applied to other structural examples. For example, the semiconductor device 40 can also be applied to FIG. 10A to FIG. 10H and FIG. 11A to FIG. 11G The semiconductor device shown includes one or more transistors.

[0402] The semiconductor device 40 may be used for each transistor in the semiconductor device 30. That is, a group of transistors connected in parallel may be connected in series (hereinafter also referred to as series-parallel connection).

[0403] Note that, here, the structure of a semiconductor device including a plurality of transistors and a semiconductor device including a transistor and a capacitor is described, but one embodiment of the present invention is not limited thereto. A semiconductor device according to one embodiment of the present invention can be appropriately used in a display device. In a display device according to one embodiment of the present invention, the region 108M included in the transistor can be in contact with a pixel electrode included in a display element. The structure of the display device is described in detail in Embodiment 3.

[0404] This embodiment mode can be appropriately combined with other embodiment modes. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be appropriately combined.

[0405] (Implementation Method 2) In this embodiment, refer to FIG. 34A to FIG. 35D A method for manufacturing a display device according to one embodiment of the present invention will be described. Note that regarding materials and formation methods of each component, parts that are the same as those described in Embodiment 1 may be omitted.

[0406] FIG. 34A to FIG. 35D Shown side by side along Figure 1A Shown are a cross-sectional view along the dot-dash line A1 - A2 and a cross-sectional view along the dot-dash line B1 - B2 .

[0407] Thin films (insulating films, semiconductor films, and conductive films, etc.) constituting semiconductor devices can be formed by sputtering, chemical vapor deposition (CVD: Chemical Vapor Deposition) method, vacuum evaporation method, pulsed laser deposition (PLD: Pulsed Laser Deposition) method, ALD method, etc. CVD methods include PECVD method and thermal CVD method, etc. In addition, as one of the thermal CVD methods, there is metal organic chemical vapor deposition (MOCVD: Metal Organic CVD) method.

[0408] Thin films (insulating films, semiconductor films, and conductive films, etc.) that constitute semiconductor devices can be formed using wet deposition methods such as spin coating, dipping, spraying, inkjet, dispenser, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, or doctor knife coating.

[0409] When processing a thin film constituting a semiconductor device, photolithography or the like can be used. Alternatively, the thin film can be processed by nanoimprinting, sandblasting, lift-off, etc. In addition, an island-shaped thin film can be directly formed by a deposition method using a shadow mask such as a metal mask.

[0410] There are two typical photolithography methods. One is to form a resist mask on a thin film to be processed, process the thin film by etching, etc., and remove the resist mask. The other is to deposit a photosensitive thin film, then expose and develop it, and process the thin film into a desired shape.

[0411] In the photolithography method, as the light used for exposure, for example, i-line (wavelength 365nm), g-line (wavelength 436nm), h-line (wavelength 405nm) or a mixture of these lights can be used. In addition, ultraviolet light, KrF laser or ArF laser, etc. can also be used. In addition, liquid immersion exposure technology can also be used for exposure. In addition, as the light used for exposure, extreme ultraviolet (EUV: Extreme Ultra-violet) light or X-rays can also be used. In addition, instead of the light used for exposure, an electron beam can also be used. When extreme ultraviolet light, X-rays or electron beams are used, extremely fine processing can be performed, so it is preferred. Note that when exposure is performed by scanning with a light beam such as an electron beam, a photomask is not required.

[0412] As a method of etching the thin film, one or more of a dry etching method, a wet etching method, and a sand blast method may be used.

[0413] First, a conductive film to be the conductive layer 112 is formed over the substrate 102, and the conductive film is processed to form the conductive layer 112 ( Fig.34A ) The conductive film can be formed by sputtering as appropriate.

[0414] Next, an insulating film 110af to be the insulating layer 110a and an insulating film 110bf to be the insulating layer 110b are formed on the conductive layer 112. Fig.34B ).

[0415] When forming the insulating film 110af and the insulating film 110bf, a sputtering method or a PECVD method can be appropriately used. After forming the insulating film 110af, it is preferable to continuously form the insulating film 110bf in a vacuum in such a manner that the surface of the insulating film 110af is not exposed to the atmosphere. By continuously forming the insulating film 110af and the insulating film 110bf, it is possible to suppress impurities from the atmosphere from adhering to the surface of the insulating film 110af. Examples of such impurities include water and organic matter.

[0416] The substrate temperature when forming the insulating film 110af and the insulating film 110bf is preferably 180° C. or higher and 450° C. or lower, more preferably 200° C. or higher and 450° C. or lower, more preferably 250° C. or higher and 450° C. or lower, more preferably 300° C. or higher and 450° C. or lower, more preferably 300° C. or higher and 400° C. or lower, and more preferably 350° C. or higher and 400° C. or lower. By setting the substrate temperature when forming the insulating film 110af and the insulating film 110bf within the above range, the release of impurities (for example, water and hydrogen) from the insulating film 110af and the insulating film 110bf themselves can be reduced, thereby suppressing the diffusion of impurities into the layer 108. Therefore, a transistor having good electrical characteristics and high reliability can be realized.

[0417] Note that since the insulating film 110af and the insulating film 110bf are formed first and then the layer 108 is formed, there is no concern that oxygen will be released from the layer 108 due to heat applied when the insulating film 110af and the insulating film 110bf are formed.

[0418] After the insulating film 110bf is formed, oxygen may be supplied to the insulating film 110bf. As a method for supplying oxygen, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment may be used. As a plasma treatment, a device that converts oxygen gas into plasma using high-frequency power may be appropriately used. As a device that converts gas into plasma using high-frequency power, for example, a PECVD device, a plasma etching device, and a plasma ashing device may be cited. The plasma treatment is preferably carried out in an oxygen-containing atmosphere. For example, it is preferably carried out in an atmosphere containing oxygen, nitrous oxide (N 2 O), nitrogen dioxide (NO 2 ), plasma treatment is carried out in an atmosphere of one or more of carbon monoxide and carbon dioxide.

[0419] Note that the plasma treatment may be continuously performed in a vacuum without exposing the surface of the insulating film 110bf to the atmosphere. For example, when a PECVD device is used to form the insulating film 110bf, the plasma treatment is preferably performed using the PECVD device. This can improve productivity. Specifically, after the insulating film 110bf is formed using the PECVD device, the N 2 O plasma treatment.

[0420] Next, it is preferred to form a metal oxide layer 130 ( Fig.34C ). By forming the metal oxide layer 130, oxygen can be supplied to the insulating film 110bf.

[0421] There is no limitation on the conductivity of the metal oxide layer 130. The metal oxide layer 130 may be at least one of an insulating film, a semiconductor film, and a conductive film. The metal oxide layer 130 may be, for example, aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO), or indium tin oxide containing silicon (ITSO).

[0422] As the metal oxide layer 130, an oxide material containing one or more elements that are the same as those of the layer 108 is preferably used. In particular, a metal oxide material that can be applied to the layer 108 is preferably used.

[0423] When forming the metal oxide layer 130, the higher the oxygen flow rate ratio of the deposition gas introduced into the processing chamber of the deposition device or the oxygen partial pressure in the processing chamber, the greater the amount of oxygen supplied to the insulating film 110bf. The oxygen flow rate ratio or the oxygen partial pressure is, for example, 50% or more and 100% or less, preferably 65% ​​or more and 100% or less, more preferably 80% or more and 100% or less, and further preferably 90% or more and 100% or less. In particular, it is preferred to set the oxygen flow rate ratio to 100% to make the oxygen partial pressure as close to 100% as possible.

[0424] Thus, by forming the metal oxide layer 130 by sputtering in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110bf while preventing oxygen from being separated from the insulating film 110bf when the metal oxide layer 130 is formed. As a result, a large amount of oxygen can be enclosed in the insulating film 110bf. Furthermore, a large amount of oxygen can be supplied to the layer 108 by the subsequent heat treatment. As a result, oxygen vacancies in the layer 108 and V O H, and a transistor with good electrical characteristics and high reliability can be realized.

[0425] It is preferable to perform heat treatment after forming the metal oxide layer 130. By performing heat treatment after forming the metal oxide layer 130, oxygen can be efficiently supplied from the metal oxide layer 130 to the insulating film 110bf.

[0426] The temperature of the heat treatment is preferably 150° C. or higher and lower than the strain point of the substrate, more preferably 200° C. or higher and 450° C. or lower, more preferably 250° C. or higher and 450° C. or lower, more preferably 300° C. or higher and 450° C. or lower, more preferably 300° C. or higher and 400° C. or lower, and more preferably 350° C. or higher and 400° C. or lower. The heat treatment may be performed in an atmosphere containing one or more of a noble gas, nitrogen, and oxygen. As a nitrogen-containing atmosphere or an oxygen-containing atmosphere, dry air (CDA: Clean Dry Air) may also be used. Note that the content of hydrogen or oxygen in the atmosphere is preferably as small as possible. As the atmosphere, a high-purity gas having a dew point of -60° C. or lower, preferably -100° C. or lower is preferably used. By using an atmosphere containing as little hydrogen, water, or the like as possible, it is possible to prevent hydrogen, water, or the like from being absorbed by the insulating film 110af and the insulating film 110bf or the like as much as possible. For the heat treatment, an oven, a rapid thermal annealing (RTA: Rapid Thermal Annealing) device, or the like may be used. By using an RTA device, the heat treatment time may be shortened.

[0427] After the metal oxide layer 130 is formed or after the above-mentioned heat treatment, oxygen may be supplied to the insulating film 110bf through the metal oxide layer 130. As a method for supplying oxygen, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment may be used. For the plasma treatment, the above description may be referred to, so the detailed description thereof is omitted.

[0428] Next, the metal oxide layer 130 is removed. Although there is no particular limitation on the method for removing the metal oxide layer 130, a wet etching method can be appropriately used. By using the wet etching method, it is possible to suppress the insulating film 110bf from being etched when removing the metal oxide layer 130. Therefore, it is possible to suppress the thickness of the insulating film 110bf from being reduced, and the thickness of the insulating layer 110b can be made uniform.

[0429] After removing the metal oxide layer 130, oxygen may be supplied to the insulating film 110bf. The method of supplying oxygen may refer to the above description. Fig.34D As shown, a film 139 is formed on the insulating film 110bf, and a process of supplying oxygen to the insulating film 110bf through the film 139 may be performed. As this process, plasma treatment in an oxygen-containing atmosphere may be used. Fig.34D The arrows schematically indicate the supply of oxygen to the insulating film 110bf.

[0430] A conductive film or a semiconductor film is preferably used as the film 139. A metal oxide film, a metal film, or an alloy film can be used as the film 139. When a metal oxide is used as the film 139 and formed by a sputtering method or the like in an oxygen-containing atmosphere, oxygen can be supplied to the insulating film 110bf when the film 139 is formed, which is preferable.

[0431] The thickness of the film 139 is preferably thin, preferably greater than 1 nm and less than 20 nm, more preferably greater than 2 nm and less than 20 nm, more preferably greater than 2 nm and less than 15 nm, more preferably greater than 3 nm and less than 15 nm, further preferably greater than 3 nm and less than 10 nm, and typically can be about 5 nm.

[0432] The substrate temperature during formation of the film 139 is preferably 350° C. or lower, more preferably 340° C. or lower, more preferably 330° C. or lower, and further preferably 300° C. or lower. Thus, the amount of oxygen supplied to the insulating film 110 bf can be increased.

[0433] By providing the film 139, when a bias voltage is applied between the pair of electrodes while oxygen is supplied, ionized oxygen can be easily attracted, so that the amount of oxygen supplied to the insulating film 110bf can be increased.

[0434] As the processing device for supplying oxygen, a dry etching device, an ashing device, a PECVD device, etc. can be appropriately used. In particular, an ashing device is preferably used. When a bias voltage is applied between a pair of electrodes included in the processing device, the bias voltage can be set to, for example, 10V or more and 1kV or less. Alternatively, the power density of the bias voltage can be set to, for example, 1W / cm 2 Above and 5W / cm 2 The following will do.

[0435] Next, the film 139 is removed.

[0436] The oxygen supply treatment of the insulating film 110bf is not limited to the above method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions or oxygen molecular ions are supplied to the insulating film 110bf by ion doping, ion implantation or plasma treatment. In addition, after a film for inhibiting oxygen detachment is formed on the insulating film 110bf, oxygen is supplied to the insulating film 110bf through the film. It is preferred to remove the film after supplying oxygen. As the above-mentioned film for inhibiting oxygen detachment, a conductive film or semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt or tungsten can be used.

[0437] Next, an insulating film 110cf to be the insulating layer 110c and an insulating film 110df to be the insulating layer 110d are formed on the insulating film 110bf. Fig.35ASince the formation of the insulating film 110cf and the insulating film 110df can refer to the description of the formation of the insulating film 110af and the insulating film 110bf, the detailed description is omitted.

[0438] Next, the insulating film 110af, the insulating film 110bf, the insulating film 110cf, and a portion of the insulating film 110df are removed to form the insulating layer 110 having the opening 141 ( Fig.35B ). The opening 141 is provided in a region overlapping with the conductive layer 112. The conductive layer 112 is exposed by forming the opening 141. When the insulating layer 110 is formed, a dry etching method can be appropriately used.

[0439] Next, a metal oxide film 108f ( Fig.35C ). The metal oxide film 108 f is provided in contact with the top surface and the side surface of the insulating layer 110 and the top surface of the conductive layer 112 .

[0440] The metal oxide film 108f is preferably formed by a sputtering method using a metal oxide target. Alternatively, the metal oxide film 108f is preferably formed by an ALD method. Since the coverage is high, the ALD method can also be appropriately used when forming the metal oxide film 108f provided in a manner covering the opening 141. By using the ALD method, a metal oxide film can also be formed with high coverage on the side of the insulating layer 110. In addition, the ALD method makes it easy to control the deposition rate, so a thin film can be formed with a high yield.

[0441] The metal oxide film 108f is preferably a dense film with as few defects as possible. In addition, the metal oxide film 108f is preferably a high-purity film in which impurities containing hydrogen elements are reduced as much as possible. In particular, a crystalline metal oxide film is preferably used as the metal oxide film 108f.

[0442] When the metal oxide film 108f is formed, an oxygen gas is preferably used. By using an oxygen gas, oxygen can be appropriately supplied to the insulating layer 110. For example, when an oxide or an oxynitride is used for the insulating layer 110b, oxygen can be appropriately supplied to the insulating layer 110b.

[0443] By supplying oxygen to the insulating layer 110b, oxygen can be supplied to the channel formation region of the layer 108 in a later step, thereby reducing oxygen vacancies in the channel formation region and V O H.

[0444] When forming the metal oxide film 108f, an oxygen gas and an inert gas (e.g., helium gas, argon gas, xenon gas, etc.) may be mixed. Note that the higher the oxygen flow rate ratio or oxygen partial pressure of the deposition gas when forming the metal oxide film, the higher the crystallinity of the metal oxide film can be, and a transistor with high reliability can be realized. On the other hand, the lower the oxygen flow rate ratio or oxygen partial pressure, the lower the crystallinity and the higher the conductivity of the metal oxide film can be realized, and thus a transistor with a large on-state current can be realized.

[0445] Here, when the oxygen flow rate ratio or the oxygen partial pressure is high, the metal oxide film may have a polycrystalline structure. In the case of a metal oxide film having a polycrystalline structure, the grain boundary becomes a recombination center and captures carriers, so that the on-state current of the transistor may become smaller. Therefore, it is preferable to adjust the oxygen flow rate ratio or the oxygen partial pressure so that the metal oxide film 108f does not have a polycrystalline structure. Since the metal oxide film is prone to having a polycrystalline structure depending on the composition, the oxygen flow rate ratio or the oxygen partial pressure can be adjusted according to the composition of the metal oxide film 108f.

[0446] When the substrate temperature is high when forming the metal oxide film, a metal oxide film with higher crystallinity and higher density can be formed. On the other hand, as the substrate temperature becomes lower, a metal oxide film with lower crystallinity and higher conductivity can be formed.

[0447] The substrate temperature when forming the metal oxide film 108f is preferably room temperature or higher and 250°C or lower, more preferably room temperature or higher and 200°C or lower, and further preferably room temperature or higher and 140°C or lower. For example, the substrate temperature is preferably room temperature or higher and 140°C or lower, thereby improving productivity. In addition, by setting the substrate temperature to room temperature or forming the metal oxide film 108f without heating the substrate, crystallinity can be reduced.

[0448] When the substrate temperature is high, the metal oxide film may have a polycrystalline structure. Therefore, it is preferable to adjust the substrate temperature so that the metal oxide film 108f does not have a polycrystalline structure. The substrate temperature may be adjusted according to the composition applied to the metal oxide film 108f.

[0449] When the ALD method is used, it is preferred to use a deposition method such as a thermal ALD method or a PEALD (Plasma Enhanced ALD). The thermal ALD method is preferred because it has extremely high coverage. In addition, the PEALD method is preferred because it not only has high coverage but also allows low-temperature deposition.

[0450] The metal oxide film can be formed by, for example, an ALD method using a precursor containing constituent metal elements and an oxidant.

[0451] For example, when forming In-Ga-Zn oxide, three precursors including a precursor containing indium, a precursor containing gallium, and a precursor containing zinc may be used. Alternatively, two precursors including a precursor containing indium and a precursor containing gallium and zinc may be used.

[0452] Examples of the precursor containing indium include triethylindium, tris(2,2,6,6-tetramethyl-3,5-heptanedione)indium, cyclopentadienylindium, indium(III) chloride, and (3-(dimethylamino)propyl)dimethylindium.

[0453] Examples of the precursor containing gallium include trimethylgallium, triethylgallium, gallium trichloride, tris(dimethylamide)gallium(III), gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedione)gallium, dimethyl gallium chloride, and diethyl gallium chloride.

[0454] Examples of the precursor containing zinc include dimethyl zinc, diethyl zinc, bis(2,2,6,6-tetramethyl-3,5-heptanedione) zinc, and zinc chloride.

[0455] Examples of the oxidizing agent include ozone, oxygen, and water.

[0456] As a method of controlling the composition of the obtained film, one or more of the type of source gas, the flow rate ratio of the source gas, the time for the source gas to flow, and the order in which the source gas flows can be adjusted. By adjusting these, the composition of the metal oxide film 108f can be controlled. In addition, by adjusting these, a film with a continuously changing composition can be formed. The composition of the metal oxide film 108f can also be continuously changed.

[0457] Before depositing the metal oxide film 108f, it is preferred to perform at least one of a treatment for removing water, hydrogen, organic matter, etc. adsorbed on the surface of the insulating layer 110 and a treatment for supplying oxygen to the insulating layer 110. For example, a heat treatment may be performed at a temperature of 70° C. to 200° C. in a reduced pressure atmosphere. Alternatively, a plasma treatment may be performed in an oxygen-containing atmosphere. Alternatively, a plasma treatment may be performed by performing a treatment containing nitrous oxide (N 2 O) or the like, oxygen can also be supplied to the insulating layer 110. When the plasma treatment containing nitrous oxide gas is performed, organic matter on the surface of the insulating layer 110 can be appropriately removed and oxygen can be supplied to the insulating layer 110. Preferably, after such treatment, the metal oxide film 108f is continuously deposited in a manner that the surface of the insulating layer 110 is not exposed to the atmosphere.

[0458] Note that in the case where the layer 108 has a stacked-layer structure, it is preferable that, after depositing a metal oxide film of a lower layer, an upper metal oxide film is continuously deposited without exposing the surface thereof to the atmosphere.

[0459] When the layer 108 has a stacked structure, all layers constituting the layer 108 may be formed using the same deposition method (e.g., sputtering or ALD), or each layer may be formed using a different deposition method. For example, the first metal oxide layer may be deposited using sputtering and the second metal oxide layer may be deposited using ALD.

[0460] Next, the metal oxide film 108f is processed into an island shape to form a layer 108 ( Fig.35D ).

[0461] When forming the layer 108, a wet etching method can be used as appropriate. At this time, a portion of the insulating layer 110 in a region that does not overlap with the layer 108 may be etched and reduced in thickness. Note that in etching the metal oxide film 108f, it is preferable to use a material with a high selectivity as the insulating layer 110d because this can suppress the thickness of the insulating layer 110d from being reduced.

[0462] It is preferable to perform heat treatment after the metal oxide film 108f is deposited or after the metal oxide film 108f is processed into the layer 108. By heat treatment, hydrogen and water contained in the metal oxide film 108f or the layer 108 or adsorbed on the surface of the metal oxide film 108f or the layer 108 can be removed. In addition, by heat treatment, the film quality of the metal oxide film 108f or the layer 108 is sometimes improved (for example, defects are reduced or crystallinity is improved, etc.).

[0463] By heat treatment, impurities can be supplied from the insulating layer 110d to the metal oxide film 108f or the region in contact with the insulating layer 110d in the layer 108. Thus, the region 108M is formed. In addition, oxygen can also be supplied from the insulating layer 110b to the metal oxide film 108f or the layer 108 by heat treatment. Thus, oxygen vacancies (V O ). In this case, it is more preferable to perform a heat treatment before processing into the layer 108. The heat treatment can be referred to the above description, so the detailed description is omitted. In addition, without being limited to this heat treatment, in the heating process after forming the metal oxide film 108f (for example, the process of forming the insulating layer 106), the supply of impurities to the region 108M and the supply of oxygen to the channel formation region can also be performed.

[0464] Note that this heat treatment is not necessarily required. It is also possible not to perform heat treatment in this process and use the heat treatment performed in a later process as the heat treatment in this process. Sometimes, a process at a high temperature in a later process (for example, a deposition process) can be used as the heat treatment in this process.

[0465] Next, the insulating layer 106 is formed as the cap layer 108 and the insulating layer 110. When the insulating layer 106 is formed, for example, a PECVD method or an ALD method can be used as appropriate.

[0466] When a metal oxide is used for the layer 108, the insulating layer 106 is preferably used as a barrier film for suppressing diffusion of oxygen. By providing the insulating layer 106 with a function of suppressing diffusion of oxygen, it is possible to suppress diffusion of oxygen from the upper side of the insulating layer 106 to the conductive layer 104 and oxidation of the conductive layer 104. As a result, a transistor having good electrical characteristics and high reliability can be achieved.

[0467] Note that in this specification, etc., a barrier film refers to a film having barrier properties. For example, an insulating layer having barrier properties may be referred to as a barrier insulating layer. In this specification, etc., barrier properties refer to one or both of a function of suppressing diffusion of a target substance (also referred to as low permeability) and a function of capturing or fixing (also referred to as gettering) a target substance.

[0468] By increasing the temperature at which the insulating layer 106 serving as a gate insulating layer is formed, an insulating layer with fewer defects can be formed. However, when the temperature at which the insulating layer 106 is formed is high, oxygen is separated from the layer 108, and oxygen vacancies in the layer 108 and V O H increases. The substrate temperature when forming the insulating layer 106 is preferably 180° C. to 450° C., more preferably 200° C. to 450° C., more preferably 250° C. to 450° C., more preferably 300° C. to 450° C., more preferably 300° C. to 400° C. By setting the substrate temperature when forming the insulating layer 106 within the above range, it is possible to reduce defects in the insulating layer 106 while suppressing the separation of oxygen from the layer 108. Therefore, a transistor having good electrical characteristics and high reliability can be realized.

[0469] The surface of the layer 108 may be subjected to plasma treatment before the insulating layer 106 is formed. By the plasma treatment, impurities such as water adsorbed on the surface of the layer 108 can be reduced. Therefore, impurities in the interface between the layer 108 and the insulating layer 106 can be reduced, so that a transistor with high reliability can be realized. In particular, it is preferable to perform plasma treatment when the surface of the layer 108 is exposed to the atmosphere between the formation of the layer 108 and the formation of the insulating layer 106. The plasma treatment can be performed, for example, in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like. The plasma treatment and the deposition of the insulating layer 106 are preferably performed continuously without being exposed to the atmosphere.

[0470] Next, a conductive layer 104 is formed on the insulating layer 106 ( Figure 1B and Figure 1C ). When forming the conductive film to be the conductive layer 104, for example, a sputtering method, a thermal CVD method (including an MOCVD method), or an ALD method can be appropriately used.

[0471] Through the above steps, the semiconductor device according to one embodiment of the present invention can be manufactured.

[0472] This embodiment mode can be combined with other embodiment modes as appropriate.

[0473] (Implementation method 3) In this embodiment, refer to Fig.36 A display device according to one embodiment of the present invention is described below through FIG. 45 .

[0474] The display device of this embodiment mode may be a high-resolution display device or a large display device. Therefore, for example, the display device of this embodiment mode may be used as a display portion of the following devices: electronic devices with large screens such as television devices, desktop or notebook computers, displays for computers, etc., digital signage, large-scale game machines such as pinball machines, etc.; digital cameras; digital video cameras; digital photo frames; mobile phones; portable game machines; portable information terminals; and sound reproduction devices.

[0475] The display device of this embodiment can be a high-definition display device. Therefore, for example, the display device of this embodiment can be used as a display unit of information terminal devices (wearable devices) such as watch-type and bracelet-type devices, and a display unit of wearable devices that can be worn on the head such as VR devices such as head-mounted displays (HMDs) and glasses-type AR devices.

[0476] A semiconductor device of one embodiment of the present invention can be used in a display device or a module including the display device. As a module including the display device, there can be cited a module in which the display device is equipped with a connector such as a flexible printed circuit (FPC) or TCP (Tape Carrier Package), a module in which an integrated circuit (IC) is installed by a COG (Chip On Glass) method or a COF (Chip On Film) method, etc.

[0477] The display device of this embodiment may also have a touch panel function. For example, various detection elements (also referred to as sensor elements) that can detect the approach or contact of a detection object such as a finger may be used as the display device.

[0478] Examples of the sensor type include an electrostatic capacitance type, a resistance film type, a surface acoustic wave type, an infrared type, an optical type, and a pressure-sensitive type.

[0479] As electrostatic capacitance, for example, there are surface electrostatic capacitance and projection electrostatic capacitance. In addition, as projection electrostatic capacitance, for example, there are self-capacitance and mutual capacitance. It is preferable to use mutual capacitance because it can perform multi-point sensing at the same time.

[0480] Examples of touch panels include out-cell, on-cell, and in-cell types. Note that an in-cell touch panel has a structure in which electrodes constituting a detection element are provided on one or both of a substrate supporting a display element and a counter substrate.

[0481] [Display device 50A] Fig.36 It is a perspective view of the display device 50A.

[0482] The display device 50A has a structure in which a substrate 152 and a substrate 151 are bonded together. Fig.36 In FIG. 1 , the substrate 152 is indicated by a dotted line.

[0483] The display device 50A includes a display portion 162 , a connection portion 140 , a circuit portion 164 , a conductive layer 165 , and the like. Fig.36 The example in which the display device 50A is mounted with the IC 173 and the FPC 172 is shown. Fig.36 The structure shown is called a display module including the display device 50A, IC and FPC.

[0484] The connection portion 140 is disposed outside the display portion 162. The connection portion 140 may be disposed along one side or multiple sides of the display portion 162. There may also be one or more connection portions 140. Fig.36 The example in which the connection part 140 is provided so as to surround the four sides of the display part is shown. In the connection part 140, the common electrode of the display element is electrically connected to the conductive layer, and a potential can be supplied to the common electrode.

[0485] The circuit unit 164 includes, for example, a scanning line driving circuit (also referred to as a gate driver). Alternatively, the circuit unit 164 may include both a scanning line driving circuit and a signal line driving circuit (also referred to as a source driver).

[0486] The conductive layer 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164. The signals and power are input to the conductive layer 165 from the outside through the FPC 172 or from the IC 173.

[0487] Fig.36 An example of providing IC 173 on substrate 151 by COG method or COF method is shown. As IC 173, for example, an IC including one or both of a scanning line driving circuit and a signal line driving circuit can be used. Note that the display device 50A and the display module do not necessarily have to be provided with an IC. Alternatively, the IC can be mounted on an FPC by COF method or the like.

[0488] The semiconductor device according to one embodiment of the present invention can be used for, for example, one or both of the display portion 162 and the circuit portion 164 of the display device 50A.

[0489] For example, when a semiconductor device of one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced to realize a high-definition display device. In addition, for example, when a semiconductor device of one embodiment of the present invention is used in a drive circuit of a display device (for example, one or both of a gate line drive circuit and a source line drive circuit), the area occupied by the drive circuit can be reduced to realize a display device with a narrow frame. In addition, a semiconductor device of one embodiment of the present invention has good electrical characteristics, and by using the semiconductor device in a display device, the reliability of the display device can be improved.

[0490] The display unit 162 is an image display region in the display device 50A, and includes a plurality of pixels 201 arranged periodically. Fig.36 An enlarged view of one pixel 201 is shown in FIG.

[0491] There is no particular limitation on the arrangement of pixels in the display device of this embodiment, and various methods can be used. Examples of pixel arrangements include stripe arrangement, S-stripe arrangement, matrix arrangement, Delta arrangement, Bayer arrangement, and Pentile arrangement.

[0492] Fig.36 The pixel 201 shown includes a sub-pixel 11R that emits red light, a sub-pixel 11G that emits green light, and a sub-pixel 11B that emits blue light.

[0493] Each of the sub-pixels 11R, 11G, and 11B includes a display element and a circuit for controlling driving of the display element.

[0494] Various elements can be used as display elements, for example, liquid crystal elements and light-emitting elements. In addition, MEMS (Micro Electro Mechanical Systems) elements of shutter mode or light interference mode, display elements using microcapsule mode, electrophoresis mode, electrowetting mode or electronic powder fluid (registered trademark) mode, etc. can also be used. In addition, QLED (Quantum-dot LED) using light source and color conversion technology using quantum dot materials can also be used.

[0495] Examples of display devices using a liquid crystal element include a transmissive liquid crystal display device, a reflective liquid crystal display device, and a semi-transmissive liquid crystal display device.

[0496] As modes that can be used in a display device using a liquid crystal element, for example, a vertical alignment (VA) mode, an FFS (Fringe Field Switching) mode, an IPS (In-Plane-Switching) mode, a TN (Twisted Nematic) mode, an ASM (Axially Symmetric aligned Micro-cell) mode, an OCB (Optically Compensated Birefringence) mode, an FLC (Ferroelectric Liquid Crystal) mode, an AFLC (Anti Ferroelectric Liquid Crystal) mode, an ECB (Electrically Controlled Birefringence) mode, and a guest-host mode can be cited. As a VA mode, for example, an MVA (Multi-Domain Vertical Alignment) mode, a PVA (Patterned Vertical Alignment) mode, and an ASV (Advanced Super View) mode can be cited.

[0497] As liquid crystal materials that can be used for liquid crystal elements, for example, thermotropic liquid crystals, low molecular liquid crystals, polymer liquid crystals, polymer dispersed liquid crystals (PDLC: Polymer Dispersed Liquid Crystal: polymer dispersed liquid crystals), polymer network liquid crystals (PNLC: Polymer Network Liquid Crystal), ferroelectric liquid crystals and antiferroelectric liquid crystals can be cited. These liquid crystal materials present cholesteric phases, smectic phases, cubic phases, chiral nematic phases, isotropic phases, blue phases, etc. depending on the conditions. In addition, as liquid crystal materials, any of positive liquid crystals and negative liquid crystals can be used, and can be selected according to the mode or design used.

[0498] As the light emitting element, for example, there can be mentioned self-luminous light emitting elements such as LED, OLED (Organic LED), semiconductor laser, etc. As the LED, for example, a small LED, a micro LED, etc. can be used.

[0499] Examples of the light-emitting substance contained in the light-emitting element include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (TADF materials), and inorganic compounds (quantum dot materials, etc.).

[0500] The light emitting element may emit light of infrared, red, green, blue, cyan, magenta, yellow or white, etc. In addition, when the light emitting element has a microcavity structure, the color purity can be further improved.

[0501] Of a pair of electrodes included in the light emitting element, one electrode is used as an anode and the other electrode is used as a cathode.

[0502] A display device according to one embodiment of the present invention may also adopt any of the following structures: a top emission type that emits light in a direction opposite to a substrate on which a light-emitting element is formed, a bottom emission type that emits light to one side of a substrate on which a light-emitting element is formed, or a dual emission type that emits light to both sides.

[0503] Fig.37A An example of a cross section of a portion of the region including the FPC 172 , a portion of the circuit portion 164 , a portion of the display portion 162 , a portion of the connection portion 140 , and a portion of the region including the end portion of the display device 50A is shown.

[0504] Fig.37A The display device 50A shown includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, 130B, etc. between substrates 151 and 152. The light-emitting element 130R is a display element included in the sub-pixel 11R that emits red light, the light-emitting element 130G is a display element included in the sub-pixel 11G that emits green light, and the light-emitting element 130B is a display element included in the sub-pixel 11B that emits blue light.

[0505] The display device 50A adopts an SBS structure. In the SBS structure, the material and structure of each light emitting element can be optimized separately, the degree of freedom in selecting materials and structures is increased, and it becomes easy to improve brightness and reliability.

[0506] The display device 50A adopts a top emission type. In the top emission type, transistors and the like can be arranged so as to overlap with the light emitting region of the light emitting element, so that the aperture ratio of the pixel can be further increased compared with the bottom emission type.

[0507] The transistors 205D, 205R, 205G, and 205B are all formed on the substrate 151. These transistors can be manufactured using the same material and the same process.

[0508] In this embodiment, an example of using OS transistors as transistors 205D, 205R, 205G, and 205B is shown. As transistors 205D, 205R, 205G, and 205B, transistors of one embodiment of the present invention can be used. That is, in the display device 50A, both the display unit 162 and the circuit unit 164 include transistors of one embodiment of the present invention. By using a transistor of one embodiment of the present invention in the display unit 162, the pixel size can be reduced and high definition can be achieved. In addition, by using a transistor of one embodiment of the present invention in the circuit unit 164, the area occupied by the circuit unit 164 can be reduced and a narrow frame can be achieved. For the transistor of one embodiment of the present invention, reference can be made to the description of the above embodiment.

[0509] Specifically, transistors 205D, 205R, 205G, and 205B all include a conductive layer 104 used as a gate, an insulating layer 106 used as a gate insulating layer, a layer 108 containing a metal oxide, and a conductive layer 112. The region in contact with the insulating layer 110d in the layer 108 has a region 108M (not shown), and the region 108M is used as one of the source and the drain. The conductive layer 112 is used as the other of the source and the drain. Here, a plurality of layers obtained by processing the same conductive film are given the same hatching. The insulating layer 110 is located between the conductive layer 112 and the layer 108. The insulating layer 106 is located between the conductive layer 104 and the layer 108.

[0510] Note that the transistor included in the display device of this embodiment is not limited to the transistor of one embodiment of the present invention. For example, the transistor of one embodiment of the present invention and a transistor of another structure may be combined.

[0511] The display device of this embodiment may include, for example, any one or more of a planar transistor, a staggered transistor, and an inversely staggered transistor. The transistor included in the display device of this embodiment has any one of a top-gate structure and a bottom-gate structure. Alternatively, gates may be provided above and below the layer forming the channel.

[0512] The display device of this embodiment may include a Si transistor.

[0513] When the luminous brightness of the light-emitting element included in the pixel circuit is increased, the amount of current flowing through the light-emitting element needs to be increased. To this end, it is necessary to increase the source-drain voltage of the driving transistor included in the pixel circuit. Because the source-drain withstand voltage of the OS transistor is higher than that of the Si transistor, a high voltage can be applied to the source-drain of the OS transistor. Thus, by using the OS transistor as the driving transistor included in the pixel circuit, the amount of current flowing through the light-emitting element can be increased to improve the luminous brightness of the light-emitting element.

[0514] When the transistor operates in the saturation region, the OS transistor can make the change in the source-drain current for the change in the gate-source voltage smaller than the Si transistor. Therefore, by using the OS transistor as the driving transistor included in the pixel circuit, the current flowing through the source-drain can be determined in detail according to the change in the gate-source voltage, so the amount of current flowing through the light-emitting element can be controlled. As a result, the number of grayscales of the pixel circuit can be increased.

[0515] Regarding the saturation of the current flowing when the transistor operates in the saturation region, compared with the Si transistor, the OS transistor can make a stable current (saturation current) flow even if the source-drain voltage is gradually increased. Therefore, by using the OS transistor as a driving transistor, even if, for example, the current-voltage characteristics of the light-emitting element are uneven, a stable current can flow through the light-emitting element. That is, when the OS transistor operates in the saturation region, even if the source-drain voltage is changed, the source-drain current is almost unchanged, so the light-emitting brightness of the light-emitting element can be stabilized.

[0516] The transistor included in the circuit portion 164 and the transistor included in the display portion 162 may have the same structure or different structures. The plurality of transistors included in the circuit portion 164 may have the same structure or two or more different structures. Similarly, the plurality of transistors included in the display portion 162 may have the same structure or two or more different structures.

[0517] All transistors included in the display portion 162 may be OS transistors, all transistors included in the display portion 162 may be Si transistors, some transistors included in the display portion 162 may be OS transistors and the remaining transistors may be Si transistors.

[0518] For example, by using both LTPS transistors and OS transistors in the display portion 162, a display device with low power consumption and high driving capability can be realized. In addition, a structure combining LTPS transistors and OS transistors is sometimes referred to as LTPO. As a more preferred example, a structure in which an OS transistor is used as a transistor used as a switch for controlling conduction / non-conduction between wirings and an LTPS transistor is used as a transistor for controlling current can be cited.

[0519] For example, one of the transistors included in the display unit 162 is used as a transistor for controlling the current flowing through the light-emitting element and may also be referred to as a driving transistor. One of the source and drain of the driving transistor is electrically connected to the pixel electrode of the light-emitting element. An LTPS transistor is preferably used as the driving transistor. Thus, the current flowing through the light-emitting element in the pixel circuit can be increased.

[0520] On the other hand, one of the other transistors included in the display unit 162 is used as a switch for controlling the selection and non-selection of pixels, and may also be referred to as a selection transistor. The gate of the selection transistor is electrically connected to the gate line, and one of the source and the drain is electrically connected to the source line (signal line). The selection transistor is preferably an OS transistor. Therefore, even if the frame rate is significantly reduced (for example, below 1fps), the grayscale of the pixel can be maintained, thereby reducing power consumption by stopping the driver when displaying a static image.

[0521] An insulating layer 218 is provided to cover the transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided over the insulating layer 218 .

[0522] The insulating layer 218 is preferably used as a protective layer of the transistor. The insulating layer 218 is preferably made of a material that does not easily diffuse impurities such as water and hydrogen. Thus, the insulating layer 218 can be used as a barrier film. By adopting this structure, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, thereby improving the reliability of the display device.

[0523] The insulating layer 218 preferably includes one or more inorganic insulating films. Examples of materials that can be used for the inorganic insulating film include oxides, nitrides, oxynitrides, and oxynitrides. Specific examples of materials that can be used for the inorganic insulating film are as described above.

[0524] The insulating layer 235 is preferably used as a planarization layer, and an organic insulating film is suitable. As materials that can be used for the organic insulating film, for example, acrylic resins, polyimide resins, epoxy resins, polyamide resins, polyimide amide resins, siloxane resins, benzocyclobutene resins, phenolic resins, and precursors of these resins can be used. In addition, the insulating layer 235 can also adopt a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 is preferably used as an etching protection layer. As a result, when processing the pixel electrodes 111R, 111G, 111B, etc., it is possible to suppress the formation of recesses in the insulating layer 235. Alternatively, recesses can be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc.

[0525] The light emitting elements 130R, 130G, and 130B are provided on the insulating layer 235 .

[0526] The light emitting element 130R includes a pixel electrode 111R on the insulating layer 235 , an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. Fig.37A The light emitting element 130R shown emits red light (R). The EL layer 113R includes a light emitting layer that emits red light.

[0527] The light emitting element 130G includes a pixel electrode 111G on the insulating layer 235 , an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. Fig.37A The light emitting element 130G shown emits green light (G). The EL layer 113G includes a light emitting layer that emits green light.

[0528] The light-emitting element 130B includes a pixel electrode 111B on the insulating layer 235 , an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. Fig.37A The light emitting element 130B shown emits blue light (B). The EL layer 113B includes a light emitting layer that emits blue light.

[0529] Note that Fig.37A EL layers 113R, 113G, and 113B are shown as having the same thickness, but the present invention is not limited thereto. The thickness of each film of EL layers 113R, 113G, and 113B may be different. For example, it is preferable to set the film thickness corresponding to the optical path length of light emitted by EL layers 113R, 113G, and 113B. Thus, a microcavity structure can be realized to improve the color purity of light emitted from each light-emitting element.

[0530] The pixel electrode 111R is electrically connected to the region 108M of the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235. Similarly, the pixel electrode 111G is electrically connected to the region 108M of the transistor 205G, and the pixel electrode 111B is electrically connected to the region 108M of the transistor 205B.

[0531] Each end of the pixel electrodes 111R, 111G, and 111B is covered by an insulating layer 237. The insulating layer 237 is used as a partition wall. The insulating layer 237 can be set to a single-layer structure or a stacked-layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the insulating layer 237 can use a material that can be used for the insulating layer 218 and a material that can be used for the insulating layer 235. The insulating layer 237 can electrically insulate the pixel electrode from the common electrode. In addition, the insulating layer 237 can electrically insulate the light-emitting elements adjacent to each other.

[0532] The insulating layer 237 is provided at least in the display portion 162. The insulating layer 237 may be provided not only in the display portion 162 but also in the connection portion 140 and the circuit portion 164. In addition, the insulating layer 237 may be provided so as to extend to the end portion of the display device 50A.

[0533] The common electrode 115 is a continuous film shared by the light-emitting elements 130R, 130G, and 130B. The common electrode 115 shared by the plurality of light-emitting elements is electrically connected to the conductive layer 123 provided in the connection portion 140. The conductive layer 123 is preferably formed using the same material and the same process as the pixel electrodes 111R, 111G, and 111B.

[0534] In the display device of one embodiment of the present invention, a conductive film that transmits visible light is used as the electrode on the light extraction side of the pixel electrode and the common electrode. In addition, a conductive film that reflects visible light is preferably used as the electrode on the side that does not extract light.

[0535] The electrode on the side that does not extract light may also be a conductive film that transmits visible light. In this case, it is preferable to configure the electrode between the reflective layer and the EL layer. In other words, the light emitted by the EL layer can also be reflected by the reflective layer and extracted from the display device.

[0536] As the material for forming a pair of electrodes of the light-emitting element, metals, alloys, conductive compounds and mixtures thereof can be appropriately used. As the material, specifically, metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium and neodymium and alloys appropriately combined therewith can be cited. In addition, as the material, indium tin oxide (also referred to as In-Sn oxide, ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide) and In-W-Zn oxide can be cited. In addition, as the material, aluminum alloys (aluminum alloys) such as aluminum, nickel and lanthanum alloys (Al-Ni-La), silver and magnesium alloys and silver, palladium and copper alloys (also referred to as Ag-Pd-Cu, APC) and other silver-containing alloys can be cited. In addition, examples of the material include elements belonging to Group 1 or Group 2 of the periodic table that are not listed above (e.g., lithium, cesium, calcium, and strontium), rare earth metals such as europium and ytterbium, alloys of appropriately combined elements, and graphene.

[0537] The light-emitting element preferably adopts a microcavity resonator (microcavity) structure. Therefore, one of a pair of electrodes included in the light-emitting element preferably includes an electrode having visible light transmittance and reflectivity (semi-transmissive-semi-reflective electrode), and the other preferably includes an electrode having visible light reflectivity (reflective electrode). When the light-emitting element has a microcavity structure, the light emitted from the light-emitting layer can be resonated between the two electrodes, and the light emitted from the light-emitting element can be enhanced.

[0538] The light transmittance of the transparent electrode is 40% or more. For example, an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more is preferably used as a transparent electrode of a light-emitting element. The reflectivity of the semi-transmissive-semi-reflective electrode to visible light is 10% or more and 95% or less, preferably 30% or more and 80% or less. The reflectivity of the reflective electrode to visible light is 40% or more and 100% or less, preferably 70% or more and 100% or less. In addition, the resistivity of these electrodes is preferably 1×10 -2 Ωcm or less.

[0539] The EL layers 113R, 113G, and 113B are all arranged in an island shape. Fig.37A In the embodiment, the ends of the adjacent EL layers 113R overlap with the ends of the EL layers 113G, the ends of the adjacent EL layers 113G overlap with the ends of the EL layers 113B, and the ends of the adjacent EL layers 113R overlap with the ends of the EL layers 113B. Fig.37AAs shown in FIG. 1 , when an island-shaped EL layer is deposited using a high-definition metal mask, the ends of adjacent EL layers may overlap each other, but the present invention is not limited to this. That is, adjacent EL layers may not overlap each other but may be separated. In addition, in a display device, there may be both overlapping portions of adjacent EL layers and separated portions of adjacent EL layers not overlapping each other.

[0540] Each of the EL layers 113R, 113G, and 113B includes at least a light-emitting layer. The light-emitting layer contains one or more light-emitting substances. As the light-emitting substance, a substance that emits light in a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used. In addition, as the light-emitting substance, a substance that emits near-infrared light can also be used.

[0541] Examples of the light-emitting substance include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0542] The light-emitting layer may contain one or more organic compounds (host material, auxiliary material, etc.) in addition to the light-emitting substance (guest material). As one or more organic compounds, one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport properties (electron transport material) may be used. In addition, as one or more organic compounds, a bipolar substance (a substance with high electron transport properties and hole transport properties) or a TADF material may also be used.

[0543] For example, the light-emitting layer preferably includes a combination of a phosphorescent material, a hole transport material that easily forms an exciplex, and an electron transport material. By adopting such a structure, light emission by ExTET (Exciplex-Triplet Energy Transfer) utilizing energy transfer from the exciplex to the luminescent substance (phosphorescent material) can be efficiently obtained. In addition, by selecting a combination of light whose wavelength overlaps with the absorption band on the lowest energy side of the luminescent substance as the exciplex, energy transfer can be smoothed, thereby efficiently obtaining light emission. By adopting the above structure, high efficiency, low voltage drive, and long life of the light-emitting element can be achieved at the same time.

[0544] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole injection properties (hole injection layer), a layer containing a hole transport material (hole transport layer), a layer containing a substance with high electron blocking properties (electron blocking layer), a layer containing a substance with high electron injection properties (electron injection layer), a layer containing an electron transport material (electron transport layer), and a layer containing a substance with high hole blocking properties (hole blocking layer). In addition, the EL layer may also contain one or both of a bipolar substance and a TADF material.

[0545] The light emitting element may use a low molecular weight compound or a high molecular weight compound, and may further contain an inorganic compound. The layers constituting the light emitting element may be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, or coating.

[0546] The light-emitting element can adopt a single structure (a structure with only one light-emitting unit) or a series structure (a structure including multiple light-emitting units). The light-emitting unit includes at least one light-emitting layer. The series structure has a structure in which multiple light-emitting units are connected in series through a charge generation layer. The charge generation layer has the function of injecting electrons into one of the two light-emitting units and injecting holes into the other when a voltage is applied between a pair of electrodes. By adopting a series structure, a light-emitting element that can emit light with high brightness can be realized. In addition, the series structure can improve reliability because it can reduce the current required to obtain the same brightness compared to the single structure. In addition, the series structure can also be called a stacked structure.

[0547] exist Fig.37A When a tandem-structured light-emitting element is used, it is preferred that the EL layer 113R include a plurality of light-emitting units emitting red light, the EL layer 113G include a plurality of light-emitting units emitting green light, and the EL layer 113B include a plurality of light-emitting units emitting blue light.

[0548] A protective layer 131 is provided on the light emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded by an adhesive layer 142. The substrate 152 is provided with a light shielding layer 117. As a seal for the light emitting element, for example, a solid sealing structure or a hollow sealing structure can be adopted. Fig.37A In the embodiment, the space between the substrate 152 and the substrate 151 is filled with the adhesive layer 142, that is, a solid sealing structure is adopted. Alternatively, a hollow sealing structure in which the space is filled with an inert gas (nitrogen or argon, etc.) can also be adopted. In this case, the adhesive layer 142 can also be arranged in a manner that does not overlap with the light-emitting element. In addition, a resin different from the adhesive layer 142 arranged in a frame shape can also be used to fill the space.

[0549] The protective layer 131 is provided at least in the display portion 162, and is preferably provided in a manner covering the entire display portion 162. The protective layer 131 is preferably provided in a manner covering the connection portion 140 and the circuit portion 164 in addition to the display portion 162. In addition, the protective layer 131 is preferably provided in a manner extending to the end of the display device 50A. On the other hand, in order to electrically connect the FPC 172 and the conductive layer 166, there is a portion in the connection portion 197 where the protective layer 131 is not provided.

[0550] By providing the protective layer 131 on the light emitting elements 130R, 130G, and 130B, the reliability of the light emitting elements can be improved.

[0551] The protective layer 131 may have a single layer structure or a stacked layer structure of two or more layers. There is no limitation on the conductivity of the protective layer 131. As the protective layer 131, at least one of an insulating film, a semiconductor film, and a conductive film may be used.

[0552] When the protective layer 131 includes an inorganic film, degradation of the light emitting element can be suppressed, such as preventing oxidation of the common electrode 115 and suppressing impurities (moisture, oxygen, etc.) from entering the light emitting element, thereby improving the reliability of the display device.

[0553] As the protective layer 131, for example, an inorganic insulating film including one or more of oxide, nitride, oxynitride, and oxynitride can be used. Specific examples of materials that can be used for the inorganic insulating film are as described above. In particular, the protective layer 131 preferably includes a nitride or an oxynitride, and more preferably includes a nitride.

[0554] An inorganic film including ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or IGZO may be used as the protective layer 131. The inorganic film preferably has a high resistance, and more specifically, the inorganic film preferably has a resistance higher than that of the common electrode 115. The inorganic film may further include nitrogen.

[0555] When light emitted from the light emitting element is extracted through the protective layer 131, the protective layer 131 preferably has high visible light transmittance. For example, ITO, IGZO, and alumina are inorganic materials with high visible light transmittance and are therefore preferred.

[0556] As the protective layer 131, for example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used. By using this stacked structure, impurities (water, oxygen, etc.) can be suppressed from entering the EL layer.

[0557] Furthermore, the protective layer 131 may include an organic film. For example, the protective layer 131 may include both an organic film and an inorganic film. Examples of the organic film that can be used for the protective layer 131 include an organic insulating film that can be used for the insulating layer 235 .

[0558] A connection portion 197 is provided in a region where the substrate 151 and the substrate 152 do not overlap. In the connection portion 197, the conductive layer 165 is electrically connected to the FPC 172 via the conductive layer 166 and the connection layer 242. FIG. 37 shows an example in which the conductive layer 165 has the same structure as the region 108M of the layer 108. For example, a film that will become the layer 108 and the conductive layer 165 is formed and processed. The region 108M and the conductive layer 165 are formed in a region in the layer 108 that contacts the uppermost layer (here, the insulating layer 110d) of the insulating layer 110. An example in which the conductive layer 166 has a single-layer structure in which the conductive layer is obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B is shown. The conductive layer 166 is exposed on the top surface of the connection portion 197. Therefore, the connection portion 197 can be electrically connected to the FPC 172 via the connection layer 242.

[0559] The display device 50A is a top emission type. Light emitted by the light emitting element is emitted to the substrate 152 side. The substrate 152 is preferably made of a material with high visible light transmittance. The pixel electrodes 111R, 111G, and 111B are made of a material that reflects visible light, and the counter electrode (common electrode 115) is made of a material that transmits visible light.

[0560] A light shielding layer 117 is preferably provided on a surface of the substrate 152 on the substrate 151 side. The light shielding layer 117 can be provided between adjacent light emitting elements, in the connection portion 140, the circuit portion 164, and the like.

[0561] Alternatively, a coloring layer such as a color filter may be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. When the color filter is provided so as to overlap with the light-emitting element, the color purity of light emitted from the pixel can be improved.

[0562] The coloring layer is a colored layer that selectively transmits light in a specific wavelength region and absorbs light in other wavelength regions. For example, a red (R) color filter that transmits light in a red wavelength region, a green (G) color filter that transmits light in a green wavelength region, a blue (B) color filter that transmits light in a blue wavelength region, etc. can be used. Each coloring layer can use one or more of a metal material, a resin material, a pigment, and a dye. The coloring layer is formed at a desired position using a printing method, an inkjet method, an etching method using a photolithography method, etc.

[0563] In addition, various optical components can be arranged on the outside of the substrate 152 (the surface on the opposite side of the substrate 151). As optical components, for example, polarizers, phase difference plates, light diffusion layers (diffusion films, etc.), anti-reflection layers, and light-focusing films (condensing films) can be cited. In addition, surface protective layers such as antistatic films that inhibit the adhesion of dust, water-repellent films that are not easily soiled, hard coatings that inhibit damage during use, and impact-absorbing layers can also be arranged on the outside of the substrate 152. For example, by providing a glass layer or a silicon dioxide layer (SiO x Layer), which can prevent the surface from being dirty or damaged, is preferred. In addition, DLC (diamond-like carbon), aluminum oxide (AlO x ), polyester materials or polycarbonate materials, etc. In addition, as the surface protection layer, it is preferred to use a material with high transmittance to visible light. In addition, the surface protection layer is preferably made of a material with high hardness.

[0564] Glass, quartz, ceramic, sapphire, resin, metal, alloy, semiconductor, etc. can be used for the substrate 151 and the substrate 152, respectively. A material that transmits the light is used for the substrate on the side where the light is taken out from the light-emitting element. By using a flexible material for the substrate 151 and the substrate 152, the flexibility of the display device can be improved, thereby realizing a flexible display. A polarizing plate can also be used as at least one of the substrate 151 and the substrate 152.

[0565] As the substrate 151 and the substrate 152, the following materials can be used respectively: polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethyl methacrylate resins, polycarbonate (PC) resins, polyether sulfone (PES) resins, polyamide resins (nylon, aramid, etc.), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamide-imide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE) resins, ABS resins, and cellulose nanofibers, etc. In addition, glass having a thickness that allows flexibility can be used as at least one of the substrates 151 and 152.

[0566] When a circular polarizer is overlapped on a display device, it is preferred to use a substrate with high optical isotropy as the substrate included in the display device. The substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). As films with high optical isotropy, triacetyl cellulose (TAC, also called triacetyl cellulose) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic resin films can be cited.

[0567] As the adhesive layer 142, various curing adhesives such as light curing adhesives such as ultraviolet curing adhesives, reaction curing adhesives, heat curing adhesives, anaerobic adhesives, etc. can be used. As these adhesives, epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene-vinyl acetate) resins, etc. can be cited. In particular, it is preferred to use materials with low moisture permeability such as epoxy resins. In addition, two-liquid mixed resins can also be used. In addition, adhesive sheets, etc. can also be used.

[0568] As the connection layer 242 , an anisotropic conductive film (ACF: Anisotropic Conductive Film), anisotropic conductive paste (ACP: Anisotropic Conductive Paste), or the like can be used.

[0569] [Display device 50B] Fig.37B An example of a cross section of the display portion 162 of the display device 50B is shown. The display device 50B differs from the display device 50A mainly in that a light-emitting element including an EL layer 113 shared by the light-emitting elements and a coloring layer (color filter, etc.) are used in sub-pixels of respective colors. Fig.37B The structure shown can be combined with Fig.37A The region shown includes the FPC 172, the circuit portion 164, the stacked structure from the substrate 151 to the insulating layer 235 of the display portion 162, the connection portion 140, and the structure of the end portion. Note that in the description of the display device described later, the description of the same parts as the display device described previously may be omitted.

[0570] Fig.37B The display device 50B shown includes light emitting elements 130R, 130G, and 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, a coloring layer 132B that transmits blue light, and the like.

[0571] The light emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130R is extracted as red light to the outside of the display device 50B through the coloring layer 132R.

[0572] The light emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130G is extracted as green light to the outside of the display device 50B through the coloring layer 132G.

[0573] The light emitting element 130B includes a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130B is extracted as blue light to the outside of the display device 50B through the coloring layer 132B.

[0574] The light emitting elements 130R, 130G, and 130B share the EL layer 113 and the common electrode 115. Compared with a structure in which each sub-pixel of each color is provided with a different EL layer, a structure in which each sub-pixel of each color shares the EL layer 113 can reduce the number of manufacturing steps.

[0575] For example, Fig.37B The light emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0576] The white light-emitting element preferably includes two or more light-emitting layers. In the case of using two light-emitting layers to obtain white light, the light-emitting layers can be selected in such a way that the light-emitting colors of the two light-emitting layers are in a complementary color relationship. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer in a complementary color relationship, a structure in which the light-emitting element as a whole emits white light can be obtained. In addition, in the case of using three or more light-emitting layers to obtain white light, the light-emitting colors of the three or more light-emitting layers are combined to obtain a structure in which the light-emitting element as a whole emits white light.

[0577] The EL layer 113 preferably includes, for example, a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light having a longer wavelength than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0578] The light-emitting element emitting white light preferably adopts a series structure. Specifically, it can be: a two-stage series structure including a light-emitting unit emitting yellow light and a light-emitting unit emitting blue light; a two-stage series structure including a light-emitting unit emitting red light and green light and a light-emitting unit emitting blue light; a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light, and a light-emitting unit emitting blue light in sequence; or a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light and red light, and a light-emitting unit emitting blue light in sequence, etc. For example, as the number of layers and color sequence of the light-emitting unit, there can be cited a two-stage structure in which B and Y are stacked from the anode side, a two-stage structure in which B and the light-emitting unit X are stacked, a three-stage structure in which B, Y and B are stacked, and a three-stage structure in which B, X and B are stacked. As the number of layers and color sequence of the light-emitting layer in the light-emitting unit X, there can be adopted a two-stage structure in which R and Y are stacked from the anode side, a two-stage structure in which R and G are stacked, a two-stage structure in which G and R are stacked, a three-stage structure in which G, R and G are stacked, or a three-stage structure in which R, G and R are stacked. In addition, another layer may be provided between two light-emitting layers.

[0579] In addition, by adopting a microcavity structure, a light-emitting element having a structure that emits white light may emit light while strengthening a specific color such as red, green, or blue.

[0580] Or, for example Fig.37B The light-emitting elements 130R, 130G, and 130B shown emit blue light. In this case, the EL layer 113 includes one or more light-emitting layers that emit blue light. With respect to the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. In addition, with respect to the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, by providing a color conversion layer between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength and extracted as red light or green light. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer on the light-emitting element 130R and the substrate 152, and to provide a coloring layer 132G between the color conversion layer on the light-emitting element 130G and the substrate 152. A portion of the light emitted by the light-emitting element is sometimes transmitted without being converted by the color conversion layer. By extracting the light that has passed through the color conversion layer through the coloring layer, the coloring layer can absorb light other than the desired color light, thereby improving the color purity of the light presented by the sub-pixel.

[0581] [Display device 50C] Fig.38 The main difference between the illustrated display device 50C and the display device 50B is that the former is a bottom emission type display device.

[0582] Light emitted by the light emitting element is emitted toward the substrate 151. A material having high visible light transmittance is preferably used for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material used for the substrate 152.

[0583] A light shielding layer 117 is preferably formed between the substrate 151 and the transistor. Fig.38 The following example is shown: a light shielding layer 117 is provided on a substrate 151, an insulating layer 153 is provided on the light shielding layer 117, and a transistor 205D, a transistor 205R (not shown), a transistor 205G, and a transistor 205B are provided on the insulating layer 153. In addition, a coloring layer 132R, a coloring layer 132G, and a coloring layer 132B are provided on an insulating layer 218, and an insulating layer 235 is provided on the coloring layers 132R, the coloring layer 132G, and the coloring layer 132B.

[0584] The light emitting element 130R overlapping the colored layer 132R includes a pixel electrode 111R, an EL layer 113 , and a common electrode 115 .

[0585] The light emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113 , and a common electrode 115 .

[0586] The light emitting element 130B overlapping the colored layer 132B includes a pixel electrode 111B, an EL layer 113 , and a common electrode 115 .

[0587] The pixel electrodes 111R, 111G, and 111B are each made of a material having high visible light transmittance. The common electrode 115 is preferably made of a material that reflects visible light. Since a metal with low resistance or the like can be used for the common electrode 115 in a bottom emission display device, a voltage drop caused by the resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.

[0588] A transistor according to one embodiment of the present invention can be miniaturized and have a reduced occupied area, so that the aperture ratio of a pixel can be increased or the size of a pixel can be reduced in a bottom emission structure display device.

[0589] [Display device 50D] Fig.39A The main difference between the display device 50D shown and the display device 50A is that the former includes a light receiving element 130S.

[0590] The display device 50D includes a light-emitting element and a light-receiving element in a pixel. In the display device 50D, it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, the organic photodiode can be installed in the display device using the organic EL element.

[0591] In the display device 50D in which pixels include a light-emitting element and a light-receiving element, the pixels have a light-receiving function, so the display device can detect the contact or approach of an object while displaying an image. Therefore, the display unit 162 has one or both of a camera function and a sensing function in addition to an image display function. For example, instead of displaying an image in all sub-pixels included in the display device 50D, a part of the sub-pixels can be used as a light source to emit light, another part of the sub-pixels can be used for light detection, and the remaining sub-pixels can be used to display an image.

[0592] Therefore, it is not necessary to separately provide a light receiving unit and a light source with the display device 50D, and the number of components of the electronic device can be reduced. For example, it is not necessary to separately provide a biometric device installed in the electronic device or an electrostatic capacitive touch panel for scrolling, etc. Therefore, by using the display device 50D, an electronic device with reduced manufacturing cost can be provided.

[0593] When the light receiving element is used for the image sensor, the display device 50D can capture images using the light receiving element. For example, the image sensor can be used to capture images for personal identification using fingerprints, palm prints, irises, vein shapes (including vein shapes, artery shapes) or faces.

[0594] The light receiving element can be used for a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a floating sensor, a floating touch sensor, a non-touch sensor), etc. A touch sensor can detect an object when the object (a finger, a hand, a pen, etc.) directly contacts the display device. In addition, a non-contact sensor can detect the object even if the object does not contact the display device.

[0595] The light emitting element 130S includes a pixel electrode 111S on the insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Lin is incident on the functional layer 113S from the outside of the display device 50D.

[0596] The pixel electrode 111S is electrically connected to a region 108M included in the layer 108 of the transistor 205S through an opening provided in the insulating layer 106 , the insulating layer 218 , and the insulating layer 235 .

[0597] The end portion of the pixel electrode 111S is covered with the insulating layer 237 .

[0598] The common electrode 115 is a continuous film shared by the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B. The common electrode 115 shared by the light emitting element and the light receiving element is electrically connected to the conductive layer 123 provided in the connection portion 140 .

[0599] The functional layer 113S includes at least an active layer (also referred to as a photoelectric conversion layer). The active layer includes a semiconductor. As the semiconductor, inorganic semiconductors such as silicon and organic semiconductors including organic compounds can be cited. In this embodiment, an example of using an organic semiconductor as a semiconductor contained in the active layer is shown. By using an organic semiconductor, the light-emitting layer and the active layer can be formed by the same method (e.g., vacuum evaporation method), and the manufacturing equipment can be used together, so it is preferred.

[0600] The functional layer 113S may also include a layer containing a substance with high hole transport properties, a substance with high electron transport properties, or a bipolar substance as a layer other than the active layer. In addition, without limitation thereto, a layer containing a substance with high hole injection properties, a hole blocking material, a substance with high electron injection properties, or an electron blocking material may also be included. For example, the above-mentioned materials that can be used for light-emitting elements can be used as the functional layer 113S.

[0601] The light receiving element may use a low molecular weight compound or a high molecular weight compound, and may also contain an inorganic compound. The layer constituting the light receiving element may be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, or coating.

[0602] Fig.39B and Fig.39C The display device 50D shown includes a layer 353 having a light receiving element, a circuit layer 355 , and a layer 357 having a light emitting element between a substrate 151 and a substrate 152 .

[0603] The layer 353 includes, for example, the light receiving element 130S. The layer 357 includes, for example, the light emitting elements 130R, 130G, and 130B.

[0604] The circuit layer 355 includes a circuit for driving the light-receiving element and a circuit for driving the light-emitting element. The circuit layer 355 includes, for example, transistors 205R, 205G, and 205B. In addition, one or more switches, transistors, capacitors, resistors, wirings, terminals, etc. may be provided in the circuit layer 355.

[0605] Fig.39B This is an example of using the light receiving element 130S as a touch sensor. Fig.39B As shown, when the finger 352 touching the display device 50D reflects the light emitted by the light emitting element in the layer 357, the light receiving element in the layer 353 detects the reflected light. Thus, it is possible to detect that the finger 352 has touched the display device 50D.

[0606] Fig.39C This is an example of using the light receiving element 130S as a non-contact sensor. Fig.39CAs shown, when a finger 352 approaching (ie, not touching) the display device 50D reflects light emitted by the light emitting element in the layer 357 , the light receiving element in the layer 353 detects the reflected light.

[0607] [Display device 50E Fig.40A The display device 50E shown is an example of a display device using an MML (Metal Mask Less) structure. That is, the display device 50E includes a light-emitting element that is not manufactured using a high-definition metal mask. Note that the stacked structure from the substrate 151 to the insulating layer 235 and the stacked structure from the protective layer 131 to the substrate 152 are the same as those of the display device 50A, so the description thereof is omitted.

[0608] exist Fig.40A In the embodiment, light emitting elements 130R, 130G, and 130B are disposed on the insulating layer 235 .

[0609] The light emitting element 130R includes a conductive layer 124R on the insulating layer 235 , a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114 . Fig.40A The light emitting element 130R shown emits red light (R). The layer 133R includes a light emitting layer that emits red light. In the light emitting element 130R, the layer 133R and the common layer 114 may be collectively referred to as an EL layer. One or both of the conductive layer 124R and the conductive layer 126R may be referred to as a pixel electrode.

[0610] The light emitting element 130G includes a conductive layer 124G on the insulating layer 235 , a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114 . Fig.40A The light emitting element 130G shown emits green light (G). The layer 133G includes a light emitting layer that emits green light. In the light emitting element 130G, the layer 133G and the common layer 114 can be collectively referred to as an EL layer. One or both of the conductive layer 124G and the conductive layer 126G can be referred to as a pixel electrode.

[0611] The light emitting element 130B includes a conductive layer 124B on the insulating layer 235 , a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114 . Fig.40AThe light emitting element 130B shown emits blue light (B). Layer 133B includes a light emitting layer that emits blue light. In the light emitting element 130B, layer 133B and common layer 114 may be collectively referred to as an EL layer. One or both of conductive layer 124B and conductive layer 126B may be referred to as a pixel electrode.

[0612] In this specification and the like, an island-shaped layer provided for each light-emitting element in the EL layer included in the light-emitting element is referred to as a layer 133R, a layer 133G, or a layer 133B, and a layer shared by a plurality of light-emitting elements is referred to as a common layer 114. In addition, in this specification and the like, the layer 133R, the layer 133G, and the layer 133B not including the common layer 114 may be referred to as an island-shaped EL layer, an EL layer formed in an island shape, or the like.

[0613] Layer 133R, layer 133G, and layer 133B are separated from each other. By providing an island-shaped EL layer in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, unintentional light emission caused by crosstalk can be suppressed, thereby realizing a display device with a very high contrast.

[0614] In addition, Fig.40A In FIG. 1 , the film thicknesses of the layers 133R, 133G, and 133B are shown as being the same, but the present invention is not limited thereto. The film thicknesses of the layers 133R, 133G, and 133B may be different from each other.

[0615] Conductive layer 124R is electrically connected to region 108M included in layer 108 of transistor 205R via openings provided in insulating layer 106, insulating layer 218, and insulating layer 235. Similarly, conductive layer 124G is electrically connected to region 108M included in layer 108 of transistor 205G, and conductive layer 124B is electrically connected to region 108M included in layer 108 of transistor 205B.

[0616] Conductive layers 124R, 124G, and 124B are formed to cover the openings provided in insulating layer 235. Concave portions of conductive layers 124R, 124G, and 124B are filled with layer 128, respectively.

[0617] Layer 128 has the function of flattening the concave portions of conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B electrically connected to conductive layers 124R, 124G, and 124B are provided on conductive layers 124R, 124G, and 124B and layer 128. Therefore, the region overlapping the concave portions of conductive layers 124R, 124G, and 124B can also be used as a light-emitting region, thereby increasing the aperture ratio of the pixel. Conductive layers 124R and 126R are preferably conductive layers used as reflective electrodes.

[0618] Layer 128 may be an insulating layer or a conductive layer. Layer 128 may be formed of various inorganic insulating materials, organic insulating materials, and conductive materials as appropriate. In particular, layer 128 is preferably formed of an insulating material, and is particularly preferably formed of an organic insulating material. As layer 128, for example, an organic insulating material that can be used for the above-mentioned insulating layer 237 can be used.

[0619] Although Fig.40A An example is shown in which the top surface of the layer 128 has a flat portion, but there is no particular limitation on the shape of the layer 128. The top surface of the layer 128 may have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0620] The height of the top surface of layer 128 may be the same as or substantially the same as the height of the top surface of conductive layer 124R, or may be different from each other. For example, the height of the top surface of layer 128 may be lower or higher than the height of the top surface of conductive layer 124R.

[0621] The end of the conductive layer 126R may also be aligned with the end of the conductive layer 124R, and may also cover the side of the end of the conductive layer 124R. Each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape. Specifically, each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape with a taper angle greater than 0 degrees and less than 90 degrees. When the end of the pixel electrode has a tapered shape, the layer 133R provided along the side of the pixel electrode has an inclined portion. By making the side of the pixel electrode have a tapered shape, the coverage of the EL layer provided along the side of the pixel electrode can be improved.

[0622] Since the conductive layers 124G and 126G and the conductive layers 124B and 126B are the same as the conductive layers 124R and 126R, detailed descriptions thereof will be omitted.

[0623] The top surface and side surfaces of the conductive layer 126R are covered by the layer 133R. Similarly, the top surface and side surfaces of the conductive layer 126G are covered by the layer 133G, and the top surface and side surfaces of the conductive layer 126B are covered by the layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting region of the light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.

[0624] Part of the top surface and side surfaces of the layers 133R, 133G, and 133B are covered by insulating layers 125 and 127. A common layer 114 is provided on the layers 133R, 133G, 133B, and the insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. Both the common layer 114 and the common electrode 115 are continuous films shared by a plurality of light-emitting elements.

[0625] exist Fig.40AIn the embodiment, there is no arrangement between the conductive layer 126R and the layer 133R. Fig.37A In other words, the display device 50E is not provided with an insulating layer (also referred to as a partition wall, a dam, a spacer, etc.) that contacts the pixel electrode and covers the top surface end of the pixel electrode. Therefore, the interval between adjacent light-emitting elements can be made very small. Thus, a high-definition or high-resolution display device can be realized. In addition, there is no need for a mask for forming the insulating layer, thereby reducing the manufacturing cost of the display device.

[0626] As described above, layer 133R, layer 133G, and layer 133B all include a light-emitting layer. Layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B may also include a light-emitting layer, a carrier blocking layer on the light-emitting layer, and a carrier transport layer on the carrier blocking layer. The surfaces of layer 133R, layer 133G, and layer 133B are exposed in the manufacturing process of the display device, so by providing one or both of the carrier transport layer and the carrier blocking layer on the light-emitting layer, the light-emitting layer can be prevented from being exposed to the outermost surface and the damage to the light-emitting layer can be reduced. As a result, the reliability of the light-emitting element can be improved.

[0627] The common layer 114 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The light emitting elements 130R, 130G, and 130B share the common layer 114.

[0628] The side surfaces of the layers 133R, 133G, and 133B are covered with the insulating layer 125. The insulating layer 127 covers the side surfaces of the layers 133R, 133G, and 133B via the insulating layer 125.

[0629] By covering the side surfaces of the layers 133R, 133G, and 133B (or even covering a portion of the top surfaces thereof) with at least one of the insulating layer 125 and the insulating layer 127, the common layer 114 (or the common electrode 115) can be prevented from contacting the pixel electrode and the side surfaces of the layers 133R, 133G, and 133B, thereby preventing the light-emitting element from being short-circuited. Thus, the reliability of the light-emitting element can be improved.

[0630] The insulating layer 125 is preferably in contact with the side surfaces of the layers 133R, 133G, and 133B. By adopting a structure in which the insulating layer 125 is in contact with the layers 133R, 133G, and 133B, film peeling of the layers 133R, 133G, and 133B can be prevented, thereby improving the reliability of the light-emitting element.

[0631] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recessed portion of the insulating layer 125. The insulating layer 127 preferably covers at least a part of the side surface of the insulating layer 125.

[0632] By providing the insulating layer 125 and the insulating layer 127, the space between adjacent island-shaped layers can be filled, so that the unevenness of the formed surface of the layer (for example, the carrier injection layer, the common electrode, etc.) provided on the island-shaped layer can be reduced and further flattened. Therefore, the coverage of the carrier injection layer or the common electrode, etc. can be improved.

[0633] The common layer 114 and the common electrode 115 are arranged on the layer 133R, the la...

Claims

1. A semiconductor device comprising: a first transistor; a second transistor; a first insulating layer; as well as The second insulating layer, Wherein, the first transistor includes a metal oxide layer and a first conductive layer, The first insulating layer is disposed on the first conductive layer, The second insulating layer is disposed on the first insulating layer, The first insulating layer and the second insulating layer have openings reaching the first conductive layer, The metal oxide layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen, The second insulating layer includes nitrogen, Furthermore, the metal oxide layer has a region that is in contact with the second insulating layer and in contact with any one of the gate, source, and drain of the second transistor.

2. A semiconductor device comprising: a first transistor; a second transistor; a first insulating layer; as well as The second insulating layer, Wherein, the first transistor includes a metal oxide layer and a first conductive layer, The second transistor includes the metal oxide layer and a second conductive layer, The first insulating layer is disposed on the first conductive layer, The second insulating layer is disposed on the first insulating layer, The first insulating layer and the second insulating layer have a first opening reaching the first conductive layer and a second opening reaching the second conductive layer, The metal oxide layer is in contact with the top surface of the first conductive layer, the top surface of the second conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen, Furthermore, the second insulating layer contains nitrogen.

3. A semiconductor device comprising: a first transistor; a second transistor; a first insulating layer; as well as The second insulating layer, Wherein, the first transistor includes a metal oxide layer and a first conductive layer, The second transistor includes the metal oxide layer, a gate insulating layer and a gate electrode, The first insulating layer is disposed on the first conductive layer, The second insulating layer is disposed on the first insulating layer, The first insulating layer and the second insulating layer have openings reaching the first conductive layer, The metal oxide layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen, The second insulating layer includes nitrogen, Furthermore, the metal oxide layer has a region overlapping with the gate electrode via the gate insulating layer.

4. A semiconductor device comprising: transistor; Capacitors; a first insulating layer; as well as The second insulating layer, Wherein, the transistor comprises a metal oxide layer and a first conductive layer, The capacitor includes the metal oxide layer, a second conductive layer, and a dielectric sandwiched between the metal oxide layer and the second conductive layer. The first insulating layer is disposed on the first conductive layer, The second insulating layer is disposed on the first insulating layer, The first insulating layer and the second insulating layer have openings reaching the first conductive layer, The metal oxide layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen, The second insulating layer includes nitrogen, Furthermore, the metal oxide layer has a region that contacts the second insulating layer and overlaps the second conductive layer and the dielectric.

5. The semiconductor device according to any one of claims 1 to 4, further comprising a third insulating layer, wherein the third insulating layer is disposed between the first insulating layer and the second insulating layer, The third insulating layer contains nitrogen, And the second insulating layer has a region whose hydrogen concentration is higher than that of the third insulating layer.

6. The semiconductor device according to any one of claims 1 to 4, wherein the metal oxide layer comprises indium, tin and zinc, Furthermore, the content of the tin in the metal oxide layer is 0.1% or more and 2% or less.

7. The semiconductor device according to any one of claims 1 to 4, wherein the metal oxide layer comprises indium, tin and silicon, Furthermore, the content of the silicon in the metal oxide layer is greater than or equal to 1% and less than or equal to 20%.

8. A display device, comprising: transistor; Display components; a first insulating layer; as well as The second insulating layer, Wherein, the transistor comprises a metal oxide layer and a first conductive layer, The first insulating layer is disposed on the first conductive layer, The second insulating layer is disposed on the first insulating layer, The first insulating layer and the second insulating layer have openings reaching the first conductive layer, The metal oxide layer is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, and the top surface and side surface of the second insulating layer. The first insulating layer contains oxygen, The second insulating layer includes nitrogen, Furthermore, the metal oxide layer has a region that is in contact with the second insulating layer and in contact with a pixel electrode included in the display element.

9. The display device according to claim 8, further comprising a third insulating layer, wherein the third insulating layer is disposed between the first insulating layer and the second insulating layer, The third insulating layer contains nitrogen, And the second insulating layer has a region whose hydrogen concentration is higher than that of the third insulating layer.

10. The display device according to claim 8 or 9, wherein the metal oxide layer comprises indium, tin and zinc, Furthermore, the content of the tin in the metal oxide layer is 0.1% or more and 2% or less.

11. The display device according to claim 8 or 9, wherein the metal oxide layer comprises indium, tin and silicon, Furthermore, the content of the silicon in the metal oxide layer is greater than or equal to 1% and less than or equal to 20%.

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