Resonant cavity detection and dynamic adjustment circuit
By designing a resonant cavity detection and dynamic adjustment circuit in the LLC circuit, collecting the voltage of the resonant element and adjusting the switching frequency, the frequency deviation problem caused by changes in the resonant cavity parameters is solved, and the circuit is efficient resonant and low-loss output is achieved.
Patent Information
- Application Number
- CN202510296392.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-13
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2045-03-13
AI Technical Summary
After the existing LLC circuit is connected to the electrical equipment, the changes in the resonant cavity parameters lead to a deviation in the calculation of the resonant frequency, which cannot fully enter the resonant state, increasing noise interference and circuit losses.
A resonant cavity detection and dynamic adjustment circuit is designed, and the voltage of the resonant element is collected through the sampling circuit, the control circuit calculates the resonant frequency of the resonant cavity, adjusts the switching frequency to match the resonant frequency, realizes ZVS and reduces circuit losses.
By dynamically adjusting the switching frequency, ensure that the resonant cavity enters the resonant state, reduce noise interference in the output sine wave, reduce circuit losses, and improve power conversion efficiency.
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Figure CN119936480A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power transmission, and in particular to a resonant cavity detection and dynamic adjustment circuit. Background Art
[0002] LLC circuit is mainly used to realize power conversion and stabilize output voltage. It realizes efficient and low-noise power transmission by controlling the resonant frequency. It is widely used in electronic equipment, communication equipment and other fields. By reasonably designing circuit parameters and control strategies, high-efficiency conversion and stable output can be achieved. LLC circuit is mainly composed of four main modules: power switch, resonant cavity, transformer and diode rectifier. The power switch element usually uses MOS tube, which can convert the input DC voltage into a high-frequency square wave; the resonant cavity is composed of inductor and capacitor, which eliminates the harmonics of the square wave and outputs a fundamental frequency sine wave; the transformer transmits high-frequency energy and boosts or bucks the voltage according to application requirements; finally, the diode rectifier converts the sine wave into a stable DC output. The working principle of LLC circuit is based on the characteristics of resonant converter, and the output voltage is stabilized by controlling the frequency of the power switch. It can reduce the switching loss and Joule heat of MOS tube through resonance, so that no additional heat sink is required. Unlike traditional PWM (pulse width modulation) converters, LLC circuits achieve constant output voltage through frequency regulation, and can enable the MOS tube switch on the primary side to achieve zero voltage switch-on (ZVS) and the rectifier diode on the secondary side to achieve zero current shutdown (ZCS), further improving efficiency and power density.
[0003] But at the same time, there is also a problem. At present, the MOS tube is turned on using the zero voltage switch-on (ZVS) scheme. When the LLC circuit is working, it is connected to the electrical equipment. After the electrical equipment is used, the circuit output power will change, which will cause the resonant cavity parameters to change. Therefore, it is necessary to sample the voltage of the capacitance and inductance of the resonant cavity, so as to calculate the real-time resonant frequency of the resonant cavity during operation, so as to adjust the switching frequency of the MOS tube to be consistent with the resonant frequency.
[0004] The changes in the parameters of the resonant cavity are usually caused by the static errors of the components that make up the resonant cavity, as well as the dynamic errors of the components that make up the resonant cavity caused by the changes in current and voltage during the use of the LLC circuit. In the LLC circuit, there are usually parasitic inductance and distributed capacitance on the connecting lines of the components, and these parameter values will cause inaccurate sampling of the voltage by the capacitor and inductor. This causes a deviation between the calculated resonant frequency and the actual resonant frequency during the operation of the resonant cavity, so that the LLC circuit cannot fully enter the resonant state during actual operation, and there is more noise interference in the output fundamental frequency sine wave, and the MOS tube cannot achieve ZVS, resulting in increased circuit losses. Summary of the invention
[0005] In view of the shortcomings of the prior art, the present invention provides a resonant cavity detection and dynamic adjustment circuit. The object of the present invention is achieved through the following solutions: A resonant cavity detection and dynamic adjustment circuit, comprising: power supply; a control circuit, electrically connected to a power source; A resonant circuit comprising: The switch module comprises a first switch element and a second switch element, wherein the first switch element is electrically connected to a power supply, a control circuit and the second switch element respectively, and the second switch element is electrically connected to the control circuit; The resonant cavity comprises a first resonant element and a second resonant element, wherein the first resonant element is electrically connected to the second switch element and the second resonant element respectively; A transformer, the transformer being electrically connected to the first switching element and the second resonant element respectively; an output circuit, comprising a sampling element, the sampling element being electrically connected to the transformer; and A sampling circuit, the sampling circuit is electrically connected to the control circuit, the second switch element, the first resonant element, the second resonant element, the transformer, and the sampling element respectively; Among them, after the control circuit is initialized, it calculates the initial resonant frequency f0 of the resonant cavity, and the control circuit controls the first switch element and the second switch element to be alternately turned on according to the initial resonant frequency f0. When the first switch element is turned on and the second switch element is turned off, the sampling circuit collects the voltages U1 and U2 of the first resonant element and the second resonant element, and transmits the collected voltage values U1 and U2 to the control circuit. The control circuit calculates the resonant frequency f1 of the resonant cavity when it is working at this time according to the voltage U1 of the first resonant element, the voltage U2 of the second resonant element and the transformation ratio of the transformer itself; when the second switch element is turned on and the first switch element is turned off, the sampling circuit collects the voltages U3 and U4 of the first resonant element and the second resonant element, and the control circuit calculates the resonant frequency f2 of the resonant cavity when it is working at this time according to the voltage U3 of the first resonant element, the voltage U4 of the second resonant element and the transformation ratio of the transformer itself. The control circuit calculates the average value F of the resonant frequency when the resonant cavity is working according to f1 and f2, and then adjusts the switching frequency of the first switch element and the second switch element to F.
[0006] In one embodiment, the first switch element includes a MOS transistor Q1, the second switch element includes a MOS transistor Q2, the MOS transistor Q1 and the MOS transistor Q2 respectively have a drain D, a gate G and a source S, the first resonant element includes a capacitor C7, the second resonant element includes an inductor L1, the capacitor C7 and the inductor L have a terminal 1 and a terminal 2; the drain D of the MOS transistor Q1 is electrically connected to a power supply, the gate G of the MOS transistor Q1 is electrically connected to a control circuit, the source S of the MOS transistor Q1 is electrically connected to a transformer and the drain D of the MOS transistor Q2 respectively; the drain D of the MOS transistor Q2 is electrically connected to a transformer, the gate G of the MOS transistor Q2 is electrically connected to the control circuit, the source S of the MOS transistor Q2 is electrically connected to a sampling circuit and the terminal 1 of the capacitor C7 respectively; the terminal 2 of the capacitor C7 is electrically connected to the terminal 1 of the inductor L1, and the terminal 2 of the inductor L1 is electrically connected to the transformer; The control circuit reads the initial capacitance value C1 and the inductance value L1 of the capacitor C7 and the inductor L1 respectively, and calculates the initial resonant frequency of the resonant cavity. The control circuit controls the MOS tube Q1 and the MOS tube Q2 to be turned on alternately according to the initial resonant frequency f0.
[0007] In one embodiment, a voltage sampling point C_B of a capacitor C7 is provided on the source electrode S of the MOS tube Q2, another sampling point C_A of the capacitor C7 is provided on the No. 2 end of the inductor L1, and the sampling point C_B and the sampling point C_A are respectively electrically connected to the sampling circuit; a sampling point L_A of the inductor L1 is provided on the No. 2 end of the capacitor C7, another sampling point L_B of the inductor L1 is provided on the transformer, and the sampling point L_A and the sampling point L_B are respectively electrically connected to the sampling circuit; when the MOS tube Q1 is turned on, the sampling circuit (4) transmits the voltage U1 of the sampling capacitor C7 and the voltage U2 of the inductor L1 to the control circuit, and the control circuit (2) calculates the dynamic capacitance of the capacitor C7 , the dynamic inductance of inductor L1 , and then calculate ; When the MOS tube Q2 is turned on, the sampling circuit transmits the voltage U3 of the sampling capacitor C7 and the voltage U4 of the inductor L1 to the control circuit, and the control circuit calculates the dynamic capacitance of the capacitor C7. And the dynamic inductance of inductor L1 , and then calculate , in the above formula, i1 is the inverse of the transformer ratio; The control circuit calculates the average value F of the resonant frequency when the resonant cavity is working according to f1 and f2, and then adjusts the switching frequency of the MOS transistor Q1 and the MOS transistor Q2 to F.
[0008] In one embodiment, the sampling element includes a resistor R6, the resistor R6 has a terminal 1 and a terminal 2, the terminal 1 of the resistor R6 is electrically connected to the transformer, the terminal 2 of the resistor R6 outputs a voltage, and the terminal 1 and the terminal 2 of the resistor R6 are electrically connected to the sampling circuit respectively.
[0009] In one embodiment, the output circuit further includes a reverse protection element, which includes a diode U1. The diode U1 has a terminal 1 and a terminal 2, and the terminal 1 of the diode U1 is electrically connected to the transformer; the terminal 2 of the diode U1 outputs a voltage, and the terminal 2 of the diode U1 is electrically connected to the sampling circuit.
[0010] In one embodiment, a sampling point V_A is provided at the No. 2 end of the diode U1, and the sampling point V_A is electrically connected to the sampling circuit; a sampling point V_B is provided at the No. 1 end of the resistor R6, and a sampling point V- is provided at the No. 2 end of the resistor R6, and the sampling points V_B and V- are electrically connected to the sampling circuit respectively; When the MOS tube Q1 is turned on, the sampling circuit also collects the voltage U of the output circuit through the sampling point V_A. 01 , the sampling circuit collects the voltage value U of the resistor R6 R6(1) , and transmits it to the control circuit, which calculates the current of resistor R6 at this time , the control circuit then follows , calculate the equivalent resistance R of the output circuit ac1 , while calculating the gain ; When the MOS tube Q2 is turned on, the sampling circuit also collects the voltage U of the output circuit through the sampling point V_A. 02 , the sampling circuit collects the voltage value U of the resistor R6 R6(2) , and transmits it to the control circuit, which calculates the current of resistor R6 at this time , the control circuit then follows , calculate the equivalent resistance R of the output circuit ac2 , while calculating the gain In the above formula, R is the resistance of resistor R6, n is the transformation ratio of the transformer, and the control circuit calculates the average gain Q according to Q1 and Q2, and calculates the average equivalent resistance R ac , adjust the average equivalent resistance R ac , so that the average gain Q=1.
[0011] In one embodiment, the control circuit includes a control chip, an oscillation module, a reset module, a filtering module, a current limiting module and a protection module. The control chip has multiple ports. The oscillation module is electrically connected to terminals 5 and 6 of the control chip respectively; the reset module is electrically connected to terminal 7 of the control chip, and the reset module is also electrically connected to a power supply and grounded SGND; the filtering module is electrically connected to terminals 9 and 30 of the control chip, and the filtering module is grounded SGND; the current limiting module is electrically connected to terminals 11 and 21 of the control chip, and the current limiting module is also electrically connected to the power supply and grounded SGND; the protection module is electrically connected to terminals 12 and 13 of the control chip, and the protection module is also electrically connected to the power supply and grounded SGND.
[0012] In one embodiment, the sampling circuit includes a capacitor voltage sampling circuit and an inductor voltage sampling circuit, the capacitor voltage sampling circuit is electrically connected to the detection points C_A and C_B respectively; the inductor voltage sampling circuit is electrically connected to the detection points L_A and L_B respectively; wherein the capacitor voltage sampling circuit is used to collect the voltages U1 and U3 of the capacitor C7 when it is working; and the inductor voltage sampling circuit is used to collect the voltages U2 and U4 of the inductor L1 when it is working.
[0013] In one embodiment, the sampling circuit also includes an output voltage sampling circuit and a resistor voltage sampling circuit, the output voltage sampling circuit is electrically connected to terminal 2 of the diode U1; the resistor voltage sampling circuit is electrically connected to terminals 1 and 2 of the resistor R6, respectively; wherein the output voltage sampling circuit is used to collect the voltage of the output circuit, and the resistor voltage sampling circuit is used to collect the voltage of the resistor R6.
[0014] Compared with the prior art, the present invention has at least the following advantages: The present invention can collect the voltages U1, U3 and U2, U4 of the first resonant element and the second resonant element when the first switch element and the second switch element are respectively turned on through a sampling circuit, and the control circuit calculates the resonant frequencies f1 and f2 of the resonant cavity when the first switch element and the second switch element are respectively turned on according to U1, U2 and U3, U4. The control circuit calculates the average value F of the resonant frequency when the resonant cavity is working according to f1 and f2, and then adjusts the switching frequencies of the first switch element and the second switch element to F, so that the first switch element and the second switch element achieve ZVS, reduce circuit loss, and the circuit can enter a resonant state, reducing more noise interference in the sine wave of the output base frequency. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings: Figure 1It is the circuit principle diagram of the present invention; Figure 2 is a circuit diagram of a resonant circuit in the present invention; Figure 3 is a circuit diagram of a control circuit in the present invention; Figure 4 It is the circuit diagram of capacitor voltage sampling circuit; Figure 5 is the circuit diagram of the inductor voltage sampling circuit; Figure 6 is the circuit diagram of the output voltage sampling circuit; Figure 7 It is the circuit diagram of the resistor voltage sampling circuit; Figure 8 A flow chart of a method for increasing the resonant cavity frequency; Among them, the figure markings are, 1. power supply; 2. control circuit; 21. control chip; 22. oscillation module; 23. reset module; 24. filter module; 25. current limiting module; 26. protection module; 3 resonant circuit; 31 switch module; 311. first switch element; 312. second switch element; 32. resonant cavity; 321. first resonant element; 322. second resonant element; 33. transformer; 34. output circuit; 341. sampling element; 4 sampling circuit; 41. capacitor voltage sampling circuit; 42. inductor voltage sampling circuit; 43. output voltage sampling circuit; 44. resistor voltage sampling circuit. DETAILED DESCRIPTION
[0016] The following will disclose multiple embodiments of the present invention with drawings. For the purpose of clear description, many practical details will be described together in the following description. However, it should be understood that these practical details should not be used to limit the present invention. That is, in some embodiments of the present invention, these practical details are not necessary. In addition, for the purpose of simplifying the drawings, some conventional structures and components will be depicted in a simple schematic manner in the drawings.
[0017] It should be noted that all directional indications such as up, down, left, right, front, back, etc. in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the components in a certain specific posture as shown in the accompanying drawings. If the specific posture changes, the directional indication will also change accordingly.
[0018] In addition, in the present invention, the descriptions of "first", "second", etc. are only used for descriptive purposes, and do not specifically refer to the order or sequence, nor are they used to limit the present invention. They are only used to distinguish components or operations described with the same technical terms, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.
[0019] In order to further understand the content, features and effects of the present invention, the following embodiments are given as examples and described in detail with reference to the accompanying drawings: like Figures 1 to 8 As shown, Figure 1 is a circuit diagram of the present invention, Figure 2 is a circuit diagram of a resonant circuit in the present invention, Figure 3 is a circuit diagram of a control circuit in the present invention, Figures 4 to 7 is the circuit diagram of each sampling circuit, Figure 8 The circuit working flow chart of the present invention. This embodiment provides a resonant cavity detection and dynamic adjustment circuit, including: a power supply 1, a control circuit 2, a resonant circuit 3 and a sampling circuit 4, the power supply 1 is electrically connected to the control circuit 2 and the resonant circuit 3 respectively, the control circuit 2 is electrically connected to the resonant circuit 3 and the sampling circuit 4 respectively; the resonant circuit 3 is electrically connected to the sampling circuit 4. The power supply can supply power to the control circuit 2 and the resonant circuit 3; the sampling circuit 4 collects the voltage of the internal components of the resonant circuit 3 and transmits it to the control circuit 2 to calculate the resonant frequency.
[0020] Furthermore, if Figure 2 As shown, the resonant circuit 3 includes a switch module 31, a resonant cavity 32, a transformer 33 and an output circuit 34. The switch module 31 is electrically connected to the power supply 1, the resonant cavity 32 and the transformer 33 respectively; the resonant cavity 32 is electrically connected to the transformer 33; and the transformer 33 is electrically connected to the output circuit 34.
[0021] Specifically, Figure 2 As shown, the switch module 31 includes a first switch element 311 and a second switch element 312 . The first switch element 311 is electrically connected to the power supply 1 , the control circuit 2 , and the second switch element 312 , respectively. The second switch element 312 is electrically connected to the control circuit 2 .
[0022] Specifically, the resonant cavity 32 includes a first resonant element 321 and a second resonant element 322, and the first resonant element 321 is electrically connected to the second switch element 312 and the second resonant element 322. The transformer 33 is electrically connected to the first switch element 311, the second switch element 312 and the second resonant element 322. The output circuit 34 includes a sampling element 341, and the sampling element 341 is electrically connected to the transformer 33.
[0023] Specifically, the sampling circuit 4 is electrically connected to the control circuit 2 , the second switch element 312 , the first resonant element 321 , the second resonant element 322 , the transformer 33 , and the sampling element 341 , respectively.
[0024] After the control circuit 2 is initialized, it calculates the initial resonant frequency f0 of the resonant cavity 32. The control circuit 2 controls the first switch element 311 and the second switch element 312 to be turned on alternately according to the initial resonant frequency f0. When the first switch element 311 is turned on and the second switch element 312 is turned off, the sampling circuit 4 collects the voltages U1 and U2 of the first resonant element 321 and the second resonant element 322, and transmits the collected voltage values U1 and U2 to the control circuit 2. The control circuit 2 calculates the resonant cavity 32 at this time according to the voltage U1 of the first resonant element 321, the voltage U2 of the second resonant element 322 and the transformation ratio of the transformer 33 itself. 2 is in operation; when the second switch element is turned on 312 and the first switch element 311 is turned off, the sampling circuit 4 collects the voltages U3 and U4 of the first resonant element 321 and the second resonant element 322, and the control circuit 2 calculates the resonant frequency f2 of the resonant cavity 32 at this time according to the voltage U3 of the first resonant element 321, the voltage U4 of the second resonant element 322 and the transformation ratio of the transformer 33 itself. The control circuit 2 calculates the average value F of the resonant frequency of the resonant cavity 32 at work according to f1 and f2, and then adjusts the switching frequency of the first switch element 311 and the second switch element 312 to F.
[0025] The sampling circuit 4 collects the voltages U1, U3, U2, and U4 of the first resonant element 321 and the second resonant element 322 when the first switch element 311 and the second switch element 312 are turned on respectively. The control circuit 2 can calculate the resonant frequencies f1 and f2 of the resonant cavity 32 when the first switch element 311 and the second switch element 312 are turned on respectively according to U1, U2, U3, and U4. Therefore, the control circuit 2 calculates the average value F of the resonant frequency when the resonant cavity 32 is working according to f1 and f2, and then adjusts the switching frequencies of the first switch element 311 and the second switch element 312 to F. When the switching frequencies of the first switch element 311 and the second switch element 312 are equal to the average value F of the resonant frequency when the resonant cavity 32 is working, the first switch element 311 and the second switch element 312 can achieve ZVS, reduce circuit loss, and the circuit can enter a resonant state, reducing the relatively more noise interference in the sine wave of the output fundamental frequency.
[0026] Among them, the power supply 1 in this embodiment includes a DC power supply and an AC power supply, the DC power supply is electrically connected to the control circuit 2, and the AC power supply is electrically connected to the resonant circuit 3, wherein the DC power supply is a 3.3V DC regulated power supply, and the AC power supply uses AC power.
[0027] Furthermore, if Figure 2 As shown, the first switch element 311 includes a MOS transistor Q1, the second switch element 312 includes a MOS transistor Q2, the MOS transistor Q1 and the MOS transistor Q2 have a drain D, a gate G and a source S respectively, the first resonant element 321 includes a capacitor C7, the second resonant element includes an inductor L1, the capacitor C7 and the inductor L have a terminal 1 and a terminal 2; the drain D of the MOS transistor Q1 is electrically connected to the power supply 1, the gate G of the MOS transistor Q1 is electrically connected to the control circuit 2, the source S of the MOS transistor Q1 is electrically connected to the transformer 33 and the drain D of the MOS transistor Q2 respectively; the drain D of the MOS transistor Q2 is electrically connected to the transformer 33, the gate G of the MOS transistor Q2 is electrically connected to the control circuit 2, the source S of the MOS transistor Q2 is electrically connected to the sampling circuit 4 and the terminal 1 of the capacitor C7 respectively; the terminal 2 of the capacitor C7 is electrically connected to the terminal 1 of the inductor L1, and the terminal 2 of the inductor L1 is electrically connected to the transformer 33.
[0028] The control circuit 2 reads the initial capacitance value C1 and the inductance value L1 of the capacitor C7 and the inductor L1 respectively, and calculates the initial resonant frequency of the resonant cavity 32. , the control circuit 2 controls the MOS transistor Q1 and the MOS transistor Q2 to be alternately turned on according to the initial resonance frequency f0. When the MOS transistor Q1 and the MOS transistor Q2 are alternately turned on according to f0, current flows through the capacitor C7 and the inductor L1, so that the resonant cavity 32 composed of the capacitor C7 and the inductor L1 resonates. Since the switching frequency of the MOS transistor Q1 and the MOS transistor Q2 being alternately turned on is the same as the initial resonance frequency f0, the capacitive reactance of the capacitor C7 is equal to the inductive reactance of the inductor L1, so that the circuit at this time enters a resonance state, thereby eliminating the voltage and current overlap during the conduction process of the MOS transistor Q1 and the MOS transistor Q2, thereby achieving ZVS of the MOS transistor Q1 and the MOS transistor Q2.
[0029] It should be noted that, in this example, the transformer 33 is a step-down transformer, and the transformation ratio of the transformer 33 is 3 / 2. The transformer 33 has terminals 1-4, the source S of the MOS transistor Q1 and the drain D of the MOS transistor Q2 are electrically connected to the terminal 1 of the transformer 33, respectively, and the terminal 2 of the inductor L1 is electrically connected to the terminal 2 of the transformer 33.
[0030] like Figure 2 As shown, a voltage sampling point C_B of the capacitor C7 is provided on the source electrode S of the MOS tube Q2, another sampling point C_A of the capacitor C7 is provided on the No. 2 end of the inductor L1, and the sampling point C_B and the sampling point C_A are respectively electrically connected to the sampling circuit 4; a sampling point L_A of the inductor L1 is provided on the No. 2 end of the capacitor C7, another sampling point L_B of the inductor L1 is provided on the transformer 33, and the sampling point L_A and the sampling point L_B are respectively electrically connected to the sampling circuit 4. Among them, the voltage sampling point C_B is provided on the source electrode S of the MOS tube Q2, and the sampling point C_A is provided on the No. 2 end of the inductor L1.
[0031] When the current passes through the capacitor C7 and the inductor L1, there is a temperature drift. At the same time, there are parasitic inductance and distributed capacitance on the connection line of the capacitor C7 and the inductor L1. The parasitic inductance and distributed capacitance will divide the original voltage across the capacitor C7 and the inductor L1, resulting in the sampling circuit 4 collecting the voltage across the capacitor C7 and the voltage across the inductor L1 inaccurately. By setting the sampling points C_A and C_B, the voltage on the connection line of the capacitor C7 can be collected together with the voltage of the capacitor C7, that is, the voltage on the entire connection line of the capacitor C7 is collected, thereby ensuring that the sampling circuit 4 collects the voltage of the capacitor C7 accurately. Similarly, the voltage collection principle of the inductor L1 is the same as that of the capacitor C7, which will not be repeated here.
[0032] In the specific implementation of this embodiment, when the MOS transistor Q1 is turned on, the MOS transistor Q2 is turned off, and a loop is formed by the MOS transistor Q1, the transformer, the inductor L1 and the capacitor C7. The sampling circuit 4 transmits the voltage U1 of the sampling capacitor C7 and the voltage U2 of the inductor L1 to the control circuit 2, and the control circuit 2 calculates the dynamic capacitance of the capacitor C7 during operation. , the dynamic inductance of inductor L1 during operation , and then calculate , the resonant frequency of the resonant cavity 32 at this moment is f1; When the MOS tube Q2 is turned on, the MOS tube Q1 is turned off, and a loop is formed by the MOS tube Q2, the transformer, the inductor L1 and the capacitor C7. The sampling circuit 4 transmits the voltage U3 of the sampling capacitor C7 and the voltage U4 of the inductor L1 to the control circuit 2. The control circuit 2 calculates the dynamic capacitance of the capacitor C7 during operation. And the dynamic inductance of inductor L1 during operation , and then calculate In the above formula, i1 is the reciprocal of the transformation ratio of the transformer 33, and j is an imaginary unit. In this example, the transformation ratio of the transformer 33 is 3 / 2, and the reciprocal is taken as 2 / 3.
[0033] Since the MOS transistor Q1 and the MOS transistor Q2 are turned on for one working cycle, the sampling circuit 4 needs to detect the voltages U1 and U3 of the capacitor C7 and the voltages U2 and U4 of the inductor L1 in real time when the MOS transistor Q1 and the MOS transistor Q2 are turned on in one cycle, and then the sampling circuit 4 transmits them to the control circuit 2. The control circuit 2 calculates f1 according to U1 and U2, and f2 according to U3 and U4. The control circuit 2 calculates the average value F of the resonant frequency when the resonant cavity 32 works in this cycle according to f1 and f2. The average value F of the resonant frequency is closest to the resonant frequency of the resonant cavity 32 when the MOS transistor Q1 and the MOS transistor Q2 are turned on respectively. The control circuit 2 thus changes the switching frequency of the MOS transistor Q1 and the MOS transistor Q2 to F when they are alternately turned on. The closer the switching frequency of the MOS transistor Q1 and the MOS transistor Q2 is to the resonant frequency of the resonant cavity 32, the better the MOS transistor Q1 and the MOS transistor Q2 can achieve ZVS.
[0034] Specifically, Figure 2 As shown, the sampling element 341 includes a resistor R6, the resistor R6 has a terminal 1 and a terminal 2, the terminal 1 of the resistor R6 is electrically connected to the transformer 33, wherein the terminal 1 of the resistor R6 is electrically connected to the terminal 4 of the transformer 33, the terminal 2 of the resistor R6 outputs a voltage, and the terminals 1 and 2 of the resistor R6 are respectively electrically connected to the sampling circuit 4. Since the resistor R6 is connected in series in the output circuit 34, and the current passing through the resistor R6 can be directly calculated using Ohm's law using the resistor R6, the output current of the output circuit 34 can be measured.
[0035] Specifically, Figure 2 As shown, the output circuit 34 further includes a reverse protection element 342, which includes a diode U1, the diode U1 having a terminal 1 and a terminal 2, the terminal 1 of the diode U1 being electrically connected to the transformer 33; the terminal 2 of the diode U1 outputs a voltage, and the terminal 2 of the diode U1 is electrically connected to the sampling circuit 4. In this embodiment, the diode U1 is a fast recovery diode, which can reduce the power loss of the output circuit 34.
[0036] Furthermore, if Figure 2 As shown, a sampling point V_A is provided on the No. 2 end of the diode U1, and the sampling point V_A is electrically connected to the sampling circuit 4; a sampling point V_B is provided on the No. 1 end of the resistor R6, and a sampling point V- is provided on the No. 2 end of the resistor R6, and the sampling point V_B and the sampling point V- are electrically connected to the sampling circuit 4 respectively; When the MOS tube Q1 is turned on, the sampling circuit 4 also collects the voltage U of the output circuit 34 through the sampling point V_A. 01 , sampling circuit 4 collects the voltage value U of resistor R6 R6(1) , and transmits it to the control circuit 2, which calculates the current of the resistor R6 at this time. , the control circuit 2 then follows , calculate the equivalent resistance R of the output circuit 34 ac1 , while calculating the gain ; When the MOS tube Q2 is turned on, the sampling circuit 4 also collects the voltage U of the output circuit 34 through the sampling point V_A. O2 , sampling circuit 4 collects the voltage value U of resistor R6 R6(2) , and transmits it to the control circuit 2, which calculates the current of the resistor R6 at this time. , the control circuit 2 then follows , calculate the equivalent resistance R of the output circuit 34 ac2 , while calculating the gain In the above formula, R is the resistance of resistor R6, n is the transformation ratio of the transformer, and the control circuit calculates the average gain Q according to Q1 and Q2, and calculates the average equivalent resistance R ac , adjust the average equivalent resistance R ac , so that the average gain Q=1. Among them, the gain Q can reflect the energy loss of the circuit when it works at the resonant frequency. When the gain Q = 1, that is, the circuit enters the resonant state, the inductive control and the capacitive reactance are equal, and the circuit is resistive at this time, that is, the energy storage and energy dissipation in the resonant circuit 3 reach a balanced state, which helps to achieve ZVS of MOS tubes Q1 and Q2.
[0037] It should be noted that the circuit gain generated by the conduction of MOS tube Q1 and MOS tube Q2 in one cycle of Q1 and Q2 respectively is the same as the principle of calculating the average resonant frequency F mentioned above, and the average value of the gain Q needs to be calculated, which is not repeated here.
[0038] Specifically, Figure 3 As shown, the control circuit 2 includes a control chip 2, an oscillation module 22, a reset module 23, a filter module 24, a current limiting module 25 and a protection module 26. The control chip 21 has multiple ports. The oscillation module 22 is electrically connected to the 5th and 6th terminals of the control chip 21 respectively; the reset module 23 is electrically connected to the 7th terminal of the control chip 21, and the reset module 23 is also electrically connected to the power supply 1 and grounded SGND; the filter module 24 is electrically connected to the 9th and 30th terminals of the control chip 21, and the filter module 24 is grounded SGND; the current limiting module 25 is electrically connected to the 11th and 21st terminals of the control chip 21, and the current limiting module 25 is also electrically connected to the power supply 1 and grounded SGND; the protection module 26 is electrically connected to the 12th and 13th terminals of the control chip 21, and the protection module 26 is also electrically connected to the power supply 1 and grounded SGND.
[0039] The control chip 21 is used to process the voltages of the capacitor C7, the inductor L1 and the resistor R6 collected by the sampling circuit 4, and calculate the resonant frequencies f1 and f2 of the resonant cavity 32, and calculate the current i2 of the resistor R6 according to the resistance value of the resistor R6 and the voltage of the resistor R6, and control the MOS transistor Q1 and the MOS transistor Q2 to be alternately turned on according to the resonant frequencies f1 and f2; the oscillation module 22 provides a working clock signal to provide a working timing reference for the circuit, so that the circuit can work in an orderly manner; the reset module 23 initializes the control chip 21, and when the program of the control chip 21 is not in the initial state after power-on, the reset module 23 can allow the program of the control chip 21 to be executed from the beginning; the filter module 24 is used to filter the voltage input to the control chip 21, and can be used to remove the noise in the voltage input to the control chip 21 by the power supply 1 to avoid affecting the normal operation of the control chip 21; the current limiting module 25 is used to prevent overcurrent of the power supply 1; the protection module 26 stabilizes the voltage of the control chip 21, so that the control chip 21 works more stably. In this embodiment, the control chip 21 adopts STM32F446.
[0040] Specifically, Figure 4 and Figure 5As shown, the sampling circuit 4 includes a capacitor voltage sampling circuit 41 and an inductor voltage sampling circuit 42, wherein the capacitor voltage sampling circuit 41 is electrically connected to the detection points C_A and C_B respectively; the inductor voltage sampling circuit 42 is electrically connected to the detection points L_A and L_B respectively; wherein the capacitor voltage sampling circuit 41 is used to collect the voltages U1 and U3 of the capacitor C7 during operation; and the inductor voltage sampling circuit 42 is used to collect the voltages U2 and U4 of the inductor L1 during operation. It should be noted that the capacitor voltage sampling circuit 41 and the inductor voltage sampling circuit 42 use differential sampling to have good anti-interference ability, thereby being able to accurately collect the voltage of the capacitor C7 and the voltage of the inductor L1.
[0041] Specifically, Figure 6 and Figure 7 As shown, the sampling circuit also includes an output voltage sampling circuit 43 and a resistor voltage sampling circuit 44. The output voltage sampling circuit 43 is electrically connected to the No. 2 terminal of the diode U1; the resistor voltage sampling circuit 44 is electrically connected to the No. 1 terminal and the No. 2 terminal of the resistor R6 respectively; wherein the output voltage sampling circuit 43 is used to collect the voltage of the output circuit 34, and the resistor voltage sampling circuit 44 is used to collect the voltage of the resistor R6. It should be noted that the output voltage sampling circuit 43 uses a series resistor voltage-dividing sampling circuit. In this embodiment, three resistors are connected in series, so , where It is approximately equal to the voltage output by the transformer 33 after the power supply U inputs the resonant circuit; the resistor voltage sampling circuit 44 is consistent with the principles of the capacitor voltage sampling circuit 41 and the inductor voltage sampling circuit 42, and will not be described in detail here.
[0042] In summary, the present invention sets detection points C_A, C_B and detection points L_A and L_B on the connection lines of capacitor C7 and inductor L1, respectively, so that the capacitor voltage sampling circuit 41 can detect the voltage on capacitor C7 and the connection line of capacitor C7, and the inductor voltage sampling circuit 42 can detect the voltage on inductor L1 and the connection line of inductor L1. In this way, it is ensured that the voltage of capacitor C7 and inductor L1 collected in the working state is accurate, so that the control circuit 2 can calculate the resonant frequency of the resonant cavity 32 in operation. And the switching frequency of MOS tube Q1 and MOS tube Q2 is controlled to be equal to the resonant frequency, ensuring that MOS tube Q1 and MOS tube Q2 can achieve ZVS conduction, so as to reduce the power loss of MOS tube Q1 and MOS tube Q2 when they are turned on.
[0043] At the same time, the circuit enters the resonant state, which can effectively eliminate the harmonics in the square wave and reduce the noise interference in the sine wave of the output circuit's base frequency output, thereby improving the power conversion efficiency of the LLC circuit and outputting a more stable voltage to the electrical equipment.
[0044] The above is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.
Claims
1. A resonant cavity detection and dynamic adjustment circuit, characterized in that: include: Power Supply (1); A control circuit (2) electrically connected to the power supply (1); A resonant circuit (3) comprising: A switch module (31), comprising a first switch element (311) and a second switch element (312), wherein the first switch element (311) is electrically connected to a power source (1), a control circuit (2) and the second switch element (312), respectively, and the second switch element (312) is electrically connected to the control circuit (2); The resonant cavity (32) comprises a first resonant element (321) and a second resonant element (322), wherein the first resonant element (321) is electrically connected to the second switch element (312) and the second resonant element (322) respectively; A transformer (33), the transformer (33) being electrically connected to the first switch element (311), the second switch element (312) and the second resonant element (322) respectively; An output circuit (34) comprises a sampling element (341), wherein the sampling element (341) is electrically connected to the transformer (33); and a sampling circuit (4), the sampling circuit (4) being electrically connected to the control circuit (2), the second switch element (312), the first resonant element (321), the second resonant element (322), the transformer (33) and the sampling element (341) respectively; The control circuit (2) calculates the initial resonance frequency f0 of the resonance cavity (32) after initialization, and controls the first switch element (311) and the second switch element (312) to be alternately turned on according to the initial resonance frequency f0. When the first switch element (311) is turned on and the second switch element (312) is turned off, the sampling circuit (4) collects the voltages U1 and U2 of the first resonance element (321) and the second resonance element (322), and transmits the collected voltage values U1 and U2 to the control circuit (2). The control circuit (2) calculates the resonance frequency at this time according to the voltage U1 of the first resonance element (321), the voltage U2 of the second resonance element (322) and the transformation ratio of the transformer (33) itself. The resonant frequency f1 of the resonant cavity (32) when it is working; when the second switch element (312) is turned on and the first switch element (311) is turned off, the sampling circuit (4) collects the voltages U3 and U4 of the first resonant element (321) and the second resonant element (322); the control circuit (2) calculates the resonant frequency f2 of the resonant cavity (32) when it is working at this time according to the voltage U3 of the first resonant element (321), the voltage U4 of the second resonant element (322) and the transformation ratio of the transformer (33) itself; the control circuit (2) calculates the average value F of the resonant frequency of the resonant cavity (32) when it is working according to f1 and f2, and then adjusts the switching frequency of the first switch element (311) and the second switch element (312) to F.
2. The resonant cavity detection and dynamic adjustment circuit according to claim 1, characterized in that: The first switch element (311) comprises a MOS transistor Q1, the second switch element (312) comprises a MOS transistor Q2, the MOS transistor Q1 and the MOS transistor Q2 respectively have a drain D, a gate G and a source S, the first resonant element (321) comprises a capacitor C7, the second resonant element (322) comprises an inductor L1, the capacitor C7 and the inductor L have a No. 1 terminal and a No. 2 terminal; the drain D of the MOS transistor Q1 is electrically connected to the power supply (1), the gate G of the MOS transistor Q1 is electrically connected to the control circuit (2), the source S of the MOS transistor Q1 is electrically connected to the transformer (33) and the drain D of the MOS transistor Q2 respectively; the drain D of the MOS transistor Q2 is electrically connected to the transformer (33), the gate G of the MOS transistor Q2 is electrically connected to the control circuit (2), the source S of the MOS transistor Q2 is electrically connected to the sampling circuit (4) and the No. 1 terminal of the capacitor C7 respectively; the No. 2 terminal of the capacitor C7 is electrically connected to the No. 1 terminal of the inductor L1, and the No. 2 terminal of the inductor L1 is electrically connected to the transformer (33); The control circuit (2) reads the initial capacitance value C1 and the inductance value L1 of the capacitor C7 and the inductor L1 respectively, and calculates the initial resonant frequency of the resonant cavity (32). The control circuit (2) controls the MOS transistor Q1 and the MOS transistor Q2 to be turned on alternately according to the initial resonant frequency f0.
3. The resonant cavity detection and dynamic adjustment circuit according to claim 2, characterized in that: A voltage sampling point C_B of the capacitor C7 is provided on the source electrode S of the MOS tube Q2, another sampling point C_A of the capacitor C7 is provided on the No. 2 end of the inductor L1, and the sampling point C_B and the sampling point C_A are respectively electrically connected to the sampling circuit (4); a sampling point L_A of the inductor L1 is provided on the No. 2 end of the capacitor C7, another sampling point L_B of the inductor L1 is provided on the transformer (33), and the sampling point L_A and the sampling point L_B are respectively electrically connected to the sampling circuit (4); when the MOS tube Q1 is turned on, the sampling circuit (4) transmits the voltage U1 of the capacitor C7 and the voltage U2 of the inductor L1 to the control circuit (2), and the control circuit (2) calculates the dynamic capacitance of the capacitor C7 , the dynamic inductance of inductor L1 , and then calculate ; When the MOS tube Q2 is turned on, the sampling circuit (4) transmits the voltage U3 of the sampling capacitor C7 and the voltage U4 of the inductor L1 to the control circuit (2). The control circuit (2) calculates the dynamic capacitance of the capacitor C7. And the dynamic inductance of inductor L1 , and then calculate , in the above formula, i1 is the inverse of the transformer (33) ratio, j is the imaginary unit; The control circuit (2) calculates the average value F of the resonant frequency of the resonant cavity (32) when it is working according to f1 and f2, and then adjusts the switching frequency of the MOS transistor Q1 and the MOS transistor Q2 to F.
4. The resonant cavity detection and dynamic adjustment circuit according to claim 1, characterized in that: The sampling element (341) includes a resistor R6, the resistor R6 has a terminal 1 and a terminal 2, the terminal 1 of the resistor R6 is electrically connected to the transformer (33), the terminal 2 of the resistor R6 outputs a voltage, and the terminal 1 and the terminal 2 of the resistor R6 are electrically connected to the sampling circuit (4) respectively.
5. The resonant cavity detection and dynamic adjustment circuit according to claim 1, characterized in that: The output circuit (34) further includes a reverse protection element (342), the reverse protection element (342) including a diode U1, the diode U1 having a terminal 1 and a terminal 2, the terminal 1 of the diode U1 being electrically connected to the transformer (33); the terminal 2 of the diode U1 outputs a voltage, and the terminal 2 of the diode U1 is electrically connected to the sampling circuit (4).
6. The resonant cavity detection and dynamic adjustment circuit according to any one of claims 4-5, characterized in that: A sampling point V_A is provided at the No. 2 end of the diode U1, and the sampling point V_A is electrically connected to the sampling circuit (4); a sampling point V_B is provided at the No. 1 end of the resistor R6, and a sampling point V- is provided at the No. 2 end of the resistor R6, and the sampling point V_B and the sampling point V- are electrically connected to the sampling circuit (4) respectively; When the MOS tube Q1 is turned on, the sampling circuit (4) also collects the voltage U of the output circuit (34) through the sampling point V_A. 01 , sampling circuit (4) collects the voltage value U of resistor R6 R6(1) , and transmits it to the control circuit (2), which calculates the current of the resistor R6 at this time , the control circuit (2) is then based on , calculate the equivalent resistance R of the output circuit (34) ac1 , while calculating the gain ; When the MOS tube Q2 is turned on, the sampling circuit (4) also collects the voltage U of the output circuit (34) through the sampling point V_A. 02 , sampling circuit (4) collects the voltage value U of resistor R6 R6(2) , and transmits it to the control circuit (2), which calculates the current of the resistor R6 at this time , the control circuit (2) is then based on , calculate the equivalent resistance R of the output circuit (34) ac2 , while calculating the gain In the above formula, R is the resistance of the resistor R6, n is the transformation ratio of the transformer (33), and the control circuit (2) calculates the average gain Q according to Q1 and Q2, and according to R ac1 and R ac2 Calculate the average equivalent resistance R ac , and then the control circuit (2) adjusts the average equivalent resistance R ac , so that the average gain Q=1.
7. The resonant cavity detection and dynamic adjustment circuit according to claim 1, characterized in that: The control circuit (2) comprises a control chip (21), an oscillation module (22), a reset module (23), a filter module (24), a current limiting module (25) and a protection module (26); the control chip (21) has a plurality of ports; the oscillation module (22) is electrically connected to terminal 5 and terminal 6 of the control chip (21), respectively; the reset module (23) is electrically connected to terminal 7 of the control chip (21); the reset module (23) is also electrically connected to a power supply (1) and is grounded to SGND; The filter module (24) is electrically connected to the No. 9 terminal and the No. 30 terminal of the control chip (21), and the filter module (24) is grounded SGND; the current limiting module (25) is electrically connected to the No. 11 terminal and the No. 21 terminal of the control chip (21), the current limiting module (25) is also electrically connected to the power supply (1), and is grounded SGND; the protection module (26) is electrically connected to the No. 12 terminal and the No. 13 terminal of the control chip (21), the protection module (26) is also electrically connected to the power supply (1), and is grounded SGND.
8. The resonant cavity detection and dynamic adjustment circuit according to claim 6, characterized in that: The sampling circuit (4) comprises a capacitor voltage sampling circuit (41) and an inductor voltage sampling circuit (42); the capacitor voltage sampling circuit (41) is electrically connected to detection points C_A and C_B respectively; the inductor voltage sampling circuit (42) is electrically connected to detection points L_A and L_B respectively; wherein the capacitor voltage sampling circuit (41) is used to collect voltages U1 and U3 of the capacitor C7 during operation; and the inductor voltage sampling circuit (42) is used to collect voltages U2 and U4 of the inductor L1 during operation.
9. The resonant cavity detection and dynamic adjustment circuit according to claim 6, characterized in that: The sampling circuit (4) further comprises an output voltage sampling circuit (43) and a resistor voltage sampling circuit (44); the output voltage sampling circuit (43) is electrically connected to the No. 2 terminal of the diode U1; the resistor voltage sampling circuit (44) is electrically connected to the No. 1 terminal and the No. 2 terminal of the resistor R6 respectively; wherein the output voltage sampling circuit (43) is used to collect the voltage of the output circuit (34), and the resistor voltage sampling circuit (44) is used to collect the voltage of the resistor R6.
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