SQUID low-noise acquisition system and method based on magnetic flux offset correction technology

Abstract

The invention relates to the field of geophysical exploration, and provides an SQUID low-noise acquisition system and method based on a magnetic flux offset correction technology. The system comprises a primary differential amplification circuit, an offset correction circuit, a segmented acquisition circuit and a data processing module, the offset correction circuit is composed of a magnetic flux offset extraction circuit and a subtractor circuit, and real-time correction of a magnetic flux offset signal is realized by extracting the magnetic flux offset of an input signal and performing subtraction on an original signal; and a magnetic field response signal with a larger dynamic range is obtained by combining a segmented acquisition circuit and data processing. According to the invention, the SQUID output signal is conditioned based on the magnetic flux offset correction technology, and the baseline drift problem generated in the working process of the SQUID is solved, so that the segmented acquisition requirement is met, the high signal-to-noise ratio acquisition of the weak magnetic field response signal is realized, and the dynamic range of the SQUID detection system is further improved.

Description

Technical Field

[0001] The present invention relates to the field of geophysical exploration, and in particular to a SQUID low-noise acquisition system and method based on magnetic flux offset correction technology. Background Art

[0002] The superconducting quantum interference device (SQUID) is a high-precision quantum precision measurement sensor. Compared with the traditional induction coil or magnetic bar for measuring magnetic field signals, the SQUID can directly measure the B-field information. The sensor has a larger bandwidth, lower noise, and can receive weaker magnetic field signals, which is more advantageous for the exploration of deep metal resources.

[0003] Since the 1970s, domestic and foreign scholars have successively applied SQUID to detection methods such as magnetic method and transient electromagnetic method. How to give full play to the advantages of SQUID's extremely high sensitivity has also become an urgent problem to be solved in the SQUID acquisition system. The dynamic range of the existing SQUID acquisition system is generally below 120dB, and the noise level is relatively high. At the same time, because the SQUID readout circuit adopts a transformer-based flux modulation method, the dynamic characteristics are poor, and baseline drift will occur during operation, resulting in limited input signal amplification, thereby affecting the signal quality of the acquisition system. Therefore, how to suppress the baseline drift of the SQUID signal and further improve the acquisition accuracy of the SQUID system is an urgent problem to be solved.

[0004] At present, the prior art discloses a magnetic field measurement system or method with a large dynamic range to achieve magnetic field measurement with a large dynamic range; there is also an electromagnetic measurement device that switches the amplification factor through a zero-crossing comparator and a programmable amplifier to improve the dynamic range of the signal collected by the measurement device and reduce the impact of noise on the received signal. However, the prior art does not deal with the baseline drift problem that will occur during the operation of the SQUID.

[0005] In summary, the current research on SQUID acquisition systems mainly focuses on improving the dynamic range of the acquisition system through methods such as polarity conversion and segmented amplification. However, how to solve the baseline drift problem generated during the operation of the SQUID is still a technical problem that needs to be solved urgently. Summary of the invention

[0006] In order to solve the above technical problems, the present invention provides a SQUID low-noise acquisition system based on flux offset correction technology, including a primary differential amplifier circuit, an offset correction circuit, a segmented acquisition circuit and a data processing module.

[0007] The input end of the primary differential amplifier circuit is connected to the output end of the superconducting quantum interference device (SQUID) readout circuit, and the output end of the primary differential amplifier circuit is divided into two paths, one path is connected to the filter circuit in the segmented acquisition circuit, and the other path is connected to the offset correction circuit. The primary differential amplifier circuit performs fixed gain differential amplification on the SQUID signal.

[0008] The offset correction circuit includes a flux offset extraction circuit and a subtractor circuit; in order to be suitable for the dynamic change characteristics of the flux offset in the SQUID signal, the flux offset extraction circuit includes two groups of fifth-order Butterworth low-pass filter circuits with the same structure, which are set in a differential input form, and the input end of the fifth-order Butterworth low-pass filter circuit is connected to the output end of the primary differential amplifier circuit; the subtractor circuit includes a low-offset operational amplifier, whose same-direction input end is connected to the output end of the primary differential amplifier circuit, and whose inverting input end is connected to the output end of the fifth-order Butterworth low-pass filter circuit; the offset correction circuit realizes the flux offset correction function of the input signal by performing a subtraction operation on the signal; the output end of the offset correction circuit is divided into two paths, one path is directly connected to the filter circuit in the segmented acquisition circuit for the early signal, and the other path is connected to the secondary amplifier circuit in the segmented acquisition circuit for the late signal.

[0009] Preferably, the fifth-order Butterworth low-pass filter circuit is two second-order Sallen-key filters and an active RC filter connected in sequence to provide a fast step response and stopband drop rate, thereby realizing a real-time correction function for the flux offset signal; the cutoff frequency calculation formulas of the flux offset extraction circuit are respectively: , , where f c1 、f c2 are the cut-off frequencies of the second-order Sallen-key filter and the active RC filter, respectively. R1 and R2 are the resistances of the second-order Sallen-key filter, C1 and C2 are the capacitances of the second-order Sallen-key filter, and R and C are the resistance and capacitance of the active RC filter, respectively.

[0010] Furthermore, the cut-off frequency is set to 1 Hz by changing the resistance and capacitance values, thereby realizing the extraction of the DC offset of the input signal.

[0011] The segmented acquisition circuit includes a secondary amplifier circuit, a filter circuit and an AD acquisition circuit, which are connected in sequence. The AD acquisition circuit synchronously acquires the SQUID original reference signal, the SQUID early signal and the SQUID late signal output by the filter circuit.

[0012] The data processing module includes an FPGA control unit, a data receiving and normalization module, and a data integration and preprocessing module. The FPGA control unit, the data receiving and normalization module, and the data integration and preprocessing module are connected in sequence. The FPGA control unit is connected to the output end of the AD acquisition circuit to realize the logic control of the AD acquisition circuit and the transmission of data. The data receiving and normalization module realizes the reception, decoding and normalization of data. The data integration and preprocessing module realizes the integration of the normalized data and compares it with the original reference signal data, thereby verifying the feasibility and effectiveness of the flux offset correction technology, and realizing the preprocessing of the data by extracting the secondary field attenuation curve.

[0013] The present invention also provides a SQUID low-noise acquisition method based on a magnetic flux offset correction technology. The signal processing flow is as follows:

[0014] Step 1: The SQUID signal is input into the primary differential amplifier circuit in a differential form, and the input differential signal is amplified with an appropriate gain by adjusting the resistance ratio between the input terminal and the output feedback terminal of the primary differential amplifier circuit.

[0015] Step 2: The output signal of the primary differential amplifier circuit is divided into two paths, one path is passed into the filter circuit in the segmented acquisition circuit as the original reference signal, and the other path is passed into the offset correction circuit for processing.

[0016] Step 3: The offset correction circuit first extracts the magnetic flux offset of the input signal, and then subtracts the input signal from the magnetic flux offset through a subtractor circuit to implement the magnetic flux offset correction function of the input signal.

[0017] Step 4, the output signal of the offset correction circuit is divided into two paths, one path for the early signal is directly passed into the filter circuit in the segmented acquisition circuit, and the other path for the late signal is firstly passed through the secondary amplifier circuit for secondary amplification and then passed into the filter circuit.

[0018] Step 5: The filtering circuit removes high-frequency noise from the three sets of input signals through a low-pass filter, and passes the optimized signals into the AD acquisition circuit.

[0019] Step 6: The AD acquisition circuit is set to a three-channel acquisition mode to synchronously acquire the three groups of signals at different stages, namely, the SQUID original reference signal, the SQUID early signal and the SQUID late signal output by the filtering circuit, and transmit the acquired data to the host computer through the FPGA control unit in the data processing module for data processing.

[0020] Step 7. After the host computer receives the data, it first normalizes the data through the data receiving and normalization module, and then compares the integrated data with the original reference signal data through the data integration and preprocessing module to verify the feasibility and effectiveness of the flux offset correction technology. Finally, the data is preprocessed by extracting the secondary field attenuation curve.

[0021] Beneficial effects of the present invention:

[0022] The present invention provides a SQUID low-noise acquisition system and method based on flux offset correction technology. The offset correction circuit is composed of a flux offset extraction circuit and a subtractor circuit. By extracting the flux offset of the input signal and performing a subtraction operation on the original signal, real-time correction of the flux offset signal is achieved, and a time-domain electromagnetic response signal with a larger dynamic range is obtained by combining the segmented acquisition circuit and data processing. The present invention conditions the SQUID output signal based on the flux offset correction technology to solve the baseline drift problem generated during the operation of the SQUID, thereby meeting the segmented acquisition requirements, achieving high signal-to-noise ratio acquisition of weak magnetic field response signals, and further improving the dynamic range of the SQUID detection system. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of the structure of the SQUID low-noise acquisition system based on the flux offset correction technology of the present invention.

[0024] Figure 2 This is a schematic diagram of the structure of the primary differential amplifier circuit of the present invention.

[0025] Figure 3 Schematic diagram of the structure of the offset correction circuit of the present invention.

[0026] Figure 4 It is a schematic diagram of the structure of the secondary amplifier circuit in the segmented acquisition circuit of the present invention.

[0027] Figure 5 It is a schematic diagram of the structure of the filter circuit in the segmented acquisition circuit of the present invention.

[0028] Figure 6 It is a schematic diagram of the structure of the AD acquisition circuit in the segmented acquisition circuit of the present invention.

[0029] Figure 7 FIG. 4 is a schematic diagram of a magnetic flux offset correction result according to an embodiment of the present invention.

[0030] 1. Primary differential amplifier circuit, 2. Offset correction circuit, 3. Segmented acquisition circuit, 4. Data processing module, 5. Magnetic flux offset extraction circuit, 6. Subtractor circuit, 7. Secondary amplifier circuit, 8. Filter circuit, 9. AD acquisition circuit, 10. FPGA control unit, 11. Data receiving and normalization module, 12. Data integration and preprocessing module, 13. SQUID signal, 14. Original reference signal, 15. Early signal, 16. Late signal. DETAILED DESCRIPTION

[0031] Embodiment 1,

[0032] This embodiment provides a SQUID low-noise acquisition system based on flux offset correction technology, such as Figure 1 As shown: it includes a primary differential amplifier circuit 1, an offset correction circuit 2, a segmented acquisition circuit 3 and a data processing module 4.

[0033] like Figure 2 As shown: the primary differential amplifier circuit 1 includes LT6203 ultra-low noise dual operational amplifiers U1A and U1B, resistors R1-R4, where R1=R3, R2=R4; the same-direction input terminal of the amplifier U1A is grounded, the inverting input terminal is connected to R1, and the reverse output feedback terminal is connected to R2 to form an inverting amplifier; the same-direction input terminal of the amplifier U1B is grounded, the inverting input terminal is connected to R3, and the reverse output feedback terminal is connected to R4 to form an inverting amplifier; the input terminal of the primary differential amplifier circuit 1 is connected to the output terminal of the superconducting quantum interference device (SQUID) readout circuit, the positive input of the input signal is connected to the R1 terminal, and the negative input is connected to the R3 terminal. According to actual needs, the gain of the primary differential amplifier circuit 1 can be changed by adjusting the resistance values ​​of the R1-R4 resistors, and the calculation formula is: , where G represents gain, and R1-R4 represent the resistance values ​​of corresponding numbers. One output of the primary differential amplifier circuit 1 is connected to the filter circuit 8 in the segmented acquisition circuit 3, and the other output is connected to the offset correction circuit 2. The primary differential amplifier circuit 1 performs fixed gain differential amplification on the SQUID signal.

[0034] The offset correction circuit 2 includes a magnetic flux offset extraction circuit 5 and a subtractor circuit 6; Figure 3As shown: In order to adapt to the dynamic change characteristics of the magnetic flux offset in the SQUID signal, the magnetic flux offset extraction circuit 5 is set to a differential input form, and is composed of two groups of fifth-order Butterworth low-pass filter circuits with the same structure. The fifth-order Butterworth low-pass filter circuit is two second-order Sallen-key filters and an active RC filter connected in sequence. The input end of the second-order Sallen-key filter is connected to the output end of the primary differential amplifier circuit 1 to provide a fast step response and stopband drop rate, thereby realizing the real-time correction function of the magnetic flux offset signal.

[0035] One of the five-order Butterworth low-pass filter circuits includes LT1007 high-speed operational amplifiers U3-U5, resistors R5-R9 and capacitors C1-C11, and the other five-order Butterworth low-pass filter circuit includes LT1007 high-speed operational amplifiers U6-U8, resistors R10-R14 and capacitors C12-C22. First, after differential amplification, the SQUID signal is passed through resistors R5 and R6 to the in-phase input terminal of amplifier U3, one end of capacitor C1 is connected to resistors R5 and R6, and the other end is passed to the in-phase output feedback terminal of amplifier U3, one end of capacitor C2 is connected to the in-phase input terminal of amplifier U3, and the other end is grounded, capacitors C3 and C4 are respectively connected to positive and negative power supplies as bypass capacitors to filter out high-frequency noise, and the circuit structures of amplifiers U4, U6, U7 and their surrounding resistors and capacitors are the same as above; the circuit structures of amplifiers U3, U4 and their surrounding resistors and capacitors respectively constitute two second-order Sallen-key filters connected in sequence. , the circuit structure of amplifiers U6, U7 and their surrounding resistors and capacitors respectively constitutes two second-order Sallen-key filters connected in sequence; secondly, after the signal is output from the output end of amplifier U4, it is passed into the non-inverting input end of amplifier U5 through resistor R9, one end of capacitor C9 is connected to the non-inverting input end of amplifier U5, and the other end is grounded, capacitors C10 and C11 are respectively connected to positive and negative power supplies as bypass capacitors to filter out high-frequency noise, the circuit structure of amplifier U8 and its surrounding resistors and capacitors is the same as the above-mentioned amplifier U5, and the circuit structures of amplifiers U5, U8 and their surrounding resistors and capacitors respectively constitute active RC filters.

[0036] The cut-off frequency calculation formula of the magnetic flux offset extraction circuit 5 is: , , where f c1 、f c2are the cutoff frequencies of the Sallen-key filter and the active RC filter, respectively. Ri and Rj are the resistances of the corresponding second-order Sallen-key filters, Cm and Cn are the capacitances of the corresponding second-order Sallen-key filters, and Rx and Cy are the resistance and capacitance of the corresponding active RC filters. For example, the cutoff frequency calculation formulas of the first second-order Sallen-key filter and the active RC filter are: , , where f c1 、f c2 are the cutoff frequencies of the second-order Sallen-key filter and the active RC filter, respectively. R5, R6, C1, C2 and R9, C9 are the resistance and capacitance of the corresponding circuits. By changing the resistance and capacitance values, the cutoff frequency is set to 1Hz, and the DC offset of the input signal can be extracted.

[0037] The subtractor circuit 6 includes OP07 low offset operational amplifiers U9 and U10, resistors R15-R22 and capacitors C23-C26, wherein the same-direction input terminal of the amplifier U9 is connected to the output terminal of the primary differential amplifier circuit 1 via resistor R15, the inverting input terminal of the amplifier U9 is connected to the output terminal of the fifth-order Butterworth low-pass filter circuit via resistor R16, one end of the resistor R17 is connected to the same-direction input terminal of the amplifier U9, and the other end is grounded, the resistor R18 is connected to the inverting output feedback terminal of the amplifier U9, and the capacitors C23 and C24 are respectively connected to the positive and negative power supplies as bypass capacitors, thereby forming one part of the subtractor circuit 6; the other part is composed of the amplifier U10 and its surrounding resistors R19-R22 and capacitors C25-C26 using the same circuit structure; the offset correction circuit 2 realizes the flux offset correction function of the SQUID signal by subtracting the two signals; the voltage calculation formula of one part of the subtractor circuit 6 is: , where R15=R16, R17=R18, U i , U j are the input signals of the circuit’s non-inverting input and inverting input respectively, U O is the output signal of the circuit.

[0038] The output end of the offset correction circuit 2 is divided into two paths, one path is directly connected to the filter circuit 8 in the segmented acquisition circuit 3 for the early signal, and the other path is connected to the secondary amplifier circuit 7 in the segmented acquisition circuit 3 for the late signal.

[0039] The segmented acquisition circuit 3 includes a secondary amplifier circuit 7, a filter circuit 8 and an AD acquisition circuit 9, which are connected in sequence. Figure 4As shown: the secondary amplifier circuit 7 includes an AD8139 differential amplifier U11 and resistors R23-R27, wherein R23=R25, R24=R26, R23 and R24 are respectively connected to the same-direction input terminal and the output feedback terminal of the amplifier U11, R25 and R26 are respectively connected to the reverse input terminal and the output feedback terminal of the amplifier U11, and both ends of R27 are respectively connected to the same-direction output terminal and the reverse output terminal of the amplifier U11; the circuit realizes high signal-to-noise ratio acquisition of the SQUID signal by amplifying the late weak signal, and its voltage calculation formula is: , where V OP 、V ON Represent the voltage of the same direction output terminal and the reverse direction output terminal respectively, V IP 、V IN Represent the voltage of the same direction input terminal and the reverse input terminal respectively, R F , R G They represent the resistance values ​​of the output feedback terminal and the input terminal respectively.

[0040] like Figure 5 As shown: the filter circuit 8 includes LTC1563 active low-pass filters U12-U14 and peripheral circuits (which are prior art and the structure is not described here in detail. Figure 5 The filter circuit shown in is one group of LTC1563 active low-pass filters and peripheral circuits, and the other two groups have the same structure). This circuit filters out high-frequency noise in three groups of different input signals through low-pass filtering, thereby improving the signal quality of the input signal, and passes the optimized output signal to the AD acquisition circuit 9. The cut-off frequency calculation formula of the filter circuit 8 is: , where f c is the cut-off frequency of the filter circuit 8, and R is the resistance value.

[0041] like Figure 6 As shown: the AD acquisition circuit 9 is a three-channel acquisition mode, which acquires three groups of signals at different stages output by the filter circuit 8. The circuit includes three groups of ADC drive circuits and analog-to-digital conversion circuits with the same structure; the ADC drive circuit is composed of an ADA4945 fully differential driver and its peripheral circuits (which is the prior art, and the structure is not described here in detail), which is used to adjust the amplitude of the input signal to meet the signal input requirement of the analog-to-digital converter; the analog-to-digital conversion circuit is composed of an LTC2380-24 analog-to-digital converter and its peripheral circuits (which is the prior art, and the structure is not described here in detail), which is used to convert the input analog signal into a digital signal. The AD acquisition circuit 9 synchronously acquires the SQUID original reference signal, the SQUID early signal and the SQUID late signal output by the filter circuit 8, thereby realizing high-precision acquisition of the full waveform of the SQUID signal, and at the same time transmits the acquired data to the data processing module 4 for subsequent data processing.

[0042] The data processing module 4 includes an FPGA control unit 10, a data receiving and normalization module 11 and a data integration and preprocessing module 12. The FPGA control unit 10, the data receiving and normalization module 11 and the data integration and preprocessing module 12 are connected in sequence. The FPGA control unit 10 is composed of a programmable logic device EP4CE10F17 and its peripheral circuits (which are prior art and the structure is not described here), and is connected to the output end of the AD acquisition circuit 9 to realize the logic control of the AD acquisition circuit 9 and the transmission of data; the data receiving and normalization module 11 uses Labview software as a platform and realizes the reception, decoding and normalization of data through the host computer design (which is prior art and the structure is not described here); the data integration and preprocessing module 12 realizes the integration of the normalized data and compares it with the original reference signal data, thereby verifying the feasibility and effectiveness of the flux offset correction technology, and realizing the preprocessing of the data by extracting the secondary field attenuation curve.

[0043] Embodiment 2,

[0044] This embodiment provides a SQUID low-noise acquisition method based on a flux offset correction technology, using a SQUID low-noise acquisition system based on a flux offset correction technology provided in Embodiment 1, and the signal processing flow is as follows:

[0045] Step 1: The SQUID signal 13 is input into the primary differential amplifier circuit 1 in a differential form. By adjusting the resistance ratio between the input terminal and the output feedback terminal of the primary differential amplifier circuit 1, the input differential signal is amplified with an appropriate gain.

[0046] Step 2: The output signal of the primary differential amplifier circuit 1 is divided into two paths, one path is passed into the filter circuit 8 in the segmented acquisition circuit 3 as the original reference signal 14, and the other path is passed into the offset correction circuit 2 for processing.

[0047] Step 3: The offset correction circuit 2 first extracts the flux offset of the input signal through the flux offset extraction circuit 5, and then subtracts the input SQUID signal from the flux offset through the subtractor circuit 6 to achieve the flux offset correction function of the input signal.

[0048] Step 4, the output signal of the offset correction circuit 2 is divided into two paths, one path for the early signal 15 is directly passed into the filter circuit 8 in the segmented acquisition circuit 3, and the other path for the late signal 16 is firstly amplified by the secondary amplifier circuit 7 and then passed into the filter circuit 8.

[0049] Step 5, the filtering circuit 8 removes high-frequency noise in the three input signals of the original reference signal 14, the early signal 15, and the late signal 16 output by the secondary amplifier circuit 7 through a low-pass filter, and passes the optimized signal into the AD acquisition circuit 9.

[0050] Step 6, the AD acquisition circuit 9 is set to a three-channel acquisition mode, and the three groups of signals at different stages, namely, the SQUID original reference signal, the SQUID early signal and the SQUID late signal output by the filter circuit 8, are synchronously acquired, and the acquired data is transmitted to the host computer through the FPGA control unit 10 in the data processing module 4 for data processing.

[0051] Step 7: After the host computer receives the data, it first normalizes the data through the data receiving and normalization module 11, and then compares the integrated data with the original reference signal data through the data integration and preprocessing module 12 to verify the feasibility and effectiveness of the flux offset correction technology. Finally, the data is preprocessed by extracting the secondary field attenuation curve.

[0052] The flux offset correction result of this embodiment is as follows Figure 7 shown.

[0053] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A SQUID low-noise acquisition system based on flux offset correction technology, characterized in that: It includes a primary differential amplifier circuit, an offset correction circuit, a segmented acquisition circuit and a data processing module; The input end of the primary differential amplifier circuit is connected to the output end of the superconducting quantum interference device readout circuit, and the output end of the primary differential amplifier circuit is divided into two paths, one path is connected to the filter circuit in the segmented acquisition circuit, and the other path is connected to the offset correction circuit; The offset correction circuit includes a magnetic flux offset extraction circuit and a subtractor circuit; the magnetic flux offset extraction circuit includes two groups of fifth-order Butterworth low-pass filter circuits with the same structure, which are set to a differential input form, and the input end of the fifth-order Butterworth low-pass filter circuit is connected to the output end of the primary differential amplifier circuit; the subtractor circuit includes a low-offset operational amplifier, whose non-inverting input end is connected to the output end of the primary differential amplifier circuit, and whose inverting input end is connected to the output end of the fifth-order Butterworth low-pass filter circuit; the output end of the offset correction circuit is divided into two paths, one path is directly connected to the filter circuit in the segmented acquisition circuit for early signals, and the other path is connected to the secondary amplifier circuit in the segmented acquisition circuit for late signals; The segmented acquisition circuit includes a secondary amplifier circuit, a filter circuit and an AD acquisition circuit, which are connected in sequence, and the AD acquisition circuit synchronously acquires the SQUID original reference signal, the SQUID early signal and the SQUID late signal output by the filter circuit; The data processing module includes an FPGA control unit, a data receiving and normalization module, and a data integration and preprocessing module. The FPGA control unit, the data receiving and normalization module, and the data integration and preprocessing module are connected in sequence. The FPGA control unit is connected to the output end of the AD acquisition circuit. The data receiving and normalization module realizes the reception, decoding and normalization processing of data. The data integration and preprocessing module realizes the integration of the normalized data and compares it with the original reference signal data, and realizes the preprocessing of the data by extracting the secondary field attenuation curve.

2. The SQUID low-noise acquisition system based on flux offset correction technology according to claim 1, characterized in that: The fifth-order Butterworth low-pass filter circuit is two second-order Sallen-key filters and an active RC filter connected in sequence. The cutoff frequency calculation formulas of the magnetic flux offset extraction circuit are: , , where f c1 、f c2 are the cut-off frequencies of the second-order Sallen-key filter and the active RC filter, respectively. R1 and R2 are the resistances of the second-order Sallen-key filter, C1 and C2 are the capacitances of the second-order Sallen-key filter, and R and C are the resistance and capacitance of the active RC filter, respectively.

3. The SQUID low noise acquisition system based on flux offset correction technology according to claim 2, characterized in that: By changing the resistor and capacitor values, the cutoff frequency is set to 1 Hz to extract the DC offset of the input signal.

4. A SQUID low-noise acquisition method based on flux offset correction technology, characterized in that: The SQUID low-noise acquisition system based on the flux offset correction technology described in any one of claims 1 to 3 is adopted, and the signal processing process is as follows: Step 1, the SQUID signal is input into the primary differential amplifier circuit in a differential form, and the input differential signal is amplified with an appropriate gain by adjusting the resistance ratio between the input end and the output feedback end of the primary differential amplifier circuit; Step 2, the output signal of the primary differential amplifier circuit is divided into two paths, one path is passed to the filter circuit in the segmented acquisition circuit as the original reference signal, and the other path is passed to the offset correction circuit for processing; Step 3: The offset correction circuit first extracts the magnetic flux offset of the input signal, and then performs a subtraction operation on the input signal and the magnetic flux offset through a subtractor circuit to realize the magnetic flux offset correction function of the input signal; Step 4, the output signal of the offset correction circuit is divided into two paths, one path is for early signals and directly passes into the filter circuit in the segmented acquisition circuit, and the other path is for late signals and first passes through the secondary amplifier circuit for secondary amplification and then passes into the filter circuit; Step 5: The filtering circuit removes high-frequency noise in the three groups of input signals through a low-pass filter, and passes the optimized signals into the AD acquisition circuit; Step 6, the AD acquisition circuit is set to a three-channel acquisition mode, and the three groups of signals at different stages, namely, the SQUID original reference signal, the SQUID early signal and the SQUID late signal output by the filter circuit, are synchronously acquired, and the acquired data are transmitted to the host computer through the FPGA control unit in the data processing module for data processing; Step 7. After the host computer receives the data, it first normalizes the data through the data receiving and normalization module, and then compares the integrated data with the original reference signal data through the data integration and preprocessing module to verify the feasibility and effectiveness of the flux offset correction technology. Finally, the data is preprocessed by extracting the secondary field attenuation curve.

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