Three-section enabling control circuit based on bipolar transistor
By adopting a three-stage enable control circuit based on bipolar transistors in integrated circuits, the problem that single ports in the prior art are difficult to achieve three-stage control and the high-voltage integrated circuit enable terminals cannot operate within the full voltage range, and efficient and simplified enable control is achieved.
Patent Information
- Application Number
- CN202411862378.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-17
- Publication Date
- 2025-05-06
Smart Images
Figure CN119937369A_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a three-stage enabling control circuit based on bipolar transistors. Background Art
[0002] Integrated circuits often require an enable terminal to control the circuit.
[0003] The enable terminal often works in a "two-choice" mode, generally choosing between connecting to a positive power supply and leaving it floating, or choosing between connecting to a positive power supply and leaving it negative, or choosing between connecting to a negative power supply and leaving it floating.
[0004] For example, a programmable gain amplifier (PGA) usually requires two ports to achieve 1, 10, and 100 times gain changes, and input 00, 01, and 10 for programming. If the "three-choose-one" working mode can be realized, one port can be saved.
[0005] The method of comparing the enable terminal voltage with the reference voltage can certainly realize the "three-choice" function, but it relies on a reference voltage and requires two comparators, so the circuit is relatively complicated.
[0006] In addition, if the "three-choice" enable terminal of the high-voltage integrated circuit cannot work in the full voltage range, it is often necessary to provide an additional power supply voltage to ensure its normal operation. In order to simplify the external circuit, it is necessary to enable the enable terminal to work in the full voltage range.
[0007] The enabling circuit designed with CMOS gate circuits operates at low voltage and has a two-choice working mode between connecting to a positive power supply and connecting to a negative power supply.
[0008] like Figure 1 The typical bipolar device enabling circuit shown in the figure is designed to enable I2 <K P2P1 I1, K P2P1 It represents the ratio of the emitter area of PNP tube P2 to that of P1. In the figure, VCC is the positive power supply of the chip, and its voltage value is V CC ; VEE is the negative power supply of the chip, and its voltage value is V EE ; FN is the enable terminal, and its voltage value is V EN , I1 and I2 are current sources, their current values are I1 and I2 respectively, and the current direction is Figure 1 Middle arrow.
[0009] like Figure 1 As shown, V P2C As the output voltage of the enabling circuit, it is used to control the controlled circuit, V P2C Indicates the collector voltage of tube P2.
[0010] When the FN port is left floating or connected to VCC, VP2C ≈V CC ; When the FN port is connected to VEE, V P2C =V EE +V D1 , V D1 Indicates the forward conduction voltage of diode D1. Although the FN port has three connection modes: floating, connected to VCC, and connected to VEE, the actual enabled state is only V P2C ≈V CC and V P2C =V EE +V D1 Two types. Summary of the invention
[0011] In order to solve the above problems, the present invention provides a three-stage enabling control circuit based on bipolar transistors to realize three-stage control of a single port.
[0012] The technical solution adopted by the present invention is:
[0013] The present application discloses a three-stage enable control circuit based on bipolar transistors, comprising: a three-stage input circuit 100, which has an enable signal input terminal FN; a low-end threshold adjustment circuit 200, used to adjust the low-end threshold of the enable signal input terminal FN; a high-end threshold adjustment circuit 300, used to adjust the high-end threshold of the enable signal input terminal FN; a high-stage current output circuit 400, which has an enable signal output terminal IEN2, and is connected to the three-stage input circuit 100 through the low-end threshold adjustment circuit 200, the high-end threshold adjustment circuit 300 and the high-end current mirror 700; a mid-low-stage current output circuit 600, which has enable signal output terminals IEN0 and IEN1, and the mid-low-stage current output circuit 600 is connected to the three-stage input circuit 100 through a low-end current mirror 800; and a bidirectional voltage regulation reference circuit 500, whose output terminal is connected to the input terminal of the mid-low-stage current output circuit 600.
[0014] Among them, when VE N < low-end threshold, IENO, IEN1 and IEN2 are in the first working state; when the low-end threshold <V EN < high-end threshold, IEN0, IEN1 and IEN2 are in the second working state; when V EN > high-end threshold, IEN0, IEN1 and IEN2 are in the third working state, V EN is the voltage value of the enable signal input terminal FN.
[0015] As an optional technical solution, the three-stage input circuit 100 includes PNP tubes P3, P4, diodes D1, D2, D3 and current sources I1, I2; wherein the base of tube P3 is connected to the collector and then connected to the base of tube P4 and the current source I1, the emitter of tube P4 is connected to the cathode of diode D3, the anode of diode D3 is connected to the anode of diode D1, the cathode of diode D1 is connected to the anode of diode D2, and the cathode of diode D2 is connected to the current source I2.
[0016] As an optional technical solution, the low-end threshold adjustment circuit 200 includes m series-connected NPN tubes in the form of diodes, where m≥1.
[0017] As an optional technical solution, the high-end threshold adjustment circuit 300 includes n series-connected NPN tubes in the form of diodes, where m≥n≥0.
[0018] As an optional technical solution, the high-segment current output circuit 400 includes NPN tubes N1 and N2; wherein the base and collector of tube N1 are short-circuited and then connected to the base of tube N2, and the collector of tube N2 serves as an enable signal output terminal IEN2.
[0019] As an optional technical solution, the bidirectional voltage stabilization reference circuit 500 includes PNP tubes P5, P6, P7, P8, a diode D4 and a current source I3; wherein, the base of tube P5 is connected to the base of tube P6, the collector of tube P5 is connected to the emitter of tube P7, and the base and collector of tube P5 are short-circuited; the base of tube P7 is connected to the base of tube P8, the collector of tube P7 is connected to the current source I3, the base and collector of tube P7 are short-circuited, the base and collector of tube P8 are short-circuited, the emitter of tube P8 is connected to the collector of tube P6, the anode of diode D4 is connected to the collector of tube P8, and the cathode of diode D4 is connected to the emitter of tube P8.
[0020] As an optional technical solution, the mid-to-low-range current output circuit 600 includes PNP tubes P9, P10 and a current source I4; wherein the emitter of tube P9 is connected to the emitter of tube P10 and then connected to the current source I4, the collector of tube P9 serves as an enable signal output terminal IEN0, and the collector of tube P10 serves as an enable signal output terminal IEN1.
[0021] As an optional technical solution, the high-end current mirror 700 includes PNP tubes P1 and P2; wherein the base of tube P1 is connected to the base of tube P2, the base and collector of tube P1 are short-circuited, the collector of tube P1 is also connected to the high-segment current output circuit 400, and the collector of tube P2 is connected to the three-segment input circuit 100.
[0022] As an optional technical solution, the high-end current mirror 700 further includes a resistor R1 , one end of which is connected to the collector of the tube P1 .
[0023] As an optional technical solution, the low-end current mirror 800 includes NPN tubes N5 and N6; wherein the base of tube N5 is connected to the base of tube N6, the base and emitter of tube N5 are short-circuited, the collector of tube N5 is also connected to the three-stage input circuit 100, and the collector of tube N6 is connected to the middle and low-stage current output circuit 600.
[0024] The beneficial effects of the present invention are as follows: the three-stage enabling control circuit based on bipolar transistors provided by the present application, all of whose active devices adopt bipolar transistors, can realize three-stage control of a single port, and can realize high-voltage operation; a three-stage input structure is adopted to realize three-stage enabling control; a three-stage current output structure is adopted to control the controlled circuit with a current signal, and at the same time cooperate with a bidirectional voltage stabilization reference circuit to ensure the normal output of the current signal. BRIEF DESCRIPTION OF THE DRAWINGS
[0025] Figure 1 The enabling circuit is composed of a typical bipolar device in the prior art.
[0026] Figure 2 is a circuit block diagram of a three-stage enable control circuit based on bipolar transistors in an exemplary embodiment.
[0027] Figure 3 is a circuit schematic diagram of a three-stage enable control circuit based on bipolar transistors in an exemplary embodiment.
[0028] Figure 4 Schematic diagram of the circuit structure of a low-end threshold adjustment circuit in an exemplary embodiment.
[0029] Figure 5 Schematic diagram of the circuit structure of a high-end threshold adjustment circuit in an exemplary embodiment.
[0030] Figure 6 is a circuit schematic diagram of a three-stage enable control circuit based on bipolar transistors in another exemplary embodiment.
[0031] Figure 7 is a circuit schematic diagram of a three-stage enable control circuit based on bipolar transistors in yet another exemplary embodiment.
[0032] Figure 8 is a circuit schematic diagram of a three-stage enable control circuit based on bipolar transistors in yet another exemplary embodiment. DETAILED DESCRIPTION
[0033] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present invention generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0034] In order to explain the present embodiment more clearly and concisely, first, the relevant naming rules in the present application are explained.
[0035] In this application, Px represents the xth PNP transistor, Ny represents the yth NPN transistor, and I Pxz / V Pxz They represent the current / voltage at the z port of the xth PNP tube, I Nxz / V Nxz They represent the current / voltage at the z port of the xth NPN tube, respectively. z can be C (collector), B (base), or E (emitter). For example, I P1E Indicates the emitter current of the first PNP tube (i.e. tube P1), I N2C Represents the collector current of the second NPN tube (i.e. tube N2).
[0036] K NxNy Indicates the ratio of the emitter area of tube Nx to that of tube Ny, such as K N1N2 Indicates the ratio of the emitter area of tube N1 to that of tube N2; K PxPy Indicates the ratio of the emitter area of tube Px to that of tube Py, such as K P1P2 Indicates the ratio of the emitter area of tube P1 to that of tube P2; K PxNy Indicates the ratio of the emitter area of tube Px to that of tube Ny, such as K P1N2 Indicates the ratio of the emitter area of tube P1 to that of tube N2; K NyPx Indicates the ratio of the emitter area of tube Ny to that of tube Px, such as K N2P1 Indicates the ratio of the emitter area of tube N2 to that of tube P1; K RxRy Indicates the ratio of the resistance Rx to the resistance Ry, such as K R1R2 =R1 / R2.
[0037] Dx represents the xth diode, I Dx / V Dx They represent the forward current / voltage of the xth diode respectively,
[0038] K DxDy It represents the ratio of the PN junction area of diode Dx to that of diode Dy.
[0039] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.
[0040] Example 1
[0041] like Figure 2 As shown, the present application discloses a three-stage enable control circuit based on bipolar transistors, including: a three-stage input circuit 100, which has an enable signal input terminal FN; a low-end threshold adjustment circuit 200, used to adjust the low-end threshold of the enable signal input terminal FN; a high-end threshold adjustment circuit 300, used to adjust the high-end threshold of the enable signal input terminal FN; a high-stage current output circuit 400, which has an enable signal output terminal IEN2, and is connected to the three-stage input circuit 100 through the low-end threshold adjustment circuit 200, the high-end threshold adjustment circuit 300 and the high-end current mirror 700; a mid-low-stage current output circuit 600, which has enable signal output terminals IEN0 and IEN1, and the mid-low-stage current output circuit 600 is connected to the three-stage input circuit 100 through a low-end current mirror 800; a bidirectional voltage regulation reference circuit 500, whose output terminal is connected to the input terminal of the mid-low-stage current output circuit 600.
[0042] Among them, when VE N < low-end threshold, IENO, IEN1 and IEN2 are in the first working state; when the low-end threshold <V EN < high-end threshold, IEN0, IEN1 and IEN2 are in the second working state; when V EN > high-end threshold, IEN0, IEN1 and IEN2 are in the third working state, V EN The voltage value of the enable signal input terminal FN, IEN0, IEN1 and IEN2 are used to control the controlled sub-circuit inside the chip.
[0043] As an optional implementation, Figure 3 As shown, the three-stage input circuit 100 includes PNP tubes P3, P4, diodes D1, D2, D3 and current sources I1, I2; wherein the base of tube P3 is connected to the collector and then connected to the base of tube P4 and the current source I1, the emitter of tube P4 is connected to the cathode of diode D3, the anode of diode D3 is connected to the anode of diode D1, the cathode of diode D1 is connected to the anode of diode D2, and the cathode of diode D2 is connected to the current source I2.
[0044] As an optional implementation, the low-end threshold adjustment circuit 200 includes m series-connected diode-connected NPN tubes, where m≥1. The diode-connected NPN tube refers to a short circuit between the base and the collector of the NPN tube, such as Figure 4 The figure shows a schematic diagram of m diode-connected NPN tubes connected in series. Figure 3 The figure shows an embodiment when m=1, and the emitter of the tube N3 is connected to the emitter of the tube P3.
[0045] As an optional implementation, Figure 5 As shown, the high-end threshold adjustment circuit 300 includes n series-connected diode-connected NPN tubes, where m≥n≥0. Figure 3 The figure shows an embodiment when m=n=1, and the emitter of tube N4 is connected to current source I2.
[0046] As an optional implementation, Figure 3 As shown, the high-segment current output circuit 400 includes NPN transistors N1 and N2; wherein the base and collector of transistor N1 are short-circuited and then connected to the base of transistor N2, and the collector of transistor N2 serves as the enable signal output terminal IEN2. The emitter of transistor N1 is connected to the collector of transistor N3, and the emitter of transistor N2 is connected to the collector of transistor N4.
[0047] As an optional implementation, Figure 3 As shown, the bidirectional voltage stabilization reference circuit 500 includes PNP tubes P5, P6, P7, P8, a diode D4, and a current source I3; wherein, the base of tube P5 is connected to the base of tube P6, the collector of tube P5 is connected to the emitter of tube P7, and the base and collector of tube P5 are short-circuited; the base of tube P7 is connected to the base of tube P8, the collector of tube P7 is connected to the current source I3, the base and collector of tube P7 are short-circuited, the base and collector of tube P8 are short-circuited, the emitter of tube P8 is connected to the collector of tube P6, the anode of diode D4 is connected to the collector of tube P8, and the cathode of diode D4 is connected to the emitter of tube P8. The emitters of tubes P5 and P6 are both connected to the positive power supply VCC, and the negative electrode of current source I3 is connected to the negative power supply VEE.
[0048] As an optional implementation, Figure 3 As shown, the middle and low-end current output circuit 600 includes PNP transistors P9, P10 and current source I4; wherein, the emitter of transistor P9 is connected to the emitter of transistor P10 and then connected to current source I4, the collector of transistor P9 serves as the enable signal output terminal IEN0, and the collector of transistor P10 serves as the enable signal output terminal IEN1. The base of transistor P9 is connected to the collector of transistor P8, the base of transistor P10 is connected to the cathode of diode D4, and the positive electrode of current source I4 is connected to the positive power supply VCC.
[0049] As an optional implementation, Figure 3 As shown, the high-end current mirror 700 includes PNP transistors P1 and P2; wherein the base of the transistor P1 is connected to the base of the transistor P2, the base and collector of the transistor P1 are short-circuited, the collector of the transistor P1 is also connected to the high-segment current output circuit 400, and the collector of the transistor P2 is connected to the three-segment input circuit 100. The collector of the transistor P1 is connected to the collector of the transistor N1, the collector of the transistor P2 is connected to the anode of the diode D1, and the emitters of the transistors P1 and P2 are both connected to the positive power supply VCC.
[0050] As an optional implementation, Figure 3 As shown, the low-end current mirror 800 includes NPN transistors N5 and N6; wherein the base of the transistor N5 is connected to the base of the transistor N6, the base and emitter of the transistor N5 are short-circuited, the collector of the transistor N5 is also connected to the three-stage input circuit 100, and the collector of the transistor N6 is connected to the middle and low-stage current output circuit 600. The collector of the transistor N5 is connected to the collector of the transistor P4, the collector of the transistor N6 is connected to the base of the transistor P10, and the emitters of the transistors N5 and N6 are both connected to the negative power supply VEE.
[0051] for Figure 3 The circuit shown in the figure is designed to match the K N1N3 =K P1P3 =K P2P4 =K N2N4 =K D1D3 =1; Design K P5P6 =K P7P8 .
[0052] Design I1 = K N1N2 I2=K P1P2 K D1D2 I2.
[0053] Design K N6N5 K P2P1 I1>K P6P5 I3.
[0054] Design K P5P6 =K P7P8 .
[0055] After the above design, when FN is suspended, the forward bias voltage of the BF junctions of tubes N1, N2, N3, and N4 are equal, and it is set to V N ; The forward bias voltage of the BF junction of tubes P1, P2, P3, and P4 is equal, let it be V P When FN is suspended, the forward bias voltage of D3, the forward bias voltage of D2 when FN is connected to VCC, and the forward bias voltage of D1 when FN is connected to VEE are all equal, let it be V D .
[0056] When FN is left floating, I D1 =I D2 =0,I D3 =K P2P1 I1,V P10B =V P9B -V D4 Therefore I EN0 =0,I EN1 =I4,I EN2 =I2.
[0057] The high-end threshold of the enable signal input terminal FN is V CC -V P -(m+1)V N , when V EN <V CC -V P -(m+1)V N When D2 =I D3 =0,I D1 =K P2P1 I1,V P10B =V P9B +V EBP8 , where V EBP8 is the forward bias voltage of the FB junction of P8. Therefore, I EN0 =I4,I EN1 =0,I EN2 =I2, which is the first working state of IEN0, IEN1 and IEN2.
[0058] The high-end threshold of the enable signal input terminal FN is V CC -V P -(n+1)V N +V D , when V EN >V CC -V P -(n+1)V N +V D When D1 =0,I D2 =I2,I D3 =K P2P1 I1,V P10B =V P9B -V D4 Therefore I EN0 =0,I EN1 =I4,I EN2 =0, which is the third working state of IEN0, IEN1 and IEN2.
[0059] When V CC -V P -(m+1)V N<V EN <V CC -V P -(n+1)V N +V D When FN is left floating, I EN0 =0,I EN1 =I4,I EN2 =I2, which is the second working state of IEN0, IEN1 and IEN2.
[0060] In summary, the FN port can be connected to VCC, VEE or left floating. EN <V CC -V P -(m+1)V N 、V CC -V P -(m+1)V N <V EN <V CC -V P -(n+1)V N +V D 、V EN >V CC -V P -(n+1)V N +V D In three cases, I EN0 ,I EN1 ,I EN2 The output current conditions are different, so three-stage control is achieved.
[0061] In addition, when the reverse withstand voltage of diodes D1 and D2 exceeds V CC -V EE The FN port can be connected to any voltage within the positive and negative power supply range.
[0062] Example 2
[0063] like Figure 6 As shown, this embodiment is different from the embodiment 1 Figure 3 The circuit structures of are substantially the same, except that: a resistor R1 is added to the high-end current mirror 700 to adjust the high-end threshold and the low-end threshold of the enable signal input terminal FN; one end of the resistor R1 is connected to the collector of the tube P1, and the two ends of the resistor R1 are respectively connected to the collector of the tube P1 and the collector of the tube N1.
[0064] This embodiment is used for enabling control of a dual operational amplifier chip, and therefore is similar to Figure 3 Compared with the above, NPN tubes N7, N8, N9 and PNP tubes P11, P12, P13, P14, P15, P16 are added accordingly. The connection method is as follows Figure 6 As shown, Figure 6 In the figure, A and B are two operational amplifiers.
[0065] In this embodiment, the values of m and n are Figure 3 are consistent, both are m=n=1.
[0066] The collector current of tube P12 is used as the bias current of operational amplifier A. When I P12C = 0, operational amplifier A does not work; the collector current of tube P14 is used as the bias current of operational amplifier B. When I P14C When = 0, operational amplifier B does not work.
[0067] Design K P15P16 I2>K N9N7 I4; A resistor R1 is added to the high-end current mirror 700 to adjust the flip threshold, and the resistance value of R1 is R1. Therefore, in this embodiment, the low-end threshold of the enable signal input terminal FN is adjusted to V CC -V P -2V N -I1R1, the high-side threshold is adjusted to V CC -V P -2V N -I1R1+V D .
[0068] When V EN <V CC -V P -2V N -I1R1, I P12C =I P14C =0, both operational amplifiers do not work.
[0069] When V CC -V P -2V N -I1R1 <V EN <V CC -V P -2V N -I1R1+V D When P12C =K N9N7 K P12P11 I4,I P14C =0, so operational amplifier A works normally and operational amplifier B does not work.
[0070] When V EN >V CC -V P -2V N -I1R1+V D When P12C =K N9N7 KP12P11 I4,I P14C =K N9N7 K P14P13 , so both operational amplifiers work normally.
[0071] Example 3
[0072] like Figure 7 As shown, this embodiment is different from the embodiment 1 Figure 3 The circuit structures shown are basically the same, except that: n=0 (i.e., the high-end threshold adjustment circuit 300 is removed), and Figure 3 The diodes D1, D2, D3, and D4 are replaced by N11, N12, N13, and N14 respectively.
[0073] This embodiment is used for a power management chip. The forward bias voltages of the BC junctions of N11, N13, and N12 are designed to be equal, and are set to V D .
[0074] ENO output current controls the PFM control subcircuit, when I EN0 =I4, the PFM control subcircuit works normally; I EN0 When =0, the PFM control subcircuit does not work.
[0075] EN1 output current controls the PWM control subcircuit. When I EN1 =I4, the PWM control subcircuit works normally; I EN1 When =0, the PWM control subcircuit does not work.
[0076] EN2 output current controls the PWM control subcircuit. When the PWM control subcircuit is working normally, if I EN2 =I2, the PWM control subcircuit operates at a high frequency; if I EN2 =0, the PWM control subcircuit operates at normal frequency.
[0077] The low threshold of the enable signal input terminal FN is V CC -V P -2V N , the high-side threshold is V CC -V P -V N +V D ; When V EN <V CC -V P -2V N When EN0 =I4,I EN1 =0,I EN2 =0 (At this time, I EN0 ,I EN1 ,I EN2Working in the first working state), the chip works in the PFM mode.
[0078] When V CC -V P -2V N <V EN <V CC -V P -V N +V D When EN0 =0,I EN1 =I4,I EN2 =0 (At this time, I EN0 ,I EN1 ,I EN2 Working in the second working state), the chip works in a PWM mode with a normal frequency.
[0079] When V EN >V CC -V P -V N +V D When EN0 =0,I EN1 =I4,I EN2 =I2 (At this time, I EN0 ,I EN1 ,I EN2 Working in the third working state), the chip works in a high-frequency PWM mode.
[0080] Example 4
[0081] like Figure 8 As shown, this embodiment adopts Figure 3 The dual structure of the circuit structure in , and let m=2, n=1.
[0082] The forward bias voltage of the BF junctions of P1, P2, P3, P3', and P4 are all equal, let V P ; The forward bias voltages of the BF junctions of N1, N2, N3, and N4 are all equal, let it be VN. The forward conduction voltages of D1, D2, D3, and D4 are all equal, let V D express.
[0083] The low threshold of the enable signal input terminal FN is V EE +V N +2V P -V D , the high-side threshold is V EE +V N +3V P .
[0084] When V EN <V EE +V N+2V P -V D When EN0 =0,I EN1 =I4,I EN2 =0, at this time I ENO ,I EN1 ,I EN2 In the first working state.
[0085] When V EE +V N +2V P -V D <V EN <V EE +V N +3V P When EN0 =0,I EN1 =I4,I EN2 =I2.
[0086] When V EN >V EE +V N +3V P When EN0 =I4,I EN1 =0,I EN2 =I2.
[0087] It should be noted that, in this application, the first working state does not mean that in this working state, I EN0 ,I EN1 ,I EN2 The values of each are fixed, and so are the second and third working states. The descriptions of the first, second and third working states are used only to distinguish when V EN In three different situations (i.e. V EN When the value is less than the low threshold, between the low threshold and the high threshold, or greater than the high threshold, I EN0 ,I EN1 ,I EN2 There are different value combinations, namely I EN0 ,I EN1 ,I EN2 As a whole, the combination is in different working states in these three situations.
[0088] Finally, the beneficial effects achieved by the present invention are described again: the three-stage enable control circuit based on bipolar transistors provided by the present invention adopts a three-stage current output structure (i.e., a high-stage current output circuit 400 and a medium-low-stage current output circuit 600) in conjunction with a bidirectional voltage stabilization reference circuit 500 to ensure the normal output of the current signal. A three-stage input structure (i.e., a three-stage input circuit 100) is adopted to realize the three-stage control of the enable, and the enable terminal can be connected to any voltage within the entire positive and negative power supply range (i.e., within the VEE-VCC range). In typical applications, the enable port FN can be connected to a positive power supply, a negative power supply or left floating, and convenient enable control can be realized. The circuit can change the enable threshold by adding transistors (such as in Example 4, let m=2, i.e., the low-end threshold adjustment circuit 200 uses two transistors, which is one more transistor than other embodiments), adding resistors (such as in Example 2, a resistor R1 is added to the high-end current mirror 700), etc., which greatly expands the scope of application.
[0089] The above description is only a specific implementation mode of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. All technical solutions that fall within the scope defined by the claims of the present invention fall within the protection scope of the present invention.
Claims
1. A three-stage enabling control circuit based on bipolar transistors, characterized in that: include: The three-stage input circuit 100 has an enable signal input terminal EN; A low-end threshold adjustment circuit 200, used to adjust the low-end threshold of the enable signal input terminal EN; A high-end threshold adjustment circuit 300 is used to adjust the high-end threshold of the enable signal input terminal EN; A high-segment current output circuit 400 has an enable signal output terminal IEN2, and is connected to the three-segment input circuit 100 via a low-end threshold adjustment circuit 200, a high-end threshold adjustment circuit 300, and a high-end current mirror 700; A mid- and low-segment current output circuit 600 having enable signal output terminals IEN0 and IEN1, and the mid- and low-segment current output circuit 600 is connected to the three-segment input circuit 100 via a low-end current mirror 800; A bidirectional voltage stabilization reference circuit 500, whose output end is connected to the input end of the middle and low-segment current output circuit 600; Among them, when V EN <low-end threshold, IEN0, IEN1 and IEN2 are in the first working state; when the low-end threshold is <V EN <high-end threshold, IEN0, IEN1 and IEN2 are in the second working state; when V EN > high-end threshold, IEN0, IEN1 and IEN2 are in the third working state, V EN is the voltage value of the enable signal input terminal EN.
2. The three-stage enabling control circuit based on bipolar transistors according to claim 1, characterized in that: The three-stage input circuit 100 includes PNP transistors P3, P4, diodes D1, D2, D3 and current sources I1, I2; wherein the base of the transistor P3 is connected to the collector and then connected to the base of the transistor P4 and the current source I1, the emitter of the transistor P4 is connected to the cathode of the diode D3, the anode of the diode D3 is connected to the anode of the diode D1, the cathode of the diode D1 is connected to the anode of the diode D2, and the cathode of the diode D2 is connected to the current source I2.
3. The three-stage enabling control circuit based on bipolar transistors according to claim 1, characterized in that: The low-end threshold adjustment circuit 200 includes m series-connected NPN transistors in the form of diodes, where m≥1.
4. The three-stage enabling control circuit based on bipolar transistors according to claim 3, characterized in that: The high-end threshold adjustment circuit 300 includes n series-connected NPN tubes in the form of diodes, where m≥n≥0.
5. The three-stage enabling control circuit based on bipolar transistors according to claim 1, characterized in that: The high-segment current output circuit 400 includes NPN transistors N1 and N2; wherein the base and collector of the transistor N1 are short-circuited and then connected to the base of the transistor N2, and the collector of the transistor N2 serves as an enable signal output terminal IEN2.
6. The three-stage enabling control circuit based on bipolar transistors according to claim 1, characterized in that: The bidirectional voltage stabilization reference circuit 500 includes PNP tubes P5, P6, P7, P8, a diode D4 and a current source I3; wherein, the base of tube P5 is connected to the base of tube P6, the collector of tube P5 is connected to the emitter of tube P7, and the base and collector of tube P5 are short-circuited; the base of tube P7 is connected to the base of tube P8, the collector of tube P7 is connected to the current source I3, the base and collector of tube P7 are short-circuited, the base and collector of tube P8 are short-circuited, the emitter of tube P8 is connected to the collector of tube P6, the anode of diode D4 is connected to the collector of tube P8, and the cathode of diode D4 is connected to the emitter of tube P8.
7. The three-stage enabling control circuit based on bipolar transistors according to claim 1, characterized in that: The mid-to-low-range current output circuit 600 includes PNP tubes P9, P10 and a current source I4; wherein the emitter of tube P9 is connected to the emitter of tube P10 and then connected to the current source I4, the collector of tube P9 serves as an enable signal output terminal IEN0, and the collector of tube P10 serves as an enable signal output terminal IEN1.
8. The three-stage enabling control circuit based on bipolar transistors according to claim 1, characterized in that: The high-end current mirror 700 includes PNP tubes P1 and P2; wherein the base of tube P1 is connected to the base of tube P2, the base and collector of tube P1 are short-circuited, the collector of tube P1 is also connected to the high-stage current output circuit 400, and the collector of tube P2 is connected to the three-stage input circuit 100.
9. The three-stage enabling control circuit based on bipolar transistors according to claim 8, characterized in that: The high-end current mirror 700 further includes a resistor R1 , one end of which is connected to the collector of the transistor P1 .
10. The three-stage enabling control circuit based on bipolar transistors according to claim 1, characterized in that: The low-end current mirror 800 includes NPN tubes N5 and N6; wherein the base of tube N5 is connected to the base of tube N6, the base and emitter of tube N5 are short-circuited, the collector of tube N5 is also connected to the three-stage input circuit 100, and the collector of tube N6 is connected to the middle and low-stage current output circuit 600.