Electronic device
By designing multiple electrodes and loop electrodes in the sensor layer of the electronic device and processing signals using a differential amplifier and analog-to-digital converter, the noise problem during pen input is solved, and high-precision sensing of pen input is achieved.
Patent Information
- Application Number
- CN202411507246.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-11-01
- Filing Date
- 2024-10-28
- Publication Date
- 2025-05-06
AI Technical Summary
Existing touch-based input systems tend to introduce noise when using pens, making it difficult to recognize touch or proximity of pens.
An electronic device is designed, and its sensor layer includes a plurality of electrodes and loop electrodes, and signals are processed by a differential amplifier and an analog-to-digital converter to achieve effective sensing of pen input.
By reducing noise, the recognition accuracy of pen input is improved and the sensing sensitivity of the system is enhanced.
Smart Images

Figure CN119937839A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This patent application claims the priority of Korean Patent Application No. 10-2023-0148989 filed in the Korean Intellectual Property Office on November 1, 2023, the entire contents of which are incorporated herein by reference. Technical Field
[0003] Embodiments of the present disclosure are directed to an electronic device that senses an input through a pen. Background Art
[0004] Multimedia electronic devices such as televisions (TVs), cellular phones, tablet computers, navigation systems, and game consoles include display devices that display images. The electronic devices may include a touch-based input system that is used to enable users to input information or commands intuitively, conveniently, and easily, unlike general input systems such as buttons, keyboards, or mice.
[0005] The sensor layer of a touch-based input system can sense touch or input by an object (e.g., finger, pen / stylus). For example, a pen can be used for drawing or painting. However, the use of a pen may introduce noise that makes it difficult to identify the touch or proximity of the pen. Therefore, a touch-based input system that supports a pen and can reduce noise is needed. Summary of the invention
[0006] Embodiments of the present disclosure provide an electronic device for sensing an input through a pen.
[0007] According to an embodiment of the present disclosure, an electronic device includes a sensor layer and a sensor driver driving the sensor layer. The sensor layer includes a first electrode; a first auxiliary electrode overlapping the first electrode; a first loop electrode overlapping the first electrode; a first loop trace electrically connected to a first end of the first loop electrode; and a second loop trace electrically connected to a second end of the first loop electrode, the second end being spaced apart from the first end. The first loop electrode, the first loop trace, and the second loop trace are connected in a first closed loop.
[0008] The capacitance of the first base capacitor of the first electrode may be substantially the same as the capacitance of the second base capacitor of the first loop electrode.
[0009] The first loop electrode may include a first divided loop electrode and a second divided loop electrode spaced apart from each other in the first direction, and wherein the first auxiliary electrode may be interposed between the first divided loop electrode and the second divided loop electrode.
[0010] The first electrode may include: a plurality of sensor patterns overlapping the first loop electrode and the first auxiliary electrode; and a bridge pattern electrically connected to the plurality of sensor patterns, and the bridge pattern may be disposed in the same layer as a layer for the first loop electrode and the first auxiliary electrode.
[0011] The sensor driver may receive a first signal from the first electrode and may receive a second signal from the first closed loop.
[0012] The sensor driver may include a differential amplifier, and a first terminal of the differential amplifier may receive the first signal and a second terminal of the differential amplifier may receive the second signal.
[0013] The sensor driver may include an analog-to-digital converter and a plurality of differential amplifiers. The plurality of differential amplifiers may receive the first signal and the second signal, respectively. The analog-to-digital converter may receive a plurality of signals from the plurality of differential amplifiers, and the sensor driver may perform a differential operation on data output from the analog-to-digital converter.
[0014] The sensor layer may include a second electrode crossing the first electrode, a second auxiliary electrode overlapping the second electrode and crossing the first auxiliary electrode, a second loop electrode overlapping the second electrode and crossing the first loop electrode, a third loop trace electrically connected to a third end of the second loop electrode, and a fourth loop trace electrically connected to a fourth end of the second loop electrode, the fourth end being spaced apart from the third end. The second loop electrode, the third loop trace, and the fourth loop trace may be connected in a second closed loop.
[0015] The sensor layer may include a first trace electrically connected to the first electrode; a second trace electrically connected to the second electrode; a third trace electrically connected to the first auxiliary electrode; and a fourth trace electrically connected to the second auxiliary electrode.
[0016] The first trace may be connected to the first electrode in the first region, the first auxiliary electrode may be connected to the third trace in the second region, and the first region and the second region may be spaced apart from each other in a direction in which the first electrode extends.
[0017] The electronic device may further include a circuit board electrically connected to the sensor layer, the sensor driver may be mounted on the circuit board, the circuit board may include connection lines connected to the first loop trace and the second loop trace, and the first closed loop may further include connection lines.
[0018] According to an embodiment of the present disclosure, an electronic device includes: a plurality of first electrodes arranged in a first direction and extending in a second direction intersecting the first direction; a plurality of first loop electrodes arranged in the first direction, extending in the second direction, and respectively overlapping the plurality of first electrodes; and a plurality of first loop lines electrically connected to the plurality of first loop electrodes in a one-to-one correspondence. A first loop electrode among the plurality of first loop electrodes and a first loop line among the plurality of first loop lines are connected to each other in a first closed loop.
[0019] A first loop line may include: a first loop trace electrically connected to a first end of a first loop electrode; a second loop trace electrically connected to a second end of the first loop electrode, the second end being spaced apart from the first end; and a connecting line connected to the first loop trace and the second loop trace.
[0020] The electronic device may further include a differential amplifier that receives the first signal from one first electrode among the plurality of first electrodes and receives the second signal from the first closed loop.
[0021] The electronic device may also include: a first differential amplifier, receiving a first signal from a first electrode among a plurality of first electrodes; a second differential amplifier, receiving a second signal from the first closed loop; an analog-to-digital converter, receiving signals from the first differential amplifier and the second differential amplifier and outputting data; and a differential operator, performing a differential operation on the data.
[0022] The capacitance of the first base capacitor of each of the plurality of first electrodes may be substantially the same as the capacitance of the second base capacitor of each of the plurality of first loop electrodes.
[0023] The electronic device may also include: a plurality of second electrodes arranged in the second direction and extending in the first direction; a plurality of second loop electrodes arranged in the second direction, extending in the first direction, and respectively overlapping with the plurality of second electrodes; and a plurality of second loop lines electrically connected to the plurality of second loop electrodes in a one-to-one correspondence, and a second loop electrode among the plurality of second loop electrodes and a second loop line among the plurality of second loop lines are connected to each other in a second closed loop.
[0024] According to an embodiment of the present disclosure, an electronic device includes: a sensor layer; and a sensor driver that drives the sensor layer and selectively operates in a first mode for sensing touch input or a second mode for sensing pen input. The sensor layer includes a first electrode extending in a first direction; a second electrode extending in a second direction intersecting the first direction and intersecting the first electrode; a first loop electrode extending in the first direction and overlapping the first electrode; a second loop electrode extending in the second direction and overlapping the second electrode; a first loop line connected to the first loop electrode in a first closed loop; and a second loop line connected to the second loop electrode in a second closed loop. In the second mode, the sensor driver receives a first signal from the first electrode and receives a second signal from the first closed loop.
[0025] The sensor driver may include a differential amplifier, and a first terminal of the differential amplifier may receive the first signal and a second terminal of the differential amplifier may receive the second signal.
[0026] The sensor driver may include an analog-to-digital converter and a plurality of differential amplifiers. In the second mode, the plurality of differential amplifiers may receive the first signal and the second signal, respectively. The analog-to-digital converter may receive a plurality of signals from the plurality of differential amplifiers. The sensor driver may perform a differential operation on data output from the analog-to-digital converter.
[0027] According to an embodiment of the present disclosure, an electronic device includes: a sensor layer including a sensing area and a peripheral area adjacent to the sensing area; and a sensor driver driving the sensor layer. The sensor layer includes: a plurality of first electrodes arranged in the sensing area and extending in a first direction; a plurality of first auxiliary electrodes arranged in the sensing area, arranged to overlap with the plurality of first electrodes respectively and extending in the first direction; a plurality of first loop electrodes arranged in the sensing area, arranged to overlap with the plurality of first electrodes respectively and extending in the first direction; a first loop trace arranged in the peripheral area and electrically connected to a first end of at least one first loop electrode among the plurality of first loop electrodes; a second loop trace arranged in the peripheral area and electrically connected to a second end of at least one first loop electrode, the second end being opposite to the first end; and a connecting line arranged in the peripheral area and electrically connected to one end of the first loop trace and one end of the second loop trace. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1A is a perspective view showing an electronic device according to an embodiment of the present disclosure.
[0029] Figure 1B is a bottom perspective view showing an electronic device according to an embodiment of the present disclosure.
[0030] Figure 2 is a perspective view showing an electronic device according to an embodiment of the present disclosure.
[0031] Figure 3 is a cross-sectional view schematically showing a display panel according to an embodiment of the present disclosure.
[0032] Figure 4 is a view illustrating the operation of the electronic device according to an embodiment of the present disclosure.
[0033] Figure 5 is a cross-sectional view showing a display panel according to an embodiment of the present disclosure.
[0034] Figure 6 is a plan view of a sensor layer and a circuit board according to an embodiment of the present disclosure.
[0035] Figure 7 is a plan view showing a sensing unit according to an embodiment of the present disclosure.
[0036] Fig. 8A is a plan view showing a second conductive layer of a sensing unit according to an embodiment of the present disclosure.
[0037] Figure 8B is a plan view showing a first conductive layer of a sensing unit according to an embodiment of the present disclosure.
[0038] Fig. 9 is a plan view of a sensor layer according to an embodiment of the present disclosure.
[0039] Fig.10 is a view schematically showing an electrode group according to an embodiment of the present disclosure.
[0040] Fig.11 2 is a view illustrating the operation of the sensor driver according to the embodiment of the present disclosure.
[0041] Fig.12 2 is a view illustrating the operation of the sensor driver according to the embodiment of the present disclosure.
[0042] Fig.13 is a view showing a portion of a sensing unit and a sensor driver according to an embodiment of the present disclosure.
[0043] Fig.14 is a view showing a portion of a sensing unit and a sensor driver according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0044] In the specification, the statement that a first component (or region, layer, part, portion, etc.) is "on", "connected to" or "coupled to" a second component means that the first component is directly on, directly connected to or directly coupled to the second component, or means that a third component is interposed between the first component and the second component.
[0045] The same reference numerals will be given to the same components. The term "and / or" includes any and all combinations of one or more of the associated components. In this document, the singular form is intended to include the plural form unless the context clearly indicates otherwise.
[0046] The terms "component" and "unit" refer to software components or hardware components that perform a specific function. Hardware components may include field programmable gate arrays (FPGAs) or application specific integrated circuits (ASICs). Software components may indicate data used by executable code and / or executable code in a storage medium that can be addressed. Thus, software components may be, for example, object-oriented software components, class components, and task components, and may include processes, functions, properties, programs, subroutines, program code segments, driver data, firmware, microcode, circuits, data, databases, data structures, tables, arrangements, or variables.
[0047] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.
[0048] Figure 1A is a perspective view showing an electronic device 1000 according to an embodiment of the present disclosure. Figure 1B is a bottom perspective view of an electronic device 1000 according to an embodiment of the present disclosure.
[0049] refer to Figure 1A and Figure 1B , the electronic device 1000 may be a device activated in response to an electrical signal. For example, the electronic device 1000 may display an image and may sense an input applied from the outside. The external input may be a user input. The user input may include any of various external inputs such as a part of the user's body (e.g., a finger), a pen or stylus, light, heat, pressure, and combinations thereof.
[0050] The electronic device 1000 may include a first display panel DP1 and a second display panel DP2. The first display panel DP1 and the second display panel DP2 may be separated from each other. The first display panel DP1 may be referred to as a main display panel, and the second display panel DP2 may be an auxiliary display panel or an external display panel.
[0051] The first display panel DP1 may include a first display unit DA1-F and a non-display portion NDA around the first display portion DA1-F, and the second display panel DP2 may include a second display unit DA2-F. The area of the second display panel DP2 may be smaller than that of the first display panel DP1. The area of the first display unit DA1-F may be larger than that of the second display unit DA2-F, so that the area of the first display unit DA1-F and the area of the second display unit DA2-F correspond to the size of the first display panel DP1 and the size of the second display panel DP2, respectively.
[0052] When the electronic device 1000 is unfolded, the first display unit DA1-F may be arranged in a plane substantially parallel to a plane defined by the first direction DR1 and the second direction DR2. The thickness direction of the electronic device 1000 may be parallel to a third direction DR3 intersecting the first direction DR1 and the second direction DR2. Therefore, the front surface (or top surface) and the rear surface (or bottom surface) of the components constituting the electronic device 1000 may be defined based on the third direction DR3.
[0053] The first display panel DP1 or the first display unit DA1-F may include a folding area FA that can be folded and unfolded and a plurality of non-folding areas NFA1 and NFA2, the plurality of non-folding areas NFA1 and NFA2 being spaced apart from each other, and the folding area FA being interposed between the non-folding areas NFA1 and NFA2. The second display panel DP2 may overlap any one of the plurality of non-folding areas NFA1 and NFA2. For example, the second display panel DP2 may overlap the first non-folding area NFA1.
[0054] The display direction of the first image IM1a displayed on a portion of the first display panel DP1 (for example, in the first non-folding area NFA1 of the first display panel DP1) may be opposite to the display direction of the second image IM2a displayed on the second display panel DP2. For example, the first image IM1a may be displayed in a third direction DR3, and the second image IM2a may be displayed in a fourth direction DR4 opposite to the third direction DR3.
[0055] According to an embodiment of the present disclosure, the folding area FA may be bent around a folding axis extending in a direction parallel to the longer side of the electronic device 1000 (e.g., a direction parallel to the second direction DR2). When the electronic device 1000 is folded, the folding area FA has a specific curvature and a specific radius of curvature. According to an embodiment, the first non-folding area NFA1 and the second non-folding area NFA2 may face each other, and the electronic device 1000 may be in an inner folded state so that the first display unit DA1-F is not exposed to the outside.
[0056] According to an embodiment of the present disclosure, the electronic device 1000 may be in an external folding state so that the first display unit DA1-F is exposed to the outside. According to an embodiment of the present disclosure, the electronic device 1000 may change from an unfolded state to an internal folding state or an external folding state, but the present disclosure is not limited thereto.
[0057] although Figure 1A It is shown that one folding area FA is defined in the electronic device 1000, but the present disclosure is not limited thereto. For example, a plurality of folding axes and a plurality of folding areas corresponding to the plurality of folding axes are defined in the electronic device 1000, and when the electronic device 1000 is folded, the electronic device 1000 can be in an inner folding state or in an outer folding state in each of the plurality of folding areas.
[0058] According to an embodiment of the present disclosure, at least one of the first display panel DP1 and the second display panel DP2 can sense input through the pen PN even without a digitizer. The digitizer may be a component that captures a physical touch input and converts the physical touch input into a digital signal. Therefore, since the digitizer for sensing the pen PN is omitted, the thickness and weight of the electronic device 1000 can be prevented from increasing and the flexibility can be reduced due to the added digitizer. Therefore, in addition to sensing the pen PN in the first display panel DP1, the pen PN can also be sensed in the second display panel DP2.
[0059] Figure 2 is a perspective view showing an electronic device 1000 - 1 according to an embodiment of the present disclosure.
[0060] although Figure 2 The electronic device 1000 - 1 is shown to be a cellular phone, but the electronic device 1000 - 1 may include a display panel DP.
[0061] According to an embodiment of the present disclosure, the display panel DP may sense an input applied from the outside. The external input may be a user input. The user's input may include any of various external inputs such as a part of the user's body, a pen or stylus, light, heat or pressure, or a combination thereof.
[0062] According to an embodiment of the present disclosure, the display panel DP can sense input through the pen PN even without a digitizer. Therefore, since the digitizer for sensing the pen PN is omitted, the electronic device 1000-1 can be prevented from increasing in thickness and weight and decreasing in flexibility due to the added digitizer.
[0063] although Figure 1A A foldable type electronic device 1000 is shown, and Figure 2A bar type electronic device 1000 - 1 is shown, but the present disclosure is not limited thereto. For example, the following description to be made later may be applied to various electronic devices such as a rollable type electronic device, a slidable type electronic device, or an extendable type electronic device.
[0064] Figure 3 is a cross-sectional view schematically showing a display panel DP according to an embodiment of the present disclosure.
[0065] refer to Figure 3 , the display panel DP may include a display layer 100 and a sensor layer 200 .
[0066] The display layer 100 may be a component that basically generates an image. The display layer 100 may be a light-emitting display layer. For example, the display layer 100 may be an organic light-emitting display layer, an inorganic light-emitting display layer, an organic-inorganic display layer, a quantum dot display layer, a micro-LED display layer, or a nano-LED display layer. The display layer 100 may include a base layer 110, a circuit layer 120, a light-emitting element layer 130, and an encapsulation layer 140.
[0067] The base layer 110 may be a member providing a base surface for disposing the circuit layer 120. The base layer 110 may have a multi-layer structure or a single-layer structure. The base layer 110 may be a glass substrate, a metal substrate, a silicon substrate, or a polymer substrate, but the present disclosure is not limited thereto.
[0068] The circuit layer 120 may be disposed on the base layer 110. The circuit layer 120 may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal line. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the base layer 110 by a coating process or a deposition process. Thereafter, the insulating layer, the semiconductor layer, and the conductive layer may then be selectively patterned by multiple photolithography processes.
[0069] The light emitting element layer 130 may be disposed on the circuit layer 120. The light emitting element layer 130 may include a light emitting element. For example, the light emitting element layer 130 may include an organic light emitting material, an inorganic light emitting material, an organic-inorganic light emitting material, a quantum dot, a quantum rod, a micro LED, or a nano LED.
[0070] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may protect the light emitting element layer 130 from impurities such as moisture, oxygen, and dust particles.
[0071] The sensor layer 200 may be provided on the display layer 100. The sensor layer 200 may sense an external input applied from the outside. The sensor layer 200 may be an integrated sensor continuously formed during a manufacturing process of the display layer 100, or the sensor layer 200 may be an external sensor attached to the display layer 100. The sensor layer 200 may be referred to as a sensor, an input sensing layer, an input sensing panel, or an electronic device for sensing input coordinates.
[0072] According to an embodiment of the present disclosure, the sensor layer 200 is configured to sense both a passive input unit such as a user's body and an input device that generates a magnetic field of a certain resonant frequency. The input device may be referred to as a pen, an input pen, a magnetic pen, a stylus, or an electromagnetic resonance pen.
[0073] Figure 4 is a view illustrating the operation of the electronic device 1000 according to an embodiment of the present disclosure.
[0074] refer to Figure 4 , the electronic device 1000 may include a display layer 100, a sensor layer 200, a display driver 100C (e.g., a first driver circuit), a sensor driver 200C (e.g., a second driver circuit), a main driver 1000C (e.g., a third driver circuit), and a power circuit 1000P.
[0075] The sensor layer 200 may sense a first input 2000 or a second input 3000 applied from the outside. Each of the first input 2000 and the second input 3000 may cause a capacitance change of the sensor layer 200 or cause an induced current in the sensor layer 200. For example, the first input 2000 may be a passive type input unit such as a user's body. The second input 3000 may be an input through a pen PN or an input through a radio frequency identification (RFID) tag. For example, the pen PN may be a passive type pen or an active type pen.
[0076] According to an embodiment of the present disclosure, the pen PN may be a device that generates a magnetic field having a certain resonant frequency. The pen PN may be configured to transmit an output signal based on an electromagnetic resonance scheme. The pen PN may be referred to as an input device, an input pen, a magnetic pen, a stylus, or an electromagnetic resonance pen.
[0077] The pen PN may include an RLC resonant circuit, and the RLC resonant circuit may include an inductor L and a capacitor C. According to an embodiment of the present disclosure, the RLC resonant circuit may be a variable resonant circuit that changes the resonant frequency. In this case, the inductor L may be a variable inductor and / or the capacitor C may be a variable capacitor, but the present disclosure is not limited thereto.
[0078] The inductor L generates a current through a magnetic field formed in the sensor layer 200. However, the present disclosure is not limited thereto. For example, when the pen PN operates as an active type, the pen PN can generate a current even when a magnetic field is not provided from the outside. The generated current is transferred to the capacitor C. The capacitor C is charged with a current input from the inductor L, and discharges the charged current to the inductor L. Thereafter, the inductor L can emit a magnetic field having a certain resonant frequency. The induced current can flow in the sensor layer 200 through the magnetic field emitted by the pen PN, and the induced current can be transmitted to the sensor driver 200C in the form of a received signal (or a sensed signal).
[0079] The main driver 1000C may control the overall operation of the electronic device 1000. For example, the main driver 1000C may control the operation of the display driver 100C and the sensor driver 200C. The main driver 1000C may include at least one microprocessor and may also include a graphics controller. The main driver 1000C may be referred to as an application processor, a central processing unit, or a main processor.
[0080] The display driver 100C may drive the display layer 100. The display driver 100C may receive image data and control signals from the main driver 1000C. The control signals may include various signals. For example, the control signals may include an input vertical synchronization signal, an input horizontal synchronization signal, a main clock signal, and a data enable signal.
[0081] The sensor driver 200C may drive the sensor layer 200. The sensor driver 200C may receive a control signal from the main driver 1000C. The control signal may include a clock signal of the sensor driver 200C. In addition, the control signal may further include a mode determination signal for determining a driving mode of the sensor driver 200C and the sensor layer 200. For example, the mode determination signal may include a value indicating which mode among a plurality of available modes to drive the sensor driver 200C and the sensor layer 200.
[0082] The sensor driver 200C may be implemented in the form of an integrated circuit (IC) to be electrically connected to the sensor layer 200. For example, the sensor driver 200C may be directly mounted in a specific area of the display panel, or may be mounted on a separate circuit board to be electrically connected to the sensor layer 200 through a chip on film (COF) scheme.
[0083] The sensor driver 200C and the sensor layer 200 may selectively operate in a first mode or a second mode. For example, the first mode may be a mode for sensing a touch input such as the first input 2000. The second mode may be a mode for sensing a pen PN input such as the second input 3000. The first mode may be referred to as a touch sensing mode, and the second mode may be referred to as a pen sensing mode.
[0084] The switching between the first mode and the second mode can be performed in various ways. For example, the sensor driver 200C and the sensor layer 200 can be driven into the first mode and the second mode by time division, and the first input 2000 and the second input 3000 can be sensed. The time division driving mode can mean that the sensor driver 200C and the sensor layer 200 operate the first period in the first mode, and when the first period ends, the sensor driver 200C and the sensor layer 200 operate the second period in the second mode, and then the operation is repeated a certain number of times. Optionally, the switching between the first mode and the second mode can be performed due to user selection or user-specific action, or one of the first mode and the second mode can be activated or deactivated by activation or deactivation of a specific application or one of the first mode and the second mode can be switched from one mode to another mode. Optionally, when the sensor driver 200C and the sensor layer 200 operate alternately in the first mode or the second mode, the first mode can be maintained when the first input 2000 is sensed, or the second mode can be maintained when the second input 3000 is sensed.
[0085] The sensor driver 200C may calculate the input coordinate information based on the signal received from the sensor layer 200, and provide the coordinate signal having the coordinate information to the main driver 1000C. The main driver 1000C may perform an operation corresponding to the user input based on the coordinate signal. For example, the main driver 1000C may operate the display driver 100C based on the coordinate information to display a new application image on the display layer 100.
[0086] The power circuit 1000P may include a power management integrated circuit (PMIC). The power circuit 1000P may generate a plurality of driving voltages for driving the display layer 100, the sensor layer 200, the display driver 100C, and the sensor driver 200C. For example, the plurality of driving voltages may include a gate high voltage, a gate low voltage, a first driving voltage (e.g., an ELVSS voltage), a second driving voltage (e.g., an ELVDD voltage), and an initialization voltage, but the present disclosure is not limited thereto.
[0087] Figure 5 is a cross-sectional view of a display panel DP according to an embodiment of the present disclosure.
[0088] refer to Figure 5, at least one buffer layer BFL is formed on the top surface of the base layer 110. The buffer layer BFL may increase the bonding force between the base layer 110 and the semiconductor pattern. The buffer layer BFL may be formed in a multilayer structure. Optionally, the display layer 100 may further include a barrier layer. The buffer layer BFL may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. For example, the buffer layer BFL may include a structure in which silicon oxide layers and silicon nitride layers are alternately stacked.
[0089] The semiconductor patterns SC, AL, DR, and SCL may be disposed on the buffer layer BFL. The semiconductor patterns SC, AL, DR, and SCL may include polycrystalline silicon. However, the present disclosure is not limited thereto, and the semiconductor patterns SC, AL, DR, and SCL may include amorphous silicon, low temperature polycrystalline silicon, or oxide semiconductor.
[0090] Figure 5 Only some semiconductor patterns SC, AL, DR and SCL are shown, and the semiconductor pattern may also be arranged in another region. The semiconductor patterns SC, AL, DR and SCL may be arranged in a specific rule across pixels. Depending on whether the semiconductor patterns SC, AL, DR and SCL are doped, the semiconductor patterns SC, AL, DR and SCL may have different electrical properties. The semiconductor patterns SC, AL, DR and SCL may include a first region SC, DR and SCL having a higher conductivity and a second region AL having a lower conductivity. The first region SC, DR and SCL may be doped with an N-type dopant or a P-type dopant. The P-type transistor may include a doped region doped with a P-type dopant, and the N-type transistor may include a doped region doped with an N-type dopant. The second region AL may be a non-doped region or a region doped at a lower concentration than the first region SC, DR and SCL.
[0091] The conductivity of the first region SC, DR, and SCL may be greater than that of the second region AL, and may be substantially used as an electrode or a signal line. The second region AL may substantially correspond to the active region AL (or channel) of the transistor 100PC. In other words, a portion AL of the semiconductor patterns SC, AL, DR, and SCL may be the active region AL of the transistor 100PC, and the other portions SC and DR may be the source region SC or the drain region DR of the transistor 100PC, and another portion SCL may be a connection electrode or a connection signal line.
[0092] Each of the pixels may have an equivalent circuit including seven transistors, one capacitor, and one light emitting element, but the equivalent circuit of the pixel may be modified in various forms. Figure 5 , a transistor 100PC and a light emitting element 100PE included in a pixel are shown.
[0093] The source region SC, the active region AL, and the drain region DR of the transistor 100PC may be formed of semiconductor patterns SC, AL, and DR. When viewed in a cross-sectional view, the source region SC and the drain region DR may extend from the active region AL in opposite directions. Figure 5 A portion of a connection signal line SCL formed of the semiconductor pattern SCL is shown in . When viewed in a plan view, the connection signal line SCL may be connected to the drain region DR of the transistor 100PC.
[0094] The first insulating layer 10 may be disposed on the buffer layer BFL. The first insulating layer 10 may overlap with a plurality of pixels in common and may cover the semiconductor patterns SC, AL, DR, and SCL. The first insulating layer 10 may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The first insulating layer 10 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. According to an embodiment, the first insulating layer 10 may be a single-layer silicon oxide. Not only the first insulating layer 10 but also the insulating layer of the circuit layer 120 to be described later may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of the materials described above, but the present disclosure is not limited thereto.
[0095] The gate GT of the transistor 100PC is disposed on the first insulating layer 10. The gate GT may be a part of the metal pattern. The gate GT overlaps the active area AL. The gate GT may function as a mask in the process of doping or reducing the semiconductor patterns SC, AL, DR, and SCL.
[0096] The second insulating layer 20 is disposed on the first insulating layer 10 and may cover the gate electrode GT. The second insulating layer 20 may overlap with the pixel in common. The second insulating layer 20 may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The second insulating layer 20 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride. In this configuration, the second insulating layer 20 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.
[0097] The third insulating layer 30 may be disposed on the second insulating layer 20. The third insulating layer 30 may have a single layer structure or a multi-layer structure. For example, the third insulating layer 30 may have a multi-layer structure including a silicon oxide layer and a silicon nitride layer.
[0098] The first connection electrode CNE1 may be disposed on the third insulating layer 30. The first connection electrode CNE1 may be connected to the connection signal line SCL through a contact hole CNT-1 formed through the first insulating layer 10, the second insulating layer 20, and the third insulating layer 30.
[0099] The fourth insulating layer 40 may be disposed on the third insulating layer 30. The fourth insulating layer 40 may be a single silicon oxide layer. The fifth insulating layer 50 may be disposed on the fourth insulating layer 40. The fifth insulating layer 50 may be an organic layer.
[0100] The second connection electrode CNE2 may be disposed on the fifth insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole CNT-2 formed through the fourth insulating layer 40 and the fifth insulating layer 50.
[0101] The sixth insulating layer 60 is disposed on the fifth insulating layer 50 and may cover the second connection electrode CNE2. The sixth insulating layer 60 may be an organic layer.
[0102] The light emitting element layer 130 may be disposed on the circuit layer 120. The light emitting element layer 130 may include a light emitting element 100PE. For example, the light emitting element layer 130 may include an organic light emitting material, an inorganic light emitting material, an organic-inorganic light emitting material, a quantum dot, a quantum rod, a micro LED, or a nano LED. Hereinafter, it is described that the light emitting element 100PE is an organic light emitting element, but the present disclosure is not particularly limited thereto.
[0103] The light emitting element 100PE may include a first electrode AE, a light emitting layer EL, and a second electrode CE.
[0104] The first electrode AE may be disposed on the sixth insulating layer 60. The first electrode AE may be connected to the second connection electrode CNE2 through a contact hole CNT-3 formed through the sixth insulating layer 60.
[0105] The pixel defining layer 70 is disposed on the sixth insulating layer 60 and may cover a portion of the first electrode AE. An opening 70-OP is defined in the pixel defining layer 70. The opening 70-OP of the pixel defining layer 70 exposes at least a portion of the first electrode AE.
[0106] The first display unit DA1-F (see Figure 1A ) may include a light emitting region PXA and a non-light emitting region NPXA adjacent to the light emitting region PXA. The non-light emitting region NPXA may surround the light emitting region PXA. According to an embodiment, the light emitting region PXA is defined to correspond to a partial region of the first electrode AE exposed by the opening 70-OP.
[0107] The light-emitting layer EL may be disposed on the first electrode AE. The light-emitting layer EL may be disposed in a region corresponding to the opening 70-OP. In other words, the light-emitting layer EL may be formed separately on each of the pixels. When the light-emitting layer EL is formed separately on each of the pixels, each of the light-emitting layers EL may emit light of at least one color of blue, red, and green. However, the present disclosure is not limited thereto, and the light-emitting layer EL may be connected to the pixel and disposed in common. In this case, the light-emitting layer EL may provide blue light or white light.
[0108] The second electrode CE may be disposed on the light emitting layer EL. The second electrode CE has an integral form and may be commonly included in a plurality of pixels.
[0109] According to an embodiment of the present disclosure, a hole control layer may be disposed between the first electrode AE and the light emitting layer EL. The hole control layer may be commonly disposed in the light emitting region PXA and the non-light emitting region NPXA. The hole control layer may include a hole transport layer and may further include a hole injection layer. The electron control layer may be interposed between the light emitting layer EL and the second electrode CE. The electron control layer may include an electron transport layer and may further include an electron injection layer. The hole control layer and the electron control layer may be commonly formed in the pixel by using an open mask or an inkjet process.
[0110] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may include an inorganic layer, an organic layer, and an inorganic layer stacked in sequence, but the layers constituting the encapsulation layer 140 are not limited thereto. The inorganic layer may protect the light emitting element layer 130 from moisture and oxygen, and the organic layer may protect the light emitting element layer 130 from foreign matter such as dust particles. The inorganic layer may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer may include an acrylic organic layer, but the present disclosure is not limited thereto.
[0111] The sensor layer 200 may include a base layer 201 , a first conductive layer 202 , an intermediate insulating layer 203 , a second conductive layer 204 , and a cover insulating layer 205 .
[0112] The base layer 201 may be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base layer 201 may be an organic layer including epoxy resin, acrylic resin, or imide-based resin. The base layer 201 may have a single-layer structure, or may have a multi-layer structure stacked in the third direction DR3.
[0113] Each of the first conductive layer 202 and the second conductive layer 204 may have a single layer structure or a multi-layer structure stacked in the third direction DR3.
[0114] Each of the first conductive layer 202 having a single-layer structure and the second conductive layer 204 having a single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum, or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium zinc tin oxide (IZTO). In addition, the transparent conductive layer may include a conductive polymer such as poly (3,4-ethylenedioxythiophene) (PEDOT), a metal nanowire, or graphene.
[0115] Each of the first conductive layer 202 and the second conductive layer 204 in a multi-layer structure may include a metal layer. The metal layer may have a three-layer structure of, for example, titanium / aluminum / titanium. The conductive layer in a multi-layer structure may include at least one metal layer and at least one transparent conductive layer.
[0116] According to an embodiment of the present disclosure, the thickness of the first conductive layer 202 is greater than or equal to the thickness of the second conductive layer 204. When the thickness of the first conductive layer 202 is greater than the thickness of the second conductive layer 204, the resistance of the components included in the first conductive layer 202 can be reduced. In addition, since the first conductive layer 202 is disposed below the second conductive layer 204, even if the thickness of the first conductive layer 202 increases, the possibility that the pattern of the first conductive layer 202 is visually recognized due to reflection of external light can be lower than the possibility that the pattern of the second conductive layer 204 is visually recognized due to reflection of external light.
[0117] According to an embodiment of the present disclosure, the width of the first mesh line included in the first conductive layer 202 is less than or equal to the width of the second mesh line included in the second conductive layer 204. Figure 1A ), and when the first mesh lines have a width smaller than that of the second mesh lines, the probability of a user visually recognizing the first mesh lines can be reduced.
[0118] At least one of the intermediate insulating layer 203 and the capping insulating layer 205 may include an inorganic layer. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.
[0119] At least one of the intermediate insulating layer 203 and the cover insulating layer 205 may include an organic layer. The organic layer may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.
[0120] Although it has been described by way of example that the sensor layer 200 includes the first conductive layer 202 and the second conductive layer 204, ie, two conductive layers in total, the present disclosure is not limited thereto. For example, the sensor layer 200 may include at least three conductive layers.
[0121] Figure 6 is a plan view of a sensor layer 200 and a circuit board PCB according to an embodiment of the present disclosure. Figure 7 is a plan view of a sensing unit SU according to an embodiment of the present disclosure. Fig. 8A FIG. 2 is a diagram showing a second conductive layer 204 (see FIG. 2 ) in a sensing unit SU according to an embodiment of the present disclosure. Figure 5 )’s floor plan. Figure 8B FIG. 2 is a diagram showing a first conductive layer 202 (see FIG. 2 ) in a sensing unit SU according to an embodiment of the present disclosure. Figure 5 )’s floor plan.
[0122] refer to Figure 6 , a sensing region 200A and a peripheral region 200NA adjacent to the sensing region 200A may be defined in the sensor layer 200 .
[0123] The sensor layer 200 may include a plurality of first electrode groups 210G and a plurality of second electrode groups 220G disposed in the sensing region 200A. In an embodiment, each of the first electrode groups 210G intersects with the second electrode groups 220G. Each of the first electrode groups 210G may extend in the second direction DR2, and the first electrode groups 210G may be arranged to be spaced apart in the first direction DR1. Each of the second electrode groups 220G may extend in the first direction DR1, and the second electrode groups 220G may be arranged to be spaced apart in the second direction DR2.
[0124] Although the example Figure 6 Six first electrode groups 210G and ten second electrode groups 220G are shown in FIG. 1 , but the number of the first electrode groups 210G and the number of the second electrode groups 220G are not limited thereto.
[0125] refer to Figure 6 , Figure 7 , Fig. 8A and Figure 8B, each of the first electrode groups 210G may include a first electrode 210, a first auxiliary electrode 210-A, and a first loop electrode 210-R. Each of the first electrode 210, the first auxiliary electrode 210-A, and the first loop electrode 210-R may extend in the second direction DR2. In an embodiment, each of the first auxiliary electrode 210-A and the first loop electrode 210-R overlaps with the first electrode 210. In an embodiment, a portion of the first electrode 210 does not overlap with the first auxiliary electrode 210-A or the first loop electrode 210-R. The first loop electrode 210-R may be referred to as a first noise sensing electrode or a first additional electrode.
[0126] Each of the second electrode groups 220G may include a second electrode 220, a second auxiliary electrode 220-A, and a second loop electrode 220-R. Each of the second electrode 220, the second auxiliary electrode 220-A, and the second loop electrode 220-R may extend in the first direction DR1. In an embodiment, each of the second auxiliary electrode 220-A and the second loop electrode 220-R overlaps the second electrode 220. The second loop electrode 220-R may be referred to as a second noise sensing electrode or a second additional electrode.
[0127] The sensor layer 200 may further include a plurality of first traces 210t and a plurality of second traces 220t disposed in the peripheral area 200NA. The first traces 210t may be electrically connected to the first electrodes 210 in a one-to-one correspondence. The second traces 220t may be electrically connected to the second electrodes 220 in a one-to-one correspondence.
[0128] The sensor layer 200 may further include a third trace 210at and a fourth trace 220at disposed in the peripheral area 200NA. In an embodiment, the third trace 210at is electrically connected to the first auxiliary electrode 210-A. According to an embodiment of the present disclosure, the first auxiliary electrodes 210-A are electrically connected to each other through a single third trace 210at. However, the present disclosure is not limited thereto. For example, a plurality of third traces 210at may be provided, and the first auxiliary electrode 210-A may be electrically connected to the third trace 210at in a one-to-one correspondence manner or a many-to-one correspondence manner.
[0129] In an embodiment, the fourth trace 220at is electrically connected to the second auxiliary electrode 220-A. According to an embodiment of the present disclosure, the second auxiliary electrodes 220-A are electrically connected to each other through a single fourth trace 220at. However, the present disclosure is not limited thereto. For example, a plurality of fourth traces 220at may be provided, and the second auxiliary electrode 220-A may be electrically connected to the fourth trace 220at in a one-to-one correspondence manner or a many-to-one correspondence manner.
[0130] The connection portion of the third trace 210at and the connection portion of the first trace 210t may be spaced apart from each other in the second direction DR2. The connection portion of the fourth trace 220at and the connection portion of the second trace 220t may be spaced apart from each other in the first direction DR1. The connection portion may be a point at which one electrode group and one trace are electrically connected to each other.
[0131] The electronic device 1000 may further include a plurality of first loop lines RL1 and a plurality of second loop lines RL2. The first loop lines RL1 may be electrically connected to the first loop electrodes 210-R, respectively, in a one-to-one correspondence. Figure 6 A first loop line RL1 and a second loop line RL2 are representatively shown. In an embodiment, a first loop line RL1 is connected to opposite terminals of a first loop electrode 210-R. Therefore, a first loop line RL1 and a first loop electrode 210-R can provide (form, define) a closed loop. The second loop line RL2 can be electrically connected to the second loop electrode 220-R in a one-to-one correspondence. In an embodiment, a second loop line RL2 is connected to opposite terminals of a second loop electrode 220-R. Therefore, a second loop line RL2 and a second loop electrode 220-R can provide a closed loop.
[0132] In an embodiment, each of the first loop lines RL1 includes a first loop trace 210rt1, a second loop trace 210rt2, and a first connection line CL1. In an embodiment, each of the second loop lines RL2 includes a third loop trace 220rt1, a fourth loop trace 220rt2, and a second connection line CL2.
[0133] According to an embodiment of the present disclosure, the second trace 220t and the third loop trace 220rt1 are disposed on the same side of the sensing region 200A. Figure 6 For example, the second trace 220t and the third loop trace 220rt1 are disposed in a left region of the sensing region 200A. According to an embodiment of the present disclosure, the second trace 220t and the third loop trace 220rt1 are disposed in mutually different layers.
[0134] According to an embodiment of the present disclosure, when viewed in a plan view, the second trace 220t and the third loop trace 220rt1 overlap each other. In this case, the area of the peripheral area 200NA can be prevented from increasing. According to an embodiment of the present disclosure, the second trace 220t and the third loop trace 220rt1 have a non-overlapping relationship relative to each other. Optionally, according to an embodiment of the present disclosure, portions of the second trace 220t and the third loop trace 220rt1 overlap each other. For example, portions of the second trace 220t and portions of the third loop trace 220rt1 overlap each other, and the remaining portions have a non-overlapping relationship relative to each other. For example, the second trace 220t may have a relationship of being shifted in the horizontal direction relative to the third loop trace 220rt1.
[0135] According to an embodiment of the present disclosure, the second trace 220t and the third loop trace 220rt1 are disposed on the same layer. In this case, the second trace 220t is separated from each other at the intersection in the area where the second trace 220t and the third loop trace 220rt1 intersect each other, and is spaced apart from each other at a certain interval at the intersection, and the third loop trace 220rt1 may pass through the interval. In this case, a portion of the second trace 220t spaced apart from each other and another portion of the second trace 220t may be electrically connected to each other by a bridge disposed on another layer. In an embodiment, each of the second traces 220t may have a bridge structure, but the embodiment is not limited thereto. For example, some of the second traces 220t may not have a bridge structure.
[0136] although Figure 6 and Figure 7 The third loop trace 220rt1 and the second trace 220t are shown to have a non-overlapping relationship and are arranged to be spaced apart from each other, but the present disclosure is not limited thereto. For example, when the third loop trace 220rt1 and the second trace 220t are arranged on different layers, the third loop trace 220rt1 and the second trace 220t may overlap each other. In addition, although the fourth trace 220at and the fourth loop trace 220rt2 are shown to have a non-overlapping relationship and are arranged to be spaced apart from each other, the present disclosure is not limited thereto. For example, when the fourth trace 220at and the fourth loop trace 220rt2 are arranged on different layers, the fourth trace 220at and the fourth loop trace 220rt2 may overlap each other.
[0137] The electronic device 1000 may further include a circuit board PCB electrically connected to the sensor layer 200. The sensor driver 200C may be mounted on the circuit board PCB. The first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 may be included in the sensor layer 200, and the first connection line CL1 and the second connection line CL2 may be included in the circuit board PCB.
[0138] The first loop trace 210rt1, the second loop trace 210rt2, and the first connection line CL1 may be electrically connected to each other through the first pad PD1. The third loop trace 220rt1, the fourth loop trace 220rt2, and the second connection line CL2 may be electrically connected to each other through the second pad PD2.
[0139] According to an embodiment of the present disclosure, the first connection line CL1 and the second connection line CL2 may be disposed on the circuit board PCB. In this case, since the degree of freedom of design may be increased in a relatively large area, the difficulty of wiring or designing wiring may be reduced. In addition, the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 may be easily designed so that the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 do not overlap with each other. Therefore, the additional noise generated by the overlap of the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 may be removed or reduced, and the interference between the signals may be removed or minimized.
[0140] According to an embodiment of the present disclosure, the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 are all arranged in the same conductive layer. In this case, the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 may have a completely non-overlapping arrangement relationship. When the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 do not overlap each other, additional noise generated due to overlap may be removed or reduced, and interference between signals may be removed or minimized.
[0141] According to an embodiment of the present disclosure, a subset of the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 may be included in the first conductive layer 202 (see Figure 5), and the remaining loop traces may be disposed in the second conductive layer 204 (see Figure 5 ). In this case, the subset of traces and the remaining traces may have an arrangement relationship in which the subset of traces and the remaining traces do not overlap at all. However, the present disclosure is not limited thereto. For example, the subset of traces and the remaining traces may form a structure in which the subset of traces and the remaining traces partially overlap each other or do not partially overlap each other.
[0142] According to an embodiment of the present disclosure, some of the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 are included in the first conductive layer 202 (see Figure 5 ), other traces of the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1 and the fourth loop trace 220rt2 are arranged on the second conductive layer 204 (see Figure 5 ), and the remaining traces of the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1 and the fourth loop trace 220rt2 are arranged in the third conductive layer. The third conductive layer may be additionally arranged in the base layer 201 (see Figure 5 ) In this case, it is easier to arrange the first loop trace 210rt1, the second loop trace 210rt2, the third loop trace 220rt1, and the fourth loop trace 220rt2 so as not to overlap with each other.
[0143] refer to Fig. 8A and Figure 8B , the first electrode 210 may include a plurality of sensor patterns 210sp and a bridge pattern 210bp electrically connecting the sensor patterns 210sp. In an embodiment, the bridge pattern 210bp is disposed in the same layer as the first loop electrode 210-R and the first auxiliary electrode 210-A. According to an embodiment, the bridge pattern 210bp may be surrounded by a sidewall defining an opening disposed in the first auxiliary electrode 210-A. In an embodiment, the sensor pattern 210sp is disposed on a different layer from the first loop electrode 210-R and the first auxiliary electrode 210-A, and may overlap with the first loop electrode 210-R and the first auxiliary electrode 210-A.
[0144] The second electrode 220 may include a plurality of sensor portions 220sp and a bridge portion 220bp connecting the sensor portions 220sp. In an embodiment, the sensor portions 220sp and the bridge portion 220bp are disposed on the same layer and may have an integral shape connected to each other. For example, some of the bridge portions 220bp may extend from a single sensor portion 220sp to form a single integral layer.
[0145] like Figure 8B As shown in, in an embodiment, the first loop electrode 210-R includes a first separated loop electrode 210-RP1 and a second separated loop electrode 210-RP2 spaced apart from each other in a first direction DR1. In an embodiment, the first auxiliary electrode 210-A is disposed in the same layer as the first separated loop electrode 210-RP1 and the second separated loop electrode 210-RP2, and may be interposed between the first separated loop electrode 210-RP1 and the second separated loop electrode 210-RP2. The first separated loop electrode 210-RP1 may have a shape symmetrical to that of the second separated loop electrode 210-RP2. In an embodiment, each of the separated loop electrodes (e.g., 210-RP1 and 210-RP2) includes a rectangular portion connected to and between two thicker formed portions that are symmetrical to each other.
[0146] like Fig. 8A As shown in FIG. 1 , in an embodiment, the second loop electrode 220-R includes a third separation loop electrode 220-RP1 and a fourth separation loop electrode 220-RP2 spaced apart from each other in the second direction DR2. The third separation loop electrode 220-RP1 includes a first separation ring pattern 220-RP1sp (eg, see Figure 8B ) and a first separation ring bridge 220-RP1bp, and the fourth separation loop electrode 220-RP2 may include a second separation ring pattern 220-RP2sp (eg, see Figure 8B ) and a second separation ring bridge 220-RP2bp. The second auxiliary electrode 220-A may include a second auxiliary pattern 220-Asp (eg, see Figure 8B ) and the second auxiliary bridge 220-Abp (see, e.g. Fig. 8A In an embodiment, the second auxiliary bridge 220-Abp has a rectangular shape.
[0147] The first separation ring pattern 220-RP1sp, the second separation ring pattern 220-RP2sp and the second auxiliary pattern 220-Asp are included in the same layer and may be included in the first conductive layer 202 (see Figure 5 The first separation ring bridge 220-RP1bp, the second separation ring bridge 220-RP2bp and the second auxiliary bridge 220-Abp are included on the same layer and may be included in the second conductive layer 204 (see Figure 5 )middle.
[0148] refer to Figure 8B, the first conductive layer 202 may further include a dummy pattern. The dummy pattern may be used to fill an area where the bridge pattern 210bp, the first loop electrode 210-R, the first auxiliary electrode 210-A, the first separation ring pattern 220-RP1sp, the second separation ring pattern 220-RP2sp, and the second auxiliary pattern 220-Asp are not provided. Each of the dummy patterns may be electrically floating or electrically grounded. When the dummy pattern is provided in an empty space, the probability that a specific pattern is visually recognized due to reflection of external light may be reduced. In other words, an electronic device 1000 (see FIG. 1 ) having increased visibility due to reflection of external light may be provided. Figure 1A ).
[0149] According to an embodiment of the present disclosure, the first conductive layer 202 further includes a virtual electrode inserted between the first loop electrode 210-R and the first auxiliary electrode 210-A. In other words, the first loop electrode 210-R and the first auxiliary electrode 210-A do not need to directly face each other, but can be spaced apart from each other with the virtual electrode inserted between the first loop electrode 210-R and the first auxiliary electrode 210-A. When the virtual electrode is provided, the first auxiliary electrode 210-A and the first loop electrode 210-R adjacent to each other are spaced apart from each other by a certain distance, and the noise between the first auxiliary electrode 210-A and the first loop electrode 210-R can be reduced.
[0150] As described above, although Figures 6 to 8B FIG. 2 shows a diagram in which the first electrode 210, the first auxiliary electrode 210-A, the first loop electrode 210-R, the second electrode 220, the second auxiliary electrode 220-A and the second loop electrode 220-R are divided and arranged on two conductive layers 202 and 204 (see FIG. 2 ). Figure 5 ), but the present disclosure is not limited thereto. For example, the first electrode 210, the first auxiliary electrode 210-A, the first loop electrode 210-R, the second electrode 220, the second auxiliary electrode 220-A, and the second loop electrode 220-R may be implemented in the form of three conductive layers or four conductive layers.
[0151] According to an embodiment of the present disclosure, the sensor layer 200 further includes a sensor layer disposed on the base layer 201 (see Figure 5 ) below. In this case, some of the first electrode 210, the first auxiliary electrode 210-A, the first loop electrode 210-R, the second electrode 220, the second auxiliary electrode 220-A, and the second loop electrode 220-R may be included in the third conductive layer. For example, only the first auxiliary electrode 210-A may be included in the third conductive layer. However, the present disclosure is not limited thereto. The components included in the first conductive layer to the third conductive layer may be modified in various combinations.
[0152] For example, the first electrode 210, the first loop electrode 210-R, the second electrode 220, and the second loop electrode 220-R may be implemented by the first conductive layer and the second conductive layer, and the first auxiliary electrode 210-A and the second auxiliary electrode 220-A may be implemented by the second conductive layer and the third conductive layer. Optionally, the sensor layer 200 may further include an additional insulating layer disposed under the third conductive layer and a fourth conductive layer disposed under the additional insulating layer, and the first auxiliary electrode 210-A and the second auxiliary electrode 220-A may be implemented by the third conductive layer and the fourth conductive layer.
[0153] Optionally, the first electrode 210, the first auxiliary electrode 210-A, the second electrode 220 and the second auxiliary electrode 220-A may be implemented by the first conductive layer and the second conductive layer, and the first loop electrode 210-R and the second loop electrode 220-R may be implemented by the second conductive layer and the third conductive layer. Optionally, the first loop electrode 210-R and the second loop electrode 220-R may be implemented by the third conductive layer and the fourth conductive layer.
[0154] Fig. 9 is a plan view of a sensor layer 200a according to an embodiment of the present disclosure. Fig. 9 In the description, the same reference numerals will be given to Figure 6 The components described are the same components, and their details will be omitted.
[0155] refer to Figure 7 and Fig. 9 In an embodiment, the sensor layer 200a includes a plurality of first electrode groups 210G and a plurality of second electrode groups 220G disposed in the sensing area 200A. In addition, the sensor layer 200a may further include a plurality of first traces 210t, a plurality of second traces 220t, a third trace 210at, a fourth trace 220at, a first loop line RL1a, and a plurality of second loop lines RL2a disposed in the peripheral area 200NA.
[0156] In an embodiment, each of the first loop lines RL1a includes a first loop trace 210rt1, a second loop trace 210rt2, and a first connection line CL1a. In an embodiment, each of the second loop traces RL2a includes a third loop trace 220rt1, a fourth loop trace 220rt2, and a second connection line CL2a. The first loop trace 210rt1 and the second loop trace 210rt2 may be electrically connected to one first pad PD1a through the first connection line CL1a. One end of the first loop trace 210rt1 and one end of the second loop trace 210rt2 may be connected to the first connection line CL1a. In addition, the third loop trace 220rt1 and the fourth loop trace 220rt2 may be electrically connected to one second pad PD2a through the second connection line CL2a. One end of the third loop trace 220rt1 and one end of the fourth loop trace 220rt2 may be connected to the second connection line CL2a.
[0157] According to an embodiment of the present disclosure, a closed loop is implemented in the sensor layer 200a by a first loop electrode 210-R and a first loop line RL1a. In addition, a closed loop can be implemented in the sensor layer 200a by a second loop electrode 220-R and a second loop line RL2a.
[0158] Fig.10 is a view schematically showing an electrode group according to an embodiment of the present disclosure. Fig.10 is a schematic diagram showing a method for sensing a pen PN (see Figure 4 ) in pen sensing mode.
[0159] refer to Figure 6 and Fig.10 ,exist Fig.10 2 represents a first electrode group 210G among the first electrode group 210G and the second electrode group 220G. Fig.10 The description made can be applied to the remaining electrodes which are not described.
[0160] In an embodiment, the first electrode group 210G includes a first electrode 210, a first auxiliary electrode 210-A, and a first loop electrode 210-R. In an embodiment, the first electrode 210 and the first auxiliary electrode 210-A overlap each other, and the first electrode 210 and the first loop electrode 210-R overlap each other.
[0161] The first trace 210t may be connected to the first electrode 210 in the first region 210E1, and the first auxiliary electrode 210-A and the third trace 210at may be connected to each other in the second region 210-AE1. The first region 210E1 and the second region 210-AE1 may be spaced apart from each other in an extension direction of the first electrode 210 (eg, in the second direction DR2).
[0162] As the pen PN approaches, an induced electromotive force may be generated in each of the first electrode 210, the first auxiliary electrode 210-A, and the first loop electrode 210-R by the pen PN. A coupling capacitor Cc may be defined between the first electrode 210 and the first auxiliary electrode 210-A. In the sensing mode, the sensor driver 200C may receive an induced current flowing from the first auxiliary electrode 210-A to the first electrode 210 through the coupling capacitor Cc. In other words, the first auxiliary electrode 210-A may be used to supplement a signal transmitted from the first electrode 210 to the sensor driver 200C.
[0163] In addition, when the signal induced in the first auxiliary electrode 210-A and the signal induced in the first electrode 210 are in phase, the effect of the supplementary signal can be increased. Therefore, in an embodiment, the center of each of the first electrodes 210 in the second direction DR2 coincides with the center of each of the first auxiliary electrodes 210-A in the second direction DR2. In addition, the center of each of the first electrodes 210 in the first direction DR1 may coincide with the center of each of the first auxiliary electrodes 210-A in the first direction DR1. In an embodiment, the edge of the first auxiliary electrode 210-A is aligned with the edge of the first electrode 210.
[0164] The first loop line RL1 may be connected to the first terminal E1 and the second terminal E2 of the first loop electrode 210-R. For example, the first loop line RL1 may include a first loop trace 210rt1 connected to the first terminal E1 of the first loop electrode 210-R and a second loop trace 210rt2 connected to the second terminal E2 of the first loop electrode 210-R. The first loop line RL1 may also include a first connection line CL1 (see FIG. 1 ) connecting the first loop trace 210rt1 and the second loop trace 210rt2. Figure 6 ) or the first connection line CL1a (see Fig. 9 ).
[0165] According to an embodiment of the present disclosure, the first loop electrode 210-R and the first loop line RL1 form a closed loop. In this case, the current IES caused by the induced electromotive force generated in the first loop electrode 210-R can be consumed as heat while flowing through the closed loop, and only the noise caused by the first loop electrode 210-R can be transmitted to the sensor driver 200C.
[0166] The first basic capacitor Cb-M may be defined in the first electrode 210, and the second basic capacitor Cb-N may be defined in the first loop electrode 210-R. Each of the first basic capacitor Cb-M and the second basic capacitor Cb-N may be referred to as a parasitic capacitor.
[0167] According to an embodiment of the present disclosure, the capacitance of the first base capacitor Cb-M is the same or substantially the same as the capacitance of the second base capacitor Cb-N. For example, within a specific error range, the capacitance of the first base capacitor Cb-M and the capacitance of the second base capacitor Cb-N may be the same or substantially the same, and the specific error range may be less than a few percent. For example, the specific error range may be less than 10%. When the capacitance of the first base capacitor Cb-M and the capacitance of the second base capacitor Cb-N are the same or substantially the same, the noise caused by the first electrode 210 may be the same or substantially the same as the noise caused by the first loop electrode 210-R.
[0168] The sensor driver 200C may receive both the first signal SG1 provided from the first electrode 210 and the second signal SG2 provided from the first loop electrode 210-R, and remove noise by using the first signal SG1 and the second signal SG2. Therefore, the electronic device 1000 having increased sensing sensitivity may be provided by increasing the signal-to-noise ratio (see Figure 1A ).
[0169] Fig.11 FIG. 2 is a diagram showing a sensor driver 200C (see FIG. 200C ) according to an embodiment of the present disclosure. Figure 4 )'s view.
[0170] refer to Figure 4 and Fig.11 , the sensor driver 200C may be configured to selectively drive in one of the first operation mode DMD1 , the second operation mode DMD2 , and the third operation mode DMD3 .
[0171] The first operation mode DMD1 may be referred to as a touch and pen standby mode, the second operation mode DMD2 may be referred to as a touch activation and pen standby mode, and the third operation mode DMD3 may be referred to as a pen activation mode. The first operation mode DMD1 may be a mode for waiting for the first input 2000 and the second input 3000. The second operation mode DMD2 may be a mode for sensing the first input 2000 and waiting for the second input 3000. The third operation mode DMD3 may be a mode for sensing the second input 3000 and waiting for the first input 2000.
[0172] According to an embodiment of the present disclosure, the sensor driver 200C may be first driven in the first operation mode DMD1. When the first input 2000 is sensed in the first operation mode DMD1, the sensor driver 200C may switch (or change) to the second operation mode DMD2. Optionally, when the second input 3000 is sensed in the first operation mode DMD1, the sensor driver 200C may switch (or change) to the third operation mode DMD3.
[0173] According to an embodiment of the present disclosure, when the second input 3000 is sensed in the second operation mode DMD2, the sensor driver 200C may switch to the third operation mode DMD3. When the first input 2000 is released (or not detected) in the second operation mode DMD2, the sensor driver 200C may switch to the first operation mode DMD1. When the second input 3000 is released (or not detected) in the third operation mode DMD3, the sensor driver 200C may switch to the first operation mode DMD1.
[0174] Fig.12 FIG. 2 is a diagram showing a sensor driver 200C (see FIG. 200C ) according to an embodiment of the present disclosure. Figure 4 )'s view.
[0175] refer to Figure 4 , Fig.11 and Fig.12 , operations in the first operation mode DMD1 , the second operation mode DMD2 , and the third operation mode DMD3 are shown in order of time (t).
[0176] In the embodiment of the first operation mode DMD1, the sensor driver 200C is iteratively and alternately driven in the second mode MD2-d and the first mode MD1-d. In the second mode MD2-d, the sensor layer 200 may be scan-driven to detect the second input 3000. In the first mode MD1-d, the sensor layer 200 may be scan-driven to detect the first input 2000. For example, the scan drive may mean that the sensing elements of the sensor layer 200 are driven in a row-by-row or column-by-column order. Although Fig.12 It is shown that the sensor driver 200C operates in the first mode MD1 - d after operating in the second mode MD2 - d , but the order is not limited thereto.
[0177] In the embodiment of the second operation mode DMD2, the sensor driver 200C is iteratively and alternately driven in the second mode MD2-d and the first mode MD1. In the second mode MD2-d, the sensor layer 200 may be scan-driven to detect the second input 3000. In the first mode MD1, the sensor layer 200 may be scan-driven to detect the coordinates of the first input 2000.
[0178] In the implementation of the third operation mode DMD3, the sensor driver 200C is driven in the second mode MD2. In the second mode MD2, the sensor layer 200 may be scan-driven to detect the coordinates of the second input 3000. In the third operation mode DMD3, the sensor driver 200C may not operate in the first mode MD1-d or the first mode MD1 until the second input 3000 is released (or not detected). For example, in the third operation mode DMD3, if the second input 3000 is not detected after a certain period of time, the sensor driver 200C may switch to a different operation mode, thereby operating in the first mode MD1-d or the first mode MD1.
[0179] In the case of a sensing pen PN (see Figure 4 ) in the pen sensing mode, reference has been made to Fig.10 The above description is made. In the second mode MD2, the sensor driver 200C receives both the first signal SG1 provided from the first electrode 210 and the second signal SG2 provided from the first loop electrode 210-R, and uses the first signal SG1 and the second signal SG2 to remove noise. According to an embodiment of the present disclosure, even in the first mode MD1 for sensing the first input 2000, the sensor driver 200C can receive both the first signal SG1 and the second signal SG2, and use the first signal SG1 and the second signal SG2 to remove noise.
[0180] Fig.13 2 is a view showing a portion of a sensor driver 200C and a sensing unit SU according to an embodiment of the present disclosure.
[0181] refer to Figure 7 and Fig.13 , the sensor driver 200C may receive a first signal SG1 from the first electrode 210, a second signal SG2 from the first closed loop CLP1, a third signal SG3 from the second electrode 220, and a fourth signal SG4 from the second closed loop CLP2. In an embodiment, the sensor driver 200C includes a first differential amplifier DAP1 and a second differential amplifier DAP2.
[0182] A first terminal of the first differential amplifier DAP1 may receive a first signal SG1 from the first electrode 210, and a second terminal of the first differential amplifier DAP1 may receive a second signal SG2 from the first closed loop CLP1. The first closed loop CLP1 may be a closed loop formed by the first loop electrode 210-R and the first loop line RL1.
[0183] The first terminal of the second differential amplifier DAP2 may receive the third signal SG3 from the second electrode 220, and the second terminal of the second differential amplifier DAP2 may receive the fourth signal SG4 from the second loop electrode 220-R. Fig.13 It is shown that the first terminal is an inverting terminal and the second terminal is a non-inverting terminal, but the present disclosure is not limited thereto. For example, the first terminal may be a non-inverting terminal and the second terminal may be an inverting terminal.
[0184] The first differential amplifier DAP1 can amplify a signal proportional to the difference between the first signal SG1 and the second signal SG2 to output a first output signal. The second differential amplifier DAP2 can amplify a signal proportional to the difference between the third signal SG3 and the fourth signal SG4 to output a second output signal. Whether the first input 2000 or the second input 3000 has occurred and the position of the input can be determined or identified based on the first output signal and the second output signal.
[0185] When the sensor layer 200 and the sensor driver 200C are in the second mode MD2 (see Fig.12 ) operation, the first signal SG1 may include a first induced current generated in the first electrode 210, a second induced current generated in the first auxiliary electrode 210-A and received through a coupling capacitor with the first electrode 210, and noise caused by the first electrode 210. The second signal SG2 may include noise caused by the first loop electrode 210-R. In other words, the first signal SG1 and the second signal SG2 may include the same or substantially the same noise signal. In addition, the third signal SG3 and the fourth signal SG4 may also include the same or substantially the same noise signal.
[0186] When the first signal SG1 and the second signal SG2 are differentiated in the first differential amplifier DAP1, the noise signal can be removed. In addition, when the third signal SG3 and the fourth signal SG4 are differentiated in the second differential amplifier DAP2, the noise signal can be removed. Therefore, since the signal-to-noise ratio is increased, the electronic device 1000 with increased sensing sensitivity can be provided (see Figure 1A ). For example, the outputs of the first differential amplifier DAP1 and the second differential amplifier DAP2 may be used to determine whether the first input 2000 or the second input 3000 has occurred and the positions of these inputs.
[0187] Fig.14 2 is a view partially showing a portion of the sensor driver 200C and the sensing unit SU according to an embodiment of the present disclosure.
[0188] refer to Fig.14 In the second mode MD2 (see Fig.12), the sensor driver 200C may receive a first signal SG1 from the first electrode 210, a second signal SG2 from the first closed loop CLP1, a third signal SG3 from the second electrode 220, and a fourth signal SG4 from the second closed loop CLP2.
[0189] In an embodiment, the sensor driver 200C includes an analog-to-digital converter ADC, a differential operator CC, and a plurality of differential amplifiers DAPs. The differential amplifiers DAPs may receive a first signal SG1, a second signal SG2, a third signal SG3, and a fourth signal SG4, respectively. For example, the first differential amplifier DAPs1 may receive the first signal SG1, and the second differential amplifier DAPs2 may receive the second signal SG2.
[0190] The analog-to-digital converter ADC may receive an analog signal from the differential amplifiers DAPs and convert the analog signal into a digital signal. The differential operator CC may perform a differential operation on the data provided from the analog-to-digital converter ADC to output data obtained by removing noise. In an embodiment, the differential circuit of the differential operator CC outputs a derivative of the difference between two inputs. For example, a first differential circuit of the differential operator CC may output a derivative based on an output of a differential amplifier that receives a first signal SG1 and a second signal SG2; and a second differential circuit of the differential operator CC may output a derivative based on an output of a differential amplifier that receives a third signal SG3 and a fourth signal SG4. Therefore, due to the increase in the signal-to-noise ratio, an electronic device 1000 with increased sensing sensitivity may be provided (see Figure 1A ).
[0191] As described above, in addition to sensing touch input, the sensor layer can also sense input by a pen. Therefore, the electronic device does not need to use an additional component (e.g., a digitizer) for pen sensing. Therefore, the thickness and weight of the electronic device can be prevented from increasing and the flexibility can be reduced due to the added digitizer. In addition, the sensor layer may include a first electrode and a first loop electrode and a first loop line that provide a closed loop. The sensor driver may receive a first signal provided from the first electrode and a second signal provided from the closed loop. The sensor driver may remove noise by using the first signal and the second signal. Therefore, the electronic device may be provided with an increased sensitivity that is improved due to an increased signal-to-noise ratio.
[0192] Although the embodiments of the present disclosure have been described for illustrative purposes, those skilled in the art will appreciate that various modifications and substitutions are possible without departing from the scope and spirit of the invention as disclosed in the accompanying claims.
Claims
1. Electronic devices, including: Sensor layer; as well as a sensor driver configured to drive the sensor layer, Wherein, the sensor layer comprises: a first electrode; a first auxiliary electrode, overlapping the first electrode; a first loop electrode, overlapping the first electrode; a first loop trace electrically connected to a first end of the first loop electrode; and a second loop trace electrically connected to a second end of the first loop electrode, The second end is spaced apart from the first end, and Wherein, the first loop electrode, the first loop trace and the second loop trace are connected in a first closed loop.
2. The electronic device according to claim 1, wherein: The capacitance of the first base capacitor of the first electrode is the same as the capacitance of the second base capacitor of the first loop electrode.
3. The electronic device according to claim 1, wherein: The first loop electrodes include a first separated loop electrode and a second separated loop electrode spaced apart from each other in a first direction, and Wherein, the first auxiliary electrode is inserted between the first separated loop electrode and the second separated loop electrode.
4. The electronic device according to claim 1, wherein: The first electrode comprises: a plurality of sensor patterns overlapping the first loop electrode and the first auxiliary electrode; and a bridge pattern electrically connected to the plurality of sensor patterns, and The bridge pattern is provided in the same layer as a layer for the first loop electrode and the first auxiliary electrode.
5. The electronic device according to claim 1, wherein: The sensor driver receives a first signal from the first electrode and a second signal from the first closed loop.
6. The electronic device according to claim 5, wherein: The sensor driver comprises: differential amplifier, and The first terminal of the differential amplifier receives the first signal, and the second terminal of the differential amplifier receives the second signal.
7. The electronic device according to claim 5, wherein: The sensor driver comprises: analog-to-digital converters and multiple differential amplifiers, The plurality of differential amplifiers receive the first signal and the second signal respectively. wherein the analog-to-digital converter receives a plurality of signals from the plurality of differential amplifiers, and The sensor driver performs a differential operation on the data output from the analog-to-digital converter.
8. The electronic device according to claim 1, wherein: The sensor layer further comprises: a second electrode, crossing the first electrode; a second auxiliary electrode, overlapping the second electrode and crossing the first auxiliary electrode; a second loop electrode overlapping the second electrode and crossing the first loop electrode; a third loop trace electrically connected to a third end of the second loop electrode; and a fourth loop trace electrically connected to a fourth end of the second loop electrode, the fourth end being spaced apart from the third end, and Wherein, the second loop electrode, the third loop trace and the fourth loop trace are connected in a second closed loop.
9. The electronic device according to claim 8, wherein: The sensor layer further comprises: a first trace electrically connected to the first electrode; a second trace electrically connected to the second electrode; a third trace electrically connected to the first auxiliary electrode; and A fourth trace is electrically connected to the second auxiliary electrode.
10. The electronic device according to claim 9, wherein: the first trace is connected to the first electrode in a first region, wherein the first auxiliary electrode is connected to the third trace in the second region, and The first region and the second region are spaced apart from each other in a direction in which the first electrode extends.
11. The electronic device according to claim 1, further comprising: a circuit board electrically connected to the sensor layer, Wherein, the sensor driver is mounted on the circuit board, Wherein, the circuit board comprises: a connecting line connected to the first loop trace and the second loop trace, and Wherein, the first closed loop also includes the connecting line.
12. Electronic devices, including: a plurality of first electrodes arranged in a first direction and extending in a second direction intersecting the first direction; a plurality of first loop electrodes, arranged in the first direction, extending in the second direction, and respectively overlapping the plurality of first electrodes; as well as A plurality of first loop lines are electrically connected to the plurality of first loop electrodes in a one-to-one correspondence manner, Among them, one first loop electrode among the plurality of first loop electrodes and one first loop line among the plurality of first loop lines are connected to each other in the first closed loop.
13. The electronic device according to claim 12, wherein: The first ring route includes: a first loop trace electrically connected to a first end of the one first loop electrode; a second loop trace electrically connected to a second end of the one first loop electrode, the second end being spaced apart from the first end; and A connecting line is connected to the first loop trace and the second loop trace.
14. The electronic device according to claim 13, further comprising: A differential amplifier receives a first signal from a first electrode among the plurality of first electrodes and receives a second signal from the first closed loop.
15. The electronic device according to claim 13, further comprising: a first differential amplifier receiving a first signal from a first electrode among the plurality of first electrodes; a second differential amplifier, receiving a second signal from the first closed loop; an analog-to-digital converter, receiving signals from the first differential amplifier and the second differential amplifier to output data; as well as A differential operator performs a differential operation on the data.
16. The electronic device according to claim 12, wherein: The capacitance of the first base capacitor of each of the plurality of first electrodes is the same as the capacitance of the second base capacitor of each of the plurality of first loop electrodes.
17. The electronic device according to claim 12, further comprising: a plurality of second electrodes arranged in the second direction and extending in the first direction; a plurality of second loop electrodes, arranged in the second direction, extending in the first direction, and respectively overlapping the plurality of second electrodes; as well as a plurality of second loop lines electrically connected to the plurality of second loop electrodes in a one-to-one correspondence, Wherein, one second loop electrode among the plurality of second loop electrodes and one second loop line among the plurality of second loop lines are connected to each other in the second closed loop.
18. Electronic devices, including: Sensor layer; as well as a sensor driver configured to drive the sensor layer and configured to selectively operate in a first mode for sensing a touch input or a second mode for sensing a pen input, Wherein, the sensor layer comprises: A first electrode extending in a first direction; a second electrode extending in a second direction intersecting the first direction and intersecting the first electrode; a first loop electrode extending in the first direction and overlapping the first electrode; a second loop electrode extending in the second direction and overlapping the second electrode; a first loop line connected to the first loop electrode in a first closed loop; and a second loop line connected to the second loop electrode in a second closed loop, and Wherein, in the second mode, the sensor driver receives a first signal from the first electrode and receives a second signal from the first closed loop.
19. The electronic device according to claim 18, wherein: The sensor driver comprises: differential amplifier, and The first terminal of the differential amplifier receives the first signal, and the second terminal of the differential amplifier receives the second signal.
20. The electronic device according to claim 18, wherein: The sensor driver comprises: analog-to-digital converters and multiple differential amplifiers, Wherein, in the second mode, the plurality of differential amplifiers receive the first signal and the second signal respectively, wherein the analog-to-digital converter receives a plurality of signals from the plurality of differential amplifiers, and The sensor driver performs a differential operation on the data output from the analog-to-digital converter.
21. Electronic devices, including: a sensor layer comprising a sensing region and a peripheral region adjacent to the sensing region; as well as a sensor driver configured to drive the sensor layer, Wherein, the sensor layer comprises: a plurality of first electrodes disposed in the sensing region and extending in a first direction; A plurality of first auxiliary electrodes are arranged in the sensing region, are arranged to overlap with the plurality of first electrodes respectively and extend in the first direction; A plurality of first loop electrodes are arranged in the sensing area, are arranged to overlap with the plurality of first electrodes respectively, and extend in the first direction; a first loop trace disposed in the peripheral region and electrically connected to a first end of at least one first loop electrode among the plurality of first loop electrodes; a second loop trace disposed in the peripheral region and electrically connected to a second end of the at least one first loop electrode, the second end being opposite to the first end; and A connection line is disposed in the peripheral area and is electrically connected to one end of the first loop trace and one end of the second loop trace.
Citation Information
Patent Citations
Semiconductor memory device and electronic device including the same
KR1020230148989A