Intelligent module device
By designing intelligent module devices, integrated design of core board and bottom board, multiple interfaces are provided to enhance data transmission and communication capabilities, solving the problems of slow response speed and weak communication capabilities of existing intelligent modules, and achieving faster response and powerful communication capabilities.
Patent Information
- Application Number
- CN202411728162.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-28
- Publication Date
- 2025-05-06
AI Technical Summary
现有智能模组响应速度慢、通信能力弱,无法适应多样化的应用场景。
An intelligent module device was designed. The core board is equipped with a CPU, a first-level power conversion module and a storage module. The bottom board is equipped with a power module, a PHY chip, an Ethernet transformer, a SATA connection base and multiple RJ45 interfaces, providing a variety of interfaces to enhance data transmission and communication capabilities.
Through the design of multiple interfaces, the device's response speed and communication capabilities are improved, diverse data transmission and application scenarios are supported, and network communication capabilities and data storage flexibility are enhanced.
Smart Images

Figure CN119938592A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of artificial intelligence and embedded systems, and in particular relates to an intelligent module device. Background Art
[0002] With the rapid advancement of artificial intelligence technology, smart modules have become an important bridge connecting the physical world and the digital world. Smart modules not only have the functions of information perception and processing, but can also collect, analyze and feedback data through embedded chips, sensors and communication modules, thereby promoting the application and development of cutting-edge technologies such as the Internet of Things (IoT). However, there are still a series of problems that need to be solved in the current smart modules on the market, which seriously restricts their promotion and application in various industries.
[0003] Existing smart modules do not have diversified data transmission and communication capabilities and cannot adapt to diverse application scenarios, resulting in slow response speed and weak communication capabilities of the device.
[0004] To this end, the present invention provides a smart module device. Summary of the invention
[0005] The present invention provides an intelligent module device to solve the common problems of slow response speed and weak communication capability of intelligent modules in the prior art.
[0006] In a first aspect, an embodiment of the present application provides a smart module device, the device comprising a core board and a base board; The core board includes a CPU, a primary power conversion module and a storage module; the base board includes a power module, the power module is connected to the primary power conversion module, the primary power conversion module is connected to the CPU; the storage module is connected to the CPU; The CPU includes 2 RGMII interfaces, 1 SATA interface and 1 UART interface; The baseboard also includes a PHY chip, an Ethernet transformer, a SATA connector, an SP3232E transceiver chip and a plurality of RJ45 interfaces; The PHY chip is connected to the RJ45 interface through the Ethernet transformer, the RJ45 interface is used to connect a network cable, and the PHY chip is connected to the CPU through the RGMII interface; The SATA connector is used to connect an external storage device, and the SATA connector is connected to the CPU via the SATA interface; The SP3232E transceiver chip is connected to the RJ45 interface, and the SP3232E transceiver chip is connected to the CPU via the UART interface.
[0007] Furthermore, the model of the PHY chip is RTL8211FD; The model of the Ethernet transformer is H82409S.
[0008] Furthermore, the core board also includes a secondary power conversion module, and the secondary power conversion module is connected to the primary power conversion module; The secondary power conversion module is connected to the memory chip.
[0009] Further, the secondary power conversion module includes a first power management chip and a second power management chip; The model of the first power management chip is RK806-1; The model of the second power management chip is RK860-2.
[0010] Furthermore, the first-level power conversion module is MP8759.
[0011] Furthermore, the CPU adopts a processor model RK3588.
[0012] Furthermore, the model of the storage module is KLMBG2JETD-B041; The capacity of the storage module is 32GB.
[0013] Furthermore, the model of the memory chip is K4AAG165WA-BCTD; The capacity of the memory chip is 4GB.
[0014] Furthermore, the model of the PHY chip is i210; The CPU also includes a PCIe interface; The PHY chip is connected to an RJ45 port via the Ethernet transformer, and the PHY chip is connected to the CPU via the PCIe interface.
[0015] It can be seen from the above technical solutions that the present invention has the following advantages: In the intelligent module device provided in the present application, the CPU is equipped with multiple interfaces, including RGMII interface, SATA interface and UART interface, providing diversified data transmission and communication capabilities; in addition, multiple interfaces enable the device to quickly respond to various application requirements, thereby improving the efficiency of the device.
[0016] An Ethernet transformer is connected between the PHY chip and the RJ45 interface. The Ethernet transformer can couple and filter the differential signal sent by the PHY chip with a differential mode coupled coil to enhance the signal. The signal is coupled to the other end of the network cable connected to the RJ45 interface through electromagnetic field conversion, which can support high-speed Ethernet connection and enhance network communication capabilities.
[0017] Through the SATA interface and the SATA connection socket, the device can be conveniently connected to various storage devices to improve the flexibility of data storage.
[0018] The UART interface allows the device to communicate with various serial devices, increasing the compatibility of the device.
[0019] The use of SP3232E transceiver chip and Ethernet transformer helps to improve the stability and reliability of data transmission.
[0020] The presence of multiple RJ45 interfaces allows the device to connect to multiple network devices, facilitating system expansion.
[0021] The integrated design of the core board and the base board makes the device compact and reduces space occupation. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solution of the present invention, the accompanying drawings required for use in the description will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.
[0023] Figure 1 This is an electrical principle block diagram of the smart module device of the present invention. DETAILED DESCRIPTION
[0024] Various embodiments of the present disclosure will be described more fully in the smart module device described in detail below. The present disclosure may have various embodiments, and adjustments and changes may be made therein. However, it should be understood that there is no intention to limit the various embodiments of the present disclosure to the specific embodiments disclosed herein, but rather the present disclosure should be understood to cover all adjustments, equivalents and / or alternatives that fall within the spirit and scope of the various embodiments of the present disclosure.
[0025] Hereinafter, the terms "include" or "may include" used in various embodiments of the present disclosure indicate the presence of disclosed functions, operations, or elements, and do not limit the addition of one or more functions, operations, or elements. In addition, as used in various embodiments of the present disclosure, the terms "include", "have", and their cognates are intended only to indicate specific features, numbers, steps, operations, elements, components, or a combination of the foregoing, and should not be understood as first excluding the presence of one or more other features, numbers, steps, operations, elements, components, or a combination of the foregoing or the possibility of adding one or more features, numbers, steps, operations, elements, components, or a combination of the foregoing.
[0026] In various embodiments of the present disclosure, the expression "or" or "at least one of A or / and B" includes any combination or all combinations of the words listed at the same time. For example, the expression "A or B" or "at least one of A or / and B" may include A, may include B, or may include both A and B.
[0027] The expressions (such as "first", "second", etc.) used in the various embodiments of the present disclosure may modify the various constituent elements in the various embodiments, but may not limit the corresponding constituent elements. For example, the above expressions do not limit the order and / or importance of the elements. The above expressions are only used for the purpose of distinguishing one element from other elements. For example, the first user device and the second user device indicate different user devices, although both are user devices. For example, without departing from the scope of the various embodiments of the present disclosure, the first element may be referred to as the second element, and similarly, the second element may also be referred to as the first element.
[0028] It should be noted that if it is described that one component element is “connected” to another component element, the first component element may be directly connected to the second component element, and a third component element may be “connected” between the first component element and the second component element. Conversely, when one component element is “directly connected” to another component element, it can be understood that there is no third component element between the first component element and the second component element.
[0029] The term “user” used in various embodiments of the present disclosure may indicate a person who uses an electronic device, and may be a monitoring person, a test person, or an operator.
[0030] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0031] The embodiment of the present application provides an intelligent module device to solve the current urgent need for a technical problem of achieving fast response speed, strong communication capability and high security.
[0032] The technical solution proposed in the embodiments of the present application is described in detail below with reference to the accompanying drawings.
[0033] Figure 1 This is an electrical block diagram of an intelligent module device provided in an embodiment of the present application. Figure 1 As shown, an intelligent module device provided in an embodiment of the present application includes a core board and a base board; the core board is installed on the base board, the base board provides a working voltage for the core board, and the base board also provides an interface circuit for the core board, and the signal interface provided by the CPU can generate communication or data interaction after passing through the conversion chip.
[0034] The core board includes a CPU, a primary power conversion module and a storage module; the base board includes a power module, the power module is connected to the primary power conversion module, and the primary power conversion module is connected to the CPU; the storage module is connected to the CPU.
[0035] In the intelligent module device provided by the present application, the CPU is equipped with multiple interfaces, including RGMII interface, SATA interface and UART interface, providing diversified data transmission and communication capabilities; in addition, multiple interfaces enable the device to quickly respond to various application requirements and improve the efficiency of the device. An Ethernet transformer is connected between the PHY chip and the RJ45 interface. The Ethernet transformer can couple and filter the differential signal sent by the PHY chip with a differential mode coupled coil to enhance the signal, and the signal is coupled to the other end of the network cable connected to the RJ45 interface through the conversion of the electromagnetic field, which can support high-speed Ethernet connection and enhance network communication capabilities. Through the SATA interface and the SATA connector, the device can easily connect various storage devices to improve the flexibility of data storage. The UART interface allows the device to communicate with various serial devices, increasing the compatibility of the device. The use of SP3232E transceiver chip and Ethernet transformer helps to improve the stability and reliability of data transmission. The presence of multiple RJ45 interfaces allows the device to connect multiple network devices, facilitating the expansion of the system. The use of integrated design and domestically produced CPUs helps to reduce overall manufacturing costs. The integrated design of the core board and the baseboard makes the device compact and reduces space occupancy.
[0036] In this embodiment, the power supply module is connected to the primary power conversion module, and the primary power conversion module is connected to the CPU to provide a working voltage for the CPU. The power supply module provides a 12V power supply voltage, and the 12V power supply voltage is converted into a 4V, 8A working power supply by the primary power conversion module for use by the CPU.
[0037] The CPU includes two RGMII interfaces, one SATA interface and one UART interface. The baseboard also includes a PHY chip, an Ethernet transformer, a SATA connector, an SP3232E transceiver chip and several RJ45 interfaces.
[0038] The PHY chip is connected to the RJ45 interface through the Ethernet transformer, the RJ45 interface is used to connect a network cable, and the PHY chip is connected to the CPU through the RGMII interface.
[0039] The SATA connection socket is used to connect an external storage device, and the SATA connection socket is connected to the CPU through the SATA interface.
[0040] The SP3232E transceiver chip is connected to the RJ45 interface, and the SP3232E transceiver chip is connected to the CPU via the UART interface.
[0041] In this embodiment, the CPU uses a processor model RK3588.
[0042] Developed based on RK3588 embedded CPURK3588, it adopts the design concept of core board + baseboard. There are four 0.4mm pitch, 100pin board-to-board connectors. The core board connector model is DF40C-100DP-0.4V(51), and the corresponding baseboard connector model is DF40C-100DS-0.4V(51). Four 2.2mm diameter mounting holes are reserved at the four corners of the core board. Customers who use the product in a vibration environment can install fixing screws to improve the reliability of the product connection. The baseboard mainly provides DC power interface, Ethernet interface, and debug serial port. The baseboard also provides SATA interface to meet the storage capacity requirements. It can be selected according to the needs of the end customer.
[0043] It should be noted that RK3588 is a general-purpose SoC using ARM architecture, integrating the typical large and small core architecture of quad-core Cortex-A76 and quad-core Cortex-A55 CPU. The GPU is equipped with G610MP4 GPU, which can smoothly run complex graphics processing. The embedded 3D GPU makes RK3588 fully compatible with OpenGLES1.1, 2.0 and 3.2, OpenCL up to 2.2 and Vulkan1.2. The special 2D hardware engine with MMU will maximize display performance and provide very smooth operation. The NPU with 6TOPs computing power enables various AI scenarios, providing various possibilities for local offline AI computing in complex scenarios, complex video stream analysis and other applications. RK3588 has an embedded neural network processor, which optimizes support for tasks such as computer vision and speech recognition, and improves the speed and accuracy of data processing.
[0044] RK3588 has multiple powerful embedded hardware engines built in, supporting 8K@60fps H.265 and VP9 decoders, 8K@30fps H.264 decoders and 4K@60fps AV1 decoders; supports 8K@30fps H.264 and H.265 encoders, high-quality JPEG encoders / decoders, and specialized image pre-processors and post-processors.
[0045] RK3588 also introduces a new generation of fully hardware-based 48-megapixel ISP (Image Signal Processor), which implements many algorithm accelerators such as HDR, 3A, LSC, 3DNR, 2DNR, sharpening, dehaze, fisheye correction, gamma correction, etc., and has a wide range of applications in graphics post-processing.
[0046] RK3588 integrates Rockchip's new generation NPU processor, which supports INT4 / INT8 / INT16 / FP16 mixed computing. Its strong compatibility can easily convert network models based on a series of frameworks such as TensorFlow / MXNet / PyTorch / Caffe.
[0047] It should be noted that the RGMII interface (Reduced Gigabit Media Independent Interface) is an interface standard for Gigabit Ethernet communication, which is used to connect the PHY chip on the backplane. RGMII is a simplified version of GMII (Gigabit Media Independent Interface), which can reduce the number of pins and reduce costs. The SATA interface is a computer bus used for data transmission between the CPU and a large number of storage devices (such as hard disks and optical drives). It uses serial data transmission, has a simple structure, and supports hot plugging. The SATA bus uses an embedded clock frequency signal and has a stronger error correction capability than before. It can check the transmission instructions (not only data). If errors are found, they will be automatically corrected, which improves the reliability of data transmission. The most obvious difference between SATA and the past is that it uses thinner cables, which is conducive to air circulation inside the chassis and increases the stability of the entire platform. UART is the abbreviation of Universal Asynchronous Receiver and Transmitter, which is a universal asynchronous receiver and transmitter and a serial communication interface. RJ45 interface is a common network connection interface, mainly used for Ethernet data transmission. The full name of the RJ45 interface is Registered Jack 45. It consists of eight core wires and its common applications include network card interfaces.
[0048] When the PHY chip is directly connected to the RJ45 interface, the transmission distance will be limited, and the external interference to the PHY chip is also very large. Therefore, an Ethernet transformer is connected between the PHY chip and the RJ45 interface. The Ethernet transformer couples and filters the differential signal sent by the PHY chip with a differential mode coupling coil to enhance the signal, and couples it to the other end of the network cable connected to the RJ45 interface through electromagnetic field conversion. In this way, not only is there no physical connection between the network cable and the PHY chip, but the signal is transmitted, the DC component in the signal is cut off, and data can be transmitted between devices with different 0V levels.
[0049] In an exemplary embodiment, the model of the PHY chip is RTL8211FD; the model of the Ethernet transformer is H82409S. When the model of the PHY chip is RTL8211FD, the PHY chip is connected to an RJ45 port through the Ethernet transformer, and the PHY chip is connected to the CPU through the RGMII interface.
[0050] According to another embodiment of the present invention, the core board also includes memory particles, which are connected to the CPU; the core board also includes a secondary power conversion module, which is connected to the primary power conversion module; the secondary power conversion module is connected to the memory particles.
[0051] The secondary power conversion converts the voltage output by the primary power conversion module into the operating voltage required by other modules in the device. For example, the secondary power conversion module is connected to the memory particle to provide the voltage required for the memory particle to work.
[0052] According to an embodiment of the present application, the secondary power conversion module includes a first power management chip and a second power management chip; the model of the first power management chip is RK806-1; the model of the second power management chip is RK860-2.
[0053] The present invention adopts a first power management chip with a model of RK806-1 and a second power management chip with a model of RK860-2, which can convert VCC4V0_SYS output by a primary power conversion module into the voltage required by other modules in the core board, and the voltage outputs of the first power management chip and the second power management chip are both controllable, realizing the control of power-on timing and enabling, and at the same time meeting the energy consumption requirements of the current core board functional circuits. Other modules in the core board include memory particles, functional IO interfaces, and general IO interfaces.
[0054] In one embodiment, the primary power conversion module is MP8759. In this embodiment, RK3588 obtains 12V voltage from the corresponding pin of the baseboard, and the obtained 12V voltage generates VCC4V0_SYS core voltage 4V with a maximum current requirement of 8A after passing through MP8759. In this embodiment, MPS's MP8759 is used, which can support a maximum current of 8A, meeting the current core board power supply requirements.
[0055] It should be further explained that the model of the storage module is KLMBG2JETD-B041; the capacity of the storage module is 32GB.
[0056] The CPU (RK3588) has a 4-channel external memory interface (LPDDR4 / LPDDR4X / LPDDR5) that can support demanding memory bandwidth. The CPU is connected to the storage module through a 4-channel external memory interface (LPDDR4 / LPDDR4X / LPDDR5). RK3588 integrates two external storage interfaces, one of which supports the eMMC5.1 protocol specification with a data width of 1 / 4 / 8bit, and the other is compatible with the SD3.0 / MMC4.5 protocol specification with a data width of 4bit. The storage module is connected to the eMMC5.1 interface of the RK3588, and the storage module is attached to the core board, and its data width is designed to be 8bit.
[0057] It should be noted that the model of the memory particle is K4AAG165WA-BCTD; the capacity of the memory particle is 4GB. The memory particle (DDR) is an off-chip large-capacity storage control component of the CPU, responsible for managing the main memory space of the CPU. The memory particle (DDR) supports DDR4 and LPDDR4 protocols. The LPDDR4 protocol is adopted in this embodiment. Among them, DDR4 supports up to 2Rank and supports 64bit data. In this embodiment, the LPDDR4 device adopts a patch memory solution with a memory capacity of 4GB.
[0058] In an exemplary embodiment, the model of the PHY chip is i210; the CPU further includes a PCIe interface; the PHY chip is connected to an RJ45 port through the Ethernet transformer, and the PHY chip is connected to the CPU through the PCIe interface. When the model of the PHY chip is i210, the PHY chip is connected to an RJ45 port through the Ethernet transformer, and the PHY chip is connected to the CPU through the PCIe interface.
[0059] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.
[0060] The flowchart and block diagram in the accompanying drawings illustrate the possible architecture, functions and operations of the equipment, methods and computer program products according to various embodiments of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of a code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. Exemplarily, two boxes represented in succession can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or the flowchart, and the combination of the boxes in the block diagram and / or the flowchart can be implemented with a dedicated hardware-based system that performs the specified function or operation, or can be implemented with a combination of dedicated hardware and computer instructions.
[0061] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or it can be an electrical, mechanical or other form of connection.
[0062] In addition, the described features, structures or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present invention. However, those skilled in the art will appreciate that the technical solution of the present invention can be practiced without one or more of the specific details, or other methods, components, devices, steps, etc. may be adopted. In other cases, known methods, devices, implementations or operations are not shown or described in detail to avoid blurring various aspects of the present invention.
[0063] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.
[0064] For those skilled in the art, designing different forms of control circuits according to the teachings of the present invention does not require creative work. These changes, modifications, substitutions and variations of the embodiments without departing from the principles and spirit of the present invention still fall within the scope of protection of the present invention.
Claims
1. A smart module device, characterized in that: The device comprises a core plate and a base plate; The core board includes a CPU, a primary power conversion module and a storage module; the base board includes a power module, the power module is connected to the primary power conversion module, the primary power conversion module is connected to the CPU; the storage module is connected to the CPU; The CPU includes 2 RGMII interfaces, 1 SATA interface and 1 UART interface; the baseboard also includes a PHY chip, an Ethernet transformer, a SATA connector, an SP3232E transceiver chip and several RJ45 interfaces; The PHY chip is connected to the RJ45 interface through the Ethernet transformer, the RJ45 interface is used to connect a network cable, and the PHY chip is connected to the CPU through the RGMII interface; The SATA connector is used to connect an external storage device, and the SATA connector is connected to the CPU via the SATA interface; The SP3232E transceiver chip is connected to the RJ45 interface, and the SP3232E transceiver chip is connected to the CPU via the UART interface; The CPU adopts a processor model RK3588.
2. The smart module device according to claim 1, wherein: The model of the PHY chip is RTL8211FD; The model of the Ethernet transformer is H82409S.
3. The smart module device according to claim 1, wherein: The core board also includes memory particles, and the memory particles are connected to the CPU; The core board also includes a secondary power conversion module, and the secondary power conversion module is connected to the primary power conversion module; The secondary power conversion module is connected to the memory chip.
4. The smart module device according to claim 3, wherein: The secondary power conversion module includes a first power management chip and a second power management chip; The model of the first power management chip is RK806-1; The model of the second power management chip is RK860-2.
5. The smart module device according to claim 1, wherein: The primary power conversion module is MP8759.
6. The smart module device according to claim 1, wherein: The model of the storage module is KLMBG2JETD-B041; The capacity of the storage module is 32GB.
7. The smart module device according to claim 3, characterized in that: The model of the memory chip is K4AAG165WA-BCTD; The capacity of the memory chip is 4GB.
8. The smart module device according to claim 7, characterized in that: The model of the PHY chip is i210; The CPU also includes a PCIe interface; The PHY chip is connected to an RJ45 port via the Ethernet transformer, and the PHY chip is connected to the CPU via the PCIe interface.