Real-time simulation method, system and equipment for direct-current energy consumption device and medium

Abstract

A direct current energy consumption device real-time simulation method, system, device and medium, comprising: performing real-time simulation in a CPU simulator based on the obtained topology and parameters of the direct current energy consumption device in combination with a pre-constructed direct current energy consumption device equivalent model, and sending the calculated bridge arm current to an FPGA simulator in the simulation step length of the CPU simulator; performing small-step real-time simulation in the FPGA simulator based on the bridge arm current in combination with a pre-constructed sub-module and a bridge arm equivalent model, and returning the calculated bridge arm voltage to the CPU simulator; wherein the submodule and bridge arm equivalent model is constructed by taking bridge arm current, a submodule capacitance value and a simulation step length as input and taking bridge arm voltage obtained by adding port voltages of different types of submodules in the direct current energy consumption device as output; accurate simulation of operation of different types of sub-modules is realized, and additional modeling and programming work does not need to be carried out for specific topology; accurate simulation of topology direct-current energy consumption devices of different types and different sub-modules is realized.

Description

Technical Field

[0001] The present invention relates to the fields of power systems, power electronics, flexible direct current, direct current grids, and simulation modeling, and in particular to a real-time simulation method, system, equipment, and medium for a direct current energy consumption device. Background Art

[0002] Voltage Source Converter-based HVDC (VSC-HVDC) technology based on fully controlled devices is an important technical method for achieving offshore wind power transmission and grid connection. The offshore wind power flexible direct current transmission system mainly includes onshore converter stations, submarine direct current cables, offshore converter stations and offshore wind power clusters. When the AC power grid connected to the onshore converter station fails, the AC voltage amplitude drops, and the active power transmission capacity of the onshore converter station is limited. However, the output power of the offshore wind farm remains unchanged, resulting in a power surplus in the DC system, a rapid increase in DC voltage and triggering a protective lockout, seriously affecting the safe and stable operation of the system.

[0003] To solve the above problems, it is necessary to add additional energy-consuming devices to the system to absorb the surplus active power. Due to the limited floor space and cost of the offshore converter station platform, the technical and economic feasibility of adding AC energy-consuming devices to the AC side of the offshore wind farm is insufficient. The mainstream technical solution is to connect DC energy-consuming devices in parallel to the DC side of the onshore converter station to improve the fault ride-through capability by dissipating the surplus power in the DC system during the fault. At present, the industry and academia have proposed DC energy-consuming devices with different topologies, and the centralized, distributed and hybrid topologies based on modular multi-level are the main technical routes. In order to further study the operating mechanism of the DC energy-consuming device itself and its impact on the transient operating characteristics of the system, and to support the research and development of the control and protection system of the DC energy-consuming device, it is necessary to carry out the research and development of a general real-time simulation modeling method and system for DC energy-consuming devices with different topologies.

[0004] Currently, the electromagnetic transient equivalent model of MMC is relatively mature and has been widely used in real-time simulation tests. However, the submodules of DC energy-consuming devices contain distributed energy-consuming resistors, and their topology and operation control are different from those of MMC. Therefore, the existing MMC real-time simulation model is not applicable. Similar to the Modular Multilevel Converter (MMC), the bridge arm of the DC energy-consuming device contains hundreds of independently controlled submodules. When performing simulation, the operation and control characteristics of each submodule need to be considered separately. If a detailed model of the device is developed based on discrete components, it will seriously restrict the simulation efficiency of the entire system and cannot be applied in real-time simulation. In order to strike a balance between simulation accuracy and efficiency, it is necessary to reasonably model the submodules and the main body of the DC energy-consuming device. How to complete the simulation analysis of DC energy-consuming devices with different types of submodule topologies is an urgent problem that needs to be solved. Summary of the Invention

[0005] In order to solve the problem of how to complete the simulation analysis of DC energy consumption devices with different types of submodule topologies in the prior art, the present invention proposes a real-time simulation method for DC energy consumption devices, comprising:

[0006] Based on the acquired topology and parameters of the DC energy consumption device and a pre-built equivalent model of the DC energy consumption device, a real-time simulation is performed in a CPU simulator, and the calculated bridge arm current is sent to the FPGA simulator within the simulation step of the CPU simulator;

[0007] Based on the bridge arm current, a small-step real-time simulation is performed in the FPGA simulator in combination with a pre-built submodule and a bridge arm equivalent model, and the calculated bridge arm voltage is returned to the CPU simulator;

[0008] The equivalent model of the submodule and bridge arm is constructed by taking the bridge arm current, submodule capacitance value and simulation step size as input, and taking the bridge arm voltage obtained by adding the port voltages of different types of submodules in the DC energy consumption device as output;

[0009] The equivalent model of the DC energy consumption device is obtained based on the equivalent modeling of the main circuit of the DC energy consumption device.

[0010] Preferably, the construction process of the submodule and bridge arm equivalent model includes:

[0011] Determine the operation mode and status of each submodule of the bridge arm according to the control instructions of the valve base control system;

[0012] The ideal switch method is used to equate the power electronic switching devices in the submodule. The forward Euler method is used to discretize the charging and discharging dynamic process of the submodule capacitor using the bridge arm current, submodule capacitance value and simulation step size as input to obtain the equivalent submodule.

[0013] Determine the Thevenin expression of the submodule capacitor voltage and the submodule port voltage in each operating mode based on each operating mode and the operating state of the equivalent submodule;

[0014] The Thevenin expression of the bridge arm whose output is the bridge arm voltage is obtained by adding the submodule capacitor voltage and the submodule port voltage of each submodule in the bridge arm;

[0015] Based on the Thevenin expression of the submodule capacitor voltage and the submodule port voltage and the Thevenin expression of the bridge arm, an equivalent model of the submodule and the bridge arm is constructed.

[0016] Preferably, the Thevenin expressions of the submodule capacitor voltage and the submodule port voltage in each operating mode are as follows:

[0017] Mode 1: The submodule is turned on, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the submodule capacitor voltage:

[0018]

[0019] U sm (t) = U c (t)

[0020] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the voltage of the submodule port at time t;

[0021] Mode 2: The submodule is turned on, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the negative submodule capacitor voltage:

[0022]

[0023] U sm (t)=-U c (t)

[0024] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm(t) is the voltage of the submodule port at time t;

[0025] Mode 3: The submodule is removed, the submodule capacitor voltage is discharged through the static voltage balancing resistor, and the submodule port voltage is zero:

[0026]

[0027] U sm (t) = 0

[0028] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, R sm U is the static voltage-equalizing resistor connected in parallel across the submodule capacitor. sm (t) is the voltage of the submodule port at time t;

[0029] Mode 4: The submodule is put into operation. The bridge arm current charges the submodule capacitor. At the same time, the submodule capacitor is discharged through the distributed energy-consuming resistor. The change of the submodule capacitor voltage depends on the specific working conditions. The submodule port voltage is equal to the submodule capacitor voltage:

[0030]

[0031] U sm (t) = U c (t)

[0032] Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the voltage of the submodule port at time t;

[0033] Mode 5: The submodule is removed and the submodule capacitor is discharged through the distributed energy dissipation resistor. The submodule capacitor voltage drops rapidly and the submodule port voltage is zero:

[0034]

[0035] U sm (t) = 0

[0036] Where U c(t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, U sm (t) is the submodule port voltage at time t.

[0037] Preferably, the process of constructing the equivalent model of the DC energy consumption device includes:

[0038] Based on the diodes and controlled voltage sources in the DC energy consumption device composed of various types of submodules, a bridge arm branch is equivalently constructed to obtain a left bridge arm branch and a right bridge arm branch;

[0039] An equivalent model of a DC energy dissipation device is constructed based on the left bridge arm branch, the right bridge arm branch, the bridge arm current measurement module and the centralized energy dissipation resistor.

[0040] Preferably, the diodes and controlled voltage sources in the DC energy consumption device composed of various types of submodules are used to equivalently construct bridge arm branches to obtain a left bridge arm branch and a right bridge arm branch, including:

[0041] For centralized DC energy dissipation devices based on half-bridge or full-bridge submodules, the first diode of the left bridge arm branch is used to equivalently represent all diodes through which the reverse bridge arm current flows; for distributed and hybrid DC energy dissipation devices, the second diode of the left bridge arm branch is used to equivalently represent the diodes in all submodules; the input of the controlled voltage source in the centralized DC energy dissipation device is the bridge arm Thevenin expression, while the input of the controlled voltage source in the distributed and hybrid DC energy dissipation devices is zero;

[0042] A left bridge arm branch is constructed based on the first diode of the left bridge arm branch or the second diode of the left bridge arm branch being connected in series with a controlled voltage source;

[0043] For centralized DC energy dissipation devices based on half-bridge or full-bridge submodules, the first diode of the right-hand bridge arm branch is used to represent all diodes through which the forward bridge arm current flows. For distributed and hybrid DC energy dissipation devices, the second diode of the right-hand bridge arm branch is used to represent the diodes in all submodules. The input of the controlled voltage source in centralized, distributed, and hybrid DC energy dissipation devices is the bridge arm Thevenin expression.

[0044] The right bridge arm branch is constructed based on the first diode of the right bridge arm branch or the second diode of the right bridge arm branch being connected in series with a controlled voltage source.

[0045] Preferably, the performing of small-step real-time simulation in an FPGA simulator based on the bridge arm current in combination with a pre-built submodule and a bridge arm equivalent model, and returning the calculated bridge arm voltage to the CPU simulator, comprises:

[0046] Read the submodule capacitor voltage and bridge arm current at the previous moment based on the type of the DC energy consumption device;

[0047] Based on the submodule capacitor voltage and bridge arm current at the previous moment, combined with the operation mode and system parameters of each submodule, the submodule and bridge arm equivalent model are input and simulated using an FPGA simulator to obtain the bridge arm voltage at the current moment;

[0048] The bridge arm voltage at the current moment is sent to the CPU emulator.

[0049] Preferably, the reading of the submodule capacitor voltage and bridge arm current at the previous moment based on the type of the DC energy consumption device includes:

[0050] Determine whether the current moment is the initial moment. If so, read the initial values ​​of the submodule capacitor voltage and bridge arm current. Otherwise, read the submodule capacitor voltage and bridge arm current of the previous moment.

[0051] Based on the same inventive concept, the present invention also proposes a real-time simulation system for a DC energy consumption device, comprising:

[0052] A CPU simulation module is used to perform real-time simulation in a CPU simulator based on the acquired topology and parameters of the DC energy consumption device in combination with a pre-built equivalent model of the DC energy consumption device, and send the calculated bridge arm current to the FPGA simulator within the simulation step of the CPU simulator;

[0053] An FPGA simulation module is used to perform a small-step real-time simulation in an FPGA simulator based on the bridge arm current in combination with a pre-built submodule and a bridge arm equivalent model, and return the calculated bridge arm voltage to the CPU simulator;

[0054] Among them, the submodule and bridge arm equivalent model is constructed with the bridge arm current, submodule capacitance value and simulation step size as input, and the bridge arm voltage obtained by adding the port voltages of different types of submodules in the DC energy consumption device as output;

[0055] The equivalent model of the DC energy consumption device is obtained based on the equivalent modeling of the main circuit of the DC energy consumption device.

[0056] Preferably, it further includes a submodule and a bridge arm equivalent model construction module, and the submodule and the bridge arm equivalent model construction module are specifically used to:

[0057] Determine the operation mode and status of each submodule of the bridge arm according to the control instructions of the valve base control system;

[0058] The ideal switch method is used to equate the power electronic switching devices in the submodule. The forward Euler method is used to discretize the charging and discharging dynamic process of the submodule capacitor using the bridge arm current, submodule capacitance value and simulation step size as input to obtain the equivalent submodule.

[0059] Determine the Thevenin expression of the submodule capacitor voltage and the submodule port voltage in each operating mode based on each operating mode and the operating state of the equivalent submodule;

[0060] The Thevenin expression of the bridge arm whose output is the bridge arm voltage is obtained by adding the submodule capacitor voltage and the submodule port voltage of each submodule in the bridge arm;

[0061] Based on the Thevenin expression of the submodule capacitor voltage and the submodule port voltage and the Thevenin expression of the bridge arm, an equivalent model of the submodule and the bridge arm is constructed.

[0062] Preferably, the Thevenin expressions of the submodule capacitor voltage and the submodule port voltage in each operation mode in the submodule and bridge arm equivalent model construction module are as follows:

[0063] Mode 1: The submodule is turned on, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the submodule capacitor voltage:

[0064]

[0065] U sm (t) = U c (t)

[0066] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the voltage of the submodule port at time t;

[0067] Mode 2: The submodule is turned on, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the negative submodule capacitor voltage:

[0068]

[0069] U sm (t)=-U c (t)

[0070] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the voltage of the submodule port at time t;

[0071] Mode 3: The submodule is removed, the submodule capacitor voltage is discharged through the static voltage balancing resistor, and the submodule port voltage is zero:

[0072]

[0073] U sm (t) = 0

[0074] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, R sm U is the static voltage-equalizing resistor connected in parallel across the submodule capacitor. sm (t) is the voltage of the submodule port at time t;

[0075] Mode 4: The submodule is put into operation. The bridge arm current charges the submodule capacitor. At the same time, the submodule capacitor is discharged through the distributed energy-consuming resistor. The change of the submodule capacitor voltage depends on the specific working conditions. The submodule port voltage is equal to the submodule capacitor voltage:

[0076]

[0077] U sm (t) = U c (t)

[0078] Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the voltage of the submodule port at time t;

[0079] Mode 5: The submodule is removed and the submodule capacitor is discharged through the distributed energy dissipation resistor. The submodule capacitor voltage drops rapidly and the submodule port voltage is zero:

[0080]

[0081] U sm (t) = 0

[0082] Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, U sm (t) is the submodule port voltage at time t.

[0083] Preferably, it further includes a DC energy consumption device equivalent model construction module, and the DC energy consumption device equivalent model construction module includes:

[0084] The bridge arm branch submodule is used to construct a bridge arm branch based on the diodes and controlled voltage sources in the DC energy consumption devices composed of various types of submodules to obtain a left bridge arm branch and a right bridge arm branch;

[0085] The equivalent model submodule is used to construct an equivalent model of a DC energy consumption device based on the left bridge arm branch, the right bridge arm branch, the bridge arm current measurement module and the centralized energy consumption resistor.

[0086] Preferably, the bridge arm branch submodule is specifically used to:

[0087] For centralized DC energy dissipation devices based on half-bridge or full-bridge submodules, the first diode of the left bridge arm branch is used to equivalently represent all diodes through which the reverse bridge arm current flows; for distributed and hybrid DC energy dissipation devices, the second diode of the left bridge arm branch is used to equivalently represent the diodes in all submodules; the input of the controlled voltage source in the centralized DC energy dissipation device is the bridge arm Thevenin expression, while the input of the controlled voltage source in the distributed and hybrid DC energy dissipation devices is zero;

[0088] A left bridge arm branch is constructed based on the first diode of the left bridge arm branch or the second diode of the left bridge arm branch being connected in series with a controlled voltage source;

[0089] For centralized DC energy dissipation devices based on half-bridge or full-bridge submodules, the first diode of the right-hand bridge arm branch is used to represent all diodes through which the forward bridge arm current flows. For distributed and hybrid DC energy dissipation devices, the second diode of the right-hand bridge arm branch is used to represent the diodes in all submodules. The input of the controlled voltage source in centralized, distributed, and hybrid DC energy dissipation devices is the bridge arm Thevenin expression.

[0090] The right bridge arm branch is constructed based on the first diode of the right bridge arm branch or the second diode of the right bridge arm branch being connected in series with a controlled voltage source.

[0091] Preferably, the FPGA simulation module includes:

[0092] A submodule capacitor voltage and bridge arm current reading submodule, configured to read the submodule capacitor voltage and bridge arm current at the previous moment based on the type of the DC energy consumption device;

[0093] A bridge arm voltage calculation submodule is configured to perform simulation calculations on the submodule and the bridge arm equivalent model using an FPGA simulator based on the submodule capacitor voltage and bridge arm current at the previous moment in combination with the operation mode and system parameters of each submodule to obtain the bridge arm voltage at the current moment;

[0094] The bridge arm voltage sending submodule is used to send the bridge arm voltage at the current moment to the CPU emulator.

[0095] Preferably, the submodule capacitor voltage and bridge arm current reading submodule is specifically used to:

[0096] Determine whether the current moment is the initial moment. If so, read the initial values ​​of the submodule capacitor voltage and bridge arm current. Otherwise, read the submodule capacitor voltage and bridge arm current of the previous moment.

[0097] In another aspect, the present invention further provides a computer device, comprising:

[0098] one or more processors;

[0099] a processor for executing one or more programs;

[0100] When the one or more programs are executed by the one or more processors, the above-mentioned method for real-time simulation of a DC energy consumption device is implemented.

[0101] On the other hand, the present invention further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed, the above-mentioned real-time simulation method of a DC energy consumption device is implemented.

[0102] Compared with the prior art, the present invention has the following beneficial effects:

[0103] A method, system, device and medium for real-time simulation of a DC energy consumption device, comprising: performing real-time simulation in a CPU emulator based on acquired parameters of the DC energy consumption device in combination with a pre-constructed equivalent model of the DC energy consumption device, and sending the calculated bridge arm current to an FPGA emulator within the simulation step of the CPU emulator; performing small-step real-time simulation in an FPGA emulator based on the bridge arm current in combination with a pre-constructed submodule and bridge arm equivalent model, and returning the calculated bridge arm voltage to the CPU emulator; wherein the submodule and bridge arm equivalent model are constructed using the bridge arm current, submodule capacitance value and simulation step as inputs, and using the bridge arm voltage obtained by summing the port voltages of different types of submodules in the DC energy consumption device as output; the DC energy consumption device equivalent model is obtained based on equivalent modeling of the DC energy consumption device main circuit; the submodule and bridge arm equivalent model of the present invention can realize accurate simulation of the operation process of different types of submodules without the need for additional modeling and programming work for specific topologies; the DC energy consumption device equivalent model can realize accurate simulation of the operation process of DC energy consumption devices of different types and different submodule topologies;

[0104] The present invention uses the forward Euler method to discretize the charging and discharging dynamic process of the submodule capacitor, which can effectively improve the real-time simulation efficiency of a DC energy consumption device containing a large number of submodules. BRIEF DESCRIPTION OF THE DRAWINGS

[0105] Figure 1 This is a flow chart of a real-time simulation method for a DC energy consumption device of the present invention;

[0106] Figure 2 This is a diagram of the centralized topology - MMC half-bridge structure of the present invention;

[0107] Figure 3 This is a diagram of the centralized topology - MMC full bridge structure of the present invention;

[0108] Figure 4 This is a distributed topology diagram of the present invention;

[0109] Figure 5 This is a hybrid topology diagram of the present invention;

[0110] Figure 6 This is a flowchart of the universal equivalent model program for the submodules and bridge arms of the present invention;

[0111] Figure 7 Schematic diagram of a universal equivalent model of a DC energy consumption device of the present invention;

[0112] Figure 8 This is a structural diagram of the real-time simulation system of the DC energy consumption device of the present invention. DETAILED DESCRIPTION

[0113] The present invention proposes a real-time simulation method for a DC energy-consuming device. This method can accurately simulate the operation and control characteristics of the submodules and the main body of the DC energy-consuming device, with a moderate model order and a relatively fast simulation rate. Furthermore, the method is applicable to DC energy-consuming devices with different submodule topologies, exhibits universal and modular modeling characteristics, and eliminates the need for additional modeling and programming for specific topologies. It is easily implemented in FPGA-based real-time simulation devices such as RT-LAB, RTDS, and HYPERSIM, supporting system analysis and control system hardware-in-the-loop testing of DC energy-consuming devices in various engineering projects. To better understand the present invention, the present invention is further described below in conjunction with the accompanying drawings and examples.

[0114] Example 1:

[0115] A real-time simulation method for DC energy consumption device, the specific process is as follows Figure 1 Shown, including:

[0116] Step 1: Based on the acquired topology and parameters of the DC energy consumption device and a pre-built equivalent model of the DC energy consumption device, a real-time simulation is performed in a CPU simulator, and the calculated bridge arm current is sent to the FPGA simulator within the simulation step of the CPU simulator;

[0117] Step 2: Based on the bridge arm current, combined with the pre-built sub-module and bridge arm equivalent model, a small step size real-time simulation is performed in the FPGA simulator, and the calculated bridge arm voltage is returned to the CPU simulator;

[0118] The equivalent model of the submodule and bridge arm is constructed by taking the bridge arm current, submodule capacitance value and simulation step size as input, and taking the bridge arm voltage obtained by adding the port voltages of different types of submodules in the DC energy consumption device as output;

[0119] The equivalent model of the DC energy consumption device is obtained based on the equivalent modeling of the main circuit of the DC energy consumption device.

[0120] Before step 1, the construction process of the submodule and bridge arm equivalent model is also included. The specific process is as follows:

[0121] Determine the electrical structure and operating status of the submodule:

[0122] Four typical topologies of DC energy consuming devices such as Figure 2 、 Figure 3 、 Figure 4 and Figure 5 shown. Figure 2 and Figure 3 The figure shows a DC energy consumption device using a centralized resistance route, and the submodule topologies used are half-bridge and full-bridge structures respectively. Figure 4The figure shows a DC energy dissipation device that adopts a distributed resistance route, which eliminates the centralized resistance and evenly distributes the energy dissipation resistance to each sub-module. Figure 5 It is a hybrid DC energy dissipation device that has both centralized resistance and submodules containing distributed energy dissipation resistance, combining the advantages of both. In the following, the submodule capacitance value is uniformly defined as C sm , the submodule capacitor voltage is U c , the submodule port voltage is U sm , the centralized energy dissipation resistor is R, and the distributed energy dissipation resistor in the submodule is r sm The static voltage-equalizing resistor connected in parallel across the submodule capacitor is R sm , the bridge arm current is I arm .

[0123] Although the topological structures and operating mechanisms of different types of submodules are different, their operating states can be summarized into the following five modes, as shown in Table 1:

[0124] Table 1 Submodule operation status statistics

[0125]

[0126]

[0127] General equivalent modeling of submodules and bridge arms:

[0128] The ideal switch method is used to equate the power electronic switching devices in the submodule. The forward Euler method is used to discretize the charging and discharging dynamic process of the submodule capacitor using the bridge arm current, submodule capacitance value and simulation step size as input to obtain the equivalent submodule.

[0129] In order to unify the analytical expressions of the models of different sub-module topologies, the ideal switch method is used to equate the power electronic switching devices in the sub-modules. That is, when the switching device is turned on, it is equivalent to a short-circuit state, and the resistance is equivalent to 0; when the switching device is turned off, it is equivalent to an open-circuit state, and the resistance is equivalent to infinity.

[0130] The forward Euler method is also used to discretize the dynamic charge and discharge processes of the submodule capacitors. While the forward Euler method offers only first-order accuracy compared to commonly used numerical calculation methods like the implicit trapezoidal integration method, its mathematical simplicity and clarity significantly improve the efficiency of real-time simulations for devices or systems with a large number of submodules.

[0131] Determine the submodule capacitor voltage and the submodule port Thevenin expression in each operating mode based on each operating mode and the operating state of the equivalent submodule;

[0132] According to the submodule operating status, the Thevenin equivalent expressions of the submodule capacitor voltage and port voltage in different modes are as follows, where ΔT is the simulation step size:

[0133] Mode 1: The submodule is turned on, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the submodule capacitor voltage:

[0134]

[0135] U sm (t) = U c (t)

[0136] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t.

[0137] Mode 2: The submodule is turned on, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the negative submodule capacitor voltage:

[0138]

[0139] U sm (t)=-U c (t)

[0140] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t.

[0141] Mode 3: The submodule is removed, the submodule capacitor voltage is discharged through the static voltage balancing resistor, and the submodule port voltage is zero:

[0142]

[0143] U sm (t) = 0

[0144] Where U c (t) is the submodule capacitor voltage at time t, U c(t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, R sm U is the static voltage-equalizing resistor connected in parallel across the submodule capacitor. sm (t) is the submodule port voltage at time t.

[0145] Mode 4: The submodule is put into operation. The bridge arm current charges the submodule capacitor. At the same time, the submodule capacitor is discharged through the distributed energy-consuming resistor. The change of the submodule capacitor voltage depends on the specific working conditions. The submodule port voltage is equal to the submodule capacitor voltage:

[0146]

[0147] U sm (t) = U c (t)

[0148] Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t.

[0149] Mode 5: The submodule is removed and the submodule capacitor is discharged through the distributed energy dissipation resistor. The submodule capacitor voltage drops rapidly and the submodule port voltage is zero:

[0150]

[0151] U sm (t) = 0

[0152] Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, U sm (t) is the submodule port voltage at time t.

[0153] The Thevenin expression of the bridge arm is constructed by adding the sub-module Thevenin expressions of each sub-module in the bridge arm.

[0154] According to the Thevenin expression of each submodule port in the bridge arm, each bridge arm is composed of N submodules cascaded, so the equivalent Thevenin expression of the bridge arm is:

[0155]

[0156] Where U arm (t) is the bridge arm voltage at time t, n is the submodule number, N is the total number of submodules, U sm (t) is the submodule port voltage at time t.

[0157] Based on software or hardware program to realize the universal equivalent modeling of submodules and bridge arms, Figure 6 The program flow chart shown is used to develop the submodule and bridge arm equivalent models in the FPGA simulator;

[0158] Currently, FPGA is widely used for real-time simulation of cascaded sub-module power electronic equipment. The simulation step size is at the level of hundreds of nanoseconds, and the truncation error caused by the numerical calculation method is negligible.

[0159] Before step 1, the equivalent model of the DC energy consumption device is also constructed. The specific process is as follows:

[0160] Based on the switching devices, diodes and controlled voltage sources in the DC energy consumption device composed of various types of sub-modules, a bridge arm branch is equivalently constructed to obtain a left bridge arm branch and a right bridge arm branch;

[0161] In the right bridge arm branch: (1) For a centralized DC energy consumption device composed of half-bridge or full-bridge sub-modules, the first diode in the right bridge arm branch is equivalent to all diodes through which the forward bridge arm current flows, with the current flowing into the DC energy consumption device being positive; for distributed and hybrid DC energy consumption devices, the second diode in the right bridge arm branch is used to collectively represent the diodes in all sub-modules. (2) The expression of the bridge arm controlled voltage source is consistent with the equivalent Thevenin expression of the bridge arm, that is, the sum of the output voltages of all sub-modules in the current sub-module operating state.

[0162] In the left bridge arm branch: (1) For a centralized DC energy consumption device composed of half-bridge or full-bridge submodules, the first diode of the left bridge arm branch is equivalent to all diodes through which the reverse bridge arm current flows; for distributed and hybrid DC energy consumption devices, the second diode of the left bridge arm branch is used to collectively and equivalently represent the diodes in all submodules. (2) For a centralized DC energy consumption device, the expression of the bridge arm controlled voltage source is consistent with the equivalent Thevenin expression of the bridge arm, that is, the sum of the output voltages of all submodules in the current submodule operating state; for distributed and hybrid DC energy consumption devices, the controlled voltage source is set to 0.

[0163] An equivalent model of a DC energy consumption device is constructed based on the left bridge arm branch, the first bridge arm current measurement module, the centralized energy consumption resistor, the second bridge arm current measurement module and the right bridge arm branch being connected in series.

[0164] The universal equivalent model of a DC energy dissipation device includes a centralized energy dissipation resistor R, two bridge arms, and a bridge arm current measurement module. The bridge arms consist of a controlled voltage source and a diode in series, with the diodes in the two bridge arms connected in opposite directions.

[0165] Developing in a CPU emulator Figure 7 The equivalent model of the main circuit of the DC energy consumption device is shown.

[0166] In step 1, real-time simulation is performed in a CPU simulator based on the acquired topology and parameters of the DC energy consumption device in combination with a pre-built equivalent model of the DC energy consumption device, and the calculated bridge arm current is sent to the FPGA simulator within the simulation step of the CPU simulator, including:

[0167] A heterogeneous CPU + FPGA architecture is used to perform real-time simulation of DC energy-consuming devices. The FPGA and CPU simulators exchange data via the PCIe communication protocol. The CPU model's simulation step size is typically set to 20-50 μs. Within each CPU simulation step, the CPU model sends bridge arm current data to the FPGA model.

[0168] In step 2, performing a small-step real-time simulation in an FPGA simulator based on the bridge arm current in combination with a pre-built sub-module and a bridge arm equivalent model, and returning the calculated bridge arm voltage to the CPU simulator, includes:

[0169] The simulation step size of the FPGA model is usually set to less than 1us. The FPGA model performs small step size simulation based on the bridge arm current and the stored submodule capacitor voltage data, and returns the obtained bridge arm voltage data to the CPU model to achieve CPU+FPGA nested parallel multi-rate simulation.

[0170] The architecture and control protection strategy of the valve-based controller (VBC) of a DC energy-consuming device using cascaded submodules are relatively complex. Two technical routes can be used to realize the joint simulation of the VBC and the energy-consuming device body model: (1) developing an FPGA model of the DC energy-consuming device VBC; (2) building a hardware-in-the-loop test system for the DC energy-consuming device VBC, and connecting the actual VBC equipment to the DC energy-consuming device real-time simulation system through a pre-agreed communication protocol and hardware interface, such as Figure 8 shown.

[0171] This paper proposes a real-time simulation method for DC energy-consuming devices. This method can simulate and analyze DC energy-consuming devices of different types and submodule topologies. This method allows for operational characteristics research and control and protection strategy development for large-scale renewable energy flexible DC transmission systems containing DC energy-consuming devices, supporting the development and testing of actual control and protection systems for DC energy-consuming devices. This model can be easily implemented in commercial real-time simulation software such as RT-LAB, HYPERSIM, and RTDS.

[0172] The proposed universal real-time simulation method for DC energy-consuming devices has been developed. Using a hybrid DC energy-consuming device as an example, the average relative error compared to the detailed model is only 1.37%. The developed equivalent model's accuracy meets the requirements of practical engineering applications. In addition to model accuracy, the equivalent model offers the following advantages over the detailed model:

[0173] (1) Improved simulation efficiency. When the number of submodules is 130, the simulation rate of the equivalent model is approximately five times that of the detailed model under the same simulation time and simulation step size. As the number of submodules increases, the simulation speedup ratio increases further.

[0174] (2) The developed model can arbitrarily modify the number of sub-modules, sub-module component parameters, etc., which is more convenient and efficient than detailed model debugging.

[0175] Example 2:

[0176] A real-time simulation system for a DC energy consumption device, comprising:

[0177] A CPU simulation module is used to perform real-time simulation in a CPU simulator based on the acquired topology and parameters of the DC energy consumption device in combination with a pre-built equivalent model of the DC energy consumption device, and send the calculated bridge arm current to the FPGA simulator within the simulation step of the CPU simulator;

[0178] An FPGA simulation module is used to perform a small-step real-time simulation in an FPGA simulator based on the bridge arm current in combination with a pre-built submodule and a bridge arm equivalent model, and return the calculated bridge arm voltage to the CPU simulator;

[0179] Among them, the submodule and bridge arm equivalent model is constructed with the bridge arm current, submodule capacitance value and simulation step size as input, and the bridge arm voltage obtained by adding the port voltages of different types of submodules in the DC energy consumption device as output;

[0180] The equivalent model of the DC energy consumption device is obtained based on the equivalent modeling of the main circuit of the DC energy consumption device.

[0181] It also includes submodules and a bridge arm equivalent model construction module, which are specifically used to:

[0182] Determine the operation mode and status of each submodule of the bridge arm according to the control instructions of the valve base control system;

[0183] The ideal switch method is used to equate the power electronic switching devices in the submodule. The forward Euler method is used to discretize the charging and discharging dynamic process of the submodule capacitor using the bridge arm current, submodule capacitance value and simulation step size as input to obtain the equivalent submodule.

[0184] Determine the Thevenin expression of the submodule capacitor voltage and the submodule port voltage in each operating mode based on each operating mode and the operating state of the equivalent submodule;

[0185] The Thevenin expression of the bridge arm whose output is the bridge arm voltage is obtained by adding the submodule capacitor voltage and the submodule port voltage of each submodule in the bridge arm;

[0186] Based on the Thevenin expression of the submodule capacitor voltage and the submodule port voltage and the Thevenin expression of the bridge arm, an equivalent model of the submodule and the bridge arm is constructed.

[0187] The Thevenin expressions of the submodule capacitor voltage and submodule port voltage in each operating mode in the submodule and bridge arm equivalent model construction module are as follows:

[0188] Mode 1: The submodule is turned on, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the submodule capacitor voltage:

[0189]

[0190] U sm (t) = U c (t)

[0191] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the voltage of the submodule port at time t;

[0192] Mode 2: The submodule is turned on, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the negative submodule capacitor voltage:

[0193]

[0194] U sm (t)=-U c(t)

[0195] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the voltage of the submodule port at time t;

[0196] Mode 3: The submodule is removed, the submodule capacitor voltage is discharged through the static voltage balancing resistor, and the submodule port voltage is zero:

[0197]

[0198] U sm (t) = 0

[0199] Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, R sm U is the static voltage-equalizing resistor connected in parallel across the submodule capacitor. sm (t) is the voltage of the submodule port at time t;

[0200] Mode 4: The submodule is put into operation. The bridge arm current charges the submodule capacitor. At the same time, the submodule capacitor is discharged through the distributed energy-consuming resistor. The change of the submodule capacitor voltage depends on the specific working conditions. The submodule port voltage is equal to the submodule capacitor voltage:

[0201]

[0202] U sm (t) = U c (t)

[0203] Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the voltage of the submodule port at time t;

[0204] Mode 5: The submodule is removed and the submodule capacitor is discharged through the distributed energy dissipation resistor. The submodule capacitor voltage drops rapidly and the submodule port voltage is zero:

[0205]

[0206] U sm (t) = 0

[0207] Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, U sm (t) is the submodule port voltage at time t.

[0208] It also includes a DC energy consumption device equivalent model construction module, and the DC energy consumption device equivalent model construction module includes:

[0209] The bridge arm branch submodule is used to construct a bridge arm branch based on the diodes and controlled voltage sources in the DC energy consumption devices composed of various types of submodules to obtain a left bridge arm branch and a right bridge arm branch;

[0210] The equivalent model submodule is used to construct an equivalent model of a DC energy consumption device based on the left bridge arm branch, the right bridge arm branch, the bridge arm current measurement module and the centralized energy consumption resistor.

[0211] The bridge arm branch submodule is specifically used for:

[0212] For centralized DC energy dissipation devices based on half-bridge or full-bridge submodules, the first diode of the left bridge arm branch is used to equivalently represent all diodes through which the reverse bridge arm current flows; for distributed and hybrid DC energy dissipation devices, the second diode of the left bridge arm branch is used to equivalently represent the diodes in all submodules; the input of the controlled voltage source in the centralized DC energy dissipation device is the bridge arm Thevenin expression, while the input of the controlled voltage source in the distributed and hybrid DC energy dissipation devices is zero;

[0213] A left bridge arm branch is constructed based on the first diode of the left bridge arm branch or the second diode of the left bridge arm branch being connected in series with a controlled voltage source;

[0214] For centralized DC energy dissipation devices based on half-bridge or full-bridge submodules, the first diode of the right-hand bridge arm branch is used to represent all diodes through which the forward bridge arm current flows. For distributed and hybrid DC energy dissipation devices, the second diode of the right-hand bridge arm branch is used to represent the diodes in all submodules. The input of the controlled voltage source in centralized, distributed, and hybrid DC energy dissipation devices is the bridge arm Thevenin expression.

[0215] The right bridge arm branch is constructed based on the first diode of the right bridge arm branch or the second diode of the right bridge arm branch being connected in series with a controlled voltage source.

[0216] The FPGA simulation module includes:

[0217] A submodule capacitor voltage and bridge arm current reading submodule, configured to read the submodule capacitor voltage and bridge arm current at the previous moment based on the type of the DC energy consumption device;

[0218] A bridge arm voltage calculation submodule is configured to perform simulation calculations on the submodule and the bridge arm equivalent model using an FPGA simulator based on the submodule capacitor voltage and bridge arm current at the previous moment in combination with the operation mode and system parameters of each submodule to obtain the bridge arm voltage at the current moment;

[0219] The bridge arm voltage sending submodule is used to send the bridge arm voltage at the current moment to the CPU emulator.

[0220] The submodule capacitor voltage and bridge arm current reading submodule is specifically used to:

[0221] Determine whether the current moment is the initial moment. If so, read the initial values ​​of the submodule capacitor voltage and bridge arm current. Otherwise, read the submodule capacitor voltage and bridge arm current of the previous moment.

[0222] Example 3:

[0223] Based on the same inventive concept, in another embodiment of the present invention, a computer device is provided, which includes a processor and a memory, wherein the memory is used to store a computer program, the computer program includes program instructions, and the processor is used to execute the program instructions stored in the computer storage medium. The processor may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, which is suitable for implementing one or more instructions, specifically suitable for loading and executing one or more instructions in the computer storage medium to implement the corresponding method flow or corresponding function; the processor described in the embodiment of the present invention can be used to execute the steps of a real-time simulation method for a DC energy consumption device.

[0224] Example 4:

[0225] Based on the same inventive concept, in another embodiment of the present invention, the present invention further provides a storage medium, specifically a computer-readable storage medium (Memory), which is a memory device in a computer device for storing programs and data. It is understandable that the computer-readable storage medium here can include both built-in storage media in the computer device and, of course, extended storage media supported by the computer device. The computer-readable storage medium provides a storage space that stores the operating system of the terminal. In addition, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space. These instructions can be one or more computer programs (including program codes). It should be noted that the computer-readable storage medium here can be a high-speed RAM memory or a non-volatile memory, such as at least one disk memory. The processor can load and execute one or more instructions stored in the computer-readable storage medium to implement the corresponding steps of a real-time simulation method for a DC energy consumption device in the above embodiment.

[0226] It will be understood by those skilled in the art that embodiments of the present invention may be provided as methods, systems, or computer program products. Thus, the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware. Furthermore, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0227] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0228] These computer program instructions may also be stored in a computer readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0229] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing the instructions executed on the computer or other programmable device for implementing the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0230] The above are merely embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention are included in the scope of the claims of the present invention to be approved.

Claims

1. A real-time simulation method for a DC energy consumption device, characterized in that: include: Based on the acquired topology and parameters of the DC energy consumption device combined with a pre-built equivalent model of the DC energy consumption device, real-time simulation is performed in a CPU simulator, and the calculated bridge arm current is sent to the FPGA simulator within the simulation step of the CPU simulator; Based on the bridge arm current, a small-step real-time simulation is performed in the FPGA simulator in combination with a pre-built submodule and a bridge arm equivalent model, and the calculated bridge arm voltage is returned to the CPU simulator; Among them, the submodule and bridge arm equivalent model is constructed by taking the bridge arm current, submodule capacitance value and simulation step size as input, and taking the bridge arm voltage obtained by adding the port voltages of different types of submodules in the DC energy consumption device as output; The equivalent model of the DC energy consumption device is obtained based on the equivalent modeling of the main circuit of the DC energy consumption device.

2. The method according to claim 1, characterized in that: The construction process of the submodule and bridge arm equivalent model includes: Determine the operation mode and status of each submodule of the bridge arm according to the control instructions of the valve base control system; The ideal switch method is used to equate the power electronic switch devices in the submodule, and the forward Euler method is used to discretize the charging and discharging dynamic process of the submodule capacitor with the bridge arm current, submodule capacitance value and simulation step size as input to obtain the equivalent submodule; Determine the Thevenin expression of the submodule capacitor voltage and the submodule port voltage in each operating mode based on each operating mode and the operating state of the equivalent submodule; The Thevenin expression of the bridge arm whose output is the bridge arm voltage is obtained by adding the submodule capacitor voltage and the submodule port voltage Thevenin expression of each submodule in the bridge arm; Based on the Thevenin expression of the submodule capacitor voltage and the submodule port voltage and the Thevenin expression of the bridge arm, a submodule and bridge arm equivalent model is constructed.

3. The method according to claim 2, characterized in that: The Thevenin expressions of the submodule capacitor voltage and the submodule port voltage in each operation mode are as follows: Mode 1, the submodule is put into operation, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the submodule capacitor voltage: U sm (t)=U c (t) Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t; Mode 2, the submodule is put into operation, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the negative submodule capacitor voltage: U sm (t)=-U c (t) Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t; Mode 3, the submodule is removed, the submodule capacitor voltage is discharged through the static voltage balancing resistor, and the submodule port voltage is zero: U sm (t)=0 Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, R sm U is the static voltage-equalizing resistor connected in parallel across the submodule capacitor. sm (t) is the submodule port voltage at time t; Mode 4, the submodule is put into operation, the bridge arm current charges the submodule capacitor, and the submodule capacitor is discharged through the distributed energy-consuming resistor. The change of the submodule capacitor voltage depends on the specific working conditions, and the submodule port voltage is equal to the submodule capacitor voltage: U sm (t)=U c (t) Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t; Mode 5: The submodule is removed and the submodule capacitor is discharged through the distributed energy dissipation resistor. The submodule capacitor voltage drops rapidly and the submodule port voltage is zero: U sm (t)=0 Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, U sm (t) is the submodule port voltage at time t.

4. The method according to claim 1, characterized in that: The construction process of the equivalent model of the DC energy consumption device includes: Based on the diodes and controlled voltage sources in the DC energy consumption device composed of various types of submodules, a bridge arm branch is equivalently constructed to obtain a left bridge arm branch and a right bridge arm branch; An equivalent model of a DC energy dissipation device is constructed based on the left bridge arm branch, the right bridge arm branch, the bridge arm current measurement module and the centralized energy dissipation resistor.

5. The method according to claim 4, characterized in that: The diodes and controlled voltage sources in the DC energy consumption device composed of various types of submodules are equivalently used to construct bridge arm branches to obtain a left bridge arm branch and a right bridge arm branch, including: For a centralized DC energy dissipation device composed of half-bridge or full-bridge submodules, the first diode of the left bridge arm branch is used to equivalently represent all diodes through which the reverse bridge arm current flows; for a distributed and hybrid DC energy dissipation device, the second diode of the left bridge arm branch is used to equivalently represent the diodes in all submodules; the input of the controlled voltage source in the centralized DC energy dissipation device is the bridge arm Thevenin expression, and the input of the controlled voltage source in the distributed and hybrid DC energy dissipation device is zero; A left bridge arm branch is constructed based on the first diode of the left bridge arm branch or the second diode of the left bridge arm branch being connected in series with a controlled voltage source; For a centralized DC energy dissipation device composed of half-bridge or full-bridge submodules, the first diode of the right bridge arm branch is used to equivalently represent all diodes through which the forward bridge arm current flows; for a distributed and hybrid DC energy dissipation device, the second diode of the right bridge arm branch is used to equivalently represent the diodes in all submodules; the input of the controlled voltage source in the centralized, distributed and hybrid DC energy dissipation devices is the bridge arm Thevenin expression; The right bridge arm branch is constructed based on the first diode of the right bridge arm branch or the second diode of the right bridge arm branch being connected in series with a controlled voltage source.

6. The method according to claim 1, characterized in that: The method of performing small-step real-time simulation in the FPGA simulator based on the bridge arm current in combination with the pre-built sub-module and the bridge arm equivalent model, and returning the calculated bridge arm voltage to the CPU simulator, comprises: Read the submodule capacitor voltage and bridge arm current at the previous moment based on the type of the DC energy consumption device; Based on the submodule capacitor voltage and bridge arm current at the previous moment, combined with the operation mode of each submodule and the system parameter input, the submodule and bridge arm equivalent model are simulated and calculated using an FPGA simulator to obtain the bridge arm voltage at the current moment; The bridge arm voltage at the current moment is sent to the CPU emulator.

7. The method according to claim 6, characterized in that: The reading of the submodule capacitor voltage and bridge arm current at the previous moment based on the type of the DC energy consumption device includes: Determine whether the current moment is the initial moment, if so, read the initial values ​​of the submodule capacitor voltage and bridge arm current, otherwise read the submodule capacitor voltage and bridge arm current of the previous moment.

8. A real-time simulation system for a DC energy consumption device, characterized in that: include: A CPU simulation module, used for performing real-time simulation in a CPU simulator based on the acquired topology and parameters of the DC energy consumption device in combination with a pre-built equivalent model of the DC energy consumption device, and sending the calculated bridge arm current to the FPGA simulator within the simulation step of the CPU simulator; An FPGA simulation module, used for performing small-step real-time simulation in an FPGA simulator based on the bridge arm current in combination with a pre-built submodule and a bridge arm equivalent model, and returning the calculated bridge arm voltage to the CPU simulator; Among them, the submodule and bridge arm equivalent model is constructed by taking the bridge arm current, submodule capacitance value and simulation step size as input, and taking the bridge arm voltage obtained by adding the port voltages of different types of submodules in the DC energy consumption device as output; The equivalent model of the DC energy consumption device is obtained based on the equivalent modeling of the main circuit of the DC energy consumption device.

9. The system according to claim 8, characterized in that: It also includes submodules and a bridge arm equivalent model construction module, and the submodules and the bridge arm equivalent model construction module are specifically used for: Determine the operation mode and status of each submodule of the bridge arm according to the control instructions of the valve base control system; The ideal switch method is used to equate the power electronic switch devices in the submodule, and the forward Euler method is used to discretize the charging and discharging dynamic process of the submodule capacitor with the bridge arm current, submodule capacitance value and simulation step size as input to obtain the equivalent submodule; Determine the Thevenin expression of the submodule capacitor voltage and the submodule port voltage in each operating mode based on each operating mode and the operating state of the equivalent submodule; Based on the addition of the submodule capacitor voltage and the submodule port voltage Thevenin expression of each submodule in the bridge arm, the output is the bridge arm voltage to obtain the bridge arm Thevenin expression; Based on the Thevenin expression of the submodule capacitor voltage and the submodule port voltage and the Thevenin expression of the bridge arm, a submodule and bridge arm equivalent model is constructed.

10. The system according to claim 9, characterized in that: The Thevenin expressions of the submodule capacitor voltage and the submodule port voltage in each operation mode in the submodule and bridge arm equivalent model construction module are as follows: Mode 1, the submodule is put into operation, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the submodule capacitor voltage: U sm (t)=U c (t) Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t; Mode 2, the submodule is put into operation, the bridge arm current charges or discharges the submodule capacitor, and the submodule port voltage is equal to the negative submodule capacitor voltage: U sm (t)=-U c (t) Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t; Mode 3, the submodule is removed, the submodule capacitor voltage is discharged through the static voltage balancing resistor, and the submodule port voltage is zero: Where U c (t) is the submodule capacitor voltage at time t, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, t is the time, ΔT is the simulation step, C sm is the submodule capacitance value, R sm U is the static voltage-equalizing resistor connected in parallel across the submodule capacitor. sm (t) is the submodule port voltage at time t; Mode 4, the submodule is put into operation, the bridge arm current charges the submodule capacitor, and the submodule capacitor is discharged through the distributed energy-consuming resistor. The change of the submodule capacitor voltage depends on the specific working conditions, and the submodule port voltage is equal to the submodule capacitor voltage: U sm (t)=U c (t) Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, I arm (t-ΔT) is the bridge arm current at time t-ΔT, U sm (t) is the submodule port voltage at time t; Mode 5: The submodule is removed and the submodule capacitor is discharged through the distributed energy dissipation resistor. The submodule capacitor voltage drops rapidly and the submodule port voltage is zero: U sm (t)=0 Where U c (t) is the submodule capacitor voltage at time t, t is the time, ΔT is the simulation step, r sm is the distributed energy dissipation resistor in the submodule, C sm is the submodule capacitance value, U c (t-ΔT) is the submodule capacitor voltage at time t-ΔT, U sm (t) is the submodule port voltage at time t.

11. The system according to claim 8, characterized in that: It also includes a DC energy consumption device equivalent model construction module, and the DC energy consumption device equivalent model construction module includes: The bridge arm branch submodule is used to construct the bridge arm branch based on the diode and the controlled voltage source in the DC energy consumption device composed of various types of submodules to obtain the left bridge arm branch and the right bridge arm branch; The equivalent model submodule is used to construct an equivalent model of a DC energy dissipation device based on the left bridge arm branch, the right bridge arm branch, the bridge arm current measurement module and the centralized energy dissipation resistor.

12. The system according to claim 11, characterized in that: The bridge arm branch submodule is specifically used for: For a centralized DC energy dissipation device composed of half-bridge or full-bridge submodules, the first diode of the left bridge arm branch is used to equivalently represent all diodes through which the reverse bridge arm current flows; for a distributed and hybrid DC energy dissipation device, the second diode of the left bridge arm branch is used to equivalently represent the diodes in all submodules; the input of the controlled voltage source in the centralized DC energy dissipation device is the bridge arm Thevenin expression, and the input of the controlled voltage source in the distributed and hybrid DC energy dissipation device is zero; A left bridge arm branch is constructed based on the first diode of the left bridge arm branch or the second diode of the left bridge arm branch being connected in series with a controlled voltage source; For a centralized DC energy dissipation device composed of half-bridge or full-bridge submodules, the first diode of the right bridge arm branch is used to equivalently represent all diodes through which the forward bridge arm current flows; for a distributed and hybrid DC energy dissipation device, the second diode of the right bridge arm branch is used to equivalently represent the diodes in all submodules; the input of the controlled voltage source in the centralized, distributed and hybrid DC energy dissipation devices is the bridge arm Thevenin expression; The right bridge arm branch is constructed based on the first diode of the right bridge arm branch or the second diode of the right bridge arm branch being connected in series with a controlled voltage source.

13. The system according to claim 8, characterized in that: The FPGA simulation module comprises: A submodule capacitor voltage and bridge arm current reading submodule, used to read the submodule capacitor voltage and bridge arm current at the previous moment based on the type of the DC energy consumption device; A bridge arm voltage calculation submodule, used to perform simulation calculation using an FPGA simulator based on the submodule capacitor voltage and bridge arm current at the previous moment in combination with the operation mode of each submodule and the system parameter input of the submodule and the bridge arm equivalent model to obtain the bridge arm voltage at the current moment; The bridge arm voltage sending submodule is used to send the bridge arm voltage at the current moment to the CPU emulator.

14. The system according to claim 13, characterized in that: The submodule capacitor voltage and bridge arm current reading submodule is specifically used for: Determine whether the current moment is the initial moment, if so, read the initial values ​​of the submodule capacitor voltage and bridge arm current, otherwise read the submodule capacitor voltage and bridge arm current of the previous moment.

15. A computer device, characterized in that: include: one or more processors; a processor for executing one or more programs; When the one or more programs are executed by the one or more processors, a real-time simulation method for a DC energy consumption device as described in any one of claims 1 to 7 is implemented.

16. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed, a real-time simulation method for a DC energy consumption device as claimed in any one of claims 1 to 7 is implemented.

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