An escape routing method, system and storage medium based on a preset line sequence

Abstract

The application discloses an escape wiring method and system based on a preset line sequence, and a storage medium, and comprises the following steps: acquiring all pin positions of a to-be-escaped package, to-be-escaped pins and line sequences of the to-be-escaped pins, recording all pin sequences on a boundary as Q1, …, Qt in a boundary order and direction, and finding all maximum common subsequences T1, …, Tp of the sequence and a sequence P1, …, Pk; selecting a boundary X in one direction, projecting and fixing a common pin in the boundary X and Tj in situ, then deleting the pin, and moving the pin in the boundary X and the pin in the boundary X but not in Tj directly to an inner side by one grid; and the common pin in the boundary X and Tj divides the boundary X into new boundary intervals B1, …, Bq. The application can realize automatic preset line sequence escape wiring.

Description

TECHNICAL FIELD

[0001] The present application relates to the wiring software technical field, and particularly relates to an escape wiring method, system and storage medium based on a preset line sequence. BACKGROUND

[0002] In the PCB design, the main work is how to wire, that is, to lay the PCB wires. With the progress of integrated technology, the chip integration degree is continuously improved, and the number of chip I / O pins increases sharply. To meet the needs of development, a new variety is added: ball grid array package, referred to as BGA (Ball Grid Array Package). The pins of BGA are under the chip. In order to realize the connection of the pins of BGA with the wires of other components, the wires of the pins of BGA need to be led out from the inside of the PCB under the chip, which is called escape wiring. In some cases, due to the fixed pin sequence of the external components connected to the BGA chip, if the wire sequence changes after escape wiring, via holes or wire loops may be needed. In order to avoid such a situation, the escape wiring of BGA needs to be planned in advance. At present, the wiring design software does not provide this function and cannot automatically perform preset sequence escape wiring. SUMMARY

[0003] Therefore, it is necessary to provide an escape wiring method, system and storage medium based on a preset sequence, to solve the problem that the wiring design software cannot automatically perform preset sequence escape wiring.

[0004] To achieve the above purpose, the present application provides an escape wiring method based on a preset sequence, comprising the following steps:

[0005] Obtain all pin positions of the to-be-escaped package, the to-be-escaped pins and their sequences, denoted as P1, …, Pk;

[0006] Take the four boundaries of the rectangular frame of the outermost pins of the to-be-escaped package, the outermost pins are on the boundaries, and all the pins are contained in the rectangular frame. Each pin on the boundary divides the boundary into multiple boundary intervals. All the boundary intervals of the boundaries are numbered in turn, denoted as B1, …, Bn;

[0007] Denote the selectable escape range of pin Pi as boundary interval B{a_i} to B{a_j} segment. In the initialization stage, the a_i of the selectable boundary interval of all pins Pi is 1 and the a_j is n, indicating that any boundary interval can be used by any Pi;

[0008] According to the boundary order and direction, denote all the pin sequences on the boundary as Q1, …, Qt, and find all the maximum common subsequences T1, …, Tp of the sequence and the sequence P1, …, Pk.

[0009] selecting a boundary X of one of the directions, fixing the common pins of the boundary X and Tj in place, then deleting the pin, and moving the pin directly inward by one cell for the boundary X and the pin in the boundary X but not in Tj; the common pins of the boundary X and Tj divide the boundary X into new boundary intervals B1, …, Bq;

[0010] for all the pins Pi that are not deleted, projecting the interval of the pin to a certain boundary interval Bi and buffering;

[0011] judging the number of pins that are not fixed, if the number of pins Pk that are not fixed is zero, then leading the wire out of the previously limited boundary interval Bi and to the outside of the package to be escaped in turn;

[0012] if the number of pins that are not fixed is not zero, then returning to the step of re-computing the maximum common subsequence according to the order of the boundaries and the direction, and looping the above steps.

[0013] further comprising the step of:

[0014] connecting the wire to the package outside the package to be escaped after leading the wire to the outside of the package to be escaped.

[0015] further comprising the step of:

[0016] obtaining a request for re-wiring operation, deleting the existing wiring, and replacing a boundary X of one of the directions and selecting a boundary X of another direction of the one of the directions.

[0017] further, the boundary of one of the directions is the boundary where the first pin T1 in the maximum common subsequence T1, …, Tp is located.

[0018] further, the boundary of one of the directions is the boundary where the line connecting the center of the package outside and the center of the package to be escaped passes through.

[0019] further comprising the step of:

[0020] obtaining an operation of dragging the package to be escaped by a mouse;

[0021] when the boundary where the line connecting the center of the package outside and the center of the package to be escaped passes through changes, then re-wiring is performed.

[0022] further comprising the step of:

[0023] obtaining the package to be escaped and the package outside selected by a mouse;

[0024] The pin connected by the to-be-escaped package and the external package is taken as a to-be-escaped pin, and the line sequence of the external package is taken as the line sequence of the to-be-escaped pin.

[0025] Further, it is judged whether the number of to-be-escaped pins is greater than 1, and if less than or equal to 1, no escape wiring is performed.

[0026] The application provides a storage medium storing a computer program, which is executed by a processor to implement the steps of the method according to any one of the embodiments of the application.

[0027] The application provides an escape wiring system based on a preset line sequence, comprising a memory and a processor, wherein the memory stores a computer program, and the computer program is executed by the processor to implement the steps of the method according to any one of the embodiments of the application.

[0028] Different from the prior art, the above technical solution calculates the maximum common subsequence and limits projection each time after the boundary is sequentially reduced, and each time the projection interval is limited to a certain boundary interval Bi and cached, and after completion, the guide line is led out from the previously limited boundary interval Bi and led to the outside of the to-be-escaped package, and finally the escape wiring of the preset line sequence is realized, so that the escape wiring of the preset line sequence is automatically realized. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 It is a method flowchart of the specific embodiment of the application.

[0030] Figure 2 It is a to-be-escaped wiring pin schematic diagram of the application.

[0031] Figure 3 It is a to-be-escaped wiring boundary reduction schematic diagram of the application.

[0032] Figure 4 It is a to-be-escaped wiring completion wiring schematic diagram of the application.

[0033] Figure 5 It is a method flowchart schematic diagram of the specific embodiment of the application. DETAILED DESCRIPTION

[0034] In order to describe the technical content, structural features, purposes and effects of the technical solution in detail, the following will be described in detail in combination with specific embodiments and the accompanying drawings.

[0035] The term "embodiment" is mentioned in this document means that the specific features, structures or characteristics described in connection with the embodiment can be included in at least one embodiment of the present application. The term "embodiment" appearing in various places in the specification does not necessarily refer to the same embodiment, nor does it particularly limit its independence or association with other embodiments. In principle, in this application, as long as there is no technical contradiction or conflict, the technical features mentioned in each embodiment can be combined in any way to form a corresponding implementable technical solution.

[0036] Unless otherwise defined, the meaning of technical terms used in this document is the same as that generally understood by those skilled in the art to which the present application belongs; the use of related terms in this document is only for the purpose of describing specific embodiments, and is not intended to limit the present application.

[0037] In the description of the present application, the phrase "and / or" is a description of the logical relationship between the objects, which means that there can be three relationships, for example, A and / or B, which means that there are three cases: A exists, B exists, and A and B exist at the same time. In addition, the character " / " in this document generally represents that the associated objects before and after are a "or" logical relationship.

[0038] In this application, such as "first" and "second", the terms are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual quantity, primary and secondary or order relationship between the entities or operations.

[0039] In this application, without more limitation, the "includes", "contains", "has" or other similar expressions used in the sentence are intended to cover non-exclusive inclusion, and these expressions do not exclude the presence of other elements in the process, method or product including the elements, so that the process, method or product including a series of elements can not only include those limited elements, but also include other elements not explicitly listed, or also include the elements inherent in such process, method or product.

[0040] As the same understanding in the "Patent Examination Guidelines", in this application, "greater than", "less than", "exceed" and other expressions are understood as not including the number; "above", "below", "within" and other expressions are understood as including the number. In addition, the meaning of "multiple" in the description of the embodiments of the present application is more than two (including two), and similar expressions related to "multiple" are also understood in this way, for example, "multiple groups", "multiple times" and the like, unless otherwise explicitly limited.

[0041] In the description of the embodiments of the present application, the spatial relative expressions used, such as "central", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "perpendicular", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", and the like, indicate the orientation or positional relationship shown in the specific embodiments or the drawings, and are only used to facilitate the description of the specific embodiments of the present application or to facilitate the understanding of the reader, and do not indicate or imply that the indicated device or component must have a particular position, a particular orientation, or be constructed or operated in a particular orientation, and therefore cannot be understood as a limitation on the embodiments of the present application.

[0042] Unless otherwise explicitly specified or limited, in the description of the embodiments of the present application, the terms "mount", "connect", "connect", "fix", "set", and the like should be understood broadly. For example, the "connection" can be fixed connection, or detachable connection, or integral setting; it can be mechanical connection, or electrical connection, or communication connection; it can be direct connection, or indirect connection through intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements. For those skilled in the art to which the present application belongs, the specific meaning of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0043] Please refer to Figures 1 to 5 The present application provides an escape wiring method based on a preset line sequence, comprising the following steps: step S101 acquiring all pin positions of a to-be-escaped package, to-be-escaped pins and their line sequences, denoted as P1, …, Pk, k is a sequential number, which is a natural number starting from 1. For example, Figure 2 In the figure, the to-be-escaped pins are marked as 1-5, i.e. P1 to P5.

[0044] Then step S102 is entered to take the four boundaries of a rectangular frame for the outermost pins of the to-be-escaped package, the outermost pins are on the boundaries, all the pins are contained in the rectangular frame, the pins on each boundary divide the boundary into multiple boundary intervals, and all the boundary intervals of the boundaries are sequentially numbered, denoted as B1, …, Bn; as shown in Figure 2 .

[0045] Then, in step S103, the optional escape range of pin Pi is recorded as the boundary interval B{a_i} to B{a_j}, and in the initialization stage, a_i of the optional boundary interval of all pins Pi is 1 and a_j is n, indicating that any boundary interval can be used by any pin. In step S104, according to the boundary order and direction, all pin sequences on the boundary are recorded as Q1, …, Qt, and all maximum common subsequences T1, …, Tp of the sequence and the sequence P1, …, Pk are obtained. The maximum common subsequence is also called the longest common subsequence, that is, a new sequence with the same order is obtained from two sequences. The sequence is a new sequence composed of deleting some elements (or not deleting any element) of the original sequence without changing the relative order of the sequence. For example Figure 2 In the above example, the boundary U has three pins (including P3), and the pins to be escaped are P1-P5, and the common subsequence is P3. For example Figure 3 In the above example, the common subsequence is P1, P5.

[0046] Then, in step S105, one of the boundaries X in the direction is selected, and the above boundary can be selected as an example. The common pins in the boundary X and Tj are projected and fixed in place (projection and fixation means that the wires can be led out at this position later), and then the pin is deleted. The pin in the boundary X but not in Tj is directly moved inward by one grid, and it is noted that if it is a pin to be escaped, but since the order does not correspond, it may not be a common sequence pin, and the non-common pin to be escaped also needs to be moved inward for the next judgment and wiring. The common pins in the boundary X and Tj divide the boundary X into new boundary intervals B1, …, Bq, as shown in Figure 3 In step S106, all pins Pi that are not deleted are projected and fixed in place according to the wire sequence, and the projection interval is limited to a certain boundary interval Bi and cached, as shown in Figure 3 Pin 1 and pin 2 are sequentially limited to the left side of pin 3, that is, boundary interval B2, and pin 5 is sequentially limited to the left side of pin 3, that is, boundary interval B3. Each time it is cached to facilitate subsequent wire leading out. In step S107, it is judged whether the number of pins that are not projected and fixed is zero. If the number of pins Pk that are not projected and fixed is zero, then the wires are sequentially led out from the projected and fixed pins and led to the outside of the escape package from the previously limited boundary interval Bi; for example Figure 4As shown, the black line inclined upwardly out of the to-be-escaped pin 1-5 is the lead-out wire, and the pin 2 is taken as an example, the first boundary is limited in the interval B2, and then the wire is led out from the B2. If the projected fixed number is not zero in the step S108, the step 104 is returned to: according to the boundary order and direction, the maximum common subsequence is recalculated, and the above steps are repeated. Until the boundary interval Bi of each time of the common pin is determined, the wire is arranged in sequence by the cached boundary interval, and the wire arrangement is completed.

[0047] The application adopts the way of sequentially narrowing the boundary, first narrows the boundary to contact the first pin with the element center, records all the pins contacted by the boundary and sorts them, and records the other virtual pins on the boundary. The boundary is narrowed again, and the other virtual pins are moved vertically or horizontally until the next pin is contacted. If the virtual point coincides with the actual point, the virtual point is placed on the left boundary interval or the right boundary interval of the actual point according to the preset line sequence, and all the pins contacted by the boundary are recorded and excluded again, and the virtual pin is recorded on the boundary. The above steps are repeated until all the pin points are on the boundary, and then the wiring is performed according to the sequence, and then the boundary is enlarged, the already laid wire is kept unchanged, and the enlargement is continued. The wire extends on the boundary interval, and further extends when the pin is encountered until the maximum boundary is reached, and the wiring is completed.

[0048] The application calculates the maximum common subsequence and limits the projection each time after the boundary is sequentially narrowed, limits the projection interval to a certain boundary interval Bi each time and caches it, and then leads out the wire from the previously limited boundary interval Bi and leads it out of the to-be-escaped package after completion, and finally realizes the escape wiring of the preset line sequence, so that the escape wiring of the preset line sequence is automatically realized.

[0049] In order to realize the automatic connection of the wire, the application further includes the step of connecting the wire to the package outside the to-be-escaped package after leading the wire out of the to-be-escaped package. In this way, the wire can be automatically laid to the external package that needs to be connected, reducing the manual wiring operation and facilitating the wiring.

[0050] Further, it further includes the step of obtaining a rewiring operation request, deleting the existing wiring, replacing a direction and selecting a boundary X in another direction. That is, through the rewiring request, after inputting the rewiring operation instruction, the software can realize the automatic rewiring after replacing the direction, and meet the wiring demand of different directions.

[0051] In some embodiments, the selected boundary in one direction is the boundary where the first pin T1 in the maximum common subsequence T1,……,Tp is located. For example, Figure 2As shown, the boundary where the common pin 3 is located is the selected boundary and is sequentially retracted inward, so that the wires can be arranged around the first common pin, and the wiring is optimized.

[0052] Alternatively, in other embodiments, the selected boundary in one direction is the boundary through which the line connecting the center of the external package and the center of the package to be escaped passes. If the package to which the package to be escaped needs to be connected is on the right side, the two package centers are connected and the line passes through the right side boundary. Thus, the wiring can be performed from the right side boundary, which can reduce the length of the wires after wiring and optimize the wiring effect.

[0053] On the basis of the above embodiments, the package to be escaped can also be dragged, and the application further includes the steps of: obtaining the operation of dragging the package to be escaped by the mouse; and when the boundary through which the line connecting the center of the external package and the center of the package to be escaped passes changes, re-wiring. In this way, the user can drag the package to be escaped, and then see which wiring is better after automatic re-wiring, which facilitates the user to quickly select the better wiring.

[0054] The pins to be escaped and the order of the application can be realized by software input functions, such as inputting pin coordinate sequences, such as A12 (1 row 2 column position pin), A34, A36; the input pins are the pins to be escaped, and the order is the input order from front to back. In some embodiments, the software can also automatically obtain the pins to be escaped and the order, and further includes the steps of: obtaining the package to be escaped and the external package selected by the mouse; taking the pins connected by the package to be escaped and the external package as the pins to be escaped, and taking the wire sequence of the external package as the wire sequence of the pins to be escaped. The package to be escaped is a BGA package, and the external package can be a dual-in-line package, etc. By selecting two connected packages, the pins to be escaped and the order can be quickly selected. Of course, the user can also manually modify the pins and the sequence.

[0055] In order to avoid escape wiring for a single wire, the application can determine whether the number of pins to be escaped is greater than 1 before running, and if it is less than or equal to 1, escape wiring is not performed.

[0056] The application further provides a storage medium storing a computer program, which, when executed by a processor, implements the steps of the above method. The storage medium of the embodiment can be a storage medium arranged in an electronic device, and the electronic device can read the content of the storage medium and achieve the effect of the application. The storage medium can also be a separate storage medium, and when the storage medium is connected to the electronic device, the electronic device can read the content in the storage medium and implement the method steps of the application. The application provides an escape routing system based on a preset line sequence, including a memory and a processor, the memory stores a computer program, and the computer program, when executed by the processor, implements the steps of the method according to any one of the embodiments of the application. The storage medium or system of the embodiment reduces the boundary in turn each time, calculates the maximum common subsequence and limits the projection each time, limits the projection interval to a certain boundary interval Bi each time and caches, and after completion, leads the guide wire from the previously limited boundary interval Bi and leads to the outside of the to-be-escaped package, and finally realizes the escape routing of the preset line sequence, so that the escape routing of the preset line sequence is automatically realized.

[0057] It should be noted that, although the above embodiments have been described in the present text, the patent protection scope of the application is not limited thereby. Therefore, based on the innovative idea of the application, the changes and modifications made to the embodiments described in the present text, or the equivalent structure or equivalent process transformation made by using the content of the application specification and drawings, directly or indirectly apply the above technical solutions to other related technical fields, are all included in the patent protection scope of the application.

Claims

1. A method for escape routing based on a preset line sequence, characterized in that, It comprises the following steps: Obtain all pin positions of the package to be escaped, pins to be escaped and their line sequences, denoted as P1, …, Pk; Take the four boundaries of the rectangular frame of the outermost pins of the package to be escaped, the outermost pins are on the boundaries, the rectangular frame contains all pins, the pins on each boundary divide the boundary into multiple boundary intervals, and the boundary intervals of all boundaries are sequentially numbered, denoted as B1, …, Bn; Denote the optional escape range of pin Pi as boundary interval B{a_i} to B{a_j}, in the initialization stage, a_i of all pins Pi is 1 and a_j is n, indicating that any boundary interval can be used by any Pi; According to the boundary order and direction, denote all pin sequences on the boundary as Q1, …, Qt, and obtain all maximum common subsequences T1, …, Tp of the sequence and the sequence P1, …, Pk; Select one direction boundary X, project and fix the common pins in the boundary X and Tj in place, then delete the pins, and move the pins in the boundary X and the boundary X but not in Tj directly inward by one grid; the common pins in the boundary X and Tj divide the boundary X into new boundary intervals B1, …, Bq; For all pins Pi that have not been deleted, according to the line sequence, limit the projection interval of the pin to a certain boundary interval Bi and cache it; Judge the number of pins that have not been projected and fixed, if the number of pins Pk that have not been projected and fixed is zero, then sequentially lead the wires from the projected and fixed pins to the boundary interval Bi before the limitation and to the outside of the package to be escaped; If the number of pins that have not been projected and fixed is not zero, return to the step of obtaining all maximum common subsequences according to the boundary order and direction and repeating the above steps.

2. The method of claim 1, wherein, It further comprises the following steps: After leading the wires to the outside of the package to be escaped, connect the wires to the package outside the package to be escaped.

3. The escape routing method based on a preset wiring sequence according to claim 1, characterized in that, It further comprises the following steps: Obtain a rewiring operation request, delete the existing wiring, and replace a direction and select another direction boundary X.

4. The escape routing method based on a preset wiring sequence according to claim 1, characterized in that: The selected one direction boundary is the boundary where the first pin T1 in the maximum common subsequence T1, …, Tp is located.

5. The method of claim 1, wherein the method is based on a preset line sequence. The selected one direction boundary is the boundary through which the line connecting the center of the connection package outside the package to be escaped and the center of the package to be escaped passes.

6. The escape routing method based on a preset wiring sequence according to claim 5, characterized in that, It further comprises the following steps: Obtain the operation of dragging the package to be escaped by the mouse; When the boundary through which the line connecting the center of the connection package outside the package to be escaped and the center of the package to be escaped passes changes, perform rewiring.

7. The escape routing method based on a preset wiring sequence according to claim 1, characterized in that, It further comprises the following steps: Obtain the package to be escaped and the external package selected by the mouse; Take the pins connected by the package to be escaped and the external package as the pins to be escaped, and take the line sequence of the external package as the line sequence of the pins to be escaped.

8. The method of claim 1, wherein: Judge whether the number of pins to be escaped is greater than 1, if it is less than or equal to 1, do not perform escape wiring.

9. Storage medium, characterized in that: The storage medium stores a computer program, and the computer program is executed by the processor to realize the steps of the method according to any one of claims 1 to 8.

10. An escape wiring system based on a preset line sequence, characterized by: The computer program is stored in the memory and is executed by the processor to implement the steps of the method according to any one of claims 1 to 8.

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