Subsynchronous oscillation suppression method, system and equipment of flexible direct current system and medium
By simulated access to positive damping virtual impedance on the AC line of the flexible DC converter station of the wind farm, calculate and superimpose the voltage frequency domain value, generate the reference current for subsynchronous oscillation suppression, the problems of subsynchronous oscillation and harmonic interference between the wind farm-flexible straight system are solved, and the system stability and harmonic suppression capability are improved.
Patent Information
- Application Number
- CN202311450664.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-02
- Publication Date
- 2025-05-06
AI Technical Summary
The problems of sub-synchronous oscillation and harmonic interference between wind farm-flexible straight systems seriously threaten the stability of the power system and become the key factors restricting wind power transmission.
By analog access to the virtual impedance with positive damping characteristics on the AC line of the flexible DC converter station, the voltage frequency domain value of the virtual impedance is calculated, and the frequency domain value and reference voltage of the actual voltage are superimposed to generate a reference current, and sub-synchronous oscillation suppression is performed through the outer ring PI controller acting on the current inner ring controller.
Effectively suppress system oscillation, reduce harmonic propagation interference, and improve the system's stable operation ability and harmonic suppression ability.
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Figure CN119944721A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the field of electric power meteorology, and in particular relates to a subsynchronous oscillation suppression method, system, equipment and medium for a flexible direct current system. Background Art
[0002] The share of clean energy such as wind power and solar energy has been climbing year by year, and the development and utilization of new energy has reached a new stage. At present, high voltage direct current (HVDC) transmission technology based on modular multilevel converter (MMC) has the advantages of voltage support capability, low output voltage harmonic content, flexible structure and easy expansion. It is widely used in the development and utilization of new energy, AC power grid interconnection, weak AC system and long-distance passive power grid. At the same time, direct-drive wind turbines based on permanent magnet synchronous motors have the advantages of strong fault ride-through capability, wide speed regulation range and high economy, and have become the mainstream model of wind power generation systems. From the development trend, direct-drive wind farms through MMC-HVDC transmission systems are one of the optimal configuration methods for future wind power transmission.
[0003] The direct-drive wind farm is a highly power electronic interconnected system transmitted through the flexible direct current system. There is a risk of subsynchronous oscillation, and subsynchronous oscillation has occurred in many projects. For example, oscillations in the range of 20 to 80 Hz have occurred many times in Hami, Xinjiang. Subsynchronous oscillations and harmonic interference problems have also occurred in the Nan'ao project and Zhangbei project since they were put into use. The oscillation phenomenon caused by the interaction between the wind farm and the flexible direct current system seriously threatens the stability of the power system and has become a key factor restricting the transmission of wind power. In view of the subsynchronous oscillation and harmonic interference problems in the wind power-flexible direct current system, an effective suppression strategy is proposed to maintain the stable operation of the system, which has great scientific research significance and engineering application needs. Summary of the invention
[0004] In order to overcome the above-mentioned deficiencies of the prior art, the present invention proposes a subsynchronous oscillation suppression method for a flexible DC system, comprising:
[0005] Acquire the current on the AC line in the flexible DC converter station, multiply the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculate the voltage frequency domain value of the virtual impedance;
[0006] The frequency domain value of the voltage of the virtual impedance is superimposed on the frequency domain value of the actual voltage and the reference voltage to obtain the frequency domain value of the input voltage of the voltage outer loop controller;
[0007] Generate a reference current according to the frequency domain value of the input voltage through the outer loop PI controller, and apply the reference current to the current inner loop controller to suppress subsynchronous oscillation;
[0008] The virtual impedance is obtained by simulating the connection of an impedance with a positive damping characteristic on an AC line.
[0009] Preferably, the obtaining of the current on the AC line in the flexible DC converter station, multiplying the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculating the voltage frequency domain value of the virtual impedance includes:
[0010] Obtaining d-axis current and q-axis current on the AC line in the flexible DC converter station;
[0011] The frequency domain value of the d-axis current and the frequency domain value of the q-axis current are respectively multiplied by the frequency domain transfer function of the virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance;
[0012] Based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance, a limiting strategy is adopted to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting.
[0013] Preferably, the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance are based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance, and a limiting strategy is adopted to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting, including:
[0014] Set the voltage upper limit and voltage lower limit according to the limiting strategy;
[0015] If the voltage frequency domain value of the d-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the d-axis virtual impedance; when the voltage frequency domain value of the d-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the d-axis virtual impedance; otherwise, the voltage frequency domain value of the d-axis virtual impedance is used as the voltage frequency domain value of the d-axis virtual impedance after limiting;
[0016] If the voltage frequency domain value of the q-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the q-axis virtual impedance; when the voltage frequency domain value of the q-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the q-axis virtual impedance; otherwise, the voltage frequency domain value of the q-axis virtual impedance is used as the voltage frequency domain value of the q-axis virtual impedance after limiting.
[0017] Preferably, the frequency domain value of the actual voltage includes: the frequency domain value of the actual AC voltage d-axis component and the frequency domain value of the actual AC voltage q-axis component; the frequency domain value of the input voltage includes: the frequency domain value of the d-axis input voltage and the frequency domain value of the d-axis input voltage; the voltage frequency domain value of the virtual impedance is superimposed on the frequency domain value of the actual voltage and the reference voltage to obtain the frequency domain value of the input voltage of the voltage outer loop controller, including:
[0018] The frequency domain value of the d-axis input voltage of the voltage outer loop PI controller is obtained by superimposing the frequency domain value of the reference voltage and the frequency domain value of the d-axis component of the actual AC voltage on the voltage frequency domain value of the d-axis virtual impedance obtained after limiting;
[0019] The voltage frequency domain value of the q-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the q-axis component of the actual AC voltage to obtain the frequency domain value of the d-axis input voltage of the voltage outer loop PI controller.
[0020] Preferably, the reference current includes: a d-axis reference current and a q-axis reference current; the outer-loop PI controller generates a reference current according to the frequency domain value of the input voltage, and the reference current acts on the current inner-loop controller to suppress subsynchronous oscillation, including:
[0021] The d-axis reference current and the q-axis reference current are obtained according to the frequency domain value of the d-axis input voltage and the frequency domain value of the q-axis input voltage through the voltage outer loop PI controller, and the d-axis reference current and the q-axis reference current are applied to the current inner loop controller to suppress subsynchronous oscillation.
[0022] Preferably, the virtual impedance includes at least one or more of the following: a high-pass filter type virtual impedance, a low-pass filter type virtual impedance and a band-pass filter type virtual impedance.
[0023] Based on the same inventive concept, the present invention also provides a subsynchronous oscillation suppression system for a flexible direct current system, comprising:
[0024] A virtual impedance voltage frequency domain value calculation module, an input voltage frequency domain value calculation module and a subsynchronous oscillation suppression module;
[0025] Acquire the current on the AC line in the flexible DC converter station, multiply the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculate the voltage frequency domain value of the virtual impedance;
[0026] The frequency domain value of the voltage of the virtual impedance is superimposed on the frequency domain value of the actual voltage and the reference voltage to obtain the frequency domain value of the input voltage of the voltage outer loop controller;
[0027] Generate a reference current according to the frequency domain value of the input voltage through the outer loop PI controller, and apply the reference current to the current inner loop controller to suppress subsynchronous oscillation;
[0028] The virtual impedance is obtained by simulating the connection of an impedance with a positive damping characteristic on an AC line.
[0029] Preferably, the virtual impedance voltage frequency domain value calculation module is specifically used for:
[0030] Obtaining d-axis current and q-axis current on the AC line in the flexible DC converter station;
[0031] The frequency domain value of the d-axis current and the frequency domain value of the q-axis current are respectively multiplied by the frequency domain transfer function of the virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance;
[0032] Based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance, a limiting strategy is adopted to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting.
[0033] Preferably, the virtual impedance voltage frequency domain value calculation module adopts a limiting strategy based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting, including:
[0034] Set the voltage upper limit and voltage lower limit according to the limiting strategy;
[0035] If the voltage frequency domain value of the d-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the d-axis virtual impedance; when the voltage frequency domain value of the d-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the d-axis virtual impedance; otherwise, the voltage frequency domain value of the d-axis virtual impedance is used as the voltage frequency domain value of the d-axis virtual impedance after limiting;
[0036] If the voltage frequency domain value of the q-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the q-axis virtual impedance; when the voltage frequency domain value of the q-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the q-axis virtual impedance; otherwise, the voltage frequency domain value of the q-axis virtual impedance is used as the voltage frequency domain value of the q-axis virtual impedance after limiting.
[0037] Preferably, the input voltage frequency domain value calculation module is specifically used for:
[0038] The frequency domain value of the d-axis input voltage of the voltage outer loop PI controller is obtained by superimposing the frequency domain value of the reference voltage and the frequency domain value of the d-axis component of the actual AC voltage on the voltage frequency domain value of the d-axis virtual impedance obtained after limiting;
[0039] The voltage frequency domain value of the q-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the q-axis component of the actual AC voltage to obtain the frequency domain value of the d-axis input voltage of the voltage outer loop PI controller.
[0040] Preferably, the subsynchronous oscillation suppression module is specifically used to:
[0041] The d-axis reference current and the q-axis reference current are obtained according to the frequency domain value of the d-axis input voltage and the frequency domain value of the q-axis input voltage through the voltage outer loop PI controller, and the d-axis reference current and the q-axis reference current are applied to the current inner loop controller to suppress subsynchronous oscillation.
[0042] Preferably, the virtual impedance of the virtual impedance voltage frequency domain value calculation module includes at least one or more of the following: a high-pass filter type virtual impedance, a low-pass filter type virtual impedance and a band-pass filter type virtual impedance.
[0043] Based on the same inventive concept, the present invention also provides a computer device, including: one or more processors;
[0044] A memory for storing one or more programs;
[0045] When the one or more programs are executed by the one or more processors, the subsynchronous oscillation suppression method of a flexible direct current system as described above is implemented.
[0046] Based on the same inventive concept, the present invention also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed, the subsynchronous oscillation suppression method of a flexible direct current system as described above is implemented.
[0047] Compared with the closest prior art, the present invention has the following beneficial effects:
[0048] The present invention provides a subsynchronous oscillation suppression method, system, device and medium of a flexible DC system, including: obtaining the current on the AC line in the flexible DC converter station, multiplying the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculating the voltage frequency domain value of the virtual impedance; superimposing the voltage frequency domain value of the virtual impedance with the frequency domain value of the actual voltage and the reference voltage to obtain the frequency domain value of the input voltage of the voltage outer loop controller; generating a reference current according to the frequency domain value of the input voltage through the outer loop PI controller, and applying the reference current to the current inner loop controller to suppress subsynchronous oscillation; wherein the virtual impedance is obtained by simulating the connection of an impedance with a positive damping characteristic on the AC line, and the patent application of the present invention performs subsequent synchronous oscillation suppression operations based on the calculated voltage frequency domain value of the virtual impedance, the method is simple, does not require additional peripheral hardware circuits, does not have too many algorithm operation processes, and has the advantage of being easy to implement; through the subsynchronous oscillation suppression method of the present application, the system oscillation can be effectively suppressed, thereby reducing harmonic propagation interference, and effectively improving the system's stable operation capability and harmonic suppression capability. BRIEF DESCRIPTION OF THE DRAWINGS
[0049] Figure 1A schematic flow chart of a method for suppressing subsynchronous oscillation of a flexible direct current system provided by the present invention;
[0050] Figure 2 A schematic diagram of the wind farm provided by the present invention being connected to the grid and transmitted via a flexible DC converter station;
[0051] Figure 3 The virtual series impedance equivalent mechanism of the AC line provided by the present invention;
[0052] Figure 4 A schematic diagram of virtual impedance provided by the present invention;
[0053] Figure 5 A schematic diagram of a voltage outer loop PI controller provided by the present invention;
[0054] Figure 6 A schematic diagram of a current inner loop controller provided by the present invention;
[0055] Figure 7 A schematic diagram of a method for realizing a virtual series impedance of an AC line for subsynchronous oscillation suppression provided by the present invention;
[0056] Figure 8 A schematic diagram of a subsynchronous oscillation suppression system for a flexible DC system provided by the present invention. DETAILED DESCRIPTION
[0057] The specific implementation modes of the present invention are further described in detail below with reference to the accompanying drawings.
[0058] Embodiment 1:
[0059] The present invention provides a method for suppressing subsynchronous oscillation of a flexible direct current system. Figure 1 As shown, including:
[0060] Step 1: obtaining the current on the AC line in the flexible DC converter station, multiplying the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculating the voltage frequency domain value of the virtual impedance;
[0061] Step 2: Superimpose the frequency domain value of the actual voltage and the reference voltage on the voltage frequency domain value of the virtual impedance to obtain the frequency domain value of the input voltage of the voltage outer loop controller;
[0062] Step 3: Generate a reference current according to the frequency domain value of the input voltage through the outer loop PI controller, and apply the reference current to the current inner loop controller to suppress subsynchronous oscillation;
[0063] The virtual impedance is obtained by simulating the connection of an impedance with a positive damping characteristic on an AC line.
[0064] Specifically, step 1 includes:
[0065] like Figure 2 The figure shows the schematic diagram of wind farm connected to the grid through flexible DC converter station. When the wind farm is connected to the grid through flexible DC and subsynchronous oscillation occurs and harmonics are generated, it is because there is a lack of sufficient positive damping in the system within the subsynchronous oscillation frequency range, forming an RLC oscillation circuit and generating harmonic interference. In order to achieve the effect of suppressing subsynchronous oscillation, a series virtual impedance is simulated on the AC side (i.e., AC line) of flexible DC converter station 2, as shown in FIG. Figure 3 The figure shows the equivalent mechanism diagram of the virtual series impedance of the AC line. The virtual impedance is an impedance with positive damping characteristics, such as Figure 4 As shown, the virtual impedance Z sei Including but not limited to the virtual impedance of the first-order high-pass filter type, the first-order low-pass filter type and the band-pass filter type formed by the combination of RCL. The virtual impedance refers to the reshaping of the output impedance characteristics of the converter station without additional loss. The filter is the actual method used to reshape the output impedance characteristics of the converter station. Among them, the virtual impedance Z sei The expression is:
[0066] Z sei = {Z se1 ,Z se2 ,Z se3}
[0067] Among them, Z sei is the virtual impedance, Z se1 is a first-order high-pass filter, Z se2 is a first-order low-pass filter, Z se3 is a bandpass filter;
[0068] A first-order high-pass filter will cause high-order harmonic components to affect the high-frequency characteristics of the system, and a first-order low-pass filter will introduce a DC component, thereby affecting the steady-state value of the integrator output, thereby affecting the transient characteristics. The band-pass filter overcomes the defects of the first two. The patent application of this invention takes a first-order high-pass filter, a first-order low-pass filter, and a band-pass filter composed of a second-order low-pass filter and a high-pass filter as an example. The corresponding expression is as follows. It should be noted that its expression form is not limited to the above three types:
[0069]
[0070] Among them, Z se1 is a high-pass filter, Z se2 is a low-pass filter, Z se3 For a bandpass filter, R se1 is the gain factor of the high-pass filter, R se2 is the gain factor of the low-pass filter, R se3 is the gain coefficient of the bandpass filter, ω se1The bandwidth parameter of the high-pass filter, ω se2 The bandwidth parameter of the high-pass filter, ω se3 is the bandwidth parameter of the bandpass filter, s is the Laplace operator, ξ se3 is the undamped oscillation angular frequency;
[0071] The d-axis current and q-axis current on the AC line in the flexible DC converter station are obtained. The acquisition process is as follows: the instantaneous three-phase AC current (i sa 、i sb 、i sc ), the AC quantity is converted into a DC quantity through Park coordinate transformation sd and i sq, The Park transform is as follows:
[0072]
[0073] Among them, i sd is the d-axis current, i sq is the q-axis current, θ PLL is the angle given by the phase-locked loop in the flexible DC converter station 1, i sa is the instantaneous a-phase AC current, i sb is the instantaneous b-phase AC current, i sc is the instantaneous c-phase AC current;
[0074] In the s domain (frequency domain), the frequency domain value of the d-axis current and the frequency domain value of the q-axis current are multiplied by the frequency domain transfer function of the virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance. The expressions are as follows:
[0075]
[0076] Among them, i sd (s) is the frequency domain value of the d-axis current, i sq (s) is the frequency domain value of the q-axis current, Z sei (s) is the frequency domain transfer function of the virtual impedance, u sei_d (s) is the voltage frequency domain value of the d-axis virtual impedance, u sei_q (s) is the voltage frequency domain value of the q-axis virtual impedance;
[0077] During actual operation, the voltage of the virtual impedance may have a large instantaneous value during system failure or high-power disturbance, affecting the system operation characteristics, so they need to be limited. The voltage upper limit and voltage lower limit are set according to the limiting strategy. If the voltage frequency domain value of the d-axis virtual impedance is greater than the voltage upper limit, the voltage upper limit is used as the voltage frequency domain value of the d-axis virtual impedance. When the voltage frequency domain value of the d-axis virtual impedance is less than the voltage lower limit, the voltage lower limit is used as the voltage frequency domain value of the d-axis virtual impedance. Otherwise, the voltage frequency domain value of the d-axis virtual impedance is used as the voltage frequency domain value of the d-axis virtual impedance after limiting. If the voltage frequency domain value of the q-axis virtual impedance is greater than the voltage upper limit, the voltage upper limit is used as the voltage frequency domain value of the q-axis virtual impedance. When the voltage frequency domain value of the q-axis virtual impedance is less than the voltage lower limit, the voltage lower limit is used as the voltage frequency domain value of the q-axis virtual impedance. Otherwise, the voltage frequency domain value of the q-axis virtual impedance is used as the voltage frequency domain value of the q-axis virtual impedance after limiting. The expression is as follows:
[0078]
[0079] Among them, u sei_d (s) * is the voltage frequency domain value of the d-axis virtual impedance after limiting, u sei_q (s) * is the voltage frequency domain value of the q-axis virtual impedance after limiting, is the voltage upper limit, is the voltage lower limit, u sei_d (t) is the voltage of the d-axis virtual impedance in the time domain t, u sei_q (t) is the voltage of the q-axis virtual impedance in the time domain t, i sd (s) is the frequency domain value of the d-axis current, i sq (s) is the frequency domain value of the q-axis current, Z sei (s) is the frequency domain transfer function of the virtual impedance; when subsynchronous oscillation occurs in the wind power flexible direct current grid-connected system, the voltage, current and power in the flexible direct current converter station will oscillate. On the basis of the current on the AC line in the flexible direct current converter station multiplied by the frequency domain transfer function of the virtual impedance, the subsequent subsynchronous oscillation suppression strategy is implemented. Unlike the virtual series impedance implemented on the current inner loop controller, the virtual series impedance is implemented on the AC voltage outer loop, which is equivalent to connecting an equivalent virtual impedance in series on the AC line by a control method. This simulation method is called the virtual series impedance of the AC line. The patent application of the present invention performs subsequent synchronous oscillation suppression operations based on the calculated voltage frequency domain value of the virtual impedance. The method is simple, does not require additional peripheral hardware circuits, does not have too many algorithm operation processes, and has the advantage of being easy to implement. The method of the patent application of the present invention is one of the additional active damping control strategies, which is used to improve the damping performance of the converter station within the subsynchronous oscillation frequency range.
[0080] Specifically, step 2 includes:
[0081] like Figure 5 The figure shows a schematic diagram of the voltage outer loop PI controller. After the voltage frequency domain value of the d-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the reference voltage and the actual AC voltage d-axis component, the frequency domain value of the d-axis input voltage of the voltage outer loop PI controller is obtained. The voltage frequency domain value of the q-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the actual AC voltage q-axis component to obtain the frequency domain value of the d-axis input voltage of the voltage outer loop PI controller to offset the oscillation component in the actual current. The calculation formula is as follows:
[0082]
[0083] Among them, u' sd (s) is the frequency domain value of the d-axis input voltage, u' sq (s) is the frequency domain value of the q-axis input voltage, u sei_d (s) * is the voltage frequency domain value of the d-axis virtual impedance after limiting, u sei_q (s) * is the voltage frequency domain value of the q-axis virtual impedance after limiting, u sd (s) is the frequency domain value of the d-axis component of the actual AC voltage, u sq (s) is the frequency domain value of the q-axis component of the actual AC voltage, It is the reference voltage; in the patent application of the present invention, within the sub-synchronous oscillation range, when the current of the system has oscillation fluctuations, it can be inferred that the voltage on the virtual impedance also has a sub-synchronous oscillation component, and the input voltage of the voltage outer loop PI controller is obtained by positive superposition. Therefore, the sub-synchronous oscillation component will be used to compensate for the sub-synchronous oscillation component of the system, thereby suppressing the sub-synchronous oscillation phenomenon.
[0084] Specifically, step 3 includes:
[0085] The d-axis reference current and the q-axis reference current are obtained according to the frequency domain value of the d-axis input voltage and the frequency domain value of the d-axis input voltage respectively through the voltage outer loop PI controller, and the expressions are:
[0086]
[0087] in, is the d-axis reference current, is the q-axis reference current, G uac (s) is the voltage outer loop PI controller, u' sd (s) is the frequency domain value of the d-axis input voltage, u' sq (s) is the frequency domain value of the q-axis input voltage,
[0088] like Figure 6 The figure shows a schematic diagram of the current inner loop controller. The current inner loop controller generates a reference value of the AC side voltage of the flexible DC converter station according to the d-axis reference current and the d-axis reference current. The expression is as follows:
[0089]
[0090] in, is the reference value of the d-axis voltage on the AC side of the flexible DC converter station, is the reference value of the q-axis voltage on the AC side of the flexible DC converter station, G i_mmc (s) is the current inner loop controller, u sd Actual AC voltage d-axis component, u sq is the q-axis component of the actual AC voltage, is the d-axis reference current, is the q-axis reference current, i sd is the d-axis current, i sq is the q-axis current, L eq The equivalent inductance of the AC side of the flexible DC converter station, ω is the real-time angular frequency of the power grid;
[0091] The present invention patent application is filed through Figure 7 The schematic diagram of the implementation method of the virtual series impedance of the AC line for subsynchronous oscillation suppression shown in the figure sends the reference current value generated by the voltage outer loop PI controller to the current inner loop controller to suppress the subsynchronous oscillation. Within the subsynchronous oscillation range, the system oscillation can be effectively suppressed, thereby reducing the harmonic propagation interference. If this strategy can be always put into use, the stable operation capability and harmonic suppression capability of the system can be effectively improved; there is no need to start the trigger signal, and it can be put into use as the control system operates; this method has certain versatility, and is not only suitable for wind farms connected to the grid through flexible DC converter stations, but also suitable for occasions where flexible DC converter stations are connected to weak AC power grids;
[0092] In a specific embodiment
[0093] The voltage upper limit of the limiting strategy is generally 2% to 10% of the rated current, and 5% of the AC rated current is recommended.
[0094] Embodiment 2:
[0095] Based on the same inventive concept, the present invention also provides a subsynchronous oscillation suppression system for a flexible DC system. Figure 8 As shown, including:
[0096] A virtual impedance voltage frequency domain value calculation module, an input voltage frequency domain value calculation module and a subsynchronous oscillation suppression module;
[0097] Acquire the current on the AC line in the flexible DC converter station, multiply the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculate the voltage frequency domain value of the virtual impedance;
[0098] The frequency domain value of the voltage of the virtual impedance is superimposed on the frequency domain value of the actual voltage and the reference voltage to obtain the frequency domain value of the input voltage of the voltage outer loop controller;
[0099] Generate a reference current according to the frequency domain value of the input voltage through the outer loop PI controller, and apply the reference current to the current inner loop controller to suppress subsynchronous oscillation;
[0100] The virtual impedance is obtained by simulating the connection of an impedance with a positive damping characteristic on an AC line.
[0101] Preferably, the virtual impedance voltage frequency domain value calculation module is specifically used for:
[0102] Obtaining d-axis current and q-axis current on the AC line in the flexible DC converter station;
[0103] The frequency domain value of the d-axis current and the frequency domain value of the q-axis current are respectively multiplied by the frequency domain transfer function of the virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance;
[0104] Based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance, a limiting strategy is adopted to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting.
[0105] Preferably, the virtual impedance voltage frequency domain value calculation module adopts a limiting strategy based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting, including:
[0106] Set the voltage upper limit and voltage lower limit according to the limiting strategy;
[0107] If the voltage frequency domain value of the d-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the d-axis virtual impedance; when the voltage frequency domain value of the d-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the d-axis virtual impedance; otherwise, the voltage frequency domain value of the d-axis virtual impedance is used as the voltage frequency domain value of the d-axis virtual impedance after limiting;
[0108] If the voltage frequency domain value of the q-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the q-axis virtual impedance; when the voltage frequency domain value of the q-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the q-axis virtual impedance; otherwise, the voltage frequency domain value of the q-axis virtual impedance is used as the voltage frequency domain value of the q-axis virtual impedance after limiting.
[0109] Preferably, the input voltage frequency domain value calculation module is specifically used for:
[0110] The frequency domain value of the d-axis input voltage of the voltage outer loop PI controller is obtained by superimposing the frequency domain value of the reference voltage and the frequency domain value of the d-axis component of the actual AC voltage on the voltage frequency domain value of the d-axis virtual impedance obtained after limiting;
[0111] The voltage frequency domain value of the q-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the q-axis component of the actual AC voltage to obtain the frequency domain value of the d-axis input voltage of the voltage outer loop PI controller.
[0112] Preferably, the subsynchronous oscillation suppression module is specifically used to:
[0113] The voltage outer-loop PI controller obtains the d-axis reference current and the d-axis reference current according to the frequency domain value of the d-axis input voltage and the frequency domain value of the d-axis input voltage respectively, and the d-axis reference current and the d-axis reference current are applied to the current inner-loop controller to suppress subsynchronous oscillation.
[0114] Preferably, the virtual impedance of the virtual impedance voltage frequency domain value calculation module includes at least one or more of the following: a high-pass filter type virtual impedance, a low-pass filter type virtual impedance and a band-pass filter type virtual impedance.
[0115] Embodiment 3:
[0116] Based on the same inventive concept, the present invention also provides a computer device, which includes a processor and a memory, wherein the memory is used to store a computer program, the computer program includes program instructions, and the processor is used to execute the program instructions stored in the computer storage medium. The processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. It is the computing core and control core of the terminal, which is suitable for implementing one or more instructions, and is specifically suitable for loading and executing one or more instructions in the computer storage medium to implement the corresponding method flow or corresponding function, so as to implement the steps of the subsynchronous oscillation suppression method of a flexible direct current system in the above embodiment.
[0117] Embodiment 4:
[0118] Based on the same inventive concept, the present invention also provides a storage medium, specifically a computer-readable storage medium (Memory), which is a memory device in a computer device for storing programs and data. It can be understood that the computer-readable storage medium here can include both built-in storage media in the computer device and, of course, extended storage media supported by the computer device. The computer-readable storage medium provides a storage space, which stores the operating system of the terminal. In addition, one or more instructions suitable for being loaded and executed by the processor are also stored in the storage space, and these instructions can be one or more computer programs (including program codes). It should be noted that the computer-readable storage medium here can be a high-speed RAM memory or a non-volatile memory, such as at least one disk memory. The processor can load and execute one or more instructions stored in the computer-readable storage medium to implement the steps of a subsynchronous oscillation suppression method for a flexible direct current system in the above embodiment.
[0119] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0120] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.
[0121] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.
[0122] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.
[0123] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit its protection scope. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the field should understand that after reading the present invention, those skilled in the art can still make various changes, modifications or equivalent substitutions to the specific implementation methods of the application, but these changes, modifications or equivalent substitutions are all within the protection scope of the claims to be approved.
Claims
1. A method for suppressing subsynchronous oscillation of a flexible direct current system, characterized in that: include: Acquire the current on the AC line in the flexible DC converter station, multiply the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculate the voltage frequency domain value of the virtual impedance; The frequency domain value of the voltage of the virtual impedance is superimposed on the frequency domain value of the actual voltage and the reference voltage to obtain the frequency domain value of the input voltage of the voltage outer loop controller; Generate a reference current according to the frequency domain value of the input voltage through the outer loop PI controller, and apply the reference current to the current inner loop controller to suppress subsynchronous oscillation; The virtual impedance is obtained by simulating the connection of an impedance with a positive damping characteristic on an AC line.
2. The method according to claim 1, characterized in that The step of obtaining the current on the AC line in the flexible DC converter station, multiplying the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculating the voltage frequency domain value of the virtual impedance includes: Obtaining d-axis current and q-axis current on the AC line in the flexible DC converter station; The frequency domain value of the d-axis current and the frequency domain value of the q-axis current are respectively multiplied by the frequency domain transfer function of the virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance; Based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance, a limiting strategy is adopted to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting.
3. The method according to claim 2, characterized in that The voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance are based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance, and a limiting strategy is adopted to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting, including: Set the voltage upper limit and voltage lower limit according to the limiting strategy; If the voltage frequency domain value of the d-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the d-axis virtual impedance; when the voltage frequency domain value of the d-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the d-axis virtual impedance; otherwise, the voltage frequency domain value of the d-axis virtual impedance is used as the voltage frequency domain value of the d-axis virtual impedance after limiting; If the voltage frequency domain value of the q-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the q-axis virtual impedance; when the voltage frequency domain value of the q-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the q-axis virtual impedance; otherwise, the voltage frequency domain value of the q-axis virtual impedance is used as the voltage frequency domain value of the q-axis virtual impedance after limiting.
4. The method according to claim 3, characterized in that The frequency domain value of the actual voltage includes: the frequency domain value of the d-axis component of the actual AC voltage and the frequency domain value of the q-axis component of the actual AC voltage; the frequency domain value of the input voltage includes: the frequency domain value of the d-axis input voltage and the frequency domain value of the d-axis input voltage; the frequency domain value of the input voltage of the voltage outer loop controller is obtained by superimposing the voltage frequency domain value of the virtual impedance on the frequency domain value of the actual voltage and the reference voltage, including: The voltage frequency domain value of the d-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the reference voltage and the frequency domain value of the d-axis component of the actual AC voltage, so as to obtain the frequency domain value of the d-axis input voltage of the voltage outer loop PI controller; The voltage frequency domain value of the q-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the q-axis component of the actual AC voltage to obtain the frequency domain value of the q-axis input voltage of the voltage outer loop PI controller.
5. The method according to claim 4, characterized in that The reference current includes: a d-axis reference current and a q-axis reference current; the reference current is generated by the outer-loop PI controller according to the frequency domain value of the input voltage, and the reference current is applied to the current inner-loop controller to suppress subsynchronous oscillation, including: The d-axis reference current and the q-axis reference current are obtained according to the frequency domain value of the d-axis input voltage and the frequency domain value of the q-axis input voltage through the voltage outer loop PI controller, and the d-axis reference current and the q-axis reference current are applied to the current inner loop controller to suppress subsynchronous oscillation.
6. The method according to claim 1, characterized in that The virtual impedance includes at least one or more of the following: a high-pass filter type virtual impedance, a low-pass filter type virtual impedance and a band-pass filter type virtual impedance.
7. A subsynchronous oscillation suppression system for a flexible direct current system, characterized in that: include: A virtual impedance voltage frequency domain value calculation module, an input voltage frequency domain value calculation module and a subsynchronous oscillation suppression module; Acquire the current on the AC line in the flexible DC converter station, multiply the frequency domain value of the current by the frequency domain transfer function of the virtual impedance, and calculate the voltage frequency domain value of the virtual impedance; The frequency domain value of the voltage of the virtual impedance is superimposed on the frequency domain value of the actual voltage and the reference voltage to obtain the frequency domain value of the input voltage of the voltage outer loop controller; Generate a reference current according to the frequency domain value of the input voltage through the outer loop PI controller, and apply the reference current to the current inner loop controller to suppress subsynchronous oscillation; The virtual impedance is obtained by simulating the connection of an impedance with a positive damping characteristic on an AC line.
8. The system according to claim 7, characterized in that The virtual impedance voltage frequency domain value calculation module is specifically used for: Obtaining d-axis current and q-axis current on the AC line in the flexible DC converter station; The frequency domain value of the d-axis current and the frequency domain value of the q-axis current are respectively multiplied by the frequency domain transfer function of the virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance; Based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance, a limiting strategy is adopted to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting.
9. The system according to claim 8, characterized in that The virtual impedance voltage frequency domain value calculation module adopts a limiting strategy based on the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance to obtain the voltage frequency domain value of the d-axis virtual impedance and the voltage frequency domain value of the q-axis virtual impedance after limiting, including: Set the voltage upper limit and voltage lower limit according to the limiting strategy; If the voltage frequency domain value of the d-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the d-axis virtual impedance; when the voltage frequency domain value of the d-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the d-axis virtual impedance; otherwise, the voltage frequency domain value of the d-axis virtual impedance is used as the voltage frequency domain value of the d-axis virtual impedance after limiting; If the voltage frequency domain value of the q-axis virtual impedance is greater than the voltage upper limit value, the voltage upper limit value is used as the voltage frequency domain value of the q-axis virtual impedance; when the voltage frequency domain value of the q-axis virtual impedance is less than the voltage lower limit value, the voltage lower limit value is used as the voltage frequency domain value of the q-axis virtual impedance; otherwise, the voltage frequency domain value of the q-axis virtual impedance is used as the voltage frequency domain value of the q-axis virtual impedance after limiting.
10. The system according to claim 9, characterized in that The input voltage frequency domain value calculation module is specifically used for: The voltage frequency domain value of the d-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the reference voltage and the frequency domain value of the d-axis component of the actual AC voltage, so as to obtain the frequency domain value of the d-axis input voltage of the voltage outer loop PI controller; The voltage frequency domain value of the q-axis virtual impedance obtained after limiting is superimposed on the frequency domain value of the q-axis component of the actual AC voltage to obtain the frequency domain value of the d-axis input voltage of the voltage outer loop PI controller.
11. The system according to claim 10, characterized in that The subsynchronous oscillation suppression module is specifically used for: The d-axis reference current and the q-axis reference current are obtained according to the frequency domain value of the d-axis input voltage and the frequency domain value of the q-axis input voltage through the voltage outer loop PI controller, and the d-axis reference current and the q-axis reference current are applied to the current inner loop controller to suppress subsynchronous oscillation.
12. A computer device, characterized in that: include: one or more processors; A memory for storing one or more programs; When the one or more programs are executed by the one or more processors, a subsynchronous oscillation suppression method for a flexible direct current system according to any one of claims 1 to 6 is implemented.
13. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the computer program is executed, a subsynchronous oscillation suppression method for a flexible direct current system as described in any one of claims 1 to 6 is implemented.