High-voltage isolation transceiver suitable for cascade battery pack

Abstract

The invention relates to the technical field of battery management, in particular to a high-voltage isolation transceiver suitable for a cascade battery pack, which comprises a cascade battery pack module and a high-voltage isolation transceiver module, the cascade battery pack module is connected in series with the high-voltage isolation transceiver module, and the cascade battery pack module collects and detects the battery state. The high-voltage isolation transceiver module is used for realizing voltage conversion and ensuring direct communication between the cascaded battery packs; the high-voltage isolation transceiver module comprises a low-level gain amplifier A1, a high-level gain amplifier A2, a low-voltage input-stage amplifier A3 and a high-voltage input-stage amplifier A4. According to the invention, reliable communication between the cascaded battery packs under different voltage levels is realized.

Description

Technical Field

[0001] The present invention relates to the field of battery management technology, and in particular to a high-voltage isolation transceiver suitable for cascaded battery packs, which is applied in battery pack cascade scenarios. Background Art

[0002] With the rapid development of battery technology, battery pack cascade configuration has been widely used in energy storage systems, electric vehicles and other fields. Cascade battery packs connect multiple sub-battery packs in series to achieve a higher total voltage output, but this brings new challenges to the battery management system (BMS).

[0003] Cascaded battery packs not only have the traditional requirements for battery metering (SOC) and battery health (SOH), but also introduce the concept of communication between packs. In the cascade structure, there are significant ground potential differences between the sub-battery packs, which makes it impossible for traditional low-voltage communication interfaces (such as CAN, SPI, etc.) to directly achieve cross-pack communication. The ground potential difference will cause signal common mode voltage interference, which may cause communication signal distortion at the least, or even cause the communication link to fail completely, seriously threatening the consistency and safety of the battery system.

[0004] In the prior art, high-voltage isolated communications mostly use optocoupler isolation or magnetic coupling isolation solutions. However, optocoupler isolation devices are large in size, expensive, and have performance degradation problems caused by aging; although magnetic coupling isolation has a high degree of integration, its electromagnetic compatibility (EMC) design is complex and it is susceptible to interference in high-voltage scenarios. In addition, the above solutions usually require additional power isolation design, further increasing the complexity and cost of the system. On the other hand, although traditional high-voltage processes (such as high-voltage CMOS) can achieve a certain degree of level conversion, they have defects such as high power consumption and limited input and output ranges, which makes it difficult to meet the needs of cascaded battery packs for wide voltage range communication. Summary of the invention

[0005] The present invention provides a high-voltage isolation transceiver suitable for a cascaded battery pack, which realizes reliable communication between the cascaded battery packs at different voltage levels.

[0006] In order to achieve the purpose of the present invention, the technical scheme adopted is: a high-voltage isolation transceiver suitable for a cascaded battery pack, comprising a cascaded battery pack module and a high-voltage isolation transceiver module, the cascaded battery pack module and the high-voltage isolation transceiver module are connected in series, the cascaded battery pack module collects and detects the battery status, and the high-voltage isolation transceiver module is used to realize voltage conversion to ensure direct communication between the cascaded battery packs; the high-voltage isolation transceiver module comprises a low-level gain amplifier A1, a high-level gain amplifier A2, a low-voltage input stage amplifier A3 and a high-voltage input stage amplifier A4, the low-voltage input stage amplifier A3 is used to convert the signal of the GND~VDD power domain into the signal of the GND~5V power domain, the low-level gain amplifier A1 is used to amplify and process the signal of the GND~5V power domain and send the output signal to the low-voltage cascaded battery pack through the buffer B1; the high-voltage input stage amplifier A4 is used to convert the signal of the GND~VDD power domain into the signal of the VDD-5V~VDD power domain, the high-level gain amplifier A2 is used to amplify and process the signal of the VDD-5V~VDD power domain and send the output signal to the high-voltage cascaded battery pack through the buffer B2.

[0007] As an optimization solution of the present invention, the low-voltage input stage amplifier A3 includes an enhanced pmos tube MP4, an enhanced pmos tube MP5, an enhanced pmos tube MP1, an enhanced pmos tube MP2, an enhanced nmos tube MN4, an enhanced nmos tube MN5, a Zener diode D1, a Zener diode D2, a Zener diode D3, a Zener diode D7, a Zener diode D8 and a Zener diode D9. The enhanced pmos tube MP4, the enhanced pmos tube MP1, the enhanced nmos tube MN4, the enhanced pmos tube MP5, the enhanced pmos tube MP2 and the enhanced nmos tube MN5 form a complementary common source amplifier. The enhanced pmos tube MP4 and the enhanced pmos tube MP The gate and source of 5 are connected to the bias voltage Vb1 and the power supply VDD respectively, the drains of the enhanced pmos tubes MP4 and MP5 are connected to the sources of the enhanced pmos tubes MP1 and MP2 through the resistors R1 and R2 respectively; the gates of the enhanced pmos tubes MP1 and MP2 are connected to the negative input voltage Vn and the positive input voltage Vp respectively, the drains of the enhanced pmos tubes MP1 and MP2 are connected to the drains of the enhanced nmos tubes MN4 and MN5 respectively, and the gates and sources of the enhanced nmos tubes MN4 and MN5 are connected to the bias voltage Vb2 and the ground GND respectively.

[0008] As an optimization scheme of the present invention, the Zener diodes D1, D2 and D3 connected in series clamp the gate-source voltage Vgs of the enhanced pmos tube MP1 within 2.1V, the Zener diodes D7, D8 and D9 connected in series clamp the gate-source voltage Vgs of the enhanced pmos tube MP2 within 2.1V, and the enhanced pmos tubes MP1 and MP2 control the transmission of the signal to the low-level gain amplifier A1.

[0009] As an optimization solution of the present invention, the high-voltage input stage amplifier A4 includes an enhanced pmos tube MP6, an enhanced pmos tube MP7, an enhanced nmos tube MN1, an enhanced nmos tube MN2, an enhanced nmos tube MN6, an enhanced nmos tube MN7, a Zener diode D13, a Zener diode D14, a Zener diode D15, a Zener diode D18, a Zener diode D19 and a Zener diode D20, and the enhanced pmos tube MP6, the enhanced nmos tube MN1, the enhanced nmos tube MN6, the enhanced pmos tube MP7, the enhanced nmos tube MN2 and the enhanced nmos tube MN7 form a complementary common source amplifier, wherein the enhanced pmos tube MP6 and the enhanced pmos tube MP7 form a complementary common source amplifier. The gate and source of the s-tube MP7 are respectively connected to the bias voltage Vb1 and the power supply VDD, the drains of the enhanced pmos tubes MP6 and MP7 are respectively connected to the drains of the enhanced nmos tubes MN1 and MN2, the gates of the enhanced nmos tubes MN1 and MN2 are respectively connected to the positive input voltage Vp and the negative input voltage Vn, the sources of the enhanced nmos tubes MN1 and MN2 are respectively connected to the drains of the enhanced nmos tubes MN6 and MN7 through the resistors R3 and R4, and the gates and sources of the enhanced nmos tubes MN6 and MN7 are respectively connected to the bias voltage Vb2 and the ground GND.

[0010] As an optimization scheme of the present invention, the series-connected Zener diodes D13, D14, and D15 clamp the gate-source voltage Vgs of the enhanced nmos tube MN1 within 2.1V, and the series-connected Zener diodes D18, D19, and D20 clamp the gate-source voltage Vgs of the enhanced nmos tube MN2 within 2.1V, and the enhanced nmos tubes MN1 and MN2 control the transmission of signals to the high-level gain amplifier A2.

[0011] As an optimization scheme of the present invention, the positive input and negative input of the low-level gain amplifier A1 are respectively connected to the drains of the enhanced pmos tube MP2 and the enhanced pmos tube MP1 of the low-voltage input stage amplifier A3, the power supply V+ of the low-level gain amplifier A1 is connected to VDD in series through the Zener diode D5, the Zener diode D4, the Zener diode D6 and the Zener diode D11, the ground V- of the low-level gain amplifier A1 is connected to GND, and the input and output of the buffer B1 are respectively connected to the low-level gain amplifier A1 and the output signal LVout.

[0012] As an optimization scheme of the present invention, the positive input and negative input of the high-level gain amplifier A2 are respectively connected to the drains of the enhanced nmos tube MN1 and the enhanced nmos tube MN2 of the high-voltage input stage amplifier A4, the ground V- of the high-level gain amplifier A2 is connected to GND through a Zener diode D16, a Zener diode D17, a Zener diode D12 and a Zener diode D10 connected in series, the power supply V+ of the high-level gain amplifier A2 is connected to VDD, and the input and output of the buffer B2 are respectively connected to the high-level gain amplifier A2 and the output signal Hvout.

[0013] The present invention has positive effects: 1) The present invention realizes signal conversion between circuits in different voltage domains through a high-voltage isolation transceiver module, ensures direct communication between cascaded battery packs, avoids signal distortion or failure caused by common-mode voltage interference, and improves communication reliability and system security; 2) The present invention uses the design of low-voltage and high-voltage input stage amplifiers to enable the high-voltage isolation transceiver to operate in a wide voltage range to meet the high-voltage requirements of the cascaded battery pack. At the same time, the high-voltage enhanced pmos tube is used to protect the transistor from overvoltage, thereby improving durability; 3) The present invention replaces the optocoupler or magnetic coupling isolation communication solution with CMOS, reduces the number and volume of components, avoids the need for additional power isolation design, and realizes the most basic isolation communication (communication between circuits in different voltage domains, GND~5V voltage domain circuits and VDD-5V~VDD voltage domain circuits), while reducing system complexity and cost and improving integration. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0015] Figure 1 It is a principle block diagram of the present invention; Figure 2 It is a circuit schematic diagram of the present invention. DETAILED DESCRIPTION

[0016] The following is a clear and complete description of the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0017] It should be noted that, in the absence of conflict, the features in the embodiments of the present invention may be combined with each other.

[0018] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, but they are not intended to limit the present invention.

[0019] like Figure 1 As shown, the present invention discloses a high-voltage isolation transceiver suitable for cascaded battery packs, which is used to realize communication of battery packs at different voltage levels, including a cascaded battery pack module and a high-voltage isolation transceiver module; the cascaded battery pack module and the high-voltage isolation transceiver module are connected in series; the high-voltage isolation transceiver module is connected to the adjacent cascaded battery pack for communication. The cascaded battery pack module includes a battery pack consisting of no more than 6 batteries, and supplies power to all circuits, and has at least voltage monomer, temperature detection, balancing and other functions, so there is a communication demand, and there is a data transceiver function. The high-voltage isolation transceiver suitable for the cascaded battery pack also includes a low-level gain amplifier A1, a high-level gain amplifier A2, a buffer B1 and a buffer B2. The positive input and the negative input of the low-level gain amplifier A1 are respectively connected to the drains of the enhanced pmos tube MP2 and the enhanced pmos tube MP1 of the low-voltage input stage amplifier A3. The power supply V+ of the low-level gain amplifier A1 is connected to VDD in series through the Zener diode D5, the Zener diode D4, the Zener diode D6 and the Zener diode D11. The ground V- of the low-level gain amplifier A1 is connected to GND. The input and output of the buffer B1 are connected to the The low-level gain amplifier A1 is connected to the output signal LVout respectively; the positive input and negative input of the high-level gain amplifier A2 are connected to the drains of the enhanced nmos tube MN1 and the enhanced nmos tube MN2 of the high-voltage input stage amplifier A4 respectively, the ground V- of the high-level gain amplifier A2 is connected to GND through the Zener diode D16, the Zener diode D17, the Zener diode D12 and the Zener diode D10 in series, the power supply V+ of the high-level gain amplifier A2 is connected to VDD, and the input and output of the buffer B2 are connected to the high-level gain amplifier A2 and the output signal HVout respectively.

[0020] The high voltage isolation transceiver module can be realized by using the high voltage BCD process.

[0021] like Figure 2As shown, the low voltage input stage amplifier A3 includes an enhanced pmos tube MP4, an enhanced pmos tube MP5, an enhanced pmos tube MP1, an enhanced pmos tube MP2, an enhanced nmos tube MN4, an enhanced nmos tube MN5, a Zener diode D1, a Zener diode D2, a Zener diode D3, a Zener diode D7, a Zener diode D8 and a Zener diode D9, and the enhanced pmos tube MP4, the enhanced pmos tube MP1, the enhanced nmos tube MN4, the enhanced pmos tube MP5, the enhanced pmos tube MP2 and the enhanced nmos tube MN5 form a complementary common source amplifier, wherein the gate of the enhanced pmos tube MP4 and the enhanced pmos tube MP5 is connected to the gate of the enhanced pmos tube MP5. The gate and source of the enhanced pmos tube MP4 and the enhanced pmos tube MP5 are respectively connected to the bias voltage Vb1 and the power supply VDD, the drains of the enhanced pmos tube MP1 and the enhanced pmos tube MP2 are respectively connected to the sources of the enhanced pmos tube MP1 and the enhanced pmos tube MP2 through the resistors R1 and R2; the gates of the enhanced pmos tube MP1 and the enhanced pmos tube MP2 are respectively connected to the negative input voltage Vn and the positive input voltage Vp, the drains of the enhanced pmos tube MP1 and the enhanced pmos tube MP2 are respectively connected to the drains of the enhanced nmos tube MN4 and the enhanced nmos tube MN5, and the gate and source of the enhanced nmos tube MN4 and the enhanced nmos tube MN5 are respectively connected to the bias voltage Vb2 and the ground GND. The series-connected Zener diodes D1, D2, and D3 clamp the gate-source voltage Vgs of the enhanced pmos tube MP1 within 2.1V, and the series-connected Zener diodes D7, D8, and D9 clamp the gate-source voltage Vgs of the enhanced pmos tube MP2 within 2.1V. The enhanced pmos tubes MP1 and MP2 control the transmission of signals to the low-level gain amplifier A1.

[0022] The low voltage input stage amplifier A3 further includes a resistor R1 and a resistor R2. The resistor R1 is connected between the drain of the enhanced pmos tube MP4 and the source of the enhanced pmos tube MP1. The resistor R2 is connected between the drain of the enhanced pmos tube MP5 and the source of the enhanced pmos tube MP2.

[0023] The high-voltage input stage amplifier A4 includes an enhanced pmos tube MP6, an enhanced pmos tube MP7, an enhanced nmos tube MN1, an enhanced nmos tube MN2, an enhanced nmos tube MN6, an enhanced nmos tube MN7, a Zener diode D13, a Zener diode D14, a Zener diode D15, a Zener diode D18, a Zener diode D19 and a Zener diode D20. The enhanced pmos tube MP6, the enhanced nmos tube MN1, the enhanced nmos tube MN6, the enhanced pmos tube MP7, the enhanced nmos tube MN2 and the enhanced nmos tube MN7 form a complementary common source amplifier, wherein the gate of the enhanced pmos tube MP6 and the enhanced pmos tube MP7 is connected to the gate of the enhanced pmos tube MP7. The gate and source of the enhanced nmos tubes MN1 and MN2 are connected to the positive input voltage Vp and the negative input voltage Vn respectively, and the source of the enhanced nmos tubes MN1 and MN2 are connected to the drain of the enhanced nmos tubes MN6 and MN7 through the resistors R3 and R4 respectively. The gate and source of the enhanced nmos tubes MN6 and MN7 are connected to the bias voltage Vb2 and the ground GND respectively. The series-connected Zener diodes D13, D14, and D15 clamp the gate-source voltage Vgs of the enhanced nmos tube MN1 within 2.1V. The series-connected Zener diodes D18, D19, and D20 clamp the gate-source voltage Vgs of the enhanced nmos tube MN2 within 2.1V. The enhanced nmos tubes MN1 and MN2 control the transmission of signals to the high-level gain amplifier A2.

[0024] The high-voltage input stage amplifier also includes a resistor R3 and a resistor R4. The resistor R3 is connected between the source of the enhanced nmos tube MN1 and the drain of the enhanced nmos tube MN6. The resistor R4 is connected between the source of the enhanced nmos tube MN2 and the drain of the enhanced nmos tube MN7.

[0025] The high voltage isolation transceiver suitable for the cascaded battery pack also includes a Zener diode D10, a Zener diode D12, a Zener diode D17, a Zener diode D16, a Zener diode D5, a Zener diode D4, a Zener diode D6 and a Zener diode D11.

[0026] The high-voltage isolation transceiver suitable for the cascaded battery pack also includes a low-level gain amplifier A1, a high-level gain amplifier A2, a buffer B1 and a buffer B2. The positive input and the negative input of the low-level gain amplifier A1 are respectively connected to the drains of the enhanced pmos tube MP2 and the enhanced pmos tube MP1 of the low-voltage input stage amplifier A3. The power supply V+ of the low-level gain amplifier A1 is connected to VDD in series through the Zener diode D5, the Zener diode D4, the Zener diode D6 and the Zener diode D11. The ground V- of the low-level gain amplifier A1 is connected to GND. The input and output of the buffer B1 are connected to the The low-level gain amplifier A1 is connected to the output signal LVout respectively; the positive input and negative input of the high-level gain amplifier A2 are connected to the drains of the enhanced nmos tube MN1 and the enhanced nmos tube MN2 of the high-voltage input stage amplifier A4 respectively, the ground V- of the high-level gain amplifier A2 is connected to GND through the Zener diode D16, the Zener diode D17, the Zener diode D12 and the Zener diode D10 in series, the power supply V+ of the high-level gain amplifier A2 is connected to VDD, and the input and output of the buffer B2 are connected to the high-level gain amplifier A2 and the output signal HVout respectively.

[0027] The specific embodiments described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A high voltage isolation transceiver suitable for cascaded battery packs, characterized in that: It includes a cascade battery pack module and a high-voltage isolation transceiver module. The cascade battery pack module is connected in series with the high-voltage isolation transceiver module. The cascade battery pack module collects and detects the battery status. The high-voltage isolation transceiver module is used to realize voltage conversion to ensure direct communication between the cascade battery packs; the high-voltage isolation transceiver module includes a low-level gain amplifier A1, a high-level gain amplifier A2, a low-voltage input stage amplifier A3 and a high-voltage input stage amplifier A4. The low-voltage input stage amplifier A3 is used to convert the signal of the GND~VDD power domain into the signal of the GND~5V power domain, and the low-level gain amplifier A1 is used to amplify and process the signal of the GND~5V power domain and send the output signal to the low-voltage cascade battery pack through the buffer B1; the high-voltage input stage amplifier A4 is used to convert the signal of the GND~VDD power domain into the signal of the VDD-5V~VDD power domain, and the high-level gain amplifier A2 is used to amplify and process the signal of the VDD-5V~VDD power domain and send the output signal to the high-voltage cascade battery pack through the buffer B2.

2. A high voltage isolation transceiver suitable for cascaded battery packs according to claim 1, characterized in that: The low voltage input stage amplifier A3 includes an enhanced pmos tube MP4, an enhanced pmos tube MP5, an enhanced pmos tube MP1, an enhanced pmos tube MP2, an enhanced nmos tube MN4, an enhanced nmos tube MN5, a Zener diode D1, a Zener diode D2, a Zener diode D3, a Zener diode D7, a Zener diode D8 and a Zener diode D9. The enhanced pmos tube MP4, the enhanced pmos tube MP1, the enhanced nmos tube MN4, the enhanced pmos tube MP5, the enhanced pmos tube MP2 and the enhanced nmos tube MN5 form a complementary common source amplifier. The gate and source of the enhanced pmos tube MP4 and the enhanced pmos tube MP5 are connected. The gates of the enhanced pmos tubes MP1 and MP2 are connected to the negative input voltage Vn and the positive input voltage Vp respectively, the drains of the enhanced pmos tubes MP1 and MP2 are connected to the drains of the enhanced nmos tubes MN4 and MN5 respectively, and the gates and sources of the enhanced nmos tubes MN4 and MN5 are connected to the bias voltage Vb2 and the ground GND respectively.

3. A high voltage isolation transceiver suitable for cascaded battery packs according to claim 2, characterized in that: The series-connected Zener diodes D1, D2, and D3 clamp the gate-source voltage Vgs of the enhanced pmos tube MP1 within 2.1V, and the series-connected Zener diodes D7, D8, and D9 clamp the gate-source voltage Vgs of the enhanced pmos tube MP2 within 2.1V. The enhanced pmos tubes MP1 and MP2 control the transmission of signals to the low-level gain amplifier A1.

4. A high voltage isolation transceiver suitable for cascaded battery packs according to claim 3, characterized in that: The high-voltage input stage amplifier A4 includes an enhanced pmos tube MP6, an enhanced pmos tube MP7, an enhanced nmos tube MN1, an enhanced nmos tube MN2, an enhanced nmos tube MN6, an enhanced nmos tube MN7, a Zener diode D13, a Zener diode D14, a Zener diode D15, a Zener diode D18, a Zener diode D19 and a Zener diode D20. The enhanced pmos tube MP6, the enhanced nmos tube MN1, the enhanced nmos tube MN6, the enhanced pmos tube MP7, the enhanced nmos tube MN2 and the enhanced nmos tube MN7 form a complementary common source amplifier. The gate of the enhanced pmos tube MP6 and the enhanced pmos tube MP7 is connected to the gate of the enhanced pmos tube MP6. The gate and source of the enhanced nmos tube MN1 and the enhanced nmos tube MN2 are connected to the positive input voltage Vp and the negative input voltage Vn respectively, and the source of the enhanced nmos tube MN1 and the enhanced nmos tube MN2 are connected to the drain of the enhanced nmos tube MN6 and the enhanced nmos tube MN7 through the resistor R3 and the resistor R4 respectively. The gate and source of the enhanced nmos tube MN6 and the enhanced nmos tube MN7 are connected to the bias voltage Vb2 and GND respectively.

5. A high voltage isolation transceiver suitable for cascaded battery packs according to claim 4, characterized in that: The series-connected Zener diodes D13, D14, and D15 clamp the gate-source voltage Vgs of the enhanced nmos tube MN1 within 2.1V. The series-connected Zener diodes D18, D19, and D20 clamp the gate-source voltage Vgs of the enhanced nmos tube MN2 within 2.1V. The enhanced nmos tubes MN1 and MN2 control the transmission of signals to the high-level gain amplifier A2.

6. A high voltage isolation transceiver suitable for cascaded battery packs according to claim 5, characterized in that: The positive input and negative input of the low-level gain amplifier A1 are respectively connected to the drains of the enhanced pmos tube MP2 and the enhanced pmos tube MP1 of the low-voltage input stage amplifier A3, the power supply V+ of the low-level gain amplifier A1 is connected to VDD in series through the Zener diode D5, the Zener diode D4, the Zener diode D6 and the Zener diode D11, the ground V- of the low-level gain amplifier A1 is connected to GND, and the input and output of the buffer B1 are respectively connected to the low-level gain amplifier A1 and the output signal LVout.

7. A high voltage isolation transceiver suitable for cascaded battery packs according to claim 6, characterized in that: The positive input and negative input of the high-level gain amplifier A2 are respectively connected to the drains of the enhanced nmos tube MN1 and the enhanced nmos tube MN2 of the high-voltage input stage amplifier A4, the ground V- of the high-level gain amplifier A2 is connected to GND through a Zener diode D16, a Zener diode D17, a Zener diode D12 and a Zener diode D10 connected in series, the power supply V+ of the high-level gain amplifier A2 is connected to VDD, and the input and output of the buffer B2 are respectively connected to the high-level gain amplifier A2 and the output signal HVout.

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