Balanced-unbalanced converter and unbalanced-to-balanced signal conversion method
By designing a balanced unbalanced converter containing specific coils and capacitors, the problem that traditional technology is difficult to apply to wide operating frequency bands is solved, and efficient signal conversion and optimized common mode rejection ratios are achieved.
Patent Information
- Application Number
- CN202311439740.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-11-01
- Publication Date
- 2025-05-06
AI Technical Summary
Traditional single balanced unbalanced converters are difficult to be suitable for a wide operating frequency band, resulting in poor signal interference ratio and excessive chip area.
A balanced unbalanced converter including a first coil, a second coil, a third coil, a fourth coil and a capacitor is designed, and the unbalanced to balanced signal is converted through the coupling relationship between these coils and capacitors, and a good common mode rejection ratio is maintained in a wide operating frequency band.
It realizes signal conversion using only a single balancing unbalanced converter in a wide operating frequency band, and optimizes the numerical performance of the common mode rejection ratio, reducing the chip area occupation.
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Figure CN119945365A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a balun, and in particular to a balun that can have good performance in a wide operating frequency band and a signal conversion method from unbalanced to balanced. Background Art
[0002] An external digital pre-distortion (eDPD) circuit generally has a wide operating frequency band. In addition, in the external digital pre-distortion circuit, a signal to interference ratio (SIR) is an important parameter.
[0003] Generally speaking, an external digital pre-distortion circuit is equipped with a balun for signal conversion. Since a single conventional balun is not suitable for a wide operating frequency band, a common practice is to configure a corresponding balun for each small frequency band in the wide operating frequency band so that the external digital pre-distortion circuit has a better signal-to-interference ratio. However, this method takes up too much chip area. Summary of the invention
[0004] In one embodiment, a balanced-unbalanced converter includes a first coil, a second coil, a third coil, a fourth coil, and a capacitor. The first coil is coupled between an unbalanced terminal and a first ground terminal. The second coil is coupled between the first ground terminal and the second ground terminal. The third coil is coupled between the first balanced terminal and a contact point, and is coupled to the first coil. The fourth coil is coupled between the contact point and the second balanced terminal, and is coupled to the second coil. The capacitor is coupled between the contact point and the third ground terminal.
[0005] In one embodiment, a method for converting an unbalanced signal to a balanced signal includes: receiving an input signal using an unbalanced terminal of a balun, wherein the balun includes a first coil, a second coil, a third coil, a fourth coil and a capacitor, the first coil is coupled between the unbalanced terminal and a first ground terminal, the second coil is coupled between the first ground terminal and the second ground terminal, the third coil is coupled between the first balanced terminal of the balun and a contact point and is coupled to the first coil, the fourth coil is coupled between the contact point and the second balanced terminal of the balun and is coupled to the second coil, and the capacitor is coupled between the contact point and the third ground terminal; and generating a differential signal pair at the first balanced terminal and the second balanced terminal according to the input signal using the third coil and the fourth coil.
[0006] In summary, by applying any of the baluns and unbalanced-to-balanced signal conversion methods of the embodiments, only a single balun can be used to perform signal conversion in a wide operating frequency band, and can also have a better common mode rejection ratio numerical performance compared to a structure without an intermediate ground.
[0007] The detailed features and advantages of the present invention are described in detail in the following embodiments, and the contents are sufficient to enable any person skilled in the relevant art to understand the technical content of the present invention and implement it accordingly. Moreover, according to the contents disclosed in this specification, the scope of the patent application and the drawings, any person skilled in the relevant art can easily understand the relevant purposes and advantages of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0008] Figure 1 FIG. 1 is a schematic diagram of an embodiment of a balun.
[0009] Figure 2 The present invention is a flow chart of an embodiment of a method for converting an unbalanced signal to a balanced signal.
[0010] Figure 3 A cross-sectional schematic diagram of an embodiment of an integrated structure for manufacturing a balun converter.
[0011] Figure 4 A cross-sectional schematic diagram of an embodiment of an integrated structure for manufacturing a balun converter.
[0012] Figure 5 A cross-sectional schematic diagram of an embodiment of an integrated structure for manufacturing a balun converter.
[0013] Figure 6 A cross-sectional schematic diagram of an embodiment of an integrated structure for manufacturing a balun converter.
[0014] Figure 7 FIG. 1 is a schematic diagram of an embodiment of a balun.
[0015] Figure 8 FIG. 1 is a schematic diagram of an embodiment of a balun.
[0016] Fig. 9 FIG. 1 is a schematic diagram of an embodiment of a balun.
[0017] Fig.10 A schematic diagram of an embodiment of a communication circuit is shown. DETAILED DESCRIPTION
[0018] In order to make the above-mentioned objects, features and advantages of the embodiments of the present invention more obvious and understandable, a detailed description is given below with reference to the accompanying drawings.
[0019] It should be understood that the word "comprising" used in this specification is used to indicate the existence of specific technical features, values, method steps, operation processing, elements and / or components, but does not exclude the addition of more technical features, values, method steps, operation processing, elements, components, or any combination of the above.
[0020] Figure 1 is a schematic diagram of an embodiment of a balun converter. Figure 1 . The balun 100 converts a single-ended signal into a double-ended signal by implementing an embodiment of an unbalanced to balanced signal conversion method. In some embodiments, the balun 100 has a wide operating frequency band and can perform well in this wide operating frequency band. In some embodiments, the width of the operating frequency band may be about 5.5 GHz. The operating frequency band of the balun 100 may be determined according to the operating frequency band of the circuit to which it is applied. For example, the operating frequency band may be 2 GHz to 7.5 GHz, and the center frequency is 5 GHz.
[0021] In some embodiments, the balun 100 includes an unbalanced port 110 and a balanced port 120, and the unbalanced port 110 and the balanced port 120 are coupled to each other. The unbalanced port 110 has an unbalanced terminal P1, and the balanced port 120 has two balanced terminals (hereinafter referred to as a first balanced terminal P2 and a second balanced terminal P3, respectively).
[0022] In some embodiments, the unbalanced port 110 may include a first coil 111 and a second coil 112. The first coil 111 is coupled between the unbalanced terminal P1 and the first ground terminal G1. The second coil 112 is coupled between the first ground terminal G1 and the second ground terminal G2. In addition, the balanced port 120 may include a third coil 121, a fourth coil 122 and a capacitor 123. The third coil 121 is coupled between the first balanced terminal P2 and the node N1. The fourth coil 122 is coupled between the node N1 and the second balanced terminal P3. The capacitor 123 is coupled between the node N1 and the third ground terminal G3.
[0023] In some embodiments, the third coil 121 may be disposed relative to the first coil 111 to be coupled to the first coil 111. The fourth coil 122 may be disposed relative to the second coil 112 to be coupled to the second coil 112. In addition, the first ground terminal G1, the second ground terminal G2, and the third ground terminal G3 may be electrically connected to different ground signals, or may be electrically connected to the same ground signal. In some implementations, the ground signal is a zero volt voltage.
[0024] Figure 2 FIG. 1 is a flow chart of an embodiment of a method for converting an unbalanced signal to a balanced signal. Figure 1 and Figure 2 In one embodiment, the balun 100 can utilize the unbalanced terminal P1 of the unbalanced port 110 to receive an input signal S1 from a previous stage circuit (not shown) (step S10). Through the coupling between the third coil 121 and the first coil 111 and the coupling between the fourth coil 122 and the second coil 112, the balanced port 120 can generate a differential signal pair D1 on the first balanced terminal P2 and the second balanced terminal P3 according to the input signal S1 on the unbalanced port 110 (step S20), and output the differential signal pair D1 to the subsequent stage circuit (not shown) via the first balanced terminal P2 and the second balanced terminal P3. In some embodiments, the differential signal pair D1 includes a first differential signal D11 and a second differential signal D12. The first differential signal D11 can be output to the subsequent stage circuit via the first balanced terminal P2 of the balanced port 120, and the second differential signal D12 can be output to the subsequent stage circuit via the second balanced terminal P3 of the balanced port 120.
[0025] In some embodiments, the front stage circuit may include but is not limited to a coupler for collecting a trace signal from an antenna. In addition, the front stage circuit may further include an attenuator, and the attenuator is coupled between the coupler and the unbalanced terminal P1 of the unbalanced port 110. In some embodiments, the back stage circuit may include but is not limited to an external digital pre-distortion (eDPD) circuit.
[0026] In some embodiments, the balun 100 is directly grounded in the middle of the unbalanced port 110 (i.e., coupled to the first ground terminal G1) and indirectly grounded in the middle of the balanced port 120 (i.e., the contact point N1 is coupled to the third ground terminal G3 via the capacitor 123), so that the amplitude imbalance of the differential signal pair D1 converted by the balun 100 can be close to the ideal value of 0 dB in a wide operating frequency band (e.g., the maximum amplitude difference in the operating frequency band is 0.02 dB), and the phase imbalance of the differential signal pair D1 can be close to the ideal value (i.e., 180.0 degrees) in a wide operating frequency band (e.g., the phase imbalance of the differential signal pair D1 is within 180.0±2.0 degrees). For example, the variation range of the phase imbalance is within 3 degrees. As a result, the CMRR of the balun 100 according to any embodiment can be better than that of a balun with no intermediate grounding at any port or both ports in a wide operating frequency band.
[0027] In some embodiments, the capacitance value of the capacitor 123 may be determined according to the operating frequency band of the balun 100. For example, the balun 100 can achieve the best performance at the center frequency of the operating frequency band by selecting a capacitor 123 with an appropriate capacitance value (for example, the phase imbalance of the differential signal pair D1 is closest to the ideal value of 180.0 degrees at the center frequency). In some embodiments, the capacitance value of the capacitor 123 may be between 10 farads (F) and 100 farads. In some embodiments, the capacitance value of the capacitor 123 may be 10 farads. In other embodiments, the capacitance value of the capacitor 123 may be 20 farads.
[0028] Figure 3 A cross-sectional view of an embodiment of an integrated structure for manufacturing a balun converter. Figure 3 In some embodiments, the integrated structure for manufacturing the balun 100 includes a substrate B1 and a plurality of isolation layers I1-IX. Wherein, X is a positive integer greater than 1. Here, the plurality of isolation layers I1-IX are sequentially stacked on the substrate B1, and each of the isolation layers I1-IX has a metal layer. In other words, there may be a total of X metal layers M1-MX sequentially stacked on the substrate B1, and any two adjacent metal layers in the metal layers M1-MX are separated by an isolation layer. For example, the metal layer M3 and the metal layer M2 are separated by an isolation layer I3.
[0029] Figure 4 A cross-sectional view of an embodiment of an integrated structure for manufacturing a balun converter. Figure 1 and Figure 4 In some embodiments, one of the third coil 121 and the fourth coil 122 and the first coil 111 and the second coil 112 are formed on a specific isolation layer A1 among the plurality of isolation layers I1-IX. The specific isolation layer A1 is one of the plurality of isolation layers I1-IX. In addition, the other of the third coil 121 and the fourth coil 122 is formed on a plurality of intermediate isolation layers F1-FY among the plurality of isolation layers I1-IX. Each of the intermediate isolation layers F1-FY is one of the plurality of isolation layers I1-IX.
[0030] In some embodiments, a plurality of intermediate isolation layers F1-FY are stacked continuously. That is, there may be no other isolation layers between the intermediate isolation layers F1-FY. In some embodiments, one of the intermediate isolation layers F1-FY is a specific isolation layer A1. In some embodiments, the specific isolation layer A1 is the uppermost intermediate isolation layer FY among the intermediate isolation layers F1-FY. For example, when there are four intermediate isolation layers F1-F4, the specific isolation layer A1 is the intermediate isolation layer F4.
[0031] In some implementations, such as Figure 4 As shown, the specific isolation layer A1 is the topmost layer among the isolation layers I1-IX, namely, the isolation layer IX, and the intermediate isolation layer FY is also the isolation layer IX. In other embodiments, the specific isolation layer A1 may not be the topmost layer among the isolation layers I1-IX. For example, Figure 5 As shown, when X is 6 and Y is 3, a total of 5 isolation layers I1-I5 may be provided on the substrate B1, and 3 of the isolation layers, for example, isolation layers I3-I5 may be intermediate isolation layers F1-F3. Here, the specific isolation layer A1 may be the isolation layer I5 among the isolation layers I1-I6, and the specific isolation layer A1 is also the uppermost intermediate isolation layer F3 among the intermediate isolation layers F1-F3.
[0032] See also Figure 1 and Figure 4 In some embodiments, the first coil 111, the second coil 112, and the fourth coil 122 are formed on a specific isolation layer A1, and the third coil 121 is formed on a plurality of intermediate isolation layers F1-FY. That is, the first coil 111, the second coil 112, and the fourth coil 122 are configured with a metal layer AM on a specific isolation layer A1, and the third coil 121 is configured with a plurality of metal layers FM1-FMY on a plurality of intermediate isolation layers F1-FY.
[0033] In some embodiments, one of the metal layers M1 -MX can be selected for configuration according to the required resistance of the first coil 111 , the second coil 112 , and the fourth coil 122 , and the number of metal layers FM1 -FMY to be used for configuration can be determined according to the required resistance of the third coil 121 .
[0034] In some embodiments, the configuration pattern of the third coil 121 on each of the multiple metal layers FM1-FMY of the intermediate isolation layer F1-FY may be substantially the same (i.e., the vertical projections of the configuration pattern on each of the metal layers FM1-FMY in the Z-axis direction may overlap each other), and the configuration pattern on each of the multiple metal layers FM1-FMY of the intermediate isolation layer F1-FY may be connected to another adjacent configuration pattern through at least one corresponding via. For example, taking the intermediate isolation layer F1-F3 as an example, the configuration pattern on the metal layer FM2 of the intermediate isolation layer F2 may be connected to the configuration pattern on the metal layer FM1 of the intermediate isolation layer F1 through at least one via passing through the intermediate isolation layer F2, and the configuration pattern on the metal layer FM3 of the intermediate isolation layer F3 may be connected to the configuration pattern on the metal layer FM2 of the intermediate isolation layer F2 through at least one via passing through the intermediate isolation layer F3.
[0035] In some embodiments, the isolation layer counted from the bottom layer (i.e., isolation layer I1) to the Nth layer among the multiple isolation layers I1-IX is the specific isolation layer A1. In addition, the isolation layer counted from the bottom layer (i.e., isolation layer I1) to the Nth layer among the multiple isolation layers I1-IX is the multiple intermediate isolation layers F1-FY. Wherein, N is a positive integer greater than 2 and less than or equal to X. Y is the number of intermediate isolation layers. Here, Y is 3. For example, if Figure 5 As shown, at this time, X is 6 and N is 5, that is, the isolation layer I5 among the plurality of isolation layers I1-I6 is the specific isolation layer A1, and the isolation layers I3-I5 are the middle isolation layers F1-F3.
[0036] In some embodiments, X is 6, N is 6, and Y is 3. For example, Figure 6 As shown, the sixth isolation layer I6 of the plurality of isolation layers I1-I6 may be a specific isolation layer A1, and the fourth to sixth isolation layers I4-I6 may be intermediate isolation layers F1-F3. Taking the example that the first coil 111, the second coil 112, and the fourth coil 122 are formed on the specific isolation layer A1 and the third coil 121 is formed on the intermediate isolation layers F1-F3, the first coil 111, the second coil 112, and the fourth coil 122 are configured by the metal layer M6 on the isolation layer I6, and the third coil 121 is configured by the metal layers M4-M6 on the isolation layers I4-I6. Here, the isolation layer I5 and the isolation layer I6 respectively include at least one perforation, so that the configuration pattern of the third coil 121 on the metal layer M5 can be connected with the configuration pattern of the third coil 121 on the metal layer M4 through the perforation on the isolation layer I5, and the configuration pattern of the third coil 121 on the metal layer M6 can be connected with the configuration pattern of the third coil 121 on the metal layer M5 through the perforation on the isolation layer I6.
[0037] See also Figure 1 and Figure 4 In some embodiments, the first configuration length of the first coil 111 on the metal layer AM of the specific isolation layer A1 may be substantially the same as the second configuration length of the second coil 112 on the metal layer AM of the specific isolation layer A1. In other words, the signal path length between the unbalanced terminal P1 and the first ground terminal G1 is substantially the same as the signal path length between the second ground terminal G2 and the first ground terminal G1.
[0038] In other embodiments, the first configuration length of the first coil 111 on the metal layer AM of the specific isolation layer A1 may be close to but different from the second configuration length of the second coil 112 on the metal layer AM of the specific isolation layer A1. In other words, the signal path length between the unbalanced terminal P1 and the first ground terminal G1 may be different from the signal path length between the second ground terminal G2 and the first ground terminal G1. In some implementations, the difference between the first configuration length of the first coil 111 and the second configuration length of the second coil 112 is less than or equal to 5%.
[0039] In some embodiments, taking the example that the fourth coil 122 is formed on a specific isolation layer A1 and the third coil 121 is formed on a plurality of intermediate isolation layers F1-FY, the fourth configuration length of the fourth coil 122 on the metal layer AM of the specific isolation layer A1 may be substantially the same as the third configuration length of the third coil 121 on the metal layer of one of the plurality of intermediate isolation layers F1-FY (e.g., the metal layer FMY of the intermediate isolation layer FY). That is, the signal path length between the first balanced terminal P2 and the contact point N1 is substantially the same as the signal path length between the second balanced terminal P3 and the contact point N1.
[0040] In other embodiments, the fourth configuration length of the fourth coil 122 on the metal layer AM of the specific isolation layer A1 may be different from the third configuration length of the third coil 121 on the metal layer of one of the plurality of intermediate isolation layers F1-FY (e.g., the metal layer FMY of the intermediate isolation layer FY). In other words, the signal path length between the first balanced terminal P2 and the contact point N1 may be different from the signal path length between the second balanced terminal P3 and the contact point N1. In some implementations, the difference between the third configuration length of the third coil 121 and the fourth configuration length of the fourth coil 122 is less than or equal to 5%.
[0041] For example, the first coil 111, the second coil 112 and the fourth coil 122 are configured by the metal layer M6 on the isolation layer I6, the third coil 121 is configured by the metal layers M4-M6 on the isolation layers I4-I6, and the operating frequency band is 2 GHz to 7.5 GHz. Here, the common mode rejection ratio is calculated according to the following formula: (2+amplitude imbalance) / [(amplitude imbalance)^2+(phase imbalance)^2]^0.5.
[0042] At this time, the balanced-unbalanced converter 100 (such as Figure 1The signal characteristics of the differential signal pair D1 of FIG. 1 (shown in FIG. 1 ) are as follows: the amplitude imbalance at 2 GHz is 1.536 dB, the phase imbalance is 178.7 degrees, and the common mode rejection ratio is 8.11. The amplitude imbalance at 2.5 GHz is 1.528 dB, the phase imbalance is 179.2 degrees, and the common mode rejection ratio is 6.95. The amplitude imbalance at 5 GHz is 1.505 dB, the phase imbalance is 180.7 degrees, and the common mode rejection ratio is 4.80. The amplitude imbalance at 6 GHz is 1.506 dB, the phase imbalance is 181.1 degrees, and the common mode rejection ratio is 4.48. The amplitude imbalance at 7.5 GHz is 1.516 dB, the phase imbalance is 181.7 degrees, and the common mode rejection ratio is 4.28. Here, the ratio of the configuration length (ie, signal wiring length) of the first coil 111 to the second coil 112 is 1:1, and the ratio of the configuration length of the third coil 121 to the fourth coil 122 is 1:1.
[0043] That is, the phase imbalance of the differential signal pair D1 generated by the balun 100 at the first balanced terminal P2 and the second balanced terminal P3 in the operating frequency band of 2 GHz to 7.5 GHz is within 180.0±1.7 degrees (i.e., 181.7-180.0=1.7 and 180.0-178.7=1.3) and the variation range of the phase imbalance does not exceed 3 degrees (i.e., 181.7-178.7=3). In addition, the common mode rejection ratio of the balun 100 in the operating frequency band of 2 GHz to 7.5 GHz is in the range of 4.2 to 8.2.
[0044] In one embodiment, the unbalanced port 210 has no intermediate grounding of the balun 200 (eg, Figure 7 As shown, the signal characteristics of the differential signal pair D2 (in which the balanced port 220 is indirectly grounded in the middle) are as follows: the amplitude imbalance at 2GHz is 2.63dB, and the phase imbalance is 123.2 degrees. The amplitude imbalance at 2.5GHz is 2.76dB, and the phase imbalance is 133.5 degrees. The amplitude imbalance at 5GHz is 2.93dB, and the phase imbalance is 157.1 degrees. The amplitude imbalance at 6GHz is 2.92dB, and the phase imbalance is 161.6 degrees. The amplitude imbalance at 7.5GHz is 2.89dB, and the phase imbalance is 166.5 degrees. Here, the configuration length ratio of the third coil 221 and the fourth coil 222 is 1:1.
[0045] In one embodiment, the balanced port 320 has no intermediate grounding of the balun 300 (eg, Figure 8As shown, the signal characteristics of the differential signal pair D3 (where the unbalanced port 310 is directly grounded in the middle) are as follows: the amplitude imbalance at 2GHz is 3.01dB, and the phase imbalance is 161.6 degrees. The amplitude imbalance at 2.5GHz is 2.69dB, and the phase imbalance is 161.1 degrees. The amplitude imbalance at 5GHz is 1.22dB, and the phase imbalance is 159.82 degrees. The amplitude imbalance at 6GHz is 0.746dB, and the phase imbalance is 159.99 degrees. The amplitude imbalance at 7.5GHz is 0.140dB, and the phase imbalance is 160.69 degrees. Here, the configuration length ratio of the first coil 311 and the second coil 312 is 1:1.
[0046] In one embodiment, the balun 400 has no intermediate grounding between the unbalanced port 410 and the balanced port 420 (eg, Fig. 9 The signal characteristics of the differential signal pair D4 (shown in FIG. 1 ) are as follows: the amplitude imbalance at 2 GHz is 0.185 dB, the phase imbalance is 194.7 degrees, and the common mode rejection ratio is 7.77. The amplitude imbalance at 2.5 GHz is 0.189 dB, the phase imbalance is 198.3 degrees, and the common mode rejection ratio is 6.58. The amplitude imbalance at 5 GHz is 0.250 dB, the phase imbalance is 216.8 degrees, and the common mode rejection ratio is 4.38. The amplitude imbalance at 6 GHz is 0.306 dB, the phase imbalance is 224.1 degrees, and the common mode rejection ratio is 4.09. The amplitude imbalance at 7.5 GHz is 0.441 dB, the phase imbalance is 235.1 degrees, and the common mode rejection ratio is 3.91.
[0047] It can be seen that, compared with the baluns 200, 300, and 400 having at least one port without intermediate grounding, the phase imbalance of the differential signal pair D1 generated by the balun 100 is quite close to 180.0 degrees in a wide operating frequency band. In addition, the common mode rejection ratio of the balun 100 in a wide operating frequency band is better than that of the balun 400 having both ports without intermediate grounding.
[0048] Fig.10 is a schematic diagram of an embodiment of a communication circuit. Figure 1 and Fig.10 The balun 100 of any of the above embodiments may be applied to a communication circuit 500. In some embodiments, the communication circuit 500 includes an external predistortion circuit 510, a power amplifier 520, a coupler 530, and an attenuator 540. The external predistortion circuit 510 includes a predistortion module 511 and the balun 100.
[0049] The input end of the power amplifier 520 is coupled to the output end of the predistortion module 511 of the external predistortion circuit 510, and receives the predistortion signal S2 from the predistortion module 511. The power amplifier 520 amplifies the predistortion signal S2 into a radio frequency signal S3. The input end of the coupler 530 is coupled to the output end of the power amplifier 520, and receives the radio frequency signal S3 from the power amplifier 520. The coupler 530 is used to output the radio frequency signal S3 to an antenna (not shown), and to generate a coupled signal S4 according to the radio frequency signal S3. The coupled signal S4 is a trace amount of the radio frequency signal S3. The input end of the attenuator 540 is coupled to the coupler 530, and receives the coupled signal S4 from the coupler 530. The attenuator 540 is used to attenuate the coupled signal S4 into an input signal S1. The unbalanced port 110 of the balun 100 is coupled to the output end of the attenuator 540, and receives the input signal S1 from the attenuator 540. The balun 100 converts a differential signal pair D1 at a balanced port 120 according to an input signal S1 at an unbalanced port 110. An input end of the predistortion module 511 is coupled to the balanced port 120 of the balun 100 and receives the differential signal pair D1 from the balun 100. The predistortion module 511 is used to perform predistortion processing on the differential signal pair D1 to generate a predistortion signal S2.
[0050] In some implementations, the communication circuit 500 may be a communication chip manufactured using an integrated circuit process.
[0051] In summary, by applying the balun 100 and the unbalanced-to-balanced signal conversion method of any embodiment, only a single balun 100 can be used to perform signal conversion in a wide operating frequency band, and can also have a better common mode rejection ratio numerical performance compared to a structure without an intermediate ground.
[0052] Although the technical contents of the present invention have been disclosed as above in the preferred embodiments, they are not used to limit the present invention. Any slight changes and modifications made by anyone skilled in the art without departing from the spirit of the present invention should be included in the scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the attached patent application.
[0053] Explanation of symbols
[0054] 100: Balun
[0055] 110: Unbalanced port
[0056] 111: First coil
[0057] 112: Second coil
[0058] 120: Balanced port
[0059] 121: The third coil
[0060] 122: Fourth coil
[0061] 123: Capacitor
[0062] 200: Balun
[0063] 210: Unbalanced port
[0064] 220: Balanced port
[0065] 221: The third coil
[0066] 222: Fourth coil
[0067] 300: Balun
[0068] 310: Unbalanced port
[0069] 311: First coil
[0070] 312: Second coil
[0071] 320: Balanced port
[0072] 400: Balun
[0073] 410: Unbalanced port
[0074] 420: Balanced port
[0075] 500: Communication circuit
[0076] 510: External pre-distortion circuit
[0077] 511: Pre-distortion module
[0078] 520: Power Amplifier
[0079] 530: Coupler
[0080] 540: Attenuator
[0081] A1: Specific isolation layer
[0082] AM: Metal layer
[0083] B1:Substrate
[0084] D1: differential signal pair
[0085] D11: First differential signal
[0086] D12: Second differential signal
[0087] D2: differential signal pair
[0088] D3: Differential signal pair
[0089] D4: Differential signal pair
[0090] F1~FY: middle isolation layer
[0091] FM1~FMY: Metal layer
[0092] G1: First ground terminal
[0093] G2: Second ground terminal
[0094] G3: The third ground terminal
[0095] I1~IX: Isolation layer
[0096] N1: contact
[0097] P1: Unbalanced terminal
[0098] P2: First balance terminal
[0099] P3: Second balance terminal
[0100] M1~MX: Metal layer
[0101] S1: Input signal
[0102] S2: Predistortion signal
[0103] S3: RF signal
[0104] S4: coupled signal
[0105] S10~S20: Steps
Claims
1. A balun, comprising: A first coil, coupled between the unbalanced terminal and the first ground terminal; A second coil is coupled between the first ground terminal and the second ground terminal; A third coil is coupled between the first balanced terminal and the contact point, and is coupled to the first coil; a fourth coil, coupled between the contact point and the second balanced terminal, and coupled to the second coil; as well as The capacitor is coupled between the contact point and the third ground terminal.
2. The balun as described in claim 1, wherein the first coil, the second coil, and one of the third coil and the fourth coil are formed on a specific isolation layer among a plurality of isolation layers stacked in sequence, the other of the third coil and the fourth coil is formed on a plurality of intermediate isolation layers among the plurality of isolation layers, and one of the plurality of intermediate isolation layers is the specific isolation layer.
3. The balun as claimed in claim 2, wherein the third coil is arranged relative to the first coil, the fourth coil is arranged relative to the second coil, the third coil is formed on the plurality of intermediate isolation layers, and the fourth coil is formed on the specific isolation layer. 4 . The balun as claimed in claim 3 , wherein the specific isolation layer is the Nth layer from bottom to top among the plurality of isolation layers, and the plurality of intermediate isolation layers are the (N-2)th layer to the Nth layer from bottom to top among the plurality of isolation layers.
5. The balun as claimed in claim 4, wherein N is 6. 6 . The balun of claim 1 , wherein a first configured length of the first coil is different from a second configured length of the second coil. 7 . The balun of claim 1 , wherein a third configured length of the third coil is different from a fourth configured length of the fourth coil.
8. The balun as claimed in claim 1, wherein the balun has an operating frequency band, and a variation range of phase imbalance of the differential signal pair at the first balanced terminal and the second balanced terminal in the operating frequency band does not exceed 3 degrees. 9 . The balun as claimed in claim 8 , wherein a common mode rejection ratio (CMRR) of the balun in the operating frequency band is in a range of 4.2 to 8.
2.
10. A method for converting an unbalanced signal to a balanced signal, comprising: receiving an input signal by using an unbalanced terminal of a balun, wherein the balun comprises a first coil, a second coil, a third coil, a fourth coil and a capacitor, the first coil being coupled between the unbalanced terminal and a first ground terminal, the second coil being coupled between the first ground terminal and a second ground terminal, the third coil being coupled between the first balanced terminal of the balun and a contact point and coupled to the first coil, the fourth coil being coupled between the contact point and a second balanced terminal of the balun and coupled to the second coil, and the capacitor being coupled between the contact point and the third ground terminal; and The third coil and the fourth coil are used to generate a differential signal pair on the first balanced terminal and the second balanced terminal according to the input signal.