Signal conversion circuit, analog-to-digital converter and electronic equipment

Abstract

The invention provides a signal conversion circuit, an analog-to-digital converter and electronic equipment. A fully differential amplifier in the signal conversion circuit is provided with a positive input end, a negative input end, a positive output end and a negative output end; the first capacitor is arranged between the positive input end and the negative output end or between the negative input end and the positive output end; the positive pole input end or the negative pole input end is used for receiving a single-ended signal, and the positive pole output end and the negative pole output end output differential signals under the condition that the single-ended signal is received. A rail-to-rail transmission fully differential amplifier is arranged, so that a relatively large common-mode input and output range is realized; in addition, the first capacitor in the application can process the input signal in an integral mode, so that high-frequency noise can be filtered.

Description

Technical Field

[0001] The present application belongs to the technical field of analog-to-digital conversion, and in particular, relates to a signal conversion circuit, an analog-to-digital converter and an electronic device. Background Art

[0002] Analog-to-Digital Converter (ADC) is an electronic device or circuit used to convert continuous analog signals into discrete digital signals.

[0003] Although the current signal conversion circuit has achieved the conversion from single-ended signal to differential signal to a certain extent, it still has a large high-frequency interference problem. Summary of the invention

[0004] The purpose of the present application is to provide a signal conversion circuit, an analog-to-digital converter and an electronic device, aiming to solve the problem of large interference in the signal conversion circuit in the traditional technology.

[0005] A first aspect of an embodiment of the present application provides a signal conversion circuit, comprising:

[0006] A fully differential amplifier, wherein the fully differential amplifier has a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal;

[0007] At least one first capacitor, the first capacitor is arranged between the positive input terminal and the negative output terminal, or between the negative input terminal and the positive output terminal;

[0008] The positive input terminal or the negative input terminal is used to receive a single-ended signal, and in the case of receiving the single-ended signal, the positive output terminal and the negative output terminal output a differential signal.

[0009] In some embodiments of the present application, the first capacitor is arranged between the positive input terminal and the negative output terminal; the positive input terminal is used to receive a single-ended signal, and when the single-ended signal is received, the differential signal is output;

[0010] Alternatively, the first capacitor is arranged between the negative input terminal and the positive output terminal, the negative input terminal is used to receive a single-ended signal, and in the case of receiving the single-ended signal, the differential signal is output.

[0011] In some embodiments of the present application, the number of the first capacitors is at least two, and at least two of the first capacitors are respectively arranged between the positive input terminal and the negative output terminal and between the negative input terminal and the positive output terminal;

[0012] Bypass switches are provided in parallel at both ends of the first capacitor, and in the conversion state of the signal conversion circuit, the bypass switch of at least one of the two first capacitors is disconnected.

[0013] In some embodiments of the present application, the signal conversion circuit also includes a first switch and a second switch, one end of the first switch is connected to the positive input terminal, and the other end of the first switch is used to access the single-ended signal; one end of the second switch is connected to the negative input terminal, and the other end of the first switch is used to access the single-ended signal.

[0014] In some embodiments of the present application, the signal conversion circuit further includes a first resistor and a second resistor, the first resistor is arranged at the positive input terminal, and the second resistor is arranged in parallel with the first capacitor between the positive input terminal and the negative output terminal;

[0015] The signal conversion circuit further includes a third resistor and a fourth resistor, wherein the third resistor is arranged at the negative input terminal, and the fourth resistor is arranged in parallel with the first capacitor between the negative input terminal and the positive output terminal.

[0016] In some embodiments of the present application, at least one bypass switch is provided in parallel or in series with the second resistor.

[0017] In some embodiments of the present application, at least one bypass switch is provided in parallel or in series with the fourth resistor.

[0018] In some embodiments of the present application, the signal conversion circuit includes a first sub-circuit and a second sub-circuit connected to the fully differential amplifier, the first sub-circuit is connected to the positive input terminal and the negative output terminal, and the second sub-circuit is connected to the negative input terminal and the positive output terminal; the first sub-circuit and the second sub-circuit are symmetrically arranged.

[0019] A second aspect of an embodiment of the present application further provides an analog-to-digital converter, which includes the above-mentioned signal conversion circuit.

[0020] A third aspect of an embodiment of the present application further provides an electronic device, which includes the above-mentioned analog-to-digital converter.

[0021] The beneficial effects of the present application are as follows: in the signal conversion circuit, analog-to-digital converter and electronic device of the present application, the signal conversion circuit includes a fully differential amplifier and at least one first capacitor; the fully differential amplifier has a positive input terminal, a negative input terminal, a positive output terminal and a negative output terminal; the first capacitor is arranged between the positive input terminal and the negative output terminal, or between the negative input terminal and the positive output terminal; the positive input terminal or the negative input terminal is used to receive a single-ended signal, and when the single-ended signal is received, the positive output terminal and the negative output terminal output a differential signal. In the present application, the fully differential amplifier is arranged to reduce the parameter mismatch and noise of the signal conversion circuit, and rail-to-rail transmission can be achieved through the positive input terminal, the negative input terminal, the positive output terminal and the negative output terminal, which is conducive to achieving a larger common-mode input and output range; furthermore, the first capacitor in the present application can process the input signal by integration, which is conducive to filtering out high-frequency noise. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of the circuit structure of a signal conversion circuit provided in one embodiment of the present application;

[0023] Figure 2 A schematic diagram of the circuit structure of a signal conversion circuit in the related art provided by this application;

[0024] Figure 3 Another circuit structure diagram of the signal conversion circuit in the related technology provided by this application;

[0025] Figure 4 A schematic diagram of the circuit structure of a signal conversion circuit provided in another embodiment of the present application;

[0026] Figure 5 A schematic diagram of the circuit structure of a signal conversion circuit provided in yet another embodiment of the present application;

[0027] Figure 6 A schematic diagram of the circuit structure of a signal conversion circuit provided in yet another embodiment of the present application;

[0028] Figure 7 A schematic diagram of the circuit structure of a signal conversion circuit provided in yet another embodiment of the present application.

[0029] Specific element symbol description: OPA-fully differential amplifier, CF-first capacitor. DETAILED DESCRIPTION

[0030] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0031] It should be noted that when an element is referred to as being "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0032] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0033] It is important to know that in the field of electronic signal processing, the quality of signal transmission and processing is crucial to the performance of the entire system. The traditional single-ended input structure has problems with weak anti-interference ability and high noise, especially when facing high-frequency signals. Due to its short wavelength and concentrated energy, high-frequency signals are highly sensitive to the transmission path. In this case, the single-ended input structure will introduce more noise, resulting in a significant decrease in the signal-to-noise ratio (SNR), which in turn deteriorates the recognition and processing of effective signals, affecting the stability and accuracy of the entire system.

[0034] In related technologies, the differential input structure transmits a pair of signals with opposite phases (i.e., differential signals) at the same time, and utilizes the mutual cancellation effect between signals to effectively suppress common-mode noise and external interference, thereby significantly improving the stability and anti-interference ability of the signal. Therefore, the differential input structure can be applied in the field of high-speed, high-precision signal processing, especially in the application of high-speed analog-to-digital converters (ADCs), which has great advantages.

[0035] As the quality requirements for input signals become higher and higher, differential input can not only meet the high-speed ADC's requirements for signal stability and anti-interference, but also effectively suppress the mismatch (parameter mismatch) and noise that may exist in the previous circuit through its inherent noise suppression mechanism, further improving the performance of the entire signal processing link.

[0036] However, in practical applications, many signal sources provide single-ended signals, which cannot directly meet the requirements of high-speed ADC differential input. Currently, signal conversion circuits are often set up to convert single-ended signals into differential signals; however, although the current signal conversion circuits have achieved the conversion of single-ended signals to differential signals to a certain extent, there are large high-frequency interference problems. These high-frequency interferences may come from parasitic capacitance, inductance, and switching noise inside the circuit, which will introduce additional noise components during the conversion process, resulting in a decrease in the signal-to-noise ratio (SNR) of the differential signal, thereby affecting the conversion accuracy and stability of the ADC. The presence of high-frequency interference not only deteriorates the quality of the signal, but may also have an adverse effect on subsequent digital signal processing. For example, in high-speed communication systems, high-frequency interference may increase the error rate of data transmission; in high-precision measurement systems, high-frequency interference may reduce the accuracy and reliability of measurements; in high-performance computing systems, high-frequency interference may increase calculation errors and power consumption.

[0037] Based on this, the present application is directed to traditional signal conversion circuits, analog-to-digital converters and electronic devices.

[0038] See also Figure 1 , Figure 1 The circuit structure diagram of the signal conversion circuit provided in this embodiment; the signal conversion circuit in this embodiment includes a fully differential amplifier OPA and at least one first capacitor C F The fully differential amplifier OPA has a positive input terminal, a negative input terminal, a positive output terminal and a negative output terminal; the first capacitor C F It is arranged between the positive input terminal and the negative output terminal, or between the negative input terminal and the positive output terminal; the positive input terminal or the negative input terminal is used to receive a single-ended signal, and when a single-ended signal is received, the positive output terminal and the negative output terminal output a differential signal.

[0039] It needs to be explained that the fully differential amplifier OPA (Fully-Differential Amplifier) ​​is a special amplifier that is mainly used to convert single-ended signals into differential signals, or to further amplify existing differential signals. The working principle of the fully differential amplifier OPA is based on the principle of differential amplification, that is, it uses the difference between two input signals to generate an output signal. When the amplitudes of the two input signals are different, their output voltages are also different. Through the action of the positive feedback network, the outputs of the two input signals are amplified and connected together to form a larger output signal. This output signal contains two parts, the same phase and the opposite phase. The opposite phase part is the difference in amplitude between the two input signals, which is amplified and output through the connection between the inverting input terminal and the differential input terminal, while the same phase part is suppressed. The fully differential amplifier OPA provides two complementary output signals, one of which is in the same phase as the input signal, and the other is in the opposite phase to the input signal. This differential output structure helps to suppress common-mode noise and interference.

[0040] See also Figure 2 , Figure 2 FIG. 1 shows a schematic diagram of the circuit structure of a signal conversion circuit in the related art provided by this embodiment. Figure 2 The signal conversion circuit shown is composed of a unit gain buffer and an inverting amplifier. The unit gain buffer is used to isolate the input signal from the subsequent circuit and provide a stable input impedance. The inverting amplifier is used to generate an output signal with a phase opposite to the input signal, thereby forming a differential signal. Figure 2 The signal conversion circuit shown has a multi-stage amplification structure, and parameter mismatch and noise of each stage may be amplified. In addition, the current signal conversion circuit cannot support rail-to-rail input and output, so the amplitude of the input and output signals may be limited. Figure 2 The positive output voltage (V OUT+ ) and negative output voltage (V OUT- ) is calculated as follows:

[0041] V OUT+ =R1 / R1×V IN =V IN / 2,V OUT- =-R3 / R3×V OUT+ =-V IN / 2.

[0042] The current signal conversion circuit has a low anti-interference ability. However, in this application, the fully differential amplifier OPA is set to reduce the parameter mismatch and noise of the signal conversion circuit, and rail-to-rail transmission can be achieved through the positive input terminal, the negative input terminal, the positive output terminal and the negative output terminal, which is conducive to achieving a larger common-mode input and output range; furthermore, the first capacitor C in this application F Being able to process the input signal by integration is helpful in filtering out high-frequency noise.

[0043] See also Figure 3 , Figure 3 FIG. 1 shows a schematic diagram of the circuit structure of a signal conversion circuit in the related art provided by this embodiment. Figure 3 The signal conversion circuit shown in the figure adopts a fully differential structure, but due to the limitation of the resistor feedback network, high-frequency noise is difficult to be effectively processed, so the ability to suppress high-frequency noise is limited. Figure 3 The positive output voltage (V OP ) and negative output voltage (V ON ) is calculated as follows: Among them, V A V INN or V INP .

[0044] In some embodiments of this application, please continue to refer to Figure 1 , the first capacitor C of this embodiment F Set between the positive input terminal and the negative output terminal; the positive input terminal is used to receive a single-ended signal, and in the case of receiving a single-ended signal, a differential signal is output; or, the first capacitor C F It is arranged between the negative input terminal and the positive output terminal, the negative input terminal is used to receive a single-ended signal, and in the case of receiving the single-ended signal, a differential signal is output.

[0045] It can be understood that, taking the negative input terminal receiving a single-ended signal as an example, after the negative input terminal receives the single-ended signal, the potential of the negative input terminal increases, the potential of the positive output terminal increases in the opposite direction, and the potential of the negative output terminal decreases accordingly, thereby realizing the regulation of the differential signal.

[0046] In some embodiments of this application, please refer to Figure 4 , Figure 4 The circuit structure diagram of the signal conversion circuit provided in this embodiment is shown; S2 and S4 in this embodiment are both bypass switches, and the first capacitor C in this embodiment F The number is at least two, and at least two first capacitors C Fare respectively arranged between the positive input terminal and the negative output terminal and between the negative input terminal and the positive output terminal; the first capacitor C F A bypass switch is provided in parallel at both ends of the signal conversion circuit. In the conversion state of the signal conversion circuit, at least two first capacitors C F The bypass switch of one of them is open.

[0047] It can be understood that when the positive input terminal is required to receive a single-ended signal, the first capacitor C connected to the positive input terminal is F The bypass switch is turned off and the first capacitor C connected to the negative input terminal is F When the negative input terminal needs to receive a single-ended signal, the first capacitor C connected to the negative input terminal is turned on. F The bypass switch is turned off and the first capacitor C connected to the positive input terminal is F The bypass switch is open.

[0048] In some embodiments of this application, please continue to refer to Figure 4 The signal conversion circuit of this embodiment also includes a first switch and a second switch, one end of the first switch is connected to the positive input terminal, and the other end of the first switch is used to access the single-ended signal; one end of the second switch is connected to the negative input terminal, and the other end of the first switch is used to access the single-ended signal.

[0049] It can be understood that when the positive input terminal needs to receive a single-ended signal, the first switch is turned on and the second switch is turned off; when the negative input terminal needs to receive a single-ended signal, the second switch is turned on and the first switch is turned off.

[0050] For details, please continue to see Figure 4 Also see Figure 5 , Figure 5 FIG. 4 shows a schematic diagram of the circuit structure of the signal conversion circuit provided in this embodiment; Figure 4 The signal conversion circuit shown is in the reset stage. In the reset stage, switches S1 and S3 are open, switches S2 and S4 are closed, and the entire system is a unity gain buffer. In the reset stage, the voltage relationship between the negative output terminal, the positive output terminal, the negative input terminal, and the positive input terminal is as follows: INN =A INP =V INN =V INP =V COM Among them, A INN is the voltage at the negative output terminal, A INP is the voltage at the positive output terminal, V INN is the voltage at the negative input terminal, V INP is the voltage at the positive input terminal, V COM is the common-mode voltage used to regulate the output signal.

[0051] like Figure 5 The signal conversion circuit shown is in the conversion stage. In the conversion stage, switches S2 and S3 are closed, switches S1 and S4 are opened, and the system works in a single-ended to differential state. The input signal from the previous stage is V IN , when V IN >V INN When the current flows through the first capacitor C F The charging current increases the voltage at the positive output terminal. Since the upper part of the circuit works in a unity gain buffer state, V IN 、V INN 、V INP , A INN The change trend of the positive output terminal is the same, and the voltage is equal after reaching the steady state, while the voltage change trend of the positive output terminal is opposite to that of other voltages. Therefore, the single-ended input V IN A differential output can be generated INP and A INN The calculation formula of the voltage at the positive output terminal in this embodiment is as follows:

[0052] In some embodiments of this application, please refer to Figure 6 , Figure 6 The circuit structure diagram of the signal conversion circuit provided in this embodiment is shown; the signal conversion circuit in this embodiment also includes a first resistor and a second resistor, the first resistor is arranged on the positive input terminal, the second resistor and the first capacitor C F The signal conversion circuit also includes a third resistor and a fourth resistor, the third resistor is arranged at the negative input terminal, and the fourth resistor is connected to the first capacitor C F The parallel connection is arranged between the negative input terminal and the positive output terminal.

[0053] It should be explained that the gain amplification parameter of the signal conversion circuit is adjusted by adjusting the ratio of the first resistor to the second resistor or the ratio of the third resistor to the fourth resistor. In addition, the voltage at the positive output terminal is clamped by setting the second resistor and the fourth resistor, which is helpful to prevent the voltage at the positive output terminal from being too large and causing the circuit to be saturated.

[0054] In some embodiments of the present application, at least one bypass switch is provided in parallel or in series with the second resistor. In some embodiments of the present application, at least one bypass switch is provided in parallel or in series with the fourth resistor.

[0055] Specifically, see Figure 7 , Figure 7The circuit structure diagram of the signal conversion circuit provided in this embodiment is shown. In this embodiment, the first switch and the second resistor can be set in series, and the second switch and the fourth resistor can be set in series. This is conducive to reducing the redundant part of the signal conversion circuit.

[0056] In some embodiments of this application, please continue to refer to Figure 6 The signal conversion circuit of this embodiment includes a first subcircuit and a second subcircuit connected to the fully differential amplifier OPA, the first subcircuit is connected to the positive input terminal and the negative output terminal, and the second subcircuit is connected to the negative input terminal and the positive output terminal; the first subcircuit and the second subcircuit are symmetrically arranged. That is, a first capacitor is arranged in each of the first subcircuit and the second subcircuit.

[0057] This is beneficial to reducing parameter mismatch and noise in the signal conversion circuit, and further beneficial to improving the common mode rejection ratio (CMRR) of the fully differential amplifier OPA.

[0058] In order to better implement the signal conversion circuit in any of the above embodiments, based on the above signal conversion circuit, this embodiment further provides an analog-to-digital converter, and the analog-to-digital converter includes the above signal conversion circuit.

[0059] In order to better implement the analog-to-digital converter in any of the above embodiments, based on the above analog-to-digital converter, this embodiment further provides an electronic device, and the electronic device includes the above analog-to-digital converter.

[0060] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0061] The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only for example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.

[0062] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.

[0063] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.

[0064] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A signal conversion circuit, characterized in that: include: A fully differential amplifier, wherein the fully differential amplifier has a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal; At least one first capacitor, the first capacitor is arranged between the positive input terminal and the negative output terminal, or between the negative input terminal and the positive output terminal; The positive input terminal or the negative input terminal is used to receive a single-ended signal, and in the case of receiving the single-ended signal, the positive output terminal and the negative output terminal output a differential signal.

2. The signal conversion circuit according to claim 1, characterized in that: The first capacitor is arranged between the positive input terminal and the negative output terminal; the positive input terminal is used to receive a single-ended signal, and in the case of receiving the single-ended signal, the differential signal is output; Alternatively, the first capacitor is arranged between the negative input terminal and the positive output terminal, and the negative input terminal is configured to receive a single-ended signal, and in the case of receiving the single-ended signal, the differential signal is output.

3. The signal conversion circuit according to claim 2, characterized in that: The number of the first capacitors is at least two, and at least two of the first capacitors are respectively arranged between the positive input terminal and the negative output terminal and between the negative input terminal and the positive output terminal; Bypass switches are provided in parallel at both ends of the first capacitor, and in the conversion state of the signal conversion circuit, the bypass switch of at least one of the two first capacitors is disconnected.

4. The signal conversion circuit according to claim 3, characterized in that: The signal conversion circuit also includes a first switch and a second switch, one end of the first switch is connected to the positive input end, and the other end of the first switch is used to access the single-ended signal; one end of the second switch is connected to the negative input end, and the other end of the first switch is used to access the single-ended signal.

5. The signal conversion circuit according to claim 4, characterized in that: The signal conversion circuit further includes a first resistor and a second resistor, wherein the first resistor is arranged at the positive input terminal, and the second resistor is arranged in parallel with the first capacitor between the positive input terminal and the negative output terminal; The signal conversion circuit further includes a third resistor and a fourth resistor, wherein the third resistor is arranged at the negative input terminal, and the fourth resistor is arranged in parallel with the first capacitor between the negative input terminal and the positive output terminal.

6. The signal conversion circuit according to claim 5, characterized in that: At least one bypass switch is provided in parallel or in series with the second resistor.

7. The signal conversion circuit according to claim 5, characterized in that: At least one bypass switch is provided in parallel or in series with the fourth resistor.

8. The signal conversion circuit according to any one of claims 1 to 7, characterized in that: The signal conversion circuit includes a first subcircuit and a second subcircuit connected to the fully differential amplifier, the first subcircuit is connected to the positive input terminal and the negative output terminal, and the second subcircuit is connected to the negative input terminal and the positive output terminal; the first subcircuit and the second subcircuit are symmetrically arranged.

9. An analog-to-digital converter, characterized in that: The analog-to-digital converter comprises the signal conversion circuit according to any one of claims 1 to 8.

10. An electronic device, characterized in that: The electronic device comprises the analog-to-digital converter as claimed in claim 9.

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