Fine tuning techniques for oscillators
By introducing fine-tuned resistor RCAL and one-hot encoding technology into the oscillator, the problem of noise and power consumption increase during the oscillator frequency fine-tuning process is solved, and the frequency fine-tuning effect of low power consumption, low noise and no glitch is achieved.
Patent Information
- Application Number
- CN202380065056.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-09-12
- Filing Date
- 2023-09-11
- Publication Date
- 2025-05-06
AI Technical Summary
Existing oscillators are prone to introducing noise and increased power consumption during frequency fine-tuning, and may lead to glitches of the output signal.
By using a fine-tuned resistor RCAL, combined with one-heat encoding technology, the output frequency of the oscillator is adjusted, avoiding the introduction of additional parasitic capacitance and resistors at nodes VC1 and VC2.
Frequency fine-tuning with low power consumption and low noise is achieved, avoiding glitches of the output signal, and improving the integral nonlinearity and differential nonlinearity.
Smart Images
Figure CN119948756A_ABST
Abstract
Description
Technical Field
[0001] Various example embodiments relate to a tunable oscillator. Background Art
[0002] Oscillators are used in many types of electronic circuits. Oscillators can be used to generate a signal with a desired frequency or for generating a signal with a desired period. When oscillators are manufactured, they can be designed to provide a signal of a specific frequency (or multiple frequencies that can be switched between them). However, the frequency provided by an oscillator designed to provide the same frequency may vary, for example due to impurities in the material, and thus fine tuning of the oscillator may be required. In fine tuning of an oscillator, the output frequency of the oscillator is controlled to a desired value. Summary of the invention
[0003] According to an aspect, an oscillator according to claim 1 is provided.
[0004] According to another aspect, a method according to claim 9 is provided.
[0005] These aspects provide a technical effect that the output frequency of the oscillator can be fine-tuned to a desired frequency.
[0006] One of the advantages provided by these aspects is that the fine-tuning solution achieves low power consumption and noise compared to prior art solutions. Furthermore, fine-tuning the oscillator does not cause glitches in the output signal of the oscillator.
[0007] Embodiments are defined in the dependent claims. The scope of protection sought for the various embodiments is set out in the independent claims.
[0008] The embodiments and features described in this specification that do not fall within the scope of the independent claims, if any, should be interpreted as examples useful for understanding various embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Hereinafter, example embodiments will be described in more detail with reference to the accompanying drawings, in which:
[0010] Figure 1 shows an example of an oscillator,
[0011] Figure 2 shows an example of the varying voltages at different nodes of an oscillator,
[0012] Figure 3 shows an example of the structure of a trimmable resistor,
[0013] Figure 4 is a flowchart showing an implementation method,
[0014] Figure 5 Another example of an oscillator is shown,
[0015] Figure 6 Shows Figure 5 An example of the varying voltages at different nodes of an oscillator,
[0016] Figure 7 shows an example of adjusting the threshold voltage of the comparator,
[0017] Figure 8 shows an example of the structure of a comparator,
[0018] Fig. 9 shows an example of the structure of a driver circuit,
[0019] Fig. 10A and Fig. 10B shows an example of a fine-tuning operation, and
[0020] Fig.11 is a flowchart illustrating an implementation method. DETAILED DESCRIPTION
[0021] The following embodiments are merely examples. Although the specification may refer to "one" embodiment in several places, this does not necessarily mean that each such reference refers to the same embodiment, or that the feature applies only to a single embodiment. Individual features of different embodiments may also be combined to provide other embodiments. In addition, the words "comprise" and "include" should be understood as not limiting the described embodiments to consist only of those features that have been mentioned, and such embodiments may also include features / structures that are not specifically mentioned.
[0022] It should be noted that although the drawings show various embodiments, they are simplified diagrams showing only some structural and / or functional entities. The connections shown in the drawings may refer to logical or physical connections. It is obvious to those skilled in the art that the described devices may also include other functions and structures in addition to those described in the drawings and text.
[0023] Figure 1 An example of an oscillator 100 is shown. The oscillator in the figure is a so-called swing-enhanced differential oscillator, SBOSC. Typically, swing-enhanced differential oscillators offer good performance in terms of noise, power consumption and start-up time.
[0024] Figure 1 The oscillator 100 is configured to use a voltage configured to provide a preset voltage V DD The DC power supply 102 is used to generate an oscillating output signal 118. Figure 1The oscillator of comprises a resistor-capacitor RC circuit 104 operatively connected to a DC power source 102 via nodes 106 , 108 through a switch 110 .
[0025] The RC circuit 104 of the oscillator includes a set of capacitors C1, C2, each of which is connected in series to a resistor R, R'. Figure 1 In the example of FIG. 1 , capacitor C1 is connected in series with resistor R, and capacitor C2 is connected in series with resistor R′. The two series capacitor-resistors are connected in parallel at node 106 and node 108 .
[0026] exist Figure 1 In the example of FIG. 1 , in a series connection of capacitor C1 and resistor R, capacitor C1 is connected to node 108, and resistor R is connected to node 106. In a series connection of capacitor C2 and resistor R', capacitor C2 is connected to node 106, and resistor R' is connected to node 108. In an embodiment, resistors R and R' are equal in value, and likewise, capacitors C1 and C2 are equal in value.
[0027] The switch 110 is configured to alternately connect the capacitor of the RC circuit 104 to the electrodes of the DC source, the DC power source 102 or the ground 112 based on the switching controls 116A, 116B. In an embodiment, the switch 110 may be configured to alternately connect each of the capacitors C1, C2 to the DC power source 102 or the ground 112 based on the switching controls 116A, 116B. In an embodiment, the switch 110 may be a chopper switch.
[0028] In an embodiment, when any one of the capacitors is connected to the DC power source 102, the other capacitor can be simultaneously connected to the ground 112. Figure 1 In the example of , the capacitor is connected to the switch via nodes 106, 108, and node 106 is connected to the DC power source and node 108 is connected to ground. Likewise, when node 108 is connected to the DC power source, node 106 is connected to ground.
[0029] Figure 1 The oscillator of the embodiment also includes a comparator 114. The comparator receives inputs from nodes VC1 and VC2 of the RC circuit 104. The comparator is configured to generate switching controls 116A, 116B by comparing the voltage of capacitors C1, C2 at the inputs VC1, VC2 of the comparator with a preset threshold voltage. The switching controls 116A, 116B can be used to control the switch 110. The output 118 of the comparator is a signal having a desired frequency.
[0030] In an embodiment, the switch 110 can be alternately controlled by the switching controls 116A, 116B generated by the comparator to connect each of the capacitors C1, C2 to the DC power supply 102 or the ground 112 at each switching cycle, and thus at each switching cycle, the difference between the voltages of the capacitors can be greater than or equal to the voltage of the DC power supply 102.
[0031] Figure 2 It is shown how the voltage of each of the capacitors C1 , C2 changes when switching is performed based on the switching control. Figure 2 The voltages of nodes 106 and 108 are shown. As mentioned, switch 110 connects the nodes to a DC power source or ground based on switching controls 116A, 116B. Figure 2 Switching control 116B is shown. Switching control 116A would be inverted in view of switching control 116B.
[0032] Reference Figure 2 , the switching period 200 may represent the time of a voltage period of the switching control.
[0033] exist Figure 2 In the embodiment, the voltage of the switching control 116B can be changed to a preset high voltage at each switching cycle. The switching control controls the switches to connect the nodes 106, 108 to the DC power source 102 or the ground 112. This causes Figure 2 1 and 2. When the voltage of the switch control 116B is high, the node 106 is connected to the DC power supply 102 and thus has a voltage V DD , and node 108 is connected to ground. In an embodiment, comparator 114 is configured to adjust switching controls 116A, 116B, for example, by comparing the voltages at VC1 and VC2 to a preset threshold voltage.
[0034] When the voltage at points VC1 and VC2 is equal to V TH , comparator 114 is configured to invert switching control 116A (and correspondingly 116B). Thus, the high voltage switching control is set to a low voltage, and the low voltage switching control is set to a high voltage. This in turn causes switch 110 to connect the voltage at node 106 from DC power supply 102 to ground 112, and to connect the voltage at node 108 from ground 112 to DC power supply 102, respectively. Thus, when the switching control is inverted by comparator 114, the voltages at nodes 106, 108 vary between DC power supply 102 and ground 112.
[0035] like Figure 2 As shown in FIG. 1 , when the voltage of the switch control 116B becomes a high voltage, the voltage at the point VC2 becomes -VDD +V TH , and the voltage at point VC1 becomes value V DD +V TH As long as the voltage of switch control 116B is high, the voltage at point VC2 rises to V TH , and the voltage at point VC1 drops to V TH .
[0036] When the voltage at points VC1 and VC2 is equal to V TH , the switching control 116B can be inverted again.
[0037] like Figure 2 As shown in FIG. 1 , the voltage at points VC1 and VC2 is controlled at a value of -V DD +V TH With V DD +V TH This causes the output 118 of the oscillator to alternate.
[0038] As mentioned above, manufactured oscillators (and many other components) often require fine tuning due to manufacturing tolerances and variations in manufacturing materials (e.g., varying impurities in the materials may cause deviations in the operation of the oscillator). However, due to the high precision of the oscillation node ( Figure 1 Fine tuning of such oscillators is challenging due to the high sensitivity of parasitic capacitance and resistance at VC1 and VC2 in the oscillator. Adding fine-tuning switches in series or parallel to R, R' or C1, C2 increases the noise and power consumption of the oscillator. In addition, the integral nonlinearity INL and differential nonlinearity DNL of the frequency transfer function are poor due to the additional parasitic capacitance. Some oscillators, especially once used as part of a closed-loop system, require tuning of their frequency to obtain lock of the closed loop. Therefore, it is desirable to be able to freely tune the frequency of the oscillator without the risk of glitches at the clock output.
[0039] In an embodiment, the fine-tuning of the oscillator can be performed by a fine-tunable resistor RCAL connected to the nodes VC1, VC2 of the comparator. By adjusting the resistance of the fine-tunable resistor, the operation of the oscillator can be controlled. Figure 3 An example of a trimmable resistor is described in detail.
[0040] In an embodiment, the trimmable resistor RCAL includes an even number of resistors R1, R2, ..., RX, R0, R1', R2', ..., RX', R0' connected in series. The resistors can be considered to form a set of resistor pairs. The outermost resistors R0, R0' at the ends of the series form a first resistor pair. The second outermost resistors RX, RX' at the ends of the series form a second resistor pair, and the two middle resistors R1, R1' in series form the last resistor pair.
[0041] The fine-tunable resistor may also include a set of switches, wherein switches SW1, SW2, ..., SWX are used for each resistor pair except the first resistor pair. The switches are arranged in such a way that when the switch is closed, the corresponding resistor pair is bypassed. Thus, for example, if switch SW1 is closed, resistors R1, R1' are bypassed. In addition, when the switch of the fine-tunable resistor is closed, the electrode pairs of the corresponding resistor pair and all sources of the corresponding resistor pair are bypassed. Thus, for example, when switch SW3 is closed, resistor pairs R1, R1', R2, R2' and R3, R3' are all bypassed.
[0042] The trimmable resistor may also include a switch controller 300 for controlling the opening and closing of the switch. In an embodiment, the switch controller controls the opening and closing of the switch so that only one switch is closed at a time. At the input of the switch controller is a control signal 302, with which the opening and closing of the switch can be controlled. In an embodiment, the switch controller is a single-hot encoder. At the output of the switch controller is a switching control signal 304, which can be a digital signal including a digital word with a given number of bits, in which only one bit has a value of "1" (or is high) and all other bits have a value of "0" (or is low). The digital word can control the switch so that only the switch corresponding to the bit with the value "1" is closed, while all other switches are disconnected. Therefore, using the control signal 302, the resistance value of the trimmable resistor can be controlled and the output frequency of the oscillator 100 can be fine-tuned to a desired value.
[0043] The following equation describes the frequency of the output 118 of the oscillator 100 as a function of the resistance value of the trimmable resistor RCAL:
[0044]
[0045] Where || represents the parallel connection of resistors R and RCAL, R is the value of resistors R, R′ in the RC circuit 104, RCAL is the resistance value of the trimmable resistor RCAL, and C is the capacitance value of C1 and C2 in the RC circuit.
[0046] The proposed solution has many advantages. For example, the integral nonlinearity INL and differential nonlinearity DNL are good. The achieved DNL is low due to the one-hot encoding and the symmetrical structure of the trimmable resistor frequency transfer function. In the prior art, the binary coding DNL suffers from the parasitic effects of the switches, especially for the most significant bit MSB transition, such as 011111->100000. One-hot encoding eliminates this effect.
[0047] In addition, compared with traditional fine-tuning techniques, Figure 1and Figure 3 The solution has lower power consumption because the parasitic capacitance and resistance seen by nodes VC1, VC2 are reduced by moving the trimming switches into the trimmable resistors.
[0048] The larger the parasitic capacitance on nodes VC1 and VC2, the larger the capacitors C1 and C2 will be to compensate for the voltage swing loss due to the capacitive divider effect. The size of capacitors C1 and C2 directly affects the power consumption. Therefore, lower parasitic capacitance on nodes VC1 and VC2 results in lower power consumption due to the need for smaller C1 and C2.
[0049] Furthermore, due to the applied resistor divider principle, the voltage swing inside the trimmable resistor RCAL is limited. As a result, the influence of the parasitic capacitance generated by the trimming switch on the power consumption is reduced compared to prior art trimming solutions.
[0050] Furthermore, during the charge / discharge cycle, the charge between C1 and C2 is partially shared (reused) through the trimmable resistor RCAL, which further improves power consumption.
[0051] The higher voltage swing of nodes VC1 and VC2 results in better noise performance because the voltage transitions at the input of comparator 114 are sharper.
[0052] Figure 1 and Figure 3 The proposed solution provides glitch-free fine-tuning. Figure 1 and Figure 3 With the proposed solution, it is safe to trim the oscillator while the oscillator is operating. In the conventional trimming solution of adjusting the value of R or C1, any glitch or charge injection from the trimming switch will cause nodes VC1 and VC2 to experience glitches, and thus the comparator output will produce a clock with glitches. In contrast, Figure 1 and Figure 3 In the solution, the trimmable resistors are located inside the trimmable resistor RCAL and they are separated from the nodes VC1 and VC2 by series resistors. In addition, the one-hot encoding ensures that the total charge injection from the trimming switches is close to zero, i.e., the charge injection from enabling and disabling the switches cancels out.
[0053] Figure 4 is a flow chart showing an embodiment. The flow chart shows the fine adjustment Figure 1 operation of the oscillator 100.
[0054] Step 400 includes alternately connecting a set of capacitors C1 , C2 to electrodes ( 102 , 112 ) of a DC source via switches 110 based on switching controls 116A, 116B.
[0055] In step 402 , the comparator 114 generates the switching control 116A, 116B by comparing the voltage of the capacitors C1 , C2 at the comparator inputs VC1 , VC2 with a preset threshold voltage.
[0056] Step 404 includes controlling or fine-tuning the frequency of the output 118 of the oscillator via a trimmable resistor RCAL connected to the inputs VC1 , VC2 of the comparator.
[0057] Figure 5 An example of an oscillator 500 is shown. Figure 1 The oscillator shown in the figure is a so-called swing-enhanced differential oscillator, SBOSC. Generally, swing-enhanced differential oscillators offer good performance in terms of noise, power consumption and start-up time.
[0058] Figure 5 The oscillator 500 is configured to use a voltage configured to provide a preset voltage V DD The DC power supply 102' is used to generate an oscillating output signal 118'. Figure 5 The oscillator of comprises a resistor-capacitor RC circuit 104' operatively connected to a DC power source 102' via nodes 106', 108' and a switch 110'.
[0059] The RC circuit 104' of the oscillator includes a set of capacitors C1, C2, each of which is connected in series to a resistor R, R'. Figure 5 In the example of , capacitor C1 is connected in series with resistor R, and capacitor C2 is connected in series with resistor R'. The two series capacitor-resistors are connected in parallel at node 106' and node 108'.
[0060] exist Figure 5 In the example of FIG. 1 , in a series connection of capacitor C1 and resistor R, capacitor C1 is connected to node 108 ′, and resistor R is connected to node 106 ′. In a series connection of capacitor C2 and resistor R′, capacitor C2 is connected to node 106 ′, and resistor R′ is connected to node 108 ′. In an embodiment, resistors R and R′ are equal in value, and likewise, capacitors C1 and C2 are equal in value.
[0061] As in Figure 1 In the example, Figure 5The switch 110' is configured to alternately connect the capacitor of the RC circuit 104' to the electrodes of the DC source, to the DC power source 102' or to the ground 112' based on the switching control 116A', 116B'. In an embodiment, the switch 110' can be configured to alternately connect each of the capacitors C1, C2 to the DC power source 102' or to the ground 112' based on the switching control 116A', 116B'. In an embodiment, the switch 110' can be a chopper switch.
[0062] In an embodiment, when any one of the capacitors is connected to the DC power source 102', the other capacitor can be simultaneously connected to the ground 112'. Figure 1 In the example of , the capacitor is connected to the switch via nodes 106', 108', while node 106' is connected to the DC power source and node 108' is connected to ground. Likewise, when node 108' is connected to the DC power source, node 106' is connected to ground.
[0063] Figure 5 The oscillator of the invention also includes two comparators, a first comparator 502 and a second comparator 504. The first comparator 502 receives inputs from the RC circuit 104' node VC1 and from the driver circuit 506. The output of the second comparator 504 is inverted, and it receives inputs from the RC circuit 104' node VC2 and from the driver circuit 506. The first comparator is configured to generate a control signal CK1 by comparing the voltage of the capacitor C2 at the input VC1 of the comparator with a threshold voltage, and the second comparator is configured to generate a control signal CK2 by comparing the voltage of the capacitor C1 at the input VC2 of the comparator with a threshold voltage. The threshold voltage can be controlled by a signal received from the driver circuit. In an embodiment, the threshold voltages of the two comparators are the same. The control signals CK1 and CK2 are connected to a multiplexer 508, which is configured to select any one of the control signals CK1 and CK2 as the switching control 116A', 116B' used for the switch 110'. In an embodiment, the control 116A′ or 116B′ is connected to the switch via an inverter 514 .
[0064] Switching controls 116A', 116B' may be used to control switch 110'. The output 118' of the comparator is a signal having a desired frequency.
[0065] In an embodiment, the switch 110' can be alternately controlled by the switching controls 116A', 116B' generated by the comparators 502 and 504, 502 to connect each of the capacitors C1, C2 to the DC power supply 102' or the ground 112' at each switching cycle, and thus at each switching cycle, the difference between the voltages of the capacitors can be greater than or equal to the voltage of the DC power supply 102'.
[0066] Figure 6 It is shown how the voltage of each of the capacitors C1 , C2 changes when switching is performed based on the switching control. Figure 6 The voltages VN and VP of nodes 106' and 108' are shown. As mentioned above, switch 110' connects the nodes to a DC power source or ground based on switching controls 116A', 116B'. Figure 6 Switch control 116B' is shown. Switch control 116A' will be inverted with respect to switch control 116B'.
[0067] Reference Figure 6 , the switching period 200 may represent the time of a voltage period of the switching control.
[0068] Figure 5 The oscillator 500 is mainly based on Figure 1 The oscillator 100 operates in a similar manner, but there are some differences due to the different structures. In an embodiment, only one of the comparators 502, 504 is used at a time to provide switching control of the switch 110'. The multiplexer 508 is configured to select the signal CK1 or CK2 as the output signal of the multiplexer through the selection input 510.
[0069] exist Figure 6 . The voltage at a point VC1 which is an input to the first comparator and the voltage at a point VC2 which is an input to the second comparator are shown in .
[0070] exist Figure 6 In the embodiment, there is a point 600 where VC1 is at a low voltage and VC2 is at a high voltage. VC1 is slowly charging due to the current flowing through the resistor R, while VC2 is slowly discharging. In an embodiment, the multiplexer is configured to select the output of the comparator whose input is increasing, CK1 or CK2, as the output signal of the multiplexer by selecting the input 510. For example, from point 600 onward, as long as the voltage of VC1 is charging, the multiplexer will select the output CK1 of the first comparator 502.
[0071] As VC1 charges, at point 602, it reaches the threshold voltage V of comparator 502. thn1, and the value of CK1 will switch from 0 to 1. Since the multiplexer has connected CK1 to its output, the switching control will also switch, and switch 110 will switch polarity. VC1 will be pushed to a high voltage, and correspondingly VC2 will be pushed to a low voltage. At the same time, the voltage at point 106 will go from V DD After a given delay Δt 512, the output CK of the multiplexer will change from CK1 to CK2, ie to the output of the second comparator.
[0072] A given delay Δt in Figure 6 The multiplexer changes its output at point 604. Thus, before point 604, the multiplexer connects CK1 to the output of the multiplexer, and after point 604, it connects CK2 to the output of the multiplexer. The switch from CK1 to CK2 is configured to occur when the comparator reaches a threshold voltage V thn1 、V thn2 At different time points.
[0073] After point 602, VC2 is slowly charging due to the current flowing through resistor R', while VC1 is slowly discharging. As VC2 charges, at point 606, it reaches the threshold voltage V of comparator 504. thn2 , and the value of CK2 will switch from 1 to 0. After a given delay Δt 512 at point 608, the multiplexer will again change its output CK, this time from CK2 to CK1, ie to the output of the first comparator.
[0074] Since the change of the multiplexer output occurs at a later time than the point in time at which the comparator reaches its threshold voltage, glitches at the multiplexer output can be avoided. When 106 and 108 change their polarity, the output of the comparator may experience short glitches. Delay 512 ensures that these glitches are not passed to the multiplexer output. In an embodiment, the given delay Δt is shorter than one of the periods 200.
[0075] In an embodiment, the first comparator 502 and the second comparator 504 of the oscillator 500 are identical, and the nodes VC1 and VC2 operate in a complementary manner. The first comparator 502 and the second comparator 504 operate in a similar manner, and during half of the switching cycle 200, the output of the first comparator 502 is responsible for the output of the multiplexer and the oscillator, and during the other half of the switching cycle 200, the output of the second comparator 504 is responsible for the output of the multiplexer and the oscillator. The only difference between the comparators is that the output of the comparator 504 is inverted, while the output of the comparator 502 is not.
[0076] As mentioned above, manufactured oscillators (and many other components) often require fine tuning. In an embodiment, Figure 5 The fine tuning of the oscillator 500 can be achieved by adjusting the threshold voltage V of the comparators 502 and 504. thn1 、V thn2 This is achieved by controlling the speed or propagation delay of the comparators 502 , 504 , since the threshold voltage has an effect on the frequency of the output signal of the oscillator 500 .
[0077] Figure 7 An example is shown. The figure shows the voltage 700 of VC1, which is slowly charging towards a threshold voltage 702. When the threshold voltage is reached, the value of CK1 at the comparator output changes 704. If the threshold voltage changes as shown by arrow 706, the voltage 700 of VC1 reaches the new threshold 708 earlier, and the value of CK1 at the comparator output changes 710 earlier.
[0078] Figure 8 An example of a comparator 502 or 504 is shown. The comparator in this example is implemented by a complementary metal oxide semiconductor (CMOS) inverter comparator. The comparator includes a P-channel metal oxide semiconductor (PMOS) transistor MP1 and an N-type metal oxide semiconductor (NMOS) transistor MN1. The transistors are connected between a power supply 800 and a ground 802.
[0079] In an embodiment, the threshold voltage of transistors MP1 and MP2 can be controlled using a back gate bias input 804. The back gate bias control signal VBB is provided to the comparators 502, 504 by the driver circuit 506. Using the back gate bias input 804, the speed or propagation delay of the comparators 502, 504 can be adjusted to fine tune the operating frequency of the oscillator. This adjustment provides fine tuning of the oscillator frequency. The frequency can be adjusted in fine steps.
[0080] Fig. 9 An example of the structure of the driver circuit 506 is shown. Fig. 9 The circuit includes a given number of resistors R1 connected in series between a power source 900 and a ground 902. VBB ,……,RN VBB ,……,RY VBB .
[0081] In an embodiment, the driver circuit is connected to the same power supply and ground as the comparator. Therefore, in an embodiment, the power supply 900 and the ground 902 are connected to the same power supply and ground as the comparator. Figure 8The power supply 800 and ground 802 are the same. This has the advantage of minimizing the effect of possible variations in the power supply voltage. Supply voltage variations modulate the propagation delay of the comparator. However, when the same power supply is applied to the driver circuit, the same variations also apply to the driver circuit as well as VBB. This compensates for the effect of the variations on the comparator.
[0082] The driver circuit also includes a set of switches (SW1 VBB , ..., SWL VBB , ..., SWN VBB , ..., SWX VBB ). Each switch in the set of switches is connected between a connection point between two consecutive different resistors and the output VBB of the driver circuit. In an embodiment, a switch is connected between each resistor in series. In an embodiment, there may be more than one resistor between the switches.
[0083] The driver circuit also includes a switch controller 904 for controlling 906 the opening and closing of the switch.
[0084] In an embodiment, the switch controller 904 controls the opening and closing of the switch so that only one switch is closed at a time. At the input of the switch controller 904 is a control signal 908, which can control the opening and closing of the switch. In an embodiment, the switch controller is a one-hot encoder. At the output of the switch controller is a switching control signal 906, which can be a digital signal including a digital word with a given number of bits, wherein only one bit has a value of "1" (or is high) and all other bits have a value of "0" (or is low). The digital word can control the switch so that only the switch corresponding to the bit with the value "1" is closed, and all other switches are disconnected. Therefore, using the control signal 908, the resistance value of the resistor connected in series can be controlled, and the output signal of the driver circuit is controlled to a desired voltage. The one-hot structure of the switch controller 904 provides a glitch-free operation of the comparator.
[0085] In an embodiment, the driver circuit is configured to reduce the voltage of the control signal VBB for the back gate bias circuitry to reduce the frequency of the output signal of the oscillator.
[0086] In an embodiment, the driver circuit is configured to increase the voltage of the control signal VBB for the back gate bias circuitry to increase the frequency of the output signal of the oscillator.
[0087] In an embodiment, the resistors of the driver circuit connected in series have equal resistance values. This has the advantage of introducing linearity into the control of VBB. Fig. 10A An example is shown. On the x-axis is the voltage VBB, which in this example can vary from 0 to V DDAs VBB changes, the propagation delay 1000 slowly decreases, i.e. the comparator works faster. Therefore, the output frequency 1002 of the oscillator increases. The increase in frequency is almost linear.
[0088] In an embodiment, the driver circuit may also be implemented with a metal oxide semiconductor field effect transistor (MOSFET) voltage divider having a low current density.
[0089] Now assume that RCAL is replaced by an electrical conductor. In the absence of RCAL, it is challenging to fine-tune the RC circuit including R, R', C1 and C2 in the swing-enhanced RC oscillator 100. The challenge comes from the fact that in order to achieve high power efficiency, capacitors C1 and C2 must be very small (for example, on the order of a few micro-farads fF). It is impossible to fine-tune R1 and R' or C1 and C2 with an array or additional adjustable components without reducing the efficiency and noise performance of the oscillator. The reduction in power efficiency and noise performance is caused by the additional parasitic capacitance and resistance introduced to the nodes VC1 and VC2. Any additional parasitic capacitance on VC1 and VC2 will in turn reduce the swing of these nodes, and therefore more power is required to achieve the same frequency, and the noise performance is deteriorated because the slope of the oscillation nodes VC1 and VC2 is not too steep. Therefore, introducing RCAL as a short-circuit resistor between VC1 and VC2 has many advantages:
[0090] 1. Reduce the parasitic C and R seen by the VC1 and VC2 nodes, and thus achieve higher frequency and lower power consumption
[0091] 2. Real-time frequency changes without glitches. The RCAL value can be changed at any time relative to the clock state, because it will not cause frequency glitches.
[0092] 3. Power saving due to charge recycling between the capacitors from the two RC networks. During the oscillation phase, part of the charge from C1 is transferred to C2, and part of the charge from C2 is transferred to C1.
[0093] As explained earlier in this document, RCAL can be organized in pairs symmetrically distributed between VC1 and VC2. This arrangement ensures that the parasitic capacitance seen by VC1 and VC2 is at least approximately the same. If the parasitic capacitance is not matched, the clock duty cycle will be skewed and not equal to the desired 50%. This is advantageous because VC1 and VC2 are sensitive to additional parasitic capacitance.
[0094] Another reason to use a symmetric RCAL in combination with one-hot encoding is to be able to change the oscillator frequency in real time: the RCAL value can be changed while the oscillator is enabled. Real-time frequency changes are safe because the trimmable resistor RCAL is not directly connected to the comparator. Therefore, any glitches (or charge injection from the trimming switch) will not cause the comparator clock to double. RCAL is isolated from the VC1 and VC2 nodes by series resistors R0 and R0' (see Figure 3 ). In addition, due to the relatively large RC constant inside RCAL, the resistance updates slowly and does not cause glitches in VC1 and VC2. Finally, due to one-hot encoding, the total charge injection from the trim switches is close to zero. This is because in one-hot encoding, when the trim value changes, there are always 2 switches toggling: one switch becomes open and one switch becomes closed. This ensures that the charge injection from the open switch will be absorbed by the closed switch.
[0095] Fig.11 is a flow chart showing an embodiment. The flow chart shows a fine adjustment Figure 5 operation of the oscillator 500.
[0096] Step 1100 includes alternately connecting a set of capacitors (C1, C2) to electrodes (102', 112') of a DC source via switches (110') based on a switching control (116').
[0097] Step 1102 includes generating a switching control (116') by two comparators (502, 504) by comparing the voltage of the capacitors (C1, C2) at the inputs (VC1, VC2) of the comparators with a preset threshold voltage.
[0098] In step 1104, the frequency of the oscillator's output (118') is fine-tuned by back-gate bias circuitry for controlling the threshold voltage of the comparator.
[0099] The proposed solution has many advantages.
[0100] This solution provides low power consumption and low noise. Compared to the traditional trimming technique of adjusting the values of R, R' and / or C1, C2, the power consumption is lower because smaller parasitic capacitance and resistance are generated at nodes VC1 and VC2. Instead, the trimming can be achieved by tuning the back gate voltage of the inverter-based comparator. This does not generate additional parasitic effects at the high frequency oscillation nodes.
[0101] The larger the parasitic capacitance on nodes VC1 and VC2, the larger C1 and C2 should be to compensate for the voltage swing loss due to the capacitive divider effect. The size of C1 and C2 directly affects the power consumption (expressed in W / Hz). Therefore, lower parasitic capacitance on nodes VC1 and VC2 results in lower power consumption due to the need for smaller C1 and C2.
[0102] Furthermore, the higher voltage swings of nodes VC1 and VC2 result in better noise performance because the voltage transitions at the inputs of the comparators are sharper.
[0103] The proposed solution achieves glitch-free trimming. When using the proposed solution, it is safe to perform trimming updates while the oscillator is operating. If trimming is traditionally implemented on R, R' or C1, C2, any glitch or charge injection from the trimming switch will cause the sensitive nodes VC1 or VC2 to experience a glitch, and thus the comparator output will produce a clock with a glitch.
[0104] The proposed solution achieves a smooth variation of the oscillator's output frequency. Fig. 10B . On the x-axis is time and on the y-axis is the output frequency of the oscillator. At first, the output frequency has a value of f1. At time t1, a trimming operation is applied by changing the value of VBB. The frequency smoothly transitions to the value f2 without any glitches or undershoots or overshoots.
[0105] In addition, the integral nonlinearity INL and differential nonlinearity DNL are good. In an embodiment, when one-hot encoding of the backgate voltage is applied, the frequency transfer function is monotonic and the DNL is low. In binary encoding, the DNL suffers from the parasitic effects of the switches, especially for the MSB transition, such as 011111->100000. One-hot encoding eliminates this effect.
[0106] Furthermore, the proposed solution provides high fine-tuning resolution. Typically, the threshold sensitivity of the comparator to backgate voltage variations is low. Therefore, this fine-tuning scheme can be used to optimally adjust the frequency of the oscillator. A change in VBB may result in a small change in the output frequency. Therefore, the frequency can be adjusted precisely.
[0107] In an embodiment, Figure 1 The fine-tuning method shown in Figure 5 The method shown in can be applied to the same oscillator. Coarse trimming can be applied by utilizing a trimmable resistor (RCAL), and fine trimming can be optimized by using VBB control.
[0108] The embodiments described herein are applicable to various systems employing oscillators. The systems and details of such systems are developing rapidly. Such developments may require additional changes to the described embodiments. Therefore, all words and expressions should be interpreted broadly, and they are intended to illustrate rather than limit the embodiments. It will be apparent to those skilled in the art that, as technology advances, the inventive concept may be implemented in various ways. The embodiments are not limited to the examples described above, but may vary within the scope of the claims.
Claims
1. A swing-enhanced differential oscillator, comprising: a switch for alternately connecting a group of capacitors to electrodes of a DC source based on a switching control, a comparator configured to generate the switching control by comparing the voltage of the capacitor at the input of the comparator with a preset threshold voltage, A trimmable resistor is connected to the input of the comparator, the resistor controlling the frequency of the output of the oscillator.
2. The oscillator according to claim 1, wherein The trimmable resistor comprises: an even number of resistors connected in series, the resistors forming a set of resistor pairs, the outermost resistors at the ends of the series-connected resistors forming a first outermost resistor pair, the second outermost resistors at the ends of the series-connected resistors forming a second outermost resistor pair, and the two middle resistors of the series-connected resistors forming a final innermost resistor pair, a switch for each resistor pair except the first resistor pair such that the corresponding resistor pair is bypassed when the switch is closed, and a switch controller, wherein the switch controller is used to control the opening and closing of the switch.
3. The oscillator according to claim 2, wherein: The series connected resistors have equal values.
4. The oscillator according to claim 2, wherein: The switch of the trimmable resistor is arranged to bypass the corresponding resistor pair and all inner resistor pairs of the corresponding resistor pair when the switch is closed.
5. An oscillator according to any one of the preceding claims, wherein: The switch controller controls the opening and closing of the switches so that only one switch is closed at a time.
6. An oscillator according to any one of the preceding claims, wherein: The switch controller is a one-hot encoder.
7. A method for fine-tuning a swing-enhanced differential oscillator, comprising: Based on the switching control, a group of capacitors are alternately connected to the electrodes of the DC source through switches, The switching control is generated by a comparator by comparing the voltage of the capacitor at the input of the comparator with a preset threshold voltage, The frequency of the output of the oscillator is controlled by a trimmable resistor connected to the input of the comparator.
8. The method according to claim 7, further comprising: adjusting the resistance of the trimmable resistor by a switch controller, the switch controller controls the opening and closing of a set of switches for an even number of resistors connected in series, the resistors forming a set of resistor pairs, the outermost resistors at the ends of the series-connected resistors forming a first outermost resistor pair, the second outermost resistors at the ends of the series-connected resistors forming a second outermost resistor pair, and the two middle resistors of the series-connected resistors forming a final innermost resistor pair, wherein the trimmable resistor includes a switch for each resistor pair except the first resistor pair, so that when the switch is closed, the corresponding resistor pair is bypassed, The switch controller controls the opening and closing of the switches so that only one switch is closed at a time.
9. The method according to claim 8, further comprising: When a switch corresponding to a given resistor pair of the trimmable resistors is closed, the given resistor pair and all inner resistor pairs of the given resistor pair are bypassed.