Symmetric resistive harmonic suppression mixer (HRM)

Abstract

This disclosure provides systems, methods, and devices for wireless communication that support signal down-conversion with improved harmonic suppression. In a first aspect, an apparatus includes: a first plurality of mixers, where each mixer is coupled to two oscillating signals spaced 180 degrees in phase; a second plurality of mixers, where each mixer is coupled to two oscillating signals spaced by 180 degrees in phase, where a combined load of the first plurality of mixers and the second plurality of mixers on a plurality of oscillating signals is symmetrical with respect to each of the plurality of oscillating signals; and a shared capacitor coupling an RF input to the first plurality of mixers and the second plurality of mixers. Other aspects and features are also claimed and described.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to co-pending U.S. patent application No. 17 / 934,467, filed on September 22, 2022, entitled “SYMMETRICAL RESISTIVE HARMONICREJECTION MIXER (HRM)”, the disclosure of which is hereby incorporated by reference into this document. Technical Field

[0003] Aspects of the present disclosure relate generally to wireless communication systems, and more particularly to radio frequency (RF) processing circuits for wireless communication systems.Some features enable and provide improved communications, including improved operation of RF transceivers, such as improved harmonic suppression in mixers. Background Art

[0004] Wireless communication networks are widely deployed to provide various communication services such as voice, video, packet data, messaging, broadcast, etc. These wireless networks may be multiple-access networks capable of supporting multiple users by sharing the available network resources.

[0005] A wireless communication network may include several components. These components may include wireless communication devices, such as a base station (or Node B) that may support communication of several user equipments (UEs). A UE may communicate with a base station via a downlink and an uplink. A downlink (or forward link) refers to a communication link from a base station to a UE, and an uplink (or reverse link) refers to a communication link from a UE to a base station.

[0006] The base station may send data and control information to the UE on the downlink, or receive data and control information from the UE on the uplink. On the downlink, the transmission from the base station may encounter interference caused by transmissions from neighboring base stations or other wireless radio frequency (RF) transmitters. On the uplink, the transmission from the UE may encounter interference from other UEs communicating with neighboring base stations or from uplink transmissions of other wireless RF transmitters. This interference may degrade performance on both the downlink and uplink.

[0007] As the demand for mobile broadband access continues to grow, the potential for interference and congested networks grows with more UEs accessing long-range wireless communication networks and more short-range wireless systems deployed in communities. Research and development continues to advance wireless technologies to not only meet the growing demand for mobile broadband access, but also to improve and enhance the user experience with mobile communications.

[0008] Modern wireless communication networks are complex networks involving operations on multiple frequencies and multiple frequency ranges. RF signals in different frequencies and ranges may use different components or different component configurations to support devices operating on these wireless communication networks and maintain high signal integrity and high bandwidth across a range of possible network conditions. When designing RF systems for UEs and BSs operating on wireless communication networks, duplicate components and the number of supported configurations present challenges. Summary of the invention

[0009] The following summarizes some aspects of the present disclosure to provide a basic understanding of the technology discussed. This summary is not an exhaustive overview of all the expected features of the present disclosure, and is neither intended to identify the key or important elements of all aspects of the present disclosure, nor to delineate the scope of any or all aspects of the present disclosure. The sole purpose of this summary is to present some concepts of one or more aspects of the present disclosure in a summarized form as a prelude to more specific embodiments presented later.

[0010] The number of different signals present in modern RF circuits such as wireless communication devices, and the number of different frequencies of these signals, can create unexpected interference between the different signals. Example embodiments of RF signal chains are shown in the figures herein, and alternative configurations of these embodiments are described in the description herein. An example interference occurs in a carrier aggregation configuration involving a first frequency band and a second frequency band, where the frequency of the second frequency band is three times the frequency of the first frequency band. For example, if a receiver is observing a first frequency band (Band 1) power amplifier output while a second frequency band (Band 2) power amplifier is transmitting in a high power mode, the leakage path through the limited antenna isolation will enable the second frequency band signal to reach the RF signal input with sufficient amplitude to degrade the quality of the signal after down-conversion by a third local oscillator (LO) harmonic.

[0011] The disadvantages mentioned here are merely representative, and are included to highlight the problems that the inventors have identified and sought to improve with respect to existing devices. Aspects of the devices described below may address some or all of these disadvantages as well as other disadvantages known in the art. Aspects of the improved devices described herein may present other benefits than those described above, and may be used in other applications than those described above.

[0012] Interference between signals in the transceiver can be addressed by one or more of the solutions described herein. In some aspects, the independent I channel path and Q channel path can be configured to be symmetrical, such as the combined load from the mixers coupled to the same LO phase is approximately equal between the LO phases. In some aspects, gain scaling is provided by a set of configurable resistors to achieve HRM gain scaling for the desired operating mode with a reconfigurable front end (e.g., between LNA bypass mode or LNA mode). In some aspects, a shared capacitor is provided between the RF input and both the I channel mixer and the Q channel mixer to obtain HRM gain scaling, which is a ratio of the configurable resistors and has little or no dependence on the input impedance, which is not the case if independent capacitors for the I channel path and the Q channel path are implemented.

[0013] In one aspect of the present disclosure, an apparatus for wireless communication (e.g., user equipment (UE) or base station (BS)) includes: a radio frequency (RF) input node, the radio frequency (RF) input node being used to receive an antenna signal; a plurality of oscillation signal input nodes, the plurality of oscillation signal input nodes being configured to receive a plurality of oscillation signals, wherein each of the plurality of oscillation signals is out of phase with other of the plurality of oscillation signals; a first plurality of mixers, wherein each of the first plurality of mixers is coupled to two of the plurality of oscillation signals that are 180 degrees apart in phase; a second plurality of mixers, wherein each of the second plurality of mixers is coupled to two of the plurality of oscillation signals that are 180 degrees apart in phase, wherein a combined load of the first plurality of mixers and the second plurality of mixers on the plurality of oscillation signals is symmetrical about each of the plurality of oscillation signals; and a capacitor, the capacitor coupling the RF input node to the first plurality of mixers and the second plurality of mixers.

[0014] In additional aspects of the present disclosure, a method for wireless communication includes: applying a radio frequency (RF) input signal to a first plurality of mixers and a second plurality of mixers via a shared capacitor; applying a plurality of oscillating signals to the first plurality of mixers, wherein each mixer in the first plurality of mixers is coupled to two oscillating signals among the plurality of oscillating signals that are 180 degrees apart in phase; and applying the plurality of oscillating signals to a second plurality of mixers, wherein each mixer in the second plurality of mixers is coupled to two oscillating signals among the plurality of oscillating signals that are 180 degrees apart in phase, wherein a combined load of the first plurality of mixers and the second plurality of mixers on the plurality of oscillating signals is symmetrical with respect to each of the plurality of oscillating signals.

[0015] In another aspect of the present disclosure, an apparatus for wireless communication includes: a radio frequency (RF) input node configured to receive an RF input signal; at least four first mixer circuits coupled between the RF input node and an in-phase output node, each of the at least four first mixer circuits configured to receive the RF input signal and configured to receive two local oscillator (LO) signals of a plurality of LO signals, wherein each of the plurality of LO signals is out of phase with respect to other LO signals of the plurality of LO signals, and wherein the two LO signals are 180 degrees apart in phase; and at least four second mixer circuits, the at least four second mixer circuits being coupled between the RF input node and an in-phase output node. A mixer circuit is coupled between an RF input node and a quadrature output node, each of the at least four second mixer circuits being configured to receive an RF input signal and configured to receive two of the plurality of LO signals, wherein the two LO signals are 180 degrees apart in phase; a capacitor coupled between the RF input node and each of the at least four first mixer circuits and each of the at least four second mixer circuits; a first plurality of resistors coupled between the capacitor and the at least four first mixer circuits; and a second plurality of resistors coupled between the capacitor and the at least four second mixer circuits.

[0016] In an additional aspect of the present disclosure, a harmonic rejection mixer (HRM) includes: a radio frequency (RF) input; a first set of in-phase mixers; a second set of quadrature-phase mixers; a second set of two IF outputs; wherein each of the two RF input nodes of each of the second set of four (4) double-balanced mixers is coupled to the RF input via a different resistor of the second set of eight (8) configurable resistors, and wherein each of the two LO input nodes of each of the second set of four (4) double-balanced mixers is coupled via a different LO phase of the eight (8) LO phases, wherein each of the second set of two IF outputs is coupled to each of the second set of four (4) double-balanced mixers; There are different IF output nodes of the two IF output nodes of the double balanced mixers, wherein the resistance value of at least one configurable resistor of the first set of eight (8) configurable resistors coupled to a first RF input node of a corresponding double balanced mixer of the first set of four (4) double balanced mixers supplied with a first phase of the eight (8) LO phases is configured differently from the resistance value of a corresponding resistor of the second set of eight (8) resistors coupled to a second RF input node of a corresponding double balanced mixer of the second set of four (4) double balanced mixers supplied with a second phase of the same eight (8) LO phases, wherein the first phase of the eight (8) LO phases and the second phase of the same eight (8) LO phases are consecutive phases from the eight (8) LO phases. A first set of in-phase mixers may include: a first set of eight (8) configurable resistors; a first set of four (4) double balanced mixers, each double balanced mixer including two RF input nodes, two local oscillator (LO) input nodes and two intermediate frequency (IF) output nodes; a first set of two IF outputs; wherein each of the two RF input nodes of each double balanced mixer in the first set of four (4) double balanced mixers is coupled to the RF input via a different resistor in the first set of eight (8) configurable resistors, wherein each of the two LO input nodes of each double balanced mixer in the first set of four (4) double balanced mixers is supplied with a different LO phase in eight (8) LO phases, and wherein each IF output in the first set of two IF outputs is coupled to a different IF output node in the two IF output nodes of all the double balanced mixers in the first set of four (4) double balanced mixers. The second set of quadrature phase mixers includes: a second set of eight (8) configurable resistors; and a second set of four (4) double balanced mixers, each double balanced mixer including two RF input nodes, two LO input nodes, and two IF output nodes.

[0017] In an additional aspect of the present disclosure, an apparatus includes: means for applying a radio frequency (RF) input signal to a first plurality of mixers and a second plurality of mixers via a shared capacitor; means for applying a plurality of oscillating signals to the first plurality of mixers, wherein each mixer in the first plurality of mixers is coupled to two oscillating signals among the plurality of oscillating signals that are 180 degrees apart in phase; and means for applying the plurality of oscillating signals to the second plurality of mixers, wherein each mixer in the second plurality of mixers is coupled to two oscillating signals among the plurality of oscillating signals that are 180 degrees apart in phase, wherein a combined load of the first plurality of mixers and the second plurality of mixers on the plurality of oscillating signals is symmetrical with respect to each of the plurality of oscillating signals.

[0018] The features and technical advantages of examples according to the present disclosure have been outlined quite extensively above so that the following specific embodiments may be better understood. Additional features and advantages will be described below. The disclosed concepts and specific examples may be easily used as a basis for modifying or designing other structures for the same purpose of achieving the present disclosure. Such equivalent constructions do not depart from the scope of the appended claims. When considered in conjunction with the accompanying drawings, the characteristics of the concepts disclosed herein (both their organization and methods of operation) and the associated advantages will be better understood according to the following description. Each of the figures in the accompanying drawings is provided for the purpose of illustration and description, and not as a definition of limitations to the claims.

[0019] Although various aspects and specific implementations are described in this application by the illustration of some examples, it will be understood by those skilled in the art that additional specific implementations and use cases may be generated in many different arrangements and scenarios. The innovation described herein can be implemented across many different platform types, devices, systems, shapes, sizes, and packaging arrangements. For example, aspects and / or uses can be generated via integrated chip specific implementations and other devices based on non-module components (e.g., end-user devices, vehicles, communication equipment, computing equipment, industrial equipment, retail / purchase equipment, medical equipment, devices that enable artificial intelligence (AI), etc.). Although some examples may or may not specifically point to use cases or applications, the applicability of a wide range of described innovations may occur. The scope of specific implementations can be in the range from chip-level or modular components to non-modular, non-chip-level specific implementations, and further to the scope of aggregated, distributed or original equipment manufacturer (OEM) devices or systems in conjunction with one or more aspects of the described innovations. In some practical environments, the equipment in conjunction with the various aspects and features described may also necessarily include additional components and features for implementing and practicing the various aspects claimed and described. For example, the transmission and reception of wireless signals necessarily include multiple components for analog and digital purposes (e.g., hardware components including antennas, radio frequency (RF) chains, power amplifiers, modulators, buffers, processors, interleavers, adders / summers, etc.). The innovations described herein are intended to be practiced in a variety of devices, chip-level components, systems, distributed arrangements, end-user devices, etc., having different sizes, shapes, and configurations. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] A further understanding of the nature and advantages of the present disclosure may be achieved by reference to the following drawings. In the drawings, similar components or features may have the same reference label. In addition, components of the same type may be distinguished by adding a dash and a second label to distinguish between similar components after the reference label. If only the first reference label is used in the specification, the description applies to any one of the similar components having the same first reference label, regardless of the second reference label.

[0021] Figure 1 is a block diagram illustrating details of an example wireless communication system in accordance with one or more aspects.

[0022] Figure 2 is a block diagram illustrating an example of a base station and a user equipment (UE) according to one or more aspects.

[0023] Figure 3A is a block diagram illustrating a radio frequency (RF) transceiver in accordance with one or more aspects.

[0024] Figure 3Bis a block diagram illustrating a block diagram of an example transmitter system according to one or more aspects.

[0025] Figure 4A is a circuit diagram illustrating an RF signal chain having a mixer in a double-balanced configuration with symmetrical loading on a local oscillator (LO) signal in accordance with one or more aspects of the present disclosure.

[0026] Figure 4B is a circuit diagram illustrating an RF signal chain having a mixer in a single balanced configuration with symmetrical loading on a local oscillator (LO) signal according to one or more aspects of the present disclosure.

[0027] Figure 4C is a flow chart illustrating a method of operating an RF signal chain with symmetrical loading on a local oscillator (LO) signal in accordance with one or more aspects of the present disclosure.

[0028] Figure 5 is a block diagram illustrating a circuit layout of an RF signal chain with symmetrical loading on a local oscillator (LO) signal according to one or more aspects of the present disclosure.

[0029] Figure 6 is a block diagram illustrating a die diagram of an RF signal chain with symmetrical loading on a local oscillator (LO) signal according to one or more aspects of the present disclosure.

[0030] Figure 7 is a block diagram of an example UE 700 that supports reconfiguring an RF signal chain of a wireless radio device according to one or more aspects of the present disclosure.

[0031] Figure 8 is a block diagram of an example base station that supports reconfiguration of an RF signal chain of a wireless radio device according to one or more aspects of the present disclosure.

[0032] The same reference numbers and designations in different drawings indicate the same elements. DETAILED DESCRIPTION

[0033] The specific embodiments described below in conjunction with the accompanying drawings are intended as descriptions of various configurations and are not intended to limit the scope of the present disclosure. Instead, the specific embodiments include specific details for providing a thorough understanding of the subject matter of the present invention. It will be apparent to those skilled in the art that these specific details are not required in every case, and in some instances, well-known structures and components are shown in block diagram form for clarity of presentation.

[0034] The present disclosure provides systems, devices, methods and computer-readable media that support wireless communication, including techniques for downconverting a signal from a first higher frequency to a second lower frequency. The present disclosure describes an implementation of an RF signal chain including one or more harmonic rejection mixers (HRMs). The HRM can be a resistive HRM with resistance scaling provided by a variable resistor group in the RF signal chain. In some embodiments, the RF signal chain includes a downconversion mixer configured as an 8-phase HRM, which is symmetrical relative to one or more of the local oscillator (LO), radio frequency (RF), and / or intermediate frequency (IF) ports of the mixer. In some embodiments, a configurable resistor is coupled to a capacitor shared between an I channel path and a Q channel path. Various aspects of the implementation can be used in a composite IQ receiver and feedback receiver (FBRX) architecture (e.g., a reconfigurable mixer configuration with LNA, LNA bypass and mixer priority), which is provided in part by HRM scaling that can be configured independently of source impedance.

[0035] Specific implementations of the subject matter described in the present disclosure may be implemented to achieve one or more of the following potential advantages or benefits. A resistive HRM, as in the embodiments described herein, a variable resistor coupled between the input source and the mixer provides isolation between the HRM phases to achieve an acceptable third harmonic rejection ratio (HRR3) of at least 30-50 dBc without calibration overhead. The variable resistor may be adjusted based on the LO frequency used to down-convert the RF input signal. In some aspects, the present disclosure provides techniques for operating an RF signal chain driven at least in part from a 25% duty cycle local oscillator (LO) signal, which reduces power consumption (e.g., such as when compared to using a 12.5% ​​LO in other down-conversion mixers). An embodiment of the disclosed down-conversion HRM was measured to provide us with a third harmonic rejection ratio (HRR3) of up to or greater than 35-40 dBc in the 2G / 3G / 4G / 5G communication bands without any calibration on 0.6G-7.125G. Additionally, measurement results show that for implementations that achieve IQ symmetry, good image rejection ratios (IRR) up to or greater than 40 dBc are achieved without any calibration, which may be provided in part by the symmetrical design and layout in certain HRM implementations.

[0036] The present disclosure as a whole relates to providing or participating in authorized shared access between two or more wireless devices in one or more wireless communication systems (also referred to as wireless communication networks). In various specific implementations, the various techniques and devices can be used in wireless communication networks, such as code division multiple access (CDMA) networks, time division multiple access (TDMA) networks, frequency division multiple access (FDMA) networks, orthogonal FDMA (OFDMA) networks, single carrier FDMA (SC-FDMA) networks, LTE networks, GSM networks, fifth generation (5G) or new radio (NR) networks (sometimes referred to as "5G NR" networks, systems or devices) and other communication networks. As described herein, the terms "network" and "system" can be used interchangeably.

[0037] A CDMA network may implement, for example, a radio technology such as Universal Terrestrial Radio Access (UTRA), cdma2000, etc. UTRA includes Wideband-CDMA (W-CDMA) and Low Chip Rate (LCR). CDMA2000 covers IS-2000, IS-95, and IS-856 standards.

[0038] For example, a TDMA network may implement a radio technology such as the Global System for Mobile Communications (GSM). The Third Generation Partnership Project (3GPP) defines the standard for the GSM EDGE (Enhanced Data Rate for GSM Evolution) Radio Access Network (RAN) (also known as GERAN). GERAN is the radio component of the network of GSM / EDGE together with connecting base stations (e.g., Ater and Abis interfaces) and base station controllers (A interfaces, etc.). The radio access network represents a component of the GSM network through which telephone calls and packet data are routed from the public switched telephone network (PSTN) and the Internet to subscriber phones (also known as user terminals or user equipment (UE)) and from subscriber phones to the PSTN and the Internet. The network of a mobile phone operator may include one or more GERANs, which may be coupled to the UTRAN in the case of a UMTS / GSM network. Additionally, the operator network may also include one or more LTE networks, or one or more other networks. Various network types may use different radio access technologies (RATs) and RANs.

[0039] OFDMA network can implement radio technology such as Evolved UTRA (E-UTRA), Institute of Electrical and Electronics Engineers (IEEE) 802.11, IEEE 802.16, IEEE 802.20, flash-OFDM, etc. UTRA, E-UTRA and GSM are part of Universal Mobile Telecommunications System (UMTS). In particular, Long Term Evolution (LTE) is a version of UMTS using E-UTRA. UTRA, E-UTRA, GSM, UMTS and LTE are described in documents provided by an organization named "3rd Generation Partnership Project" (3GPP), and cdma2000 is described in documents from an organization named "3rd Generation Partnership Project 2" (3GPP2). These radio technologies and standards are known or under development. For example, 3GPP is a collaboration between telecommunications association groups to define a globally applicable third generation (3G) mobile phone specification. 3GPP LTE is a 3GPP plan to improve the UMTS mobile phone standard. 3GPP can define the specifications of next generation mobile networks, mobile systems and mobile devices. The present disclosure may describe certain aspects with reference to LTE, 4G or 5G NR technology; however, the description is not intended to be limited to a particular technology or application, and one or more aspects described with reference to one technology may be understood to be applicable to another technology. Additionally, one or more aspects of the present disclosure may relate to shared access to wireless spectrum between networks using different radio access technologies or radio air interfaces.

[0040] 5G networks are expected to have diverse deployments, diverse spectrum, and diverse services and devices that can be implemented using a unified air interface based on OFDM. To achieve these goals, in addition to developing new radio technologies for 5G NR networks, further enhancements to LTE and LTE-A are also being considered. 5G NR will be able to scale to provide coverage (1) to massive Internet of Things (IoT), with ultra-high density (e.g., about 1M nodes / km 2 ), ultra-low complexity (e.g., about 10s of bits / sec), ultra-low power consumption (e.g., about 10+ years of battery life), and deep coverage with the ability to reach challenging locations; (2) including mission-critical control with strong security to protect sensitive personal, financial, or classified information, ultra-high reliability (e.g., about 99.9999% reliability), ultra-low latency (e.g., about 1 millisecond (ms)), and users with a wide range of mobility or lack of mobility; and (3) providing services with enhanced mobile broadband (including extremely high capacity (e.g., about 10Tbps / km 2 ), extremely high data rates (e.g., multi-Gbps rates, 100+Mbps user experience rates), and deep awareness coverage with advanced discovery and optimization.

[0041] Devices, networks, and systems may be configured to communicate via one or more portions of the electromagnetic spectrum. The electromagnetic spectrum is typically subdivided into various categories, bands, channels, etc. based on frequency / wavelength. In 5GNR, two initial operating bands have been identified as frequency ranges designated FR1 (410 MHz-7.125 GHz) and FR2 (24.25 GHz-52.6 GHz). The frequencies between FR1 and FR2 are typically referred to as mid-band frequencies. Although a portion of FR1 is greater than 6 GHz, FR1 is typically referred to (interchangeably) as the "below 6 GHz" band in various documents and articles. Similar naming issues sometimes arise for FR2, which is typically (interchangeably) referred to as the "millimeter wave" (mmWave) band in documents and articles, although it is different from the extremely high frequency (EHF) band (30 GHz-300 GHz) identified as the "mmWave" band by the International Telecommunication Union (ITU).

[0042] In view of the above aspects, unless otherwise specifically stated, it should be understood that if the term "below 6 GHz" or the like is used in this document, it can broadly represent frequencies that may be less than 6 GHz, may be within FR1, or may include mid-band frequencies. In addition, unless otherwise specifically stated, it should be understood that if used in this document, the term "mmWave" or the like can broadly represent frequencies that may include mid-band frequencies, may be within FR2, or may be within the EHF band.

[0043] 5G NR devices, networks, and systems can be implemented to use optimized OFDM-based waveform features. These features may include scalable parameter sets and transmission time intervals (TTIs); a common flexible framework that efficiently multiplexes services and features using dynamic, low-latency time division duplex (TDD) designs or frequency division duplex (FDD) designs; and advanced wireless technologies such as massive multiple-input multiple-output (MIMO), robust mmWave transmission, advanced channel decoding, and device-centric mobility. The scalability of parameter sets in 5G NR and the scaling of subcarrier spacing can efficiently address various services operating across different spectrums and different deployments. For example, in various outdoor and macro coverage deployments of less than 3GHz FDD or TDD implementations, the subcarrier spacing may appear at 15kHz, such as over bandwidths of 1MHz, 5MHz, 10MHz, 20MHz, etc. For various other outdoor and small cell coverage deployments with TDD greater than 3GHz, the subcarrier spacing may appear at 30kHz over 80MHz / 100MHz bandwidth. For various other indoor broadband implementations, using TDD on the unlicensed portion of the 5GHz band, the subcarrier spacing may occur at 60kHz over a 160MHz bandwidth. Finally, for various deployments transmitting over mmWave components at 28GHz TDD, the subcarrier spacing may occur at 120kHz over a 500MHz bandwidth.

[0044] 5G NR's scalable parameter sets facilitate scalable TTIs for diverse latency and quality of service (QoS) requirements. For example, shorter TTIs can be used for low latency and high reliability, while longer TTIs can be used for higher spectral efficiency. Efficient multiplexing of long and short TTIs allows transmission to start on symbol boundaries. 5G NR also anticipates a self-contained integrated subframe design where uplink or downlink scheduling information, data, and acknowledgments are in the same subframe. The self-contained integrated subframe supports communications in unlicensed or contention-based shared spectrum, and adaptive uplink or downlink can be flexibly configured on a per-cell basis to dynamically switch between uplink and downlink to meet current business needs.

[0045] For clarity, certain aspects of the devices and techniques may be described below with reference to example 5G NR implementations or in a 5G-centric manner, and 5G terminology may be used as illustrative examples in portions of the description below; however, the description is not intended to be limited to 5G applications.

[0046] Furthermore, it should be understood that in operation, a wireless communication network adapted according to the concepts herein can operate using any combination of licensed spectrum or unlicensed spectrum depending on load and availability. Therefore, it will be apparent to one of ordinary skill in the art that the systems, devices, and methods described herein can be applied to other communication systems and applications beyond the specific examples provided.

[0047] Although various aspects and specific implementations are described in this application by the illustration of some examples, it will be understood by those skilled in the art that additional specific implementations and use cases may be generated in many different arrangements and scenarios. The innovation described herein can be implemented across many different platform types, devices, systems, shapes, sizes, and packaging arrangements. For example, specific implementation or use can be implemented via integrated chip specific implementation or other devices based on non-module components (e.g., end-user devices, vehicles, communication equipment, computing equipment, industrial equipment, retail equipment or purchasing equipment, medical equipment, AI-enabled devices, etc.). Although some examples may or may not specifically point to use cases or applications, the applicability of a wide range of described innovations may occur. The scope of specific implementation can range from chip-level or modular components to non-modular, non-chip-level specific implementations, and further to aggregated, distributed, or original equipment manufacturer (OEM) devices or systems containing one or more described aspects. In some practical environments, the equipment in combination with the various aspects and features described may also necessarily include additional components and features for implementing and practicing the various aspects claimed and described. It is intended that the innovations described herein may be implemented in a wide variety of embodiments of different sizes, shapes, and configurations, including both large and small devices, chip-level components, multi-component systems (e.g., radio frequency (RF) chains, communication interfaces, processors), distributed arrangements, end-user devices, and the like.

[0048] Figure 1 1 is a block diagram illustrating details of an example wireless communication system according to one or more aspects. The wireless communication system may include a wireless network 100. The wireless network 100 may, for example, include a 5G wireless network. As will be appreciated by those skilled in the art, Figure 1 Components appearing in are likely to have related corresponding components in other network arrangements (including, for example, cellular-style network arrangements and non-cellular-style network arrangements (e.g., device-to-device or peer-to-peer or ad hoc network arrangements, etc.)).

[0049] Figure 1The illustrated wireless network 100 includes many base stations 105 and other network entities. A base station may be a station that communicates with a UE, and may also be referred to as an evolved Node B (eNB), a next generation eNB (gNB), an access point, etc. Each base station 105 may provide communication coverage for a specific geographic area. In 3GPP, the term "cell" may refer to a specific geographic coverage area of ​​a base station or a base station subsystem serving the coverage area, depending on the context in which the term is used. In the specific implementation of the wireless network 100 herein, the base station 105 may be associated with the same operator or different operators (e.g., the wireless network 100 may include multiple operator wireless networks). Additionally, in the specific implementation of the wireless network 100 herein, the base station 105 may provide wireless communication using one or more frequencies (e.g., one or more frequency bands in a licensed spectrum, an unlicensed spectrum, or a combination thereof) in the same frequency as an adjacent cell. In some examples, a separate base station 105 or UE 115 may be operated by more than one network operating entity. In other examples, each base station 105 and UE 115 may be operated by a single network operating entity.

[0050] A base station may provide communication coverage for a macro cell or a small cell (such as a pico cell or a femto cell), or other types of cells. A macro cell generally covers a relatively large geographic area (e.g., several kilometers in radius) and may allow unrestricted access by UEs with a service subscription with a network provider. A small cell (such as a pico cell) will generally cover a relatively small geographic area and may allow unrestricted access by UEs with a service subscription with a network provider. A small cell (such as a femto cell) will generally also cover a relatively small geographic area (e.g., a home), and in addition to unrestricted access, may also provide restricted access by UEs associated with the femto cell (e.g., UEs in a closed subscriber group (CSG), UEs of users in a home, etc.). A base station for a macro cell may be referred to as a macro base station. A base station for a small cell may be referred to as a small cell base station, a pico base station, a femto base station, or a home base station. In Figure 1 In the example shown, base stations 105d and 105e are conventional macro base stations, while base stations 105a-105c are macro base stations implemented using one of 3-dimensional (3D), full-dimensional (FD) or massive MIMO. Base stations 105a-105c use their higher-dimensional MIMO capabilities to employ 3D beamforming in elevation and azimuth beamforming to increase coverage and capacity. Base station 105f is a small cell base station, which can be a home node or a portable access point. The base station can support one or more (e.g., two, three, four, etc.) cells.

[0051] Wireless network 100 may support synchronous or asynchronous operation. For synchronous operation, base stations may have similar frame timings, and transmissions from different base stations may be approximately aligned in time. For asynchronous operation, base stations may have different frame timings, and transmissions from different base stations may not be aligned in time. In some cases, the network may be enabled or configured to handle dynamic switching between synchronous or asynchronous operation.

[0052] UE 115 is dispersed throughout the wireless network 100, and each UE may be stationary or mobile. It should be understood that, although in the standards and specifications promulgated by 3GPP, mobile devices are generally referred to as UEs, such devices may be additionally or otherwise referred to as mobile stations (MS), subscriber stations, mobile units, subscriber units, wireless units, remote units, mobile devices, wireless devices, wireless communication devices, remote devices, mobile subscriber stations, access terminals (AT), mobile terminals, wireless terminals, remote terminals, mobile phones, terminals, user agents, mobile clients, clients, gaming devices, augmented reality devices, vehicle components, vehicle devices or vehicle modules or some other suitable terminology by those skilled in the art. In this document, a "mobile" device or UE does not necessarily have the ability to move and may be fixed. Some non-limiting examples of mobile devices (such as) may include one or more specific implementations of UE 115, including mobile phones, cellular phones, smart phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, laptops, personal computers (PCs), notebooks, netbooks, smart books, tablet computers, and personal digital assistants (PDAs). The mobile device may additionally be an IoT or "Internet of Everything" (IoE) device, such as a car or other transportation vehicle, a satellite radio, a global positioning system (GPS) device, a global navigation satellite system (GNSS) device, a logistics controller, a drone, a multi-rotor helicopter, a quad-rotor helicopter, a smart energy or security device, a solar panel or solar array, city lighting, tap water or other infrastructure; industrial automation and enterprise equipment; consumer and wearable devices, such as glasses, wearable cameras, smart watches, health or fitness trackers, mammal implantable devices, gesture tracking devices, medical devices, digital audio players (e.g., MP3 players), cameras, game consoles, etc.; and digital home or smart home devices, such as home audio, video and multimedia devices, appliances, sensors, vending machines, smart lighting, home security systems, smart meters, etc. In one aspect, a UE may be a device including a universal integrated circuit card (UICC). In another aspect, a UE may be a device that does not include a UICC. In some aspects, a UE that does not include a UICC may also be referred to as an IoE device. Figure 1The UEs 115a-115d of the specific implementation illustrated in the figure are examples of mobile smart phone type devices accessing the wireless network 100. The UE may also be a machine specifically configured to implement connected communications, including machine type communications (MTC), enhanced MTC (eMTC), narrowband IoT (NB-IoT), and the like. Figure 1 The illustrated UEs 115e - 115k are examples of various machines that access the wireless network 100 and are configured for communication.

[0053] A mobile device, such as UE 115, may be able to communicate with any type of base station, whether macro, pico, femto, relay, etc. Figure 1 In the figure, the communication link (represented as a lightning ball) indicates the wireless transmission between the UE and the serving base station (which is a base station designated to serve the UE on the downlink or uplink) or the expected transmission between the base stations and the backhaul transmission between the base stations. The UE can operate as a base station or other network node in some scenarios. The backhaul communication between the base stations of the wireless network 100 can be carried out using wired or wireless communication links.

[0054] In operation at the wireless network 100, base stations 105a-105c use 3D beamforming and collaborative spatial techniques (such as coordinated multi-point (CoMP) or multi-connectivity) to serve UEs 115a and 115b. Macro base station 105d performs backhaul communications with base stations 105a-105c and small cells (base station 105f). Macro base station 105d also transmits multicast services that are subscribed to and received by UEs 115c and 115d. Such multicast services may include mobile TV or streaming video, or may include other services for providing community information, such as weather emergencies or alerts, such as Amber alerts or gray alerts.

[0055] The wireless network 100 of the specific implementation supports mission-critical communications with ultra-reliable and redundant links for mission-critical devices such as UE 115e as drones. The redundant communication links with UE 115e include links from macro base stations 105d and 105e and small cell base station 105f. Other machine-type devices such as UE 115f (thermometer), UE 115g (smart meter) and UE 115h (wearable device) can communicate directly with base stations such as small cell base station 105f and macro base station 105e through the wireless network 100, or in a multi-hop configuration by communicating with another user device that relays its information to the network, such as UE 115f communicating temperature measurement information to smart meter UE 115g, which then reports it to the network through small cell base station 105f. The wireless network 100 may also provide additional network efficiency through dynamic, low-latency TDD communications or low-latency FDD communications, such as in a vehicle-to-vehicle (V2V) mesh network between UEs 115i-115k communicating with a macro base station 105e.

[0056] Figure 2 1 is a block diagram illustrating an example of a base station 105 and a UE 115 according to one or more aspects. The base station 105 and the UE 115 may be Figure 1 For a restricted association scenario (as described above), base station 105 may be any base station in the base station and one of the UEs. Figure 1 The small cell base station 105f in the example of FIG. 105 and the UE 115 may be a UE 115c or 115d operating in the service area of ​​the base station 105f, which will be included in the list of accessible UEs of the small cell base station 105f in order to access the small cell base station 105f. The base station 105 may also be some other type of base station. Figure 2 As shown in FIG. 1 , the base station 105 may be equipped with antennas 234a through 234t and the UE 115 may be equipped with antennas 252a through 252r for facilitating wireless communication.

[0057] At the base station 105, the transmit processor 220 may receive data from the data source 212 and control information from the controller 240 (such as a processor). The control information may be for a physical broadcast channel (PBCH), a physical control format indicator channel (PCFICH), a physical hybrid ARQ (automatic repeat request) indicator channel (PHICH), a physical downlink control channel (PDCCH), an enhanced physical downlink control channel (EPDCCH), an MTC physical downlink control channel (MPDCCH), etc. The data may be for a physical downlink shared channel (PDSCH), etc. Additionally, the transmit processor 220 may process (e.g., encode and symbol map) the data and the control information, respectively, to obtain data symbols and control symbols. The transmit processor 220 may also generate reference symbols, such as for a primary synchronization signal (PSS) and a secondary synchronization signal (SSS), and a cell-specific reference signal. The transmit (TX) MIMO processor 230 may perform spatial processing (e.g., pre-coding) on ​​data symbols, control symbols, or reference symbols, if applicable, and may provide an output symbol stream to modulators (MODs) 232a to 232t. For example, the spatial processing performed on the data symbols, control symbols, or reference symbols may include pre-coding. Each modulator 232 may process a corresponding output symbol stream (e.g., for OFDM, etc.) to obtain an output sample stream. Additionally or alternatively, each modulator 232 may process the output sample stream (e.g., analog-convert, amplify, filter, and up-convert it) to obtain a downlink signal. The downlink signals from modulators 232a to 232t may be transmitted via antennas 234a to 234t, respectively.

[0058] At the UE 115, antennas 252a to 252r may receive downlink signals from the base station 105 and may provide received signals to demodulators (DEMODs) 254a to 254r, respectively. Each demodulator 254 may condition (e.g., filter, amplify, downconvert, and digitize) a corresponding received signal to obtain input samples. Each demodulator 254 may further process the input samples (e.g., for OFDM, etc.) to obtain received symbols. A MIMO detector 256 may obtain received symbols from the demodulators 254a to 254r, perform MIMO detection on the received symbols when necessary, and provide detected symbols. A receive processor 258 may process (e.g., demodulate, deinterleave, and decode) the detected symbols, provide decoded data for the UE 115 to a data sink 260, and provide decoded control information to a controller 280 (such as a processor).

[0059] On the uplink, at the UE 115, the transmit processor 264 may receive and process data from a data source 262 (e.g., for a physical uplink shared channel (PUSCH)) and control information from a controller 280 (e.g., for a physical uplink control channel (PUCCH)). Additionally, the transmit processor 264 may also generate reference symbols for reference signals. The symbols from the transmit processor 264 may be pre-decoded by the TX MIMO processor 266, if necessary, further processed by the modulators 254a to 254r (e.g., for SC-FDM, etc.), and transmitted to the base station 105. At the base station 105, the uplink signal from the UE 115 may be received by the antenna 234, processed by the demodulator 232, detected by the MIMO detector 236, if necessary, and further processed by the receive processor 238 to obtain decoded data and control information transmitted by the UE 115. Receive processor 238 may provide the decoded data to a data sink 239 and the decoded control information to controller 240 .

[0060] The controllers 240 and 280 may direct the operations at the base station 105 and the UE 115, respectively. The controller 240 or other processors and modules at the base station 105 or the controller 280 or other processors and modules at the UE 115 may perform or direct the execution of various processes for the techniques described herein, such as performing or directing Figure 5 or Figure 6 The illustrated execution or other processes for the techniques described herein. Memories 242 and 282 may store data and program codes for base station 105 and UE 115, respectively. Scheduler 244 may schedule UEs for data transmission on the downlink or uplink.

[0061] In some cases, the UE 115 and the base station 105 may operate in a shared radio spectrum band, which may include licensed or unlicensed (e.g., contention-based) spectrum. In the unlicensed frequency portion of the shared radio spectrum band, the UE 115 or the base station 105 may traditionally perform a medium sensing procedure to compete for access to the spectrum. For example, the UE 115 or the base station 105 may perform a listen-before-talk or listen-before-send (LBT) procedure (such as a clear channel assessment (CCA)) before communicating to determine whether the shared channel is available. In some specific implementations, the CCA may include an energy detection procedure to determine whether there are any other active transmissions. For example, the device may infer that a change in the received signal strength indicator (RSSI) of the power meter indicates that the channel is occupied. Specifically, a signal power concentrated in a certain bandwidth and exceeding a predetermined noise floor may indicate another wireless transmitter. CCA may also include detection of a specific sequence indicating the use of the channel. For example, another device may send a specific preamble before sending a data sequence. In some cases, the LBT procedure may include the wireless node adjusting its own backoff window based on the amount of energy detected on the channel or acknowledgement / negative acknowledgement (ACK / NACK) feedback for its own transmitted packets (as a manifestation of a collision).

[0062] Figure 3A is a block diagram illustrating a wireless receiver circuit 300 according to one or more aspects. In some embodiments, the receiver circuit 300 may be part of a converged sub-6 GHz and mmWave radio frequency (RF) transceiver, a sub-6 GHz radio frequency (RF) transceiver, or a mmWave radio frequency (RF) transceiver. In some embodiments, part or all of the RF transceiver may be located in a single integrated circuit (IC) sharing a common substrate. The receiver circuit 300 may include an antenna 312 to receive radio frequency (RF) signals. The antenna 312 is coupled to an RF front end (RFFE) 310, which may include a duplexer, a SAW filter, a switch, and / or an LNA. The RFFE 310 is coupled to an amplifier 320, such as a low noise amplifier (LNA). The amplifier 320 is coupled to one or more down converters 330A, 330B, and 330C. Each of the down converters 330A, 330B, and 330C may include a mixer 332 configured as a down-conversion mixer. In some embodiments, downconverters 330A, 330B, and 330C may include baseband filters (BBFs) 334 and / or analog-to-digital converters (ADCs) 336. Downconverters 330A, 330B, 330C may include one or more harmonic rejection mixers (HRMs) configured as downconversion mixers. In some embodiments, amplifier 320 is shared on the IC with RFFE 310 and / or one or more of downconverters 330A, 330B, and 330C.

[0063] Interference between wireless signals received at the antenna 312 and processed by the RFFE 310, amplifier 320, and downconverters 330A-330C complicates the operation of the receiver circuit 300, particularly when processing a wide range of potential frequencies. For example, co-location of processing paths for sub-6 GHz and mmWave signals in an integrated circuit may create interference between sub-6 GHz signal harmonics and the mmWave signal. Interference between sub-6 GHz signals and mmWave signals may occur because the mmWave IF signal corresponding to the mmWave RF signal received from the air at the antenna may be located near the sub-6 GHz signal in frequency (e.g., within 1-6 GHz) and / or at a harmonic of the sub-6 GHz signal (e.g., at an integer multiple of the sub-6 GHz signal).

[0064] Carrier aggregation (CA) operations can further complicate interference between wireless signals. Carrier aggregation (CA) involves the assignment of one or more carrier RF signals, each of which carries a single data stream. Carrier aggregation (CA) improves the flexibility of wireless devices and improves network utilization by allowing different numbers of carriers to be allocated to devices for different time periods based at least in part on historical, instantaneous and / or predicted bandwidth usage of wireless devices. Thus, when a mobile device requires additional bandwidth, additional carriers can be allocated to the wireless device, and then when bandwidth requirements change, the additional carriers are de-allocated and reallocated to other mobile devices. As carriers are allocated and de-allocated from mobile devices, the interaction of wireless signals can change. For example, different carriers in CA may be in different frequency bands, and certain frequency bands may have harmonics that overlap with certain other frequency bands and / or otherwise interfere with certain other frequency bands. Certain embodiments of the present disclosure may be advantageous for carrier aggregation (CA) for signals below 6 GHz in which at least two frequency bands (one of which is at the third harmonic (or similar harmonic) of another frequency band) may be utilized simultaneously, including uplink carrier aggregation (ULCA) or downlink carrier aggregation (DLCA) configurations or configurations in which uplink communications are at the third harmonic (or similar harmonic) of downlink communications or downlink communications are at the third harmonic (or similar harmonic) of uplink communications.

[0065] Controller 340 may detect conditions in the RF signal received from antenna 312, or receive information about carrier configuration from a higher level, such as a MAC layer or a network layer. Controller 340 may configure components of receiver circuit 300 to activate, deactivate, or control portions of receiver circuit 300 to process input RF signals. In some embodiments, controller 340 configures components to reduce interference between frequency bands within receiver circuit 300. In some embodiments, controller 340 may configure resistance values ​​in one or more processing paths of mixers within downconverters 330A, 330B, and 330C.

[0066] Figure 3B is a block diagram illustrating a block diagram of an example transmitter system 350 according to one or more aspects. As further discussed herein, the transmitter system 350 can be configured to transmit signals in accordance with carrier aggregation, such as uplink carrier aggregation (ULCA). In carrier aggregation, a collection of carriers can be used to simultaneously transmit data to one or more remote wireless devices. In addition, the transmitter system 350 includes a feedback receiver to measure and tune a set of transmit chains used to transmit data modulated carriers in accordance with carrier aggregation.

[0067] Specifically, the transmitter system 350 includes an integrated circuit (IC) 360, which may be implemented as a system on a chip (SOC). In this example, the IC 360 includes a first transmission chain, which includes a first digital pre-distortion (DPD) circuit 362-1, a first digital-to-analog converter (DAC) 364-1, a first local oscillator (LO) 370-1, a first up-conversion mixer 366-1, and a first driver amplifier (DA) 368-1 (also referred to as a preamplifier). Similarly, the IC 360 includes a second transmission chain, which includes a second DPD circuit 362-2, a second DAC 364-2, a second LO 370-2, a second up-conversion mixer 366-2, and a second DA 368-2. Although in this example, the IC 360 is shown as having two (2) transmission chains, it should be understood that the IC 360 may include more than two (2) transmission chains.

[0068] In this example, IC 360 includes a feedback receiver (FB RX) including an input stage, a low noise amplifier (LNA) 372, a down-conversion mixer 356, an analog-to-digital converter (ADC) 358, a measurement / tuning circuit 360, and a first set of switch devices SW1 to SW4. The measurement / tuning circuit 360 can be any processor-based circuit (e.g., a microprocessor, a microcontroller, a field programmable gate array, etc.), which can include an associated memory with instructions and / or a portion of firmware, etc.

[0069] Furthermore, according to this example, the transmitter system 350 may also include components external to the IC 360, such as a first power amplifier (PA) 361-1, a first directional coupler 382-1, and a first antenna (or antenna array) 384-1 associated with a first transmission chain. Similarly, external to the IC 360, the transmitter system 350 may also include a second PA 368-2, a second directional coupler 382-2, and a second antenna (or antenna array) 384-2 associated with a second transmission chain. Additionally, external to the IC 360, the transmitter system 350 includes a second set of switch devices SW5 to SW7. It should be understood that the division between components located within the IC 360 and components located external to the IC 360 may vary depending on design factors (and certain components of the IC 360 may be split between different ICs, such as the DPD circuit 362-2, which may be an IC different from the mixer 366-2). It should also be understood that transmitter system 350 may be implemented with discrete components (instead of IC 360 ) or with integrated components entirely within IC 360 .

[0070] Referring to the first transmit chain, a first digital data signal DTX1 is provided to an input of a first DPD circuit 362-1. The first DPD circuit 362-1 applies predistortion to the first digital data signal DTX1 based on a control signal from the measurement / tuning circuit 360 to generate a first predistorted digital signal DPX1. The first DAC 364-1 may receive the first predistorted digital signal DPX1 directly or via one or more components and convert the first predistorted digital signal DPX1 into a first predistorted analog signal VPX1. The first mixer 366-1 mixes the first predistorted analog signal VPX1 with a first LO signal VLO1 generated by the first LO 370-1 (up-converts the first predistorted analog signal VPX1) to generate a first radio frequency (RF) signal VRF1. It should be understood that in some systems, the first mixer 366-1 mixes the first predistortion analog signal VPX1 with the first LO signal VLO1 generated by the first LO 370-1 (up-converts the first predistortion analog signal VPX1) to generate a first intermediate frequency (IF), which can then be up-converted to an RF frequency at a subsequent transmitter stage. It should be understood that one or more filters can be associated with the first mixer 336-1 to substantially remove or suppress unwanted signal components from the first RF signal VRF1.

[0071] The first DA 368-1 amplifies the first RF signal VRF1 based on the control signal generated by the measurement / tuning circuit 360 to generate a first pre-amplified signal VDA1. The first PA 381-1 amplifies the first pre-amplified signal VDA1 based on the control signal generated by the measurement / tuning circuit 360 to generate a first transmit signal VTX1. The first transmit signal VTX1 is provided to the first antenna 384-1 via the first directional coupler to radiate the first transmit signal VTX1 into free space for wireless transmission to one or more remote devices. The first directional coupler then couples out a portion of the first transmit signal VTX1 to generate a first feedback signal VFB1 for measurement and tuning purposes, as discussed in more detail further herein.

[0072] Referring to the second transmit chain, the second digital data signal DTX2 is provided to the input of the second DPD circuit 362-2. The second DPD circuit 362-2 applies predistortion to the second digital data signal DTX2 based on the control signal from the measurement / tuning circuit 360 to generate a second predistorted digital signal DPX2. The second DAC 364-2 may receive the second predistorted digital signal DPX2 directly or via one or more components, and convert the second predistorted digital signal DPX2 into a second predistorted analog signal VPX2. The second mixer 366-2 mixes the second predistorted analog signal VPX2 with the second LO signal VLO2 generated by the second LO 370-2 (up-converts the second predistorted analog signal VPX2) to generate a second RF signal VRF2. It should be understood that one or more filters may be associated with the second mixer 336-2 to substantially remove or suppress unwanted signal components from the second RF signal VRF2.

[0073] The second DA 368-2 amplifies the second RF signal VRF2 based on the control signal generated by the measurement / tuning circuit 360 to generate a second pre-amplified signal VDA2. The second PA 381-2 amplifies the second pre-amplified signal VDA2 based on the control signal generated by the measurement / tuning circuit 360 to generate a second transmit signal VTX2. The second transmit signal VTX2 is provided to the second antenna 384-2 via the second directional coupler 382-2 to radiate the second transmit signal VTX2 into free space for wireless transmission to one or more remote devices. The second directional coupler 382-2 then couples out a portion of the second transmit signal VTX2 to generate a second feedback signal VFB2 for measurement and tuning purposes, as further discussed in more detail herein.

[0074] As discussed, the feedback receiver is used to tune the first transmit chain and the second transmit chain, including tuning the predistortion applied by the first DPD circuit 362-1 and the second DPD circuit 362-2, the gain of the first DA 368-1 and the second DA 368-2, and the gain of the first PA 381-1 and the second PA 381-2. For example, when the first transmit chain is to be tuned based on the first transmit signal VTX1, the measurement / tuning circuit 360 sets the switch devices SW1 and SW5 to their closed states, and sets the switch devices SW2, SW3, SW4, and SW6 to their open states. In addition, the measurement / tuning circuit 360 sets the switch device SW7 (which can be implemented as a single-pole double-throw (SPDT) switch) so that the switch device couples the switch device SW5 to the input of the FB RX input stage and decouples the switch device SW6 from the input of the FB RX input stage.

[0075] In this configuration, the first feedback signal VFB1 is provided to the input of the FB RX input stage as the input feedback signal VFBI via the switching devices SW5 and SW7. The FB RX input stage provides the input feedback signal VFBI with the desired passband, the desired impedance matching at the input of the LNA 372, the programmable signal attenuation, and the third harmonic suppression based on the control signal generated by the measurement / tuning circuit 360. Therefore, the FB RX input stage generates the output feedback signal VFBO based on the input feedback signal VFBI. The LNA 372 amplifies the output feedback signal VFBO to generate the amplified feedback signal VFBA. The mixer 356 mixes the amplified feedback signal VFBA with the first LO signal VLO1 received from the first LO 370-1 via the closed switching device SW1 (down-converts the amplified feedback signal VFBA) to generate the baseband feedback signal VFB. The ADC 358 converts the baseband feedback signal VFB into a digital feedback signal DFB. The measurement / tuning circuit 360 tunes the first transmit chain based on the digital feedback signal DFB.

[0076] The measurement / tuning circuit 360 processes the digital feedback signal DFB to measure the distortion present in the first transmit signal VTX1, and controls / tunes the first DPD circuit 362-1 to apply pre-distortion to the first digital data signal DTX1 to reduce the distortion in the first transmit signal VTX1. The measurement / tuning circuit 360 also processes the digital feedback signal DFB to determine the power level of the first transmit signal VTX1 to control / tune the gain of the first DA 368-1 and / or the first PA 381-1.

[0077] Alternatively or in addition, the first transmission chain may be tuned based on the first pre-amplified signal VDA1. In this regard, the measurement / tuning circuit 360 sets the switch devices SW1 and SW3 to their closed states and sets the switch devices SW2, SW4, SW5, and SW6 to their open states. Since the switch devices SW5 and SW6 are open, the measurement / tuning circuit 360 may set the switch device SW7 to any configuration, but setting it toward the first transmission chain may better reduce signal leakage from the second transmission chain to the FB RX input stage. Based on the measurement, the measurement / tuning circuit 360 processes the digital feedback signal DFB to determine the power level of the first pre-amplified signal VDA1 to control / tune the gain of the first DA 368-1. The tuning of the second transmission chain may operate in a similar manner to the tuning of the first transmission chain, as discussed.

[0078] Figure 4A 4 is a circuit diagram illustrating an RF signal chain of a downconverter with a symmetrical load on a local oscillator (LO) signal according to one or more aspects of the present disclosure. The RF signal chain may receive a radio frequency (RF) signal at a capacitor 402. The RF signal may be a differential signal represented as a difference between two nodes. The differential signal is delivered to a first set 420 of mixers and a second set 440 of mixers. The first set 420 of mixers includes mixers 422, 424, 426, and 428, each of which is coupled to an oscillating signal input node to receive, for example, a local oscillator (LO) signal. The first set 420 of mixers outputs an output signal including a baseband (BB) signal. The first set 420 of mixers is coupled to the capacitor 402 via a first set of resistors 410. The first set of resistors 410 includes resistors 412, 414, 416, and 418 coupled to each of the mixers 422, 424, 426, and 428, respectively. One or more of resistors 412, 414, 416, and 418 may be variable resistors that may be controlled by a controller such as Figure 3A The resistors may be adjusted to control the current splitting of the RF signal into the mixers 422, 424, 426, and 428. The output signal from the first set 420 of mixers may be input to the baseband filter 404A.

[0079] Each variable resistor in the variable resistor of the resistor group may include two or more transistors that can be configured to provide different resistances. For example, the variable resistor 412 may include N parallel paths that can be individually activated or deactivated by individual bits of an N-bit codeword. In some embodiments, the variable resistor 412 may be controlled by a 7-bit code for activating one or more parallel paths of seven parallel paths including n-type metal oxide semiconductor (nMOS) transistors to provide multiple configurable resistances.

[0080] In an RF signal chain configured to output an I channel path baseband output and a Q channel path baseband output, the RF signal chain includes a second set of mixers 440 and a second set of resistors 430, such as Figure 4A As shown. Resistors 432, 434, 436, and 438 couple the RF signal from capacitor 402 to mixers 442, 444, 446, and 448, respectively. Resistors 432, 434, 436, and 438 may be variable resistors that may be controlled by a controller such as Figure 3A The controller 340 of the embodiment of the present invention is configured. The second set of mixers 440 outputs an output signal, including a baseband (BB) signal. The output signal from the second set of mixers 440 can be input to the baseband filter 404B.

[0081] Capacitor 402 is a shared capacitor C RF , so that each of the capacitors is shared between two sets of mixers. Figure 4A In the embodiment of the present invention, the shared capacitor 402 includes a first capacitor C RF and the second capacitor C RF , the first capacitor and the second capacitor are shared by the first set of mixers 420 and the second set of mixers 440, respectively (e.g., coupled between the oscillation input node and both the first set of mixers 420 and the second set of mixers 440, respectively). Sharing capacitor 402 between mixers in a set of mixers and between sets of mixers reduces the number of components in the RF signal chain, and thus reduces the die size of the RF signal chain and the cost of the die containing the RF signal chain. In certain embodiments where RRF1=RRF4 and RRF2=RRF3, if C RF If capacitor 402 is split between (i.e., not shared between) mixer sets 420, 440, e.g., to improve I / Q isolation, then the downconversion operation will need to be changed because the mixer currents flowing in the consecutive 45 phases may no longer be determined solely by the ratio of RRF1 to RRF2, but will depend on the impedances of the separate capacitors (e.g., CRFi and CRFq). The ratio of RRF1 to RRF2 may be configured to be a value between approximately 1 and 3.

[0082] Each mixer in the mixer sets 420 and 440 is operable to mix an RF signal with a local oscillator (LO) signal. Each LO signal is a periodic signal, such as a clock signal, having a different phase offset from the master clock signal. The phase offset is measured in degrees, where a 360-degree phase offset is equivalent to a 0-degree phase offset. Downconversion in an RF signal chain operating on a differential signal may have mixers that each receive a different pair of LO signals, where one of the pair of LO signals has a 180-degree phase offset relative to the other LO signal in the pair of LO signals. For example, mixer 422 may receive a first LO signal having a 315-degree phase offset and a second LO signal having a 135-degree phase offset. Each of the other mixers 424, 426, and 428 may receive a first LO signal and a second LO signal that differ in phase by 45 degrees from mixers 422, 424, and 426, respectively. For example, mixer 424 may receive a 0 degree phase offset LO signal and a 180 degree phase offset LO signal, mixer 426 may receive a 45 degree phase offset LO signal and a 225 degree phase offset LO signal, and mixer 428 may receive a 90 degree phase offset and a 270 degree phase offset. The second pair of mixers 440 may be similarly configured. For example, mixer 442 may receive a 45 degree phase offset LO signal and a 225 degree phase offset LO signal, mixer 444 may receive a 90 degree phase offset LO signal and a 270 degree phase offset LO signal, mixer 446 may receive a 135 degree phase offset LO signal and a 315 degree phase offset LO signal, and mixer 448 may receive a 180 degree phase offset LO signal and a 0 degree phase offset LO signal.

[0083] In some embodiments, resistor groups 410 and 430 may include configurable resistors for each mixer phase. For example, each of resistors 412, 414, 416, and 418 may be independently configurable to provide different resistances to mixers 422, 424, 426, and 428, respectively. For example, the RRF values ​​may be configured as RRF3=RRF2 and RRF4=RRF1.

[0084] In this and other embodiments of the present disclosure, the HRM scaling is independent of the source impedance and is based primarily or solely on the resistance ratio of RRF1 to RRF2. Such configurations may include a double balanced mixer (DBM) or a single balanced mixer (SBM). For purposes of explanation, the impedance of the RF port of each mixer is given by assuming that the mixer size is large enough so that the switch resistance (RSW) of the mixer switches is small and therefore observing that the impedance of each mixer's RF port is given by RRF+RSW+(2 / π 2)ZBB is given (which is roughly RRF because both RSW and ZBB are small compared to RRF), the equivalent circuit is modeled with the mixer idealized as a switch, where the baseband filter impedance is represented as ZBB. The current division during the active LO_315 operating phase for down-conversion operation is accomplished by two mixers activated by the LO_315 signal represented as closed switches, each of which has a different series resistance RRF1 and RRF2, respectively, and the other mixer is represented as an open switch. It is observed that the impedance of the active mixer includes RRF1 in parallel with RRF2. More specifically, the current (imix,lo_315) entering the mixer is:

[0085]

[0086] Where R s is the source impedance, and i s,RF is the source current. Similar current values ​​can be calculated for other active LO phases. For example, imix,lo_315 can be expressed as a fraction of the source current is,RF because the factor K in the formula does not change with the clock phase (because it depends only on the values ​​of Rs, RRF, and CRF). The currents flowing in the I channel path and the Q channel path of the RF signal chain (imix_i,lo_315 and imix_q,lo_315) can be calculated as:

[0087]

[0088] A similar calculation can be performed for the LO_0 operating phase, resulting in:

[0089]

[0090] With a shared capacitor at the input of the RF signal chain, the desired HRM ratio can therefore be independent of R s (source impedance), for example, to achieve an acceptable third harmonic rejection ratio (HRR3) suppression of at least 30-50dBc without calibration overhead. HRM operation is made possible even in the LNA bypass operation mode or mixer priority operation mode of the transceiver, but different resistor values ​​can be calibrated and selected for different operation modes. For example, the ratio of the current flowing in the I channel path and the Q channel path of the RF signal chain during LO_0 and LO_315 can be represented by a simple resistor ratio of RRF1 to RRF2. HRM gain scaling is the scaling of the current flowing in the mixer during different clock phases at a desired ratio. The above analysis shows that in the embodiments of the RF signal chain described herein, the ratio may depend primarily or solely on the resistor ratio (RRF1 / RRF2) and on the source impedance R SThe resulting current flowing through the RF signal chain drives the information contained in the RF signal through another circuit downstream in the RF signal chain, including a baseband processor.

[0091] In other embodiments, the RRF values ​​may not be limited to only two values, RRF1 and RRF2, such as to obtain independent tuning of the RRF2 and RRF3 values ​​to achieve higher HRR3 suppression. For example, with RRF1 = RRF4 = 230 ohms and RRF2 = RRF3 = 100 ohms, an HRR3 of 38.8 dBc may be achieved with an LO at 0.7 GHz, while with independent control of RRF1 = RRF4 = 240 ohms, RRF2 = 100 ohms, and RRF3 = 110 ohms, an HRR3 of 55.5 dBc may be achieved with the same LO at 0.7 GHz. For example, when RRF1=RRF4=170 ohms and RRF2=RRF3=100 ohms, an HRR3 of 37.4dBc can be achieved with the LO at 6 GHz, while with independent control of RRF1=RRF4=170 ohms, RRF2=100 ohms and RRF3=90 ohms, an HRR3 of 52.5dBc can be achieved with the same LO at 6 GHz.

[0092] Different control words may be used to configure the I RRF resistor group 410 and the Q RRF resistor group 430, which may provide an easy-to-implement passive analog hook technique to correct the frequency independent (FID) image rejection ratio (IRR). Any systematic offset between the I channel path and the Q channel path is likely to be invariant with the LO frequency and may be described as a frequency independent asymmetry, which may be attributed to a number of reasons, including different lengths of I channel path trace length and Q channel path trace length resulting in different routing resistances. This is in contrast to frequency dependent asymmetry, which may be attributed to differences in I and Q channel path routing inductance and capacitance that vary with frequency. Independent control of the I channel control word and the Q channel control word, which may be available in some embodiments of the present disclosure, allows for improvement of the FID image rejection ratio (IRR) by offsetting the I channel control word and the Q channel control word relative to each other.

[0093] In some embodiments, the value of the configurable resistor can be adjusted to provide sufficient isolation for operation with a 25% duty cycle local oscillator (LO) signal. At duty cycle values ​​where the LO phases are close to overlapping (e.g., within 5% of each other) or overlapping, the resistors in an appropriate resistance configuration provide sufficient isolation to provide harmonic suppression in the mixer. Placement of the resistors before each mixer and a configuration with appropriately high resistance values ​​provide limited isolation between LO phases, but the resistance values ​​can also be balanced against loss of signal path gain through the receiver circuit due to excessive resistance values. In some embodiments, the resistance values ​​are configured, for example, as a ratio of RRF2 / RRF1, within a range of values ​​1+sqrt(2)+ / -10%, depending on the operating band of the transceiver.

[0094] In some embodiments, the value of the resistor can be adjusted based on the operating frequency band of the transceiver. For example, Figure 3A The illustrated controller 340 may supply a first codeword to configure the first set of resistors 410 and a second codeword to configure the second set of resistors 430 based on information about the configuration of the base station or other wireless device from which the receiver circuit 300 is receiving transmissions.

[0095] Figure 4A The RF signal chain and other embodiments including features described herein can present symmetrical loading on the LO signal, which can improve LO RSB and HRR3 suppression. The symmetry is relative to the combined loading of the first plurality of mixers and the second plurality of mixers on the plurality of oscillating signals with respect to each of the plurality of oscillating signals. In some embodiments having eight (8) LO signals and four (4) double-balanced mixers for the I and Q sections, each of the eight (8) LO signals is input from both the I and Q sections to a corresponding double-balanced mixer of the four (4) double-balanced mixers.

[0096] Figure 4A The circuit implementation shown illustrates a mixer in a double balanced configuration. In some embodiments, the circuit can be configured as follows Figure 4B A single balanced mixer is shown.

[0097] Figure 4C 4 is a flow chart illustrating a method of operating an RF signal chain having a symmetrical load on a local oscillator (LO) signal according to one or more aspects of the present disclosure. The method 450 includes applying an oscillating signal to a mixer for down-conversion of an RF signal. At block 452, the method 450 includes applying a plurality of oscillating signals to a first plurality of mixers. Figure 4AIn an example embodiment of the present invention, block 452 may include applying the LO_315, LO_135, LO_0, LO_180, LO_45, LO_225, LO_90, and LO_270 signals in pairs to mixers 422, 424, 426, and 428, respectively. At block 454, method 450 includes applying the plurality of oscillating signals to a second plurality of mixers. Figure 4A In an example embodiment of , block 454 may include applying LO_45, LO_225, LO_90, LO_270, LO_135, LO_315, LO_180, and LO_0 signals in pairs to mixers 442, 444, 446, and 448, respectively. In some embodiments, the combined loading of the first plurality of mixers and the second plurality of mixers on the plurality of oscillating signals is symmetrical about each of the plurality of oscillating signals. In some embodiments having an I channel path and a Q channel path, the symmetry may include applying the same LO signal to an equal number of mixers in the I channel path and the Q channel path.

[0098] At block 456, the resistance of a first set of variable resistors coupled to the first plurality of mixers may be adjusted, and the resistance of a second set of variable resistors coupled to the second plurality of mixers may be adjusted. In some embodiments, the first and second sets of resistors may be adjusted by corresponding amounts such that a first resistor RRF1 coupled to a first mixer in the first plurality of mixers has the same value as a first resistor RRF1 coupled to a first mixer in the second plurality of mixers.

[0099] At block 458, a radio frequency (RF) input signal may be applied to the first plurality of mixers and the second plurality of mixers. Applying the RF input signal to the mixers while the mixers are active and receiving an oscillating signal causes the output of the mixers to be a down-converted signal containing the same information as the RF input signal. In some embodiments, the RF input signal is a signal received from an antenna, but the signal may be conditioned before being input to the mixers, such as by Figure 3A RFFE 310. In some embodiments, an RF input signal may be applied to multiple mixers via one or more shared capacitors.

[0100] At block 460, the down-converted signal output from the processing of block 458 is processed. For example, the down-converted signal may be processed by a baseband processor to determine the information content of the RF input signal. For another example, when the down-converted signal output from block 458 is an intermediate frequency (IF) signal, the IF signal may be further processed by an additional down-conversion mixer to obtain a baseband signal from which information may be extracted.

[0101] Figure 5is a block diagram illustrating a circuit layout of an RF signal chain with symmetrical loading on a local oscillator (LO) signal according to one or more aspects of the present disclosure. Figure 5 The shared capacitor not shown in FIG. 1 applies the RF input signal to the variable resistors RRF1, RRF2, RRF3, RRF4. The variable resistors RRF1, RRF2, RRF3, and RRF4 are coupled to the mixers 512, 514, 516, 518, 522, 524, 526, and 528. The mixers combine the input RF signal received through the variable resistors with the LO signal and output the down-converted signal onto the differential I and Q channel path output signals Q+, Q-, I+, and I-.

[0102] Mixers that receive the same phase-offset LO signal are paired together to improve the layout of the RF signal chain circuit. For example, mixer 512 (I path mixer) and mixer 514 (Q path mixer) are placed close to each other because both receive the LO_315 signal and the LO_135 signal generated by the LO generator 542 coupled through the buffer 532. Similarly, mixer 516 and mixer 518 are placed close to each other because both receive the LO_0 signal and the LO_180 signal generated by the LO generator 544 coupled through the buffer 534. In addition, mixer 522 and mixer 524 are placed close to each other because both receive the LO_45 signal and the LO_225 signal generated by the LO generator 546 coupled through the buffer 536. Likewise, mixer 526 and mixer 528 are placed in close proximity to each other because both receive the LO_90 signal and the LO_270 signal generated by LO generator 548 coupled through buffer 538 .

[0103] Placing the mixer pairs closely together can reduce the routing distance of the corresponding LO signals of the mixer pairs by allowing the corresponding LO generators to be placed closer to the mixer pairs. Placing the mixer pairs closely together can reduce the crossing of the routing of the corresponding LO signals of the mixer pairs by reducing the uneven capacitive coupling on the LO signals from the LO generators 542, 544, 546, and 548 to each mixer pair in the mixer pairs. Placing the mixers closely together can refer to the presence of mixers in the mixer pairs that are positioned adjacent to each other, with no other mixers between the mixers in the mixer pairs. For example, mixer 514 is adjacent to mixer 512, with no mixers in the straight path between mixer 514 and mixer 512. Placing the mixers closely together can refer to the presence of mixers in the mixer pairs that are positioned so that the LO signal of the mixer pair does not cross the routing of other LO signals of other mixer pairs. For example, the LO_315 and LO_135 signals of the mixer pair including mixers 512 and 514 do not cross paths with the LO_0 and LO_180 signals of the mixer pair including mixers 516 and 518. In some embodiments, Figure 5 The circuit layout can have Figure 6 The example implementation shown has interleaved (eg, alternating) I channel mixers and Q channel mixers.

[0104] Figure 6 is a block diagram illustrating a die diagram of an RF signal chain with symmetrical loading on a local oscillator (LO) signal according to one or more aspects of the present disclosure. Figure 6 The die 600 may correspond to Figure 5 Specific implementation of circuit 500 on a semiconductor die, such as on a silicon substrate. Resistors 602, 604, 606, 608, 610, 612, 614, and 616 may correspond to a first set of resistors RRF1_I, RRF2_I, RRF3_I, and RRF4_I for a first set of mixers and a second set of resistors RRF1_Q, RRF2_Q, RRF3_Q, and RRF4_Q for a second set of mixers. Die 600 includes mixers 622, 624, 626, 628, 630, 632, 634, and 636, which in some embodiments correspond to Figure 5Mixers 512, 514, 516, 518, 522, 524, 526, and 528. Traces couple resistors 602-616 to mixers 622-636 and mixers 622-636 to output Q+, Q-, I+, and I-. Die 600 illustrates an embodiment of the disclosed RF signal chain with a crossover IQ layout scheme, wherein the I channel mixers and the Q channel mixers alternate with each other. The I mixers cross each other within the Q mixers so that the I mixers are adjacent to the Q mixers. In some embodiments, the mixers adjacent to the I mixers are only Q mixers, and vice versa. For example, Q mixer 624 is adjacent to I mixer 622 and I mixer 626 on die 600. Crossover can reduce or minimize mismatches from LO and IF routing on die 600. The use of finite resistance values ​​in resistors 602-616 provides some degree of isolation between the I channel path and the Q channel path even though they are located spatially adjacent to each other, while still allowing for MOS-FET transistor implementations using the resistors.

[0105] The operations of method 450 may be performed by a UE (such as the one described above with reference to Figure 1 or Figure 2 The UE 115 or reference Figure 7 For example, example operations (also referred to as "blocks") of method 450 may enable UE 115 to support reconfiguration of resistance of a harmonic rejection mixer (HRM).

[0106] Figure 7 700 is a block diagram of an example UE 700 that supports reconfiguring the RF signal chain of a wireless radio device according to one or more aspects of the present disclosure. The UE 700 may be configured to perform operations, including blocks of the processes described with reference to the above methods. In some implementations, the UE 700 includes a block diagram of a UE 700 that supports reconfiguring the RF signal chain of a wireless radio device according to one or more aspects of the present disclosure. Figure 1 or Figure 2 1 and 115. For example, UE 700 includes a controller 780 that operates to execute logic or computer instructions stored in a memory 782 and controls components of UE 700 that provide features and functionality of UE 700. UE 700 sends and receives signals via wireless radios 701a-r and antennas 752a-r under the control of controller 780. Wireless radios 701a-r include various components and hardware, such as Figure 2 As illustrated for UE 115, modulators and demodulators 254a-r, MIMO detector 256, receive processor 258, transmit processor 264, and TX MIMO processor 266 are included. Wireless radios 701a-r may also include one or more components such as Figure 3A , Figure 3B , Figure 4A , Figure 4B , Figure 5 or Figure 6 Receiver circuit with RF signal chain configured as shown.

[0107] As shown, the memory 782 may include information 702, logic 703, a component 704 for determining a carrier aggregation configuration, a component 705 for determining a resistance value, and / or a component 706 for configuring a wireless radio. The information 702 may be configured to include, for example, component values ​​corresponding to an active frequency set and / or a carrier aggregation set. The logic 703 may be configured to process the information 702, update the information 702, generate new configuration data for the information 702, and / or store information about the current operating mode, such as the allocated DL grant and / or BWP. The component 704 for determining the RF signal configuration may be configured to receive information from the wireless radio 701a-r, from the controller 780, and / or from the information 702 to determine the active frequency in the signal received by the UE 700. The component 705 for determining the resistance value may be configured to determine the resistance value of the resistor group based on the determined wireless radio configuration from the block 704. For example, the block 705 may use the configuration determined by the block 705 as an index to the lookup table stored in the information 702 to obtain appropriate information from the lookup table. Component 706 for configuring the wireless radio may use the value determined by block 705 to change the configuration of one or more of the wireless radios 701a-r, such as through controller 780. In some embodiments, some of the wireless radios 701a-r may be configured for mmWave operation and other of the wireless radios 701a-r may be configured for sub-6 GHz operation. UE 700 may receive a request from one or more network entities such as Figure 1 or Figure 2 Base station 105 or Figure 8 The illustrated base station receives signals or sends signals to one or more network entities.

[0108] Figure 8 is a block diagram of an example base station 800 that supports reconfiguring the RF signal chain of a wireless radio device according to one or more aspects of the present disclosure. The base station 800 may be configured to perform operations including reference Figure 4B In some implementations, the base station 800 includes a reference Figure 1 or Figure 2The structure, hardware, and components shown and described for base station 105 of the present invention are shown and described for base station 105 of the present invention. For example, base station 800 may include controller 240 that operates to execute logic or computer instructions stored in memory 242 and control components of base station 800 that provide features and functionality of base station 800. Base station 800 transmits and receives signals via wireless radios 801a-t and antennas 834a-t under the control of controller 240. Wireless radios 801a-t include various components and hardware, such as those described in Figure 2 105, including modulators and demodulators 232a-t, a transmit processor 220, a TX MIMO processor 230, a MIMO detector 236, and a receive processor 238. The wireless radio 801a-r may also include one or more of the following: Figure 3A , Figure 3B , Figure 4A , Figure 4B , Figure 5 or Figure 6 Receiver circuit with RF signal chain configured as shown.

[0109] As shown, the memory 882 may include information 802, logic 803, a component 804 for determining a carrier aggregation configuration, a component 805 for determining a resistance value, and / or a component 806 for configuring a wireless radio. The information 802 may be configured to include, for example, component values ​​corresponding to an active frequency set and / or a carrier aggregation set. The logic 803 may be configured to process the information 802, update the information 802, generate new configuration data for the information 802, and / or store information about the current operating mode, such as an allocated DL grant and / or BWP. The component 804 for determining carrier aggregation may be configured to receive information from the wireless radio 801a-r, from the controller 880, and / or from the information 802 to determine the active frequency in the carrier aggregation configuration for the BS 800. The component 806 for configuring the wireless radio may use the value determined by the block 805 to change the configuration of one or more of the wireless radios 801a-r, such as through the controller 880. In some embodiments, some of the wireless radios 801a-r may be configured for mmWave operation and other of the wireless radios 801a-r may be configured for sub-6 GHz operation. The component 805 for determining the resistance value may use information about the physical location of some of the wireless radios 801a-r relative to other wireless radios 810a-r to determine the degenerate component value. For example, the proximity of a mmWave wireless radio and a sub-6 GHz wireless radio may be used to determine whether interference may be generated between two frequency bands being processed by the wireless radios 801a-r. The base station 800 may receive information from one or more UEs such as Figure 1 or Figure 2 UE 115 or Figure 7 The UE 700 receives a signal or sends a signal to one or more UEs.

[0110] In one or more aspects, a technique for supporting wireless communications such as over multiple frequency bands may include additional aspects, such as any single aspect or any combination of aspects described below or in combination with one or more other processes or devices described elsewhere herein. In a first aspect, supporting wireless communications may include a device having a down-conversion mixer, such as a harmonic rejection mixer (HRM). Additionally, the device may be performed or operated according to one or more aspects as described below. In some implementations, the device includes a wireless device, such as a UE or a base station (BS). In some implementations, the device may include at least one processor, and a memory coupled to the processor. The processor may be configured to perform operations described herein with respect to the device, including operations described herein with respect to a method for operating a wireless device. In some other implementations, the device may include a non-transitory computer-readable medium having a program code recorded thereon, and the program code may be executable by a computer for causing the computer to perform operations described herein with reference to the device. In some implementations, the device may include one or more components configured to perform operations described herein. In some implementations, a method of wireless communication may include one or more operations described herein with reference to the device.

[0111] In a first aspect, supporting wireless communication may include an apparatus configured to process RF signals received from and / or delivered to an antenna. The apparatus includes: a radio frequency (RF) input node for receiving antenna signals; a plurality of oscillating signal input nodes, the plurality of oscillating signal input nodes configured to receive a plurality of oscillating signals, wherein each of the plurality of oscillating signals is out of phase with other of the plurality of oscillating signals; a first plurality of mixers, wherein each of the first plurality of mixers is coupled to two of the plurality of oscillating signals that are 180 degrees apart in phase; a second plurality of mixers, wherein each of the second plurality of mixers is coupled to two of the plurality of oscillating signals that are 180 degrees apart in phase, wherein a combined load of the first plurality of mixers and the second plurality of mixers on the plurality of oscillating signals is symmetrical about each of the plurality of oscillating signals; and a capacitor coupling the RF input node to the first plurality of mixers and the second plurality of mixers.

[0112] In a second aspect, in combination with the first aspect, the apparatus further comprises: a first configurable resistor coupled between the first plurality of mixers and the capacitor; and a second configurable resistor coupled between the second plurality of mixers and the capacitor.

[0113] In a third aspect, in combination with one or more of the first aspect or the second aspect, the first configurable resistor includes a first plurality of configurable resistors, at least one configurable resistor of the first plurality of configurable resistors being coupled between each mixer of the first plurality of mixers and the capacitor.

[0114] In a fourth aspect, in combination with one or more of the first to third aspects, the second configurable resistor includes a second plurality of configurable resistors, at least one configurable resistor of the second plurality of configurable resistors being coupled between each mixer of the second plurality of mixers and the capacitor.

[0115] In a fifth aspect, in combination with one or more of the first to fourth aspects, the device also includes a controller, which is coupled to the first configurable resistor and the second configurable resistor and is configured to adjust the first configurable resistor and the second configurable resistor based on a frequency band configuration of the antenna signal.

[0116] In a sixth aspect, in combination with one or more of the first to fifth aspects, the device also includes a controller coupled to the first configurable resistor and the second configurable resistor, wherein the controller is configured to adjust the first plurality of configurable resistors and the second plurality of configurable resistors to set a ratio of a first current passing through the first configurable resistor to an active mixer among the first plurality of mixers to a second current passing through the second configurable resistor to an active mixer among the second plurality of mixers, wherein the controller is configured to set the ratio to between 1 and 3.

[0117] In a seventh aspect, in combination with one or more of the first to sixth aspects, the device also includes a configurable RF front end (RFFE), which is coupled between the antenna and the RF input node, the configurable RFFE includes an LNA circuit and a bypass circuit path bypassing the LNA circuit, the configurable RFFE has multiple modes with different source impedances, and the controller is configured to control the first configurable resistor and the second configurable resistor independently of controlling the mode of the configurable RFFE.

[0118] In an eighth aspect, in combination with one or more of the first to seventh aspects, the apparatus further comprises at least one LO driver configured to generate the plurality of oscillation signals, wherein the at least one LO driver is configured to generate an oscillation signal having a 25% duty cycle for the plurality of oscillation signals.

[0119] In a ninth aspect, in combination with one or more of the first to eighth aspects, the first plurality of mixers and the second plurality of mixers are arranged so that a first mixer in the first plurality of mixers coupled to a first oscillating signal in the plurality of oscillation signals is adjacent to a second mixer in the second plurality of mixers coupled to the first oscillating signal in the plurality of oscillation signals.

[0120] In the tenth aspect, in combination with one or more of the first to ninth aspects, the first plurality of mixers are configured to output an I channel baseband signal corresponding to the antenna signal; and the second plurality of mixers are configured to output a Q channel baseband signal corresponding to the antenna signal.

[0121] In an eleventh aspect, in combination with one or more of the first to tenth aspects, the device further comprises: a first plurality of configurable resistors, the first plurality of configurable resistors being coupled between the first plurality of mixers and the capacitor, at least one of the first plurality of configurable resistors being coupled between each mixer in the first plurality of mixers and the capacitor; and a second plurality of configurable resistors, the second plurality of configurable resistors being coupled between the second plurality of mixers and the capacitor, at least one of the second plurality of configurable resistors being coupled between each mixer in the second plurality of mixers and the capacitor, wherein a first combined resistance of the following resistors: the first configurable resistor and the second configurable resistor, the first configurable resistor A configurable resistor is coupled to a first mixer among the first plurality of mixers configured to receive a first oscillating signal having a first phase among the plurality of oscillating signals, and a second configurable resistor is coupled to a first mixer among the second plurality of mixers configured to receive a second oscillating signal having the first phase, and has a value substantially the same as a second combined resistance of: a third configurable resistor and a fourth configurable resistor, the third configurable resistor being coupled to a second mixer among the first plurality of mixers configured to receive a third oscillating signal having a second phase among the plurality of oscillating signals, and the fourth configurable resistor being coupled to a second mixer among the second plurality of mixers configured to receive a fourth oscillating signal having the second phase.

[0122] In a twelfth aspect, in combination with one or more of the first to eleventh aspects, a combined load on each oscillation signal is four transistors, the four transistors including two transistors of a first mixer in the first plurality of mixers and two transistors of a second mixer in the second plurality of mixers.

[0123] In a thirteenth aspect, in combination with one or more of the first to twelfth aspects, a method for performing wireless communication includes: applying a radio frequency (RF) input signal to a first plurality of mixers and a second plurality of mixers through a shared capacitor; applying a plurality of oscillation signals to the first plurality of mixers, wherein each mixer of the first plurality of mixers is coupled to two of the plurality of oscillation signals that are 180 degrees apart in phase; and applying the plurality of oscillation signals to a second plurality of mixers, wherein each mixer of the second plurality of mixers is coupled to two of the plurality of oscillation signals that are 180 degrees apart in phase, wherein a combined load of the first plurality of mixers and the second plurality of mixers on the plurality of oscillation signals is symmetrical with respect to each of the plurality of oscillation signals.

[0124] In a fourteenth aspect, in combination with one or more of the first to thirteenth aspects, the method includes: applying a first configurable resistor between the shared capacitor and the first plurality of mixers; and applying a second configurable resistor between the shared capacitor and the second plurality of mixers.

[0125] In the fifteenth aspect, in combination with one or more of the first to fourteenth aspects, applying the first configurable resistor includes applying a first plurality of configurable resistors between the shared capacitor and the first plurality of mixers, and applying the second configurable resistor includes applying a second plurality of configurable resistors between the shared capacitor and the second plurality of mixers.

[0126] In a sixteenth aspect, in combination with one or more of the first to fifteenth aspects, the method further comprises controlling the first and second configurable resistors based on a frequency band configuration of an antenna receiving the RF input signal.

[0127] In the seventeenth aspect, in combination with one or more of the first to sixteenth aspects, controlling the first plurality of configurable resistors and the second plurality of configurable resistors includes: adjusting the first plurality of configurable resistors and the second plurality of configurable resistors to set a ratio of a first current passing through the first configurable resistor to an active mixer among the first plurality of mixers to a second current passing through the second configurable resistor to an active mixer among the second plurality of mixers, wherein the ratio is between 1 and 3.

[0128] In an eighteenth aspect, in combination with one or more of the first to seventeenth aspects, controlling the first plurality of configurable resistors and the second plurality of configurable resistors includes providing resistance scaling of the RF input signal independent of a source impedance of the RF input signal.

[0129] In a nineteenth aspect, in combination with one or more of aspects one to eighteen, the method further includes controlling a radio frequency front end (RFFE) to operate in one of a plurality of modes, wherein control of the first plurality of configurable resistors and the second plurality of configurable resistors is independent of control of the mode of the RFFE.

[0130] In a twentieth aspect, in combination with one or more of the first to nineteenth aspects, the plurality of modes include a mixer priority mode and an LNA bypass mode.

[0131] In a twenty-first aspect, in combination with one or more of the first to twentieth aspects, a combined load on each oscillation signal is four transistors, the four transistors comprising two transistors of a first mixer among the first plurality of mixers and two transistors of a second mixer among the second plurality of mixers.

[0132] In the twenty-second aspect, in combination with one or more of the first to twenty-first aspects, the method further includes: generating an I channel baseband signal based on the first plurality of mixers; and generating a Q channel baseband signal based on the second plurality of mixers.

[0133] In a twenty-third aspect, in combination with one or more of the first to twenty-second aspects, an apparatus for wireless communication includes: a radio frequency (RF) input node, the radio frequency (RF) input node being configured to receive an RF input signal; at least four first mixer circuits, the at least four first mixer circuits being coupled between the RF input node and an in-phase output node, each of the at least four first mixer circuits being configured to receive the RF input signal and being configured to receive two local oscillator (LO) signals of a plurality of LO signals, wherein each of the plurality of LO signals is out of phase with respect to other LO signals of the plurality of LO signals, and wherein the two LO signals are 180 degrees apart in phase; and at least four second mixer circuits, the at least four first mixer circuits being coupled between the RF input node and an in-phase output node. Four second mixer circuits are coupled between the RF input node and the quadrature output node, each of the at least four second mixer circuits being configured to receive the RF input signal and configured to receive two of the plurality of LO signals, wherein the two LO signals are 180 degrees apart in phase; a capacitor coupled between the RF input node and each of the at least four first mixer circuits and each of the at least four second mixer circuits; a first plurality of resistors coupled between the capacitors and the at least four first mixer circuits; and a second plurality of resistors coupled between the capacitors and the at least four second mixer circuits.

[0134] In a twenty-fourth aspect, in combination with one or more of the first to twenty-third aspects, a ratio of resistances in the first plurality of resistors and the second plurality of resistors is configured such that input currents to the at least four first mixer circuits and the at least four second mixer circuits do not change between phases of the plurality of LO signals.

[0135] In a twenty-fifth aspect, in combination with one or more of the first to twenty-fourth aspects, the apparatus further comprises a circuit coupled between an antenna and the RF input node, the circuit comprising an LNA circuit and a bypass circuit path that bypasses the LNA circuit.

[0136] In a twenty-sixth aspect, in combination with one or more of the first to twenty-fifth aspects, a combined load of the at least four first mixer circuits and the at least four second mixer circuits on the plurality of LO signals is symmetrical with respect to each of the plurality of LO signals.

[0137] In a twenty-seventh aspect, in combination with one or more of the first to twenty-sixth aspects, the at least four first mixer circuits and the at least four second mixer circuits are arranged so that a first mixer in the at least four first mixer circuits coupled to a first LO signal among the multiple LO signals is adjacent to a second mixer in the at least four second mixer circuits coupled to the first LO signal among the multiple LO signals.

[0138] In a twenty-eighth aspect, in combination with one or more of the first to twenty-seventh aspects, a harmonic rejection mixer (HRM) comprises: a radio frequency (RF) input; a first set of in-phase mixers; a second set of quadrature-phase mixers; a second set of two IF outputs; wherein each of the two RF input nodes of each of the second set of four (4) double-balanced mixers is coupled to the RF input via a different resistor of the second set of eight (8) configurable resistors, and wherein each of the two LO input nodes of each of the second set of four (4) double-balanced mixers is coupled via a different LO phase of the eight (8) LO phases, wherein each of the second set of two IF outputs is coupled to the four (4) double-balanced mixers; a first set of eight (8) configurable resistors coupled to a first RF input node of a corresponding double balanced mixer in the first set of the four (4) double balanced mixers supplied with a first phase of the eight (8) LO phases is configured differently from a resistance value of a corresponding resistor in a second set of the eight (8) resistors coupled to a second RF input node of a corresponding double balanced mixer in the second set of the four (4) double balanced mixers supplied with a second phase of the same eight (8) LO phases, wherein the first phase of the eight (8) LO phases and the second phase of the same eight (8) LO phases are consecutive phases from the eight (8) LO phases. The first set of in-phase mixers may include: a first set of eight (8) configurable resistors; a first set of four (4) double balanced mixers, each double balanced mixer including two RF input nodes, two local oscillator (LO) input nodes and two intermediate frequency (IF) output nodes; a first set of two IF outputs; wherein each of the two RF input nodes of each double balanced mixer in the first set of four (4) double balanced mixers is coupled to the RF input via a different resistor in the first set of eight (8) configurable resistors, wherein each of the two LO input nodes of each double balanced mixer in the first set of four (4) double balanced mixers is supplied with a different LO phase in eight (8) LO phases, and wherein each IF output in the first set of two IF outputs is coupled to a different IF output node in the two IF output nodes of all the double balanced mixers in the first set of four (4) double balanced mixers.The second set of quadrature-phase mixers includes: a second set of eight (8) configurable resistors; and a second set of four (4) double-balanced mixers, each double-balanced mixer including two RF input nodes, two LO input nodes, and two IF output nodes.

[0139] In a twenty-ninth aspect, in combination with one or more of the first to twenty-eight aspects, the HRM also includes a capacitor coupled between the RF input and each mixer in the first set of the in-phase mixers and the second set of the quadrature-phase mixers, wherein a ratio of resistances in the first set of eight (8) configurable resistors and the second set of eight (8) configurable resistors is configured such that input currents to the first set of four (4) double-balanced mixers and the second set of four (4) double-balanced mixers do not change between phases in the eight (8) LO phases.

[0140] In a thirtieth aspect, in combination with one or more of the first to twenty-ninth aspects, the HRM further comprises a circuit coupled between the antenna and the RF input, the circuit comprising an LNA circuit and a bypass circuit path bypassing the LNA circuit.

[0141] In the thirty-first aspect, in combination with one or more of the first to thirtieth aspects, the combined loading of the first set of four (4) double-balanced mixers and the second set of four (4) double-balanced mixers on the multiple LO signals is symmetrical with respect to each of the eight (8) LO phases.

[0142] In a thirty-second aspect, in combination with one or more of the first to thirty-first aspects, the first set of four (4) double balanced mixers and the second set of four (4) double balanced mixers are arranged such that a first mixer in the first set of four (4) double balanced mixers coupled to a first LO phase among the eight (8) LO phases is adjacent to a second mixer in the second set of four (4) double balanced mixers coupled to the first LO phase among the eight (8) LO phases.

[0143] It should be understood by those skilled in the art that any of a variety of different technologies and techniques may be used to represent information and signals. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be mentioned throughout the above description may be represented by voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or optical particles, or any combination thereof.

[0144] This article is about Figures 1 to 8The components, functional blocks and modules include processors, electronic devices, hardware devices, electronic components, logic circuits, memories, software codes, firmware codes, etc., or any combination thereof. Software should be broadly interpreted as meaning instructions, instruction sets, codes, code segments, program codes, programs, subroutines, software modules, applications, software applications, software packages, routines, subroutines, objects, executables, threads of execution, procedures, and / or functions, etc., whether referred to as software, firmware, middleware, microcode, hardware description language, or other terms. In addition, the features discussed herein may be implemented via dedicated processor circuits, via executable instructions, or a combination thereof.

[0145] It should be understood by those skilled in the art that: Figure 3A (or Figure 3B )and Figure 4A or Figure 4B One or more blocks (or operations) described herein may be combined with one or more blocks (or operations) described in another figure in the reference figure. Figure 3A One or more boxes (or operations) of Figure 1 One or more boxes (or operations) of . Figure 4A or Figure 4B One or more boxes associated with Figure 1 One or more associated boxes (or operations) are combined. Additionally or alternatively, the above reference Figures 1 to 4B The one or more operations described may be referred to Figures 5 to 8 One or more combinations of the above operations.

[0146] It should also be appreciated by those of ordinary skill in the art that the various illustrative logic boxes, modules, circuits, and algorithmic steps described in conjunction with the disclosure herein can all be implemented as electronic hardware, computer software, or a combination of the two. In order to clearly illustrate this interchangeability of hardware and software, various illustrative components, boxes, modules, circuits, and steps have been generally described in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints proposed for the entire system. Those skilled in the art can implement the described functions in different ways for each specific application, but such specific implementation decisions should not be interpreted as causing departure from the scope of the present disclosure. The technician will also easily recognize that the order or combination of components, methods, or interactions described herein are merely examples, and the components, methods, or interactions of various aspects of the present disclosure can be combined or performed in a manner other than the manner illustrated and described herein.

[0147] The various illustrative logical components, logic blocks, modules, circuits, and algorithmic processes described in conjunction with the specific implementations disclosed herein may be implemented as electronic hardware, computer software, or a combination of the two. The interchangeability of hardware and software has been generally described in terms of functionality and is illustrated in the various illustrative components, blocks, modules, circuits, and processes described above. Whether such functionality is implemented in hardware or software depends on the specific application and the design constraints imposed on the overall system.

[0148] The hardware and data processing devices for implementing the various exemplary logics, logic blocks, modules and circuits described in conjunction with the various aspects disclosed herein may be implemented or executed using a general purpose single-chip or multi-chip processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic component, a discrete hardware component or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, or any conventional processor, controller, microcontroller, or state machine. In some specific implementations, a processor may be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in combination with a DSP core, or any other such configuration. In some specific implementations, specific processes and methods may be performed by circuits specific to a given function.

[0149] In one or more aspects, the functions described may be implemented in hardware, digital electronic circuitry, computer software, firmware, including the structures disclosed in this specification and their structural equivalents, or any combination thereof. Specific implementations of the subject matter described in this specification may also be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on computer storage media for execution by data processing apparatus or for controlling the operation of data processing apparatus.

[0150] If implemented in software, the function may be stored as one or more instructions or codes on a computer-readable medium or sent via a computer-readable medium. The process of the method or algorithm disclosed herein may be implemented in a processor executable software module that may reside on a computer-readable medium. Computer-readable media include both computer storage media and communication media, and the communication media include any medium that can be implemented to transfer a computer program from one place to another. The storage medium may be any available medium that a computer can access. As an example and not limitation, such computer-readable media may include random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), CD-ROM or other optical disk storage devices, magnetic disk storage devices or other magnetic storage devices, or any other medium that can be used to store the required program code in the form of an instruction or data structure and can be accessed by a computer. In addition, any connection may be appropriately referred to as a computer-readable medium. Disks and optical disks as used herein include compact disks (CDs), laser disks, optical disks, digital versatile disks (DVDs), floppy disks, and blue-ray disks, wherein disks generally reproduce data magnetically, and optical disks reproduce data optically with lasers. The above combination should also be included in the scope of computer-readable media. Additionally, the operations of a method or algorithm may reside as a code and instruction set, or any combination of code and instruction sets, on a machine-readable medium or computer-readable medium, which may be incorporated into a computer program product.

[0151] Various modifications to the specific implementations described in this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to some other specific implementations without departing from the spirit or scope of the disclosure. Therefore, the claims are not intended to be limited to the specific implementations shown herein, but are to be consistent with the broadest scope consistent with the disclosure, the principles and novel features disclosed herein.

[0152] In addition, one of ordinary skill in the art will readily recognize that, for ease of describing the drawings, opposing terms such as "upper" and "lower" or "front" and "back" or "top" and "bottom" are sometimes used and indicate relative positions corresponding to the orientation of the drawings on a correctly oriented page, and may not reflect the correct orientation of any device as implemented.

[0153] Certain features described in this specification in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented in multiple implementations, either individually or in any suitable subcombination. Furthermore, while features may be described above as functioning in certain combinations and even initially claimed as such, one or more features from a claimed combination may in some cases be removed from the combination, and a claimed combination may be directed to subcombinations or variations of subcombinations.

[0154] Similarly, although the operations are depicted in a specific order in the accompanying drawings, this should not be understood as requiring such operations to be performed in the specific order shown or in a sequential order, or to perform all illustrated operations to achieve the desired result. In addition, the accompanying drawings may schematically depict one or more example processes in the form of a flow chart. However, other operations that are not depicted may be combined in the schematically illustrated example process. For example, one or more additional operations may be performed before, after, simultaneously or between any illustrated operations. In some environments, multitasking and parallel processing are advantageous. In addition, the separation of various system components in the specific implementation described above should not be understood as requiring such separation in all specific implementations, and it should be understood that the program components and systems described can generally be integrated together in a single software product or packaged into multiple software products. Additionally, some other specific implementations also fall within the scope of the appended claims. In some cases, the actions described in the claims can be performed in different orders and still achieve the desired result.

[0155] As used herein, including in the claims, the term "or" used in a list of two or more items means that any of the listed items may be employed alone, or any combination of two or more of the listed items may be employed. For example, if a composition is described as containing components A, B, or C, the composition may contain A alone; B alone; C alone; A and B combined; A and C combined; B and C combined; or A, B, and C combined. In addition, as used herein, including in the claims, "or" as used in a list of items beginning with "at least one" indicates a separate list, so that, for example, a list of "at least one of A, B, or C" means A or B or C or AB or AC or BC or ABC (i.e., A and B and C) or any combination of any of these. The term "substantially" is defined as to a large extent, but not necessarily entirely, what is specified (and includes what is specified; for example, substantially 90 degrees includes 90 degrees, and substantially parallel includes parallel), as understood by one of ordinary skill in the art. In any disclosed implementation, the term "substantially" may be replaced with "within [percent] of" a specified content, where the percentage includes 0.1%, 1%, 5%, or 10%.

[0156] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Therefore, the disclosure is not intended to be limited to the examples and designs described herein, but to be consistent with the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A device, comprising: A radio frequency (RF) input node, wherein the radio frequency (RF) input node is used to receive an antenna signal; a plurality of oscillating signal input nodes, the plurality of oscillating signal input nodes being configured to receive a plurality of oscillating signals, wherein each oscillating signal of the plurality of oscillating signals is out of phase with other oscillating signals of the plurality of oscillating signals; a first plurality of mixers, wherein each mixer of the first plurality of mixers is coupled to two oscillating signals of the plurality of oscillating signals that are 180 degrees apart in phase; a second plurality of mixers, wherein each mixer of the second plurality of mixers is coupled to two oscillating signals of the plurality of oscillating signals that are 180 degrees apart in phase, wherein a combined load of the first plurality of mixers and the second plurality of mixers on the plurality of oscillating signals is symmetrical about each of the plurality of oscillating signals; and A capacitor couples the RF input node to the first plurality of mixers and the second plurality of mixers.

2. The device according to claim 1, further comprising: a first configurable resistor coupled between the first plurality of mixers and the capacitor; and A second configurable resistor is coupled between the second plurality of mixers and the capacitor.

3. The device according to claim 2, wherein: The first configurable resistor includes a first plurality of configurable resistors, at least one configurable resistor of the first plurality of configurable resistors being coupled between each mixer of the first plurality of mixers and the capacitor, and The second configurable resistor includes a second plurality of configurable resistors, at least one configurable resistor of the second plurality of configurable resistors being coupled between each mixer of the second plurality of mixers and the capacitor.

4. The device according to claim 3, further comprising: A controller is coupled to the first configurable resistor and the second configurable resistor and is configured to adjust the first configurable resistor and the second configurable resistor based on a frequency band configuration of the antenna signal.

5. The apparatus of claim 3 , further comprising a controller coupled to the first configurable resistor and the second configurable resistor, wherein the controller is configured to adjust the first plurality of configurable resistors and the second plurality of configurable resistors to set a ratio of a first current through the first configurable resistor to an active mixer of the first plurality of mixers and a second current through the second configurable resistor to an active mixer of the second plurality of mixers, wherein the controller is configured to set the ratio to be between 1 and 3.

6. The device according to claim 5, further comprising: a configurable radio frequency front end (RFFE) coupled between an antenna and the RF input node, the configurable RFFE comprising an LNA circuit and a bypass circuit path bypassing the LNA circuit, the configurable RFFE having a plurality of modes with different source impedances, Wherein the controller is configured to control the first configurable resistor and the second configurable resistor independently of controlling a mode of the configurable RFFE. 7 . The apparatus of claim 1 , further comprising at least one LO driver configured to generate the plurality of oscillation signals, wherein the at least one LO driver is configured to generate an oscillation signal having a 25% duty cycle for the plurality of oscillation signals.

8. The apparatus of claim 1 , wherein the first plurality of mixers and the second plurality of mixers are arranged such that a first mixer of the first plurality of mixers coupled to a first oscillating signal of the plurality of oscillating signals is adjacent to a second mixer of the second plurality of mixers coupled to the first oscillating signal of the plurality of oscillating signals.

9. The device according to claim 1, wherein: The first plurality of mixers are configured to output an I-channel baseband signal corresponding to the antenna signal, and The second plurality of mixers are configured to output Q-channel baseband signals corresponding to the antenna signals.

10. The device according to claim 9, further comprising: a first plurality of configurable resistors coupled between the first plurality of mixers and the capacitor, at least one of the first plurality of configurable resistors coupled between each mixer of the first plurality of mixers and the capacitor; and a second plurality of configurable resistors coupled between the second plurality of mixers and the capacitor, at least one configurable resistor of the second plurality of configurable resistors coupled between each mixer of the second plurality of mixers and the capacitor, The first combination resistance of the following resistors: A first configurable resistor and a second configurable resistor, wherein the first configurable resistor is coupled to a first mixer among the first plurality of mixers configured to receive a first oscillating signal having a first phase among the plurality of oscillating signals, and the second configurable resistor is coupled to a first mixer among the second plurality of mixers configured to receive a second oscillating signal having the first phase. A second combined resistance having substantially the same value as the following resistances: a third configurable resistor and a fourth configurable resistor, the third configurable resistor being coupled to a second mixer among the first plurality of mixers configured to receive a third oscillating signal having a second phase among the plurality of oscillating signals, and the fourth configurable resistor being coupled to a second mixer among the second plurality of mixers configured to receive a fourth oscillating signal having the second phase.

11. A method comprising: applying a radio frequency (RF) input signal to a first plurality of mixers and a second plurality of mixers through a shared capacitor; applying a plurality of oscillating signals to the first plurality of mixers, wherein each mixer in the first plurality of mixers is coupled to two oscillating signals of the plurality of oscillating signals that are 180 degrees apart in phase; as well as applying the plurality of oscillating signals to a second plurality of mixers, wherein each mixer in the second plurality of mixers is coupled to two oscillating signals of the plurality of oscillating signals that are 180 degrees apart in phase, The combined loads of the first plurality of mixers and the second plurality of mixers on the plurality of oscillation signals are symmetrical with respect to each of the plurality of oscillation signals.

12. The method according to claim 11, applying a first configurable resistance between the shared capacitor and the first plurality of mixers; and A second configurable resistance is applied between the shared capacitor and the second plurality of mixers.

13. The method according to claim 12, wherein: applying the first configurable resistance includes applying a first plurality of configurable resistances between the shared capacitor and the first plurality of mixers, and Applying the second configurable resistance includes applying a second plurality of configurable resistances between the shared capacitor and the second plurality of mixers. 14 . The method of claim 13 , further comprising controlling the first and second configurable resistors based on a frequency band configuration of an antenna receiving the RF input signal.

15. The method of claim 14, wherein controlling the first plurality of configurable resistors and the second plurality of configurable resistors comprises: The first plurality of configurable resistors and the second plurality of configurable resistors are adjusted to set a ratio of a first current through the first configurable resistor to an active mixer of the first plurality of mixers and a second current through the second configurable resistor to an active mixer of the second plurality of mixers, wherein the ratio is between 1 and 3. 16 . The method of claim 14 , wherein controlling the first plurality of configurable resistors and the second plurality of configurable resistors comprises providing resistance scaling of the RF input signal independent of a source impedance of the RF input signal.

17. The method of claim 16, further comprising controlling a radio frequency front end (RFFE) to operate in one of a plurality of modes, wherein controlling the first plurality of configurable resistors and the second plurality of configurable resistors is independent of controlling the mode of the RFFE.

18. The method of claim 17, wherein the plurality of modes include a mixer priority mode and an LNA bypass mode.

19. The method of claim 11, wherein a combined load on each oscillating signal is four transistors, the four transistors comprising two transistors of a first mixer of the first plurality of mixers and two transistors of a second mixer of the second plurality of mixers.

20. The method according to claim 11, further comprising: generating an I channel baseband signal based on the first plurality of mixers; as well as A Q channel baseband signal is generated based on the second plurality of mixers.

21. A device, comprising: a radio frequency (RF) input node configured to receive an RF input signal; at least four first mixer circuits coupled between the RF input node and an in-phase output node, each of the at least four first mixer circuits configured to receive the RF input signal and configured to receive two local oscillator (LO) signals of a plurality of LO signals, wherein each LO signal of the plurality of LO signals is out of phase with respect to other LO signals of the plurality of LO signals, and wherein the two LO signals are 180 degrees apart in phase; at least four second mixer circuits coupled between the RF input node and the quadrature output node, each of the at least four second mixer circuits configured to receive the RF input signal and configured to receive two LO signals of the plurality of LO signals, wherein the two LO signals are 180 degrees apart in phase; a capacitor coupled between the RF input node and each of the at least four first mixer circuits and each of the at least four second mixer circuits; a first plurality of resistors coupled between the capacitor and the at least four first mixer circuits; and A second plurality of resistors is coupled between the capacitor and the at least four second mixer circuits.

22. The apparatus of claim 21 , wherein a ratio of resistances in the first plurality of resistors and the second plurality of resistors is configured such that input currents to the at least four first mixer circuits and the at least four second mixer circuits do not vary between phases of the plurality of LO signals.

23. The apparatus of claim 21, further comprising circuitry coupled between an antenna and the RF input node, the circuitry comprising an LNA circuit and a bypass circuit path that bypasses the LNA circuit.

24. The apparatus of claim 21, wherein a combined load of the at least four first mixer circuits and the at least four second mixer circuits on the plurality of LO signals is symmetric with respect to each of the plurality of LO signals.

25. The apparatus of claim 21 , wherein the at least four first mixer circuits and the at least four second mixer circuits are arranged such that a first mixer of the at least four first mixer circuits coupled to a first LO signal of the plurality of LO signals is adjacent to a second mixer of the at least four second mixer circuits coupled to the first LO signal of the plurality of LO signals.

26. A harmonic rejection mixer, comprising: Radio frequency (RF) input; A first set of in-phase mixers, the first set of in-phase mixers comprising: a first set of eight (8) configurable resistors; a first set of four (4) double-balanced mixers, each double-balanced mixer including two RF input nodes, two local oscillator (LO) input nodes, and two intermediate frequency (IF) output nodes; The first set of two IF outputs; wherein each of the two RF input nodes of each of the first set of four (4) double balanced mixers is coupled to the RF input via a different resistor of the first set of eight (8) configurable resistors, wherein each of the two LO input nodes of each double balanced mixer in the first set of four (4) double balanced mixers is supplied with a different LO phase out of eight (8) LO phases, and wherein each IF output of said first set of two IF outputs is coupled to a different IF output node of said two IF output nodes of all double balanced mixers of said first set of four (4) double balanced mixers; A second set of quadrature phase mixers, the second set of quadrature phase mixers comprising: a second set of eight (8) configurable resistors; and a second set of four (4) double balanced mixers, each double balanced mixer comprising two RF input nodes, two LO input nodes, and two IF output nodes; and a second set of two IF outputs; wherein each of the two RF input nodes of each double balanced mixer of the second set of four (4) double balanced mixers is coupled to the RF input via a different resistor of the second set of eight (8) configurable resistors, and wherein each of the two LO input nodes of each double balanced mixer in the second set of four (4) double balanced mixers is coupled via a different LO phase of the eight (8) LO phases, wherein each IF output of the second set of two IF outputs is coupled to a different IF output node of the two IF output nodes of all double balanced mixers in the second set of four (4) double balanced mixers, wherein a resistance value of at least one configurable resistor of a first set of eight (8) configurable resistors coupled to a first RF input node of a corresponding double balanced mixer of a first set of four (4) double balanced mixers supplied with a first phase of the eight (8) LO phases is configured differently from a resistance value of a corresponding resistor of a second set of eight (8) resistors coupled to a second RF input node of a corresponding double balanced mixer of a second set of four (4) double balanced mixers supplied with a second phase of the same eight (8) LO phases, Wherein said first phase of said eight (8) LO phases and said second phase of the same eight (8) LO phases are consecutive phases from said eight (8) LO phases.

27. The harmonic rejection mixer of claim 26, further comprising a capacitor coupled between the RF input and each mixer in the first set of in-phase mixers and the second set of quadrature-phase mixers, wherein a ratio of resistances in the first set of eight (8) configurable resistors and the second set of eight (8) configurable resistors are configured such that input currents to the first set of four (4) double-balanced mixers and the second set of four (4) double-balanced mixers do not vary between phases in the eight (8) LO phases.

28. The harmonic rejection mixer of claim 26, further comprising circuitry coupled between an antenna and the RF input, the circuitry comprising an LNA circuit and a bypass circuit path that bypasses the LNA circuit.

29. The harmonic rejection mixer of claim 26, wherein the first set of four (4) double balanced mixers and the second set of four (4) double balanced mixers are arranged such that a first mixer in the first set of four (4) double balanced mixers coupled to a first LO phase in the eight (8) LO phases is adjacent to a second mixer in the second set of four (4) double balanced mixers coupled to the first LO phase in the eight (8) LO phases.

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