Immediate Value Configuration Method, Device, Equipment and Storage Medium of Jump Instruction

Abstract

The present application provides a method, apparatus, electronic device, and computer-readable storage medium for configuring the immediate value of a jump instruction, including: when generating an instruction stream, generating a corresponding instruction address for each generated instruction; when the instruction belongs to a preset jump target instruction set, adding the instruction address of the instruction as a first address to a first address set; when the instruction is an immediate value type jump instruction, adding the instruction address of the instruction as a second address to a second address set; generating an immediate value for each immediate value type jump instruction corresponding to a second address in the second address set according to the first address set and the second address set. The entire process of the present application can be automated, reducing the dependence on human resources and improving the accuracy and efficiency of immediate value calculation.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technologies, and particularly to a method, an apparatus, an electronic device, and a computer-readable storage medium for configuring an immediate value of a jump instruction. Background Art

[0002] During the verification phase of a processor (CPU, Central Processing Unit) core, an instruction stream is generated by an instruction generator, and each instruction in the instruction stream is commonly used to verify the modules of the CPU.

[0003] During the verification process, the instruction stream usually includes immediate value type jump instructions. After generating the immediate value type jump instructions, calculate the jump addresses of the immediate value type jump instructions, and jump to the jump target instructions according to the jump addresses for execution. The related technologies have a need to control the immediate value type jump instructions to jump to specified jump target instructions. To meet this need, a manual method is adopted to separately determine the values of the immediate values that each immediate value type jump instruction should have.

[0004] However, the related technologies rely on manual implementation, resulting in low calculation accuracy and efficiency. Summary of the Invention

[0005] Embodiments of the present application provide a method, an apparatus, an electronic device, and a computer-readable storage medium for configuring an immediate value of a jump instruction to solve the problems in the related technologies.

[0006] In a first aspect, embodiments of the present application provide a method for configuring an immediate value of a jump instruction, the method including:

[0007] When generating an instruction stream, generate a corresponding instruction address for each generated instruction;

[0008] When the instruction belongs to a preset jump target instruction set, add the instruction address of the instruction as a first address to a first address set;

[0009] When the instruction is an immediate value type jump instruction, add the instruction address of the instruction as a second address to a second address set;

[0010] Generate an immediate value for each immediate value type jump instruction corresponding to a second address in the second address set according to the first address set and the second address set, so that when the immediate value type jump instruction is subsequently executed, based on the immediate value, jump to a jump target instruction in the jump target instruction set.

[0011] In a second aspect, embodiments of the present application provide an apparatus for configuring an immediate value of a jump instruction, the apparatus including:

[0012] A generation module, configured to generate a corresponding instruction address for each generated instruction when generating an instruction stream;

[0013] A first addition module, configured to, when the instruction belongs to a preset set of jump target instructions, add the instruction address of the instruction as a first address to a first address set;

[0014] A second addition module, configured to, when the instruction is an immediate number type jump instruction, add the instruction address of the instruction as a second address to a second address set;

[0015] An immediate number module, configured to generate an immediate number for each immediate number type jump instruction corresponding to a second address in the second address set according to the first address set and the second address set, so that when the immediate number type jump instruction is subsequently executed, based on the immediate number, jump to a jump target instruction in the set of jump target instructions.

[0016] In a third aspect, an embodiment of the present application further provides an electronic device, including a processor; a memory for storing executable instructions of the processor; wherein, the processor is configured to execute the instructions to implement the method of the first aspect.

[0017] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, when the instructions in the computer-readable storage medium are executed by a processor of an electronic device, enabling the electronic device to execute the method of the first aspect.

[0018] In an embodiment of the present application, during the process of generating an instruction stream, the generated instructions can be classified. If a jump target instruction is generated, the instruction address of the jump target instruction is added as a first address to a first address set; if an immediate number type jump instruction is generated, the instruction address of the immediate number type jump instruction is added as a second address to a second address set. Subsequently, based on the known second address set and first address set, the correct value of the immediate number in each immediate number type jump instruction can be inversely deduced and calculated. The value of this immediate number can meet the requirement that each immediate number type jump instruction can be directed to jump to a jump target instruction. The entire process of the present application can be automated, reducing the dependence on human resources and improving the accuracy and efficiency of immediate number calculation.

[0019] The above description is only an overview of the technical solution of the present application. In order to be able to understand the technical means of the present application more clearly, it can be implemented according to the content of the specification. And in order to make the above and other purposes, features and advantages of the present application more obvious and understandable, the following specifically illustrates the specific embodiments of the present application. Description of the Drawings

[0020] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0021] Figure 1 It is a flowchart of the steps of an immediate number configuration method for a jump instruction provided by an embodiment of the present application;

[0022] Figure 2 It is a specific flowchart of the steps of an immediate number configuration method for a jump instruction provided by an embodiment of the present application;

[0023] Figure 3 It is an implementation flowchart of an immediate number configuration method for a jump instruction provided by an embodiment of the present application;

[0024] Figure 4 It is a block diagram of an immediate number configuration device for a jump instruction provided by an embodiment of the present application;

[0025] Figure 5 It is a block diagram of a first electronic device provided by an embodiment of the present application;

[0026] Figure 6 It is a block diagram of a second electronic device in another embodiment of the present application. Detailed implementation manners

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of them. Based on the embodiments of the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0028] The terms "first", "second", etc. in the specification of this application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of this application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are usually of the same type, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" in the specification is used to describe the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist simultaneously, and B exists alone. The character " / " generally indicates that the associated objects before and after are in an "or" relationship. In the embodiments of this application, the term "multiple" refers to two or more, and other quantifiers are similar.

[0029] Figure 1 is a flowchart of the steps of an immediate value configuration method for a jump instruction provided by an embodiment of this application, as Figure 1 shown, the method may include:

[0030] Step 101, when generating an instruction stream, generate a corresponding instruction address for each generated instruction.

[0031] In the embodiments of this application, for the kernel verification of the CPU, an instruction stream needs to be generated by an instruction generator to simulate and verify the functions of the CPU by executing each instruction in the instruction stream. Each instruction in the instruction stream is an instruction in the instruction set of the processor. For example, it can be an addition instruction, a subtraction instruction, a write instruction, a read instruction, a jump instruction, and other instructions.

[0032] Among them, the instruction address of the instruction is the base address, which is the address allocated to the instruction during the generation of the instruction. The instruction address is used to indicate the storage location of the instruction in the memory. When executing a program, the CPU will use the program counter to store the instruction address of the next instruction to be executed.

[0033] Specifically, the instruction stream stores and maintains the included instructions in the memory in the order of the generation of the instructions, and sets a corresponding number for each instruction according to the generation order of each instruction, that is, the numbers of the instructions are also arranged in sequence. In addition, each instruction occupies a fixed-size bit width. Based on this characteristic, the embodiments of this application can determine the instruction address of the instruction based on the number of the instruction and the preset bit width, and implement the generation and maintenance of the instruction address of the instruction by the instruction stream.

[0034] Step 102, when the instruction belongs to a preset set of jump target instructions, add the instruction address of the instruction as the first address to the first address set.

[0035] In the embodiments of the present application, a jump target instruction refers to an instruction that an immediate number type jump instruction is expected to jump to based on verification requirements. For example, assuming that it is expected that an immediate number type jump instruction can jump to an addition instruction (ADD) for further execution when executed, then the addition instruction is the jump target instruction of the immediate number type jump instruction.

[0036] In the verification scenario of the embodiments of the present application, specifying a jump target instruction for an immediate number type jump instruction can increase the controllability and directivity of verification, enabling the verification requirements to be completed directionally.

[0037] It should be noted that a set of jump target instructions can be preset in advance according to verification requirements. When the instruction generated by the instruction stream is in the set of jump target instructions, the instruction can be used as the jump target instruction, and its instruction address can be added to the first address set as the first address, that is, the first address set stores the instruction addresses of the jump target instructions generated in the instruction stream.

[0038] Step 103: When the instruction is an immediate number type jump instruction, add the instruction address of the instruction to the second address set as the second address.

[0039] Exemplarily, the jump instruction generated in the instruction stream can be an immediate number type jump instruction, that is, a jump instruction with immediate number addressing. The jump address of the jump instruction is the sum of the instruction address of the jump instruction and the address offset. In an immediate number type jump instruction with immediate number addressing, the instruction includes an immediate number, and the immediate number is used to represent the address offset of the jump address. Additionally, in a jump instruction with register addressing, the jump instruction includes a register identifier and an immediate number, and the address stored in the register represented by the register identifier is the instruction address of the jump instruction.

[0040] In the embodiments of the present application, a set of immediate number type jump instructions can be preset in advance according to verification requirements. When the instruction generated by the instruction stream is in the set of immediate number type jump instructions, the instruction can be used as an immediate number type jump instruction, and its instruction address can be added to the second address set as the second address, that is, the second address set stores the instruction addresses of the immediate number type jump instructions generated in the instruction stream.

[0041] It should be noted that when it is determined that an instruction generated by the instruction stream is an immediate number type jump instruction, the immediate number of the instruction can be not assigned first, that is, the immediate number can be set to be empty first.

[0042] For example, assuming that a set of immediate number type jump instructions is preset in advance, including two immediate number type jump instructions {JPI, BRI}, then when the instruction generated by the subsequent instruction stream is a JPI instruction or a BRI instruction, it is confirmed that the generated instruction is an immediate number type jump instruction.

[0043] Step 104: Based on the first address set and the second address set, generate an immediate value for each immediate jump instruction corresponding to a second address in the second address set, so that when the immediate jump instruction is subsequently executed, based on the immediate value, jump to the jump target instruction in the jump target instruction set.

[0044] In the embodiment of the present application, the first address set stores the instruction addresses of the jump target instructions generated in the instruction stream, and the second address set stores the instruction addresses of the immediate jump instructions generated in the instruction stream. To meet the requirement that each immediate jump instruction can be directed to jump to the jump target instruction, the embodiment of the present application needs to assign a value to the immediate value of the immediate jump instruction, so that the immediate jump instruction can be directed to jump to the jump target instruction based on the instruction address and the assigned immediate value.

[0045] That is, the embodiment of the present application can inversely calculate the value of the immediate value in each immediate jump instruction based on the known second address set (the starting party of the jump) and the first address set (the destination party of the jump), so as to meet the requirement that each immediate jump instruction can be directed to jump to the jump target instruction.

[0046] In summary, in the embodiment of the present application, during the process of generating the instruction stream, the generated instructions can be classified. If a jump target instruction is generated, the instruction address of the jump target instruction is added to the first address set as the first address; if an immediate jump instruction is generated, the instruction address of the immediate jump instruction is added to the second address set as the second address. Subsequently, based on the known second address set and the first address set, the correct value of the immediate value in each immediate jump instruction can be inversely calculated, and the value of this immediate value can meet the requirement that each immediate jump instruction can be directed to jump to the jump target instruction. The entire process of the present application can be automated, reducing the dependence on human resources and improving the accuracy and efficiency of immediate value calculation.

[0047] Figure 2 is a specific step flowchart of a method for configuring the immediate value of a jump instruction provided by an embodiment of the present application, as Figure 2 shown, the method may include:

[0048] Step 201: Set a corresponding number for each instruction according to the generation order of each instruction.

[0049] Step 202: Calculate the instruction address of the instruction according to the number of the instruction and the preset bit width; the preset bit width is the occupied size of one instruction.

[0050] In the embodiments of the present application, for steps 201-202, during the process of generating an instruction stream, each time an instruction is generated, it can be numbered according to the generation order of the instruction, that is, the instructions in the instruction stream are arranged in the order of their numbers. On the basis of serving as an identifier for the instruction, the number of the instruction can also describe the generation order of the instruction. In addition, each instruction occupies a fixed-size bit width. Based on this characteristic, the embodiments of the present application can determine the instruction address of the instruction based on the product of the number of the instruction and the preset bit width, and realize the generation and maintenance of the instruction address of the instruction by the instruction stream.

[0051] For example, Table 1 below shows 20 instructions sequentially generated in an instruction stream:

[0052]

[0053] Table 1

[0054] In Table 1 above, the instruction stream randomly generates instructions from the following instruction set:

[0055] RAND_GEN_INST_SET = {ADD, SUB, MUL, DIV, SLLI, JPI, BRI};

[0056] Among them, the serial number is the number of the instruction, and the number of the instruction increases according to the generation order of the instruction, and the value increased each time is 1. For example, the number of the first generated instruction ADD is 1, the number of the second generated instruction MUL is 2, and the number of the third generated instruction JPL is 3... In addition, in the instruction stream containing 20 instructions, the addresses of two adjacent instructions differ by 4, which is preset before generating the instruction stream, that is, the preset bit width is 4. Specifically, the instruction address of the instruction = (the number of the instruction - 1) × the preset bit width. That is, the instruction address of the first generated instruction ADD = (1 - 1) × 4 = 0, the instruction address of the second generated instruction MUL = (2 - 1) × 4 = 8, and the instruction address of the third generated instruction JPL = (3 - 1) × 4 = 12... In this way, the instruction address of each instruction can be obtained, and the instruction addresses of the instructions are arranged with a difference of 4 between adjacent ones, meeting the setting requirements of the instruction stream.

[0057] Step 203, when the instruction belongs to a preset jump target instruction set, add the instruction address of the instruction to the first address set as the first address.

[0058] This step can specifically refer to step 102 above and will not be elaborated here.

[0059] Step 204, obtain a preset immediate number type jump instruction set.

[0060] Step 205: When the instruction belongs to the immediate jump instruction set, determine that the instruction is an immediate jump instruction, and add the instruction address of the instruction to the second address set as the second address.

[0061] In the embodiment of the present application, for steps 204-205, an immediate jump instruction set can be preset in advance according to the verification requirements. When the instruction generated by the instruction stream is in the immediate jump instruction set, the instruction can be regarded as an immediate jump instruction. The specific immediate jump instructions included in the immediate jump instruction set in the embodiment of the present application are not specifically limited.

[0062] For example, for the above Table 1, assuming that the immediate jump instruction set {JPI, BRI} is preset in advance, when the instructions generated by the subsequent instruction stream are JPI instructions or BRI instructions, it is confirmed that the generated instructions are immediate jump instructions, and the instruction address 8 of the JPI instruction and the instruction address 28 of the BRI instruction are added to the second address set.

[0063] Step 206: Calculate the offset address of the immediate jump instruction corresponding to each second address in the second address set.

[0064] Wherein, the offset address reflects the address deviation between the instruction address of the immediate jump instruction and the first address of a jump target instruction in the first address set.

[0065] Step 207: Calculate the immediate value of the immediate jump instruction based on the offset address and the immediate value calculation method matching the type of the immediate jump instruction.

[0066] In the embodiment of the present application, for steps 206-207, since the instructions in the instruction stream are generated sequentially in order, and the difference between the instruction addresses of two adjacent instructions is a fixed value, the storage of the instructions in the instruction stream in the memory is regular. Based on this regularity, in the process of accurately jumping an immediate jump instruction to a corresponding jump target instruction, the address deviation of the immediate jump instruction relative to the jump target instruction (the jump target instruction can be the jump target instruction specified in the second address set or a jump target instruction randomly selected from the second address set) can be calculated first, and this address deviation is used as the offset address of the immediate jump instruction.

[0067] After determining the offset address of the instruction address of the immediate jump instruction relative to the instruction address of the jump target instruction, that is, determining the interval distance between the instruction address of the immediate jump instruction and the instruction address of the jump target instruction in the instruction stream. Since the immediate number reflects the address deviation between the immediate jump instruction and the jump target instruction, the correct immediate number can be calculated based on the offset address of the immediate jump instruction and the immediate number calculation method matching the type of the immediate jump instruction, so that the immediate jump instruction can accurately jump to the jump target instruction through the immediate number, meeting the requirement of specifying the jump target instruction for the immediate jump instruction, and increasing the controllability and directivity of verification. Among them, each type of immediate jump instruction has a corresponding immediate number calculation method, and the immediate number calculation methods of different types of immediate jump instructions are different.

[0068] Optionally, step 206 may specifically include sub-steps 2061-2062:

[0069] Sub-step 2061: For each immediate jump instruction corresponding to a second address in the second address set, randomly select a target first address from the first address set.

[0070] Sub-step 2062: Calculate the difference between the target first address and the second address, and use the difference as the offset address of the immediate jump instruction corresponding to the second address.

[0071] In the embodiment of the present application, for sub-steps 2061-2062, since the requirement for the immediate jump instruction is that it can jump to the jump target instruction set, when calculating the immediate number of the immediate jump instruction, a target first address can be quickly selected from the first address set (maintaining the addresses of the jump target instructions) as the jump object, and then calculate the difference between the target first address and the second address of the immediate jump instruction, and use the difference as the offset address of the immediate jump instruction. This difference can reflect the address deviation between the immediate jump instruction and the jump target instruction, and the subsequent immediate number can be calculated based on this address deviation.

[0072] For example, for the above Table 1, the obtained first address set is:

[0073] JUMP_TARGET_ADDR_SET={0,16,32,40,64,72}

[0074] The obtained second address set is:

[0075] JUMP_ADDR_SET={8,28,56}

[0076] For the immediate jump instruction JPI with instruction address 8 in the second address set, assuming that the jump target instruction DIV with instruction address 64 is randomly selected from the first address set, the offset address of the immediate jump instruction JPI = 64 - 8 = 56, and the offset address 56 reflects that the address deviation between the immediate jump instruction JPI and the jump target instruction DIV is 56.

[0077] Optionally, the immediate number calculation method includes: immediate number = offset address / preset coefficient; the values of the preset coefficients in different immediate number calculation methods are different; step 207 may specifically include sub-step 2071:

[0078] Sub-step 2071: Use the ratio of the offset address to the preset coefficient in the immediate number calculation method matching the type of the immediate jump instruction as the immediate number of the immediate jump instruction.

[0079] In the embodiments of the present application, when calculating the offset address and further calculating the immediate number, the immediate number can be calculated in the way of immediate number = offset address / preset coefficient. Among them, the immediate number calculation methods corresponding to different types of immediate jump instructions are different, and the values of the preset coefficients in different immediate number calculation methods are different. The embodiments of the present application do not make specific limitations on this.

[0080] For example, for the above Table 1, the 1st, 5th, 9th, 11th, 17th, and 19th instructions are all instructions in the jump target instruction set, then the obtained first address set is:

[0081] JUMP_TARGET_ADDR_SET={0,16,32,40,64,72};

[0082] The 3rd, 8th, and 15th instructions are all immediate jump instructions, then the obtained second address set is:

[0083] JUMP_ADDR_SET={8,28,56};

[0084] Assume that the calculation method of the immediate number of the immediate jump instruction JPI is: offset address = immediate number × 4; the calculation method of the immediate number of the immediate jump instruction BRI is: offset address = immediate number × 2.

[0085] When selecting the first address 8 in the second address set, find the corresponding immediate jump instruction JPI in the instruction stream. Assume that the address 64 is randomly selected from the first address set, then the offset address of the JPI instruction is 64 - 8 = 56, and the corresponding immediate number of the JPI instruction can be calculated as 56 / 4 = 14, so the immediate number of the JPI instruction is 14.

[0086] When selecting the second address 28 in the second address set, find the immediate number type jump instruction BRI corresponding to this address in the instruction stream. Suppose the address 72 is randomly selected from the first address set. Then the offset address of the JPI instruction is 72 - 28 = 44. It can be calculated that the immediate number corresponding to the BRI instruction is 44 / 2 = 22. So the immediate number of this BRI instruction is 22.

[0087] When selecting the third address 56 in the second address set, find the immediate number type jump instruction JPI corresponding to this address in the instruction stream. Suppose the address 16 is randomly selected from the first address set. Then the offset address of the JPI instruction is 16 - 56 = -40. It can be calculated that the immediate number corresponding to the JPI instruction is -40 / 4 = -10. So the immediate number of this JPI instruction is -10.

[0088] After the above steps, the immediate numbers of the three immediate number type jump instructions in the instruction stream are generated. When executing the instruction stream subsequently, it can be realized that: the immediate number type jump instruction JPI with the address 8 jumps to the jump target instruction DIV with the address 64, the immediate number type jump instruction BRI with the address 28 jumps to the jump target instruction ADD with the address 72, and the immediate number type jump instruction JPI with the address 56 jumps to the jump target instruction DIV with the address 16, thus achieving the purpose that the immediate number jump instruction jumps to the specified jump target instruction set.

[0089] Optionally, the jump target instructions corresponding to each of the immediate number type jump instructions are all in the same instruction set; the instruction address of the jump target instruction is in the second address set;

[0090] Or, the jump target instructions corresponding to different immediate number type jump instructions are respectively in different instruction sets.

[0091] In the embodiment of the present application, the jump target instructions corresponding to each immediate number type jump instruction are all in the same instruction set. In this way, by only setting one jump target instruction set, the specified jump of the immediate number jump instruction can be realized, reducing the operation complexity and improving the verification efficiency.

[0092] In addition, the embodiment of the present application can also be configured such that the jump target instructions corresponding to different immediate number type jump instructions are respectively in different instruction sets. In this way, the jump objects of each immediate number type jump instruction can be separately restricted, further improving the directivity of verification and being more accurate when reproducing problems.

[0093] Refer to Figure 3 , which shows the implementation flowchart of the immediate number configuration method of the jump instruction in the embodiment of the present application, including:

[0094] S1. Set the set of jump target instructions.

[0095] S2. Set the set of jump target instruction addresses (the second address set) and the set of immediate jump instruction addresses (the first address set), and initialize them to empty sets.

[0096] S3. Randomly generate instructions, and do not generate the immediate values of the immediate jump instructions for the time being.

[0097] S4. Determine whether the generated instruction is an immediate jump instruction; if so, execute S5. Add the address of this instruction to the set of immediate jump instruction addresses.

[0098] S6. Determine whether the generated instruction belongs to the set of jump target instructions; if so, execute S7. Add the address of this instruction to the set of jump target instruction addresses.

[0099] S8. All instructions have been generated.

[0100] S9. Generate an immediate value for the instruction corresponding to the i-th address in the set of immediate jump instruction addresses, where i is initially 1.

[0101] S10. Randomly select an address from the set of jump target instruction addresses.

[0102] S11. Calculate the difference between the random address and the address of this immediate jump instruction as the offset address.

[0103] S12. Calculate the immediate value according to the offset address.

[0104] S13. Determine whether i is less than or equal to the total number of elements in the set of immediate jump instruction addresses.

[0105] If not, increment i by 1 and go to step S9.

[0106] If so, the generation is complete.

[0107] In summary, in the embodiment of the present application, during the process of generating the instruction stream, the generated instructions can be classified. If a jump target instruction is generated, the instruction address of the jump target instruction is added as the first address to the first address set; if an immediate jump instruction is generated, the instruction address of the immediate jump instruction is added as the second address to the second address set. Subsequently, based on the known second address set and the first address set, the correct value of the immediate value in each immediate jump instruction can be inversely calculated. The value of this immediate value can meet the requirement that each immediate jump instruction can be directed to jump to the jump target instruction. The entire process of the present application can be automated, reducing the dependence on human resources and improving the accuracy and efficiency of immediate value calculation.

[0108] Figure 4 It is a block diagram of an immediate value configuration device for a jump instruction provided by an embodiment of the present application. The device includes:

[0109] A generation module 301, configured to generate a corresponding instruction address for each generated instruction when generating an instruction stream;

[0110] A first addition module 302, configured to add the instruction address of the instruction to a first address set as a first address when the instruction belongs to a preset jump target instruction set;

[0111] A second addition module 303, configured to add the instruction address of the instruction to a second address set as a second address when the instruction is an immediate value type jump instruction;

[0112] An immediate value module 304, configured to generate an immediate value for each immediate value type jump instruction corresponding to a second address in the second address set according to the first address set and the second address set, so that when subsequently executing the immediate value type jump instruction, based on the immediate value, jump to a jump target instruction in the jump target instruction set.

[0113] Optionally, the generation module 301 includes:

[0114] A numbering sub-module, configured to set a corresponding number for each instruction according to the generation order of each instruction;

[0115] A first calculation sub-module, configured to calculate the instruction address of the instruction according to the number of the instruction and a preset bit width; the preset bit width is the occupied size of one instruction.

[0116] Optionally, the second addition module 303 includes:

[0117] An acquisition sub-module, configured to acquire a preset immediate value type jump instruction set;

[0118] A determination sub-module, configured to determine that the instruction is an immediate value type jump instruction when the instruction belongs to the immediate value type jump instruction set, and add the instruction address of the instruction to the second address set as a second address.

[0119] Optionally, the immediate value module 304 includes:

[0120] A second calculation sub-module, configured to calculate an offset address of each immediate value type jump instruction corresponding to a second address in the second address set; the offset address reflects the address deviation amount between the instruction address of the immediate value type jump instruction and the first address of a jump target instruction in the first address set;

[0121] A third calculation sub-module, configured to calculate the immediate value of the immediate value type jump instruction based on the offset address and an immediate value calculation method that matches the type of the immediate value type jump instruction.

[0122] Optionally, the second calculation sub-module includes:

[0123] A selection unit, configured to randomly select a target first address from the first address set for each immediate value type jump instruction corresponding to a second address in the second address set;

[0124] A difference calculation unit, configured to calculate the difference between the target first address and the second address, and use the difference as the offset address of the immediate value type jump instruction corresponding to the second address.

[0125] Optionally, the immediate value calculation method includes: immediate value = offset address / preset coefficient; the values of the preset coefficients in different immediate value calculation methods are different;

[0126] The third calculation sub-module includes:

[0127] A ratio calculation unit, configured to use the ratio of the offset address to the preset coefficient in the immediate value calculation method that matches the type of the immediate value type jump instruction as the immediate value of the immediate value type jump instruction.

[0128] Optionally, the jump target instructions corresponding to each immediate value type jump instruction are all in the same instruction set; the instruction addresses of the jump target instructions are in the second address set;

[0129] Or, the jump target instructions corresponding to different immediate value type jump instructions are respectively in different instruction sets.

[0130] In summary, in the embodiments of the present application, during the process of generating an instruction stream, the generated instructions can be classified. If a jump target instruction is generated, the instruction address of the jump target instruction is added to the first address set as the first address; if an immediate value type jump instruction is generated, the instruction address of the immediate value type jump instruction is added to the second address set as the second address. Subsequently, based on the known second address set and the first address set, the correct value of the immediate value in each immediate value type jump instruction can be inversely calculated. The value of this immediate value can meet the requirement that each immediate value type jump instruction can be directed to jump to the jump target instruction. The entire process of the present application can be automated, reducing the dependence on human resources and improving the accuracy and efficiency of immediate value calculation.

[0131] For the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple. For related parts, refer to the partial description of the method embodiment.

[0132] Each embodiment in this specification is described in a progressive manner. The key point of each embodiment is the difference from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other.

[0133] Regarding the device in the above embodiments, the specific manner in which each module performs operations has been described in detail in the embodiments related to the method, and will not be elaborated here.

[0134] The embodiment of the present application provides an immediate number configuration device for jump instructions, including a memory and more than one program. The more than one program is stored in the memory and is configured to be executed by more than one processor. The more than one program includes instructions for performing the method described in the above one or more embodiments.

[0135] Figure 5 It is a block diagram of a first electronic device 400 shown according to an exemplary embodiment. For example, the first electronic device 400 can be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, etc.

[0136] Referring to Figure 5 , the first electronic device 400 may include one or more of the following components: a processing component 402, a first memory 404, a power supply component 406, a multimedia component 408, an audio component 410, an input / output (I / O) interface 412, a sensor component 414, and a communication component 416.

[0137] The processing component 402 generally controls the overall operation of the first electronic device 400, such as operations associated with display, telephone calls, data communication, camera operations, and recording operations. The processing component 402 may include one or more processors 420 to execute instructions to complete all or part of the steps of the above method. In addition, the processing component 402 may include one or more modules to facilitate the interaction between the processing component 402 and other components. For example, the processing component 402 may include a multimedia module to facilitate the interaction between the multimedia component 408 and the processing component 402.

[0138] The first memory 404 is used to store various types of data to support the operation of the first electronic device 400. Examples of such data include instructions for any application or method operating on the first electronic device 400, contact data, phone book data, messages, pictures, multimedia, etc. The first memory 404 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0139] The power supply component 406 supplies power to various components of the first electronic device 400. The power supply component 406 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the first electronic device 400.

[0140] The multimedia component 408 includes a screen that provides an output interface between the first electronic device 400 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen can be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors can not only sense the boundaries of touch or swipe actions, but also detect the duration and pressure associated with the touch or swipe operation. In some embodiments, the multimedia component 408 includes a front camera and / or a rear camera. When the first electronic device 400 is in an operating mode, such as a shooting mode or a multimedia mode, the front camera and / or the rear camera can receive external multimedia data. Each of the front camera and the rear camera can be a fixed optical lens system or have a focal length and optical zoom capabilities.

[0141] The audio component 410 is used to output and / or input audio signals. For example, the audio component 410 includes a microphone (MIC) that is used to receive external audio signals when the first electronic device 400 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals can be further stored in the first memory 404 or transmitted via the communication component 416. In some embodiments, the audio component 410 further includes a speaker for outputting audio signals.

[0142] The I / O interface 412 provides an interface between the processing component 402 and a peripheral interface module, and the peripheral interface module can be a keyboard, a click wheel, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.

[0143] The sensor assembly 414 includes one or more sensors for providing a status assessment of various aspects for the first electronic device 400. For example, the sensor assembly 414 can detect the on / off state of the first electronic device 400, the relative positioning of components, such as the display and keypad of the first electronic device 400. The sensor assembly 414 can also detect a change in the position of the first electronic device 400 or a component of the first electronic device 400, the presence or absence of user contact with the first electronic device 400, the orientation or acceleration / deceleration of the first electronic device 400, and a change in the temperature of the first electronic device 400. The sensor assembly 414 can include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 414 can also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 414 can also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

[0144] The communication component 416 is used to facilitate communication between the first electronic device 400 and other devices in a wired or wireless manner. The first electronic device 400 can access a wireless network based on a communication standard, such as WiFi, a carrier network (such as 2G, 3G, 4G, or 5G), or a combination thereof. In an exemplary embodiment, the communication component 416 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 416 further includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0145] In an exemplary embodiment, the first electronic device 400 can be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for implementing the methods provided in the embodiments of the present application.

[0146] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a first memory 404 including instructions, and the above instructions can be executed by a processor 420 of the first electronic device 400 to complete the above method. For example, the non-transitory storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, and an optical data storage device, etc.

[0147] Figure 6 is a block diagram of a second electronic device 500 shown according to an exemplary embodiment. For example, the second electronic device 500 may be provided as a server. Referring to Figure 6 , the second electronic device 500 includes a processing component 522, which further includes one or more processors, and memory resources represented by a second memory 532 for storing instructions executable by the processing component 522, such as application programs. The application programs stored in the second memory 532 may include one or more modules each corresponding to a set of instructions. In addition, the processing component 522 is configured to execute instructions to perform the methods provided by the embodiments of the present application.

[0148] The second electronic device 500 may also include a power component 526 configured to perform power management of the second electronic device 500, a wired or wireless network interface 550 configured to connect the second electronic device 500 to a network, and an input / output (I / O) interface 558. The second electronic device 500 may operate based on an operating system stored in the second memory 532, such as WindowsServerTM, MacOSXTM, UnixTM, LinuxTM, FreeBSDTM or the like.

[0149] The embodiments of the present application also provide a computer program product, including a computer program, which when executed by a processor implements the methods described in the above embodiments.

[0150] Those skilled in the art will readily conceive of other embodiments of the present application after considering the specification and practicing the application disclosed herein. The present application is intended to cover any variations, uses, or adaptations of the present application, which follow the general principles of the present application and include known common knowledge or conventional technical means in the technical field not disclosed in the present disclosure. The specification and embodiments are to be considered exemplary only.

[0151] It should be understood that the present application is not limited to the exact structures described above and shown in the drawings, and various modifications and changes can be made without departing from its scope.

Claims

1. A method for configuring an immediate value of a jump instruction, characterized in that: The method comprises: When generating an instruction stream, a corresponding instruction address is generated for each instruction generated; When the instruction belongs to a preset jump target instruction set, adding the instruction address of the instruction as the first address to the first address set; When the instruction is an immediate jump instruction, adding the instruction address of the instruction as the second address into the second address set; According to the first address set and the second address set, an immediate number is generated for the immediate number jump instruction corresponding to each second address in the second address set, so that when the immediate number jump instruction is subsequently executed, it jumps to the jump target instruction in the jump target instruction set based on the immediate number.

2. The method according to claim 1, characterized in that When generating the instruction stream, generating a corresponding instruction address for each instruction generated includes: According to the generation order of each instruction, set a corresponding number for each instruction; The instruction address of the instruction is calculated according to the instruction number and the preset bit width; the preset bit width is the occupied size of one instruction.

3. The method according to claim 1, characterized in that When the instruction is an immediate jump instruction, adding the instruction address of the instruction as the second address into the second address set includes: Get the preset immediate jump instruction set; When the instruction belongs to the immediate jump instruction set, the instruction is determined to be an immediate jump instruction, and the instruction address of the instruction is added into the second address set as the second address.

4. The method according to claim 1, characterized in that The step of generating an immediate value for an immediate value jump instruction corresponding to each second address in the second address set according to the first address set and the second address set includes: Calculating an offset address of an immediate jump instruction corresponding to each second address in the second address set; the offset address reflects an address deviation between the instruction address of the immediate jump instruction and a first address of a jump target instruction in the first address set; The immediate value of the immediate value jump instruction is calculated based on the offset address and an immediate value calculation method that matches the type of the immediate value jump instruction.

5. The method according to claim 4, characterized in that The calculating the offset address of the immediate jump instruction corresponding to each second address in the second address set includes: For each immediate jump instruction corresponding to the second address in the second address set, randomly select a target first address from the first address set; The difference between the target first address and the second address is calculated, and the difference is used as the offset address of the immediate jump instruction corresponding to the second address.

6. The method according to claim 4, characterized in that The immediate number calculation method includes: immediate number = offset address / preset coefficient; the value of the preset coefficient in different immediate number calculation methods is different; The calculating the immediate value of the immediate value jump instruction based on the offset address and the immediate value calculation method matching the type of the immediate value jump instruction includes: The offset address and the ratio of the preset coefficient in the immediate value calculation method matching the type of the immediate value jump instruction are used as the immediate value of the immediate value jump instruction.

7. The method according to claim 1, characterized in that The jump target instructions corresponding to each of the immediate jump instructions are in the same instruction set; the instruction addresses of the jump target instructions are in the second address set; Or, the jump target instructions corresponding to the different immediate jump instructions are in different instruction sets.

8. A device for configuring an immediate value of a jump instruction, characterized in that: The device comprises: A generation module, used for generating a corresponding instruction address for each instruction generated when generating an instruction stream; A first adding module, configured to add the instruction address of the instruction as the first address to the first address set when the instruction belongs to a preset jump target instruction set; A second adding module, used for adding the instruction address of the instruction as the second address into the second address set when the instruction is an immediate jump instruction; An immediate number module is used to generate an immediate number for the immediate number jump instruction corresponding to each second address in the second address set according to the first address set and the second address set, so that when the immediate number jump instruction is subsequently executed, it jumps to the jump target instruction in the jump target instruction set based on the immediate number.

9. An electronic device, characterized in that: include: processor; a memory for storing instructions executable by the processor; The processor is configured to execute the instructions to implement the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: When the instructions in the computer-readable storage medium are executed by a processor of an electronic device, the electronic device is enabled to perform the method as claimed in any one of claims 1 to 7.

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