Wiring board and method for manufacturing same

Abstract

Disclosed are a wiring substrate and a method of manufacturing the same. The wiring substrate having a mounting pad on a surface for mounting a semiconductor device includes a metal pad, an insulating layer, and a metal layer. A pad region of the mounting pad is defined by an opening formed in the insulating layer. The wiring substrate further includes an etch stop layer disposed between an upper surface of the metal pad and the insulating layer. The etch stop layer is provided so as to surround a lower end of the opening portion, and extends outward from the lower end of the opening portion to the outer periphery.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority from Japanese Patent Application No. 2023-190725 filed on November 8, 2023. The entire disclosure of Japanese Patent Application No. 2023-190725 is incorporated herein by reference. Technical Field

[0003] The present application relates to a wiring substrate for mounting a semiconductor and a method for manufacturing the same. Background Art

[0004] A semiconductor package substrate, a printed board, or the like is used as a wiring substrate on which a semiconductor is mounted.

[0005] In such a substrate, a wiring circuit pattern is formed, and then the wiring circuit is insulated and protected by a solder resist. At the same time, a mounting pad for mounting a semiconductor is formed.

[0006] Furthermore, as disclosed in Japanese Unexamined Patent Application Publication No. 2010-140990, a solder mask defined (SMD) structure is referred to as a mounting pad.

[0007] In the mounting pad of the SMD structure, as disclosed in unexamined Japanese patent application publication No. 2010-140990, a solder resist layer (insulating layer) is formed on the electrode pad, and then an opening is provided in the solder resist layer to expose a portion of the pad. The surface of the pad exposed by the opening is processed by etching, and a Ni plating film and an Au plating film are formed on the electrode pad.

[0008] In the pad of the SMD structure in the unexamined Japanese patent application publication No. 2010-140990, when the surface etching of the electrode pad is performed, an undercut portion is formed under the opening of the solder resist layer. The etchant can penetrate between the electrode pad and the solder resist layer through the undercut portion, thereby causing the solder resist layer to peel off from the electrode pad. The peeling of the solder resist layer can be caused not only by the penetration of the etchant, but also by other reasons, such as the heat load in the Ni plating film formation process or the penetration of the Ni plating solution.

[0009] Furthermore, even if peeling does not occur during the manufacturing process, the solder resist layer may be peeled off from the electrode pad due to external stress caused by factors such as heat or water during long-term use of the product.

[0010] Therefore, a wiring substrate and its production which can prevent the insulation layer around the pad from being peeled off are desired.

[0011] The present disclosure has been made in view of the above circumstances, and an object of the present disclosure is to provide a wiring substrate capable of preventing an insulating layer around a pad from being peeled off, and a method of manufacturing the same. Summary of the invention

[0012] A wiring substrate according to a first aspect of the present disclosure is a wiring substrate having mounting pads for mounting a semiconductor device on a surface thereof, the wiring substrate including:

[0013] a metal pad disposed on one of the major surfaces of the substrate;

[0014] an insulating layer provided to cover the side surface of the metal pad and at least a portion of the upper surface of the metal pad and provided with an opening portion exposing a portion of the upper surface of the metal pad; and

[0015] A metal layer is disposed on the metal pad exposed by the opening, wherein

[0016] A pad region of the mounting pad is defined by an opening formed in the insulating layer, and

[0017] The wiring substrate further includes an etching stopper layer disposed between an upper surface of the metal pad and the insulating layer, the etching stopper layer being disposed to surround a lower end of the opening portion and extending outwardly from the lower end of the opening portion toward an outer periphery.

[0018] A method for manufacturing a wiring substrate according to a second aspect of the present disclosure is a method for manufacturing a wiring substrate having mounting pads for mounting a semiconductor device on a surface thereof, the method comprising the steps of:

[0019] forming an etch stop layer on a metal pad provided on one of the major surfaces of the substrate;

[0020] forming an insulating layer covering a side surface of the metal pad and at least a portion of an upper surface of the metal pad, and provided with an opening portion exposing a portion of the upper surface of the metal pad; and

[0021] A metal layer is formed on the metal pad exposed by the opening, wherein

[0022] A pad region of the mounting pad is defined by an opening formed in the insulating layer, and

[0023] The etching stopper layer is formed to surround the lower end of the opening portion and to extend outward from the lower end of the opening portion toward the outer periphery.

[0024] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are not restrictive of the disclosure.

[0025] According to the present disclosure, it is possible to provide a wiring substrate capable of preventing an insulating layer around a pad from being peeled off and a method of manufacturing the same. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] A more complete understanding of the present application can be obtained when the following detailed description is considered in conjunction with the following drawings, in which:

[0027] Figure 1 is a partial top view of a wiring substrate according to Embodiment 1;

[0028] Figure 2 It is along Figure 1 A cross-sectional view taken along line II-II shown;

[0029] Figure 3 It is a partial enlarged cross-sectional view of the mounting pad;

[0030] Figure 4 is a diagram showing a modified embodiment;

[0031] FIG. 5A to FIG. 5D Each is a diagram for describing a method for manufacturing a wiring substrate according to Embodiment 1;

[0032] FIG. 6A to FIG. 6C Each is a diagram for describing a method for manufacturing a wiring substrate according to Embodiment 1;

[0033] Figure 7 is a partial top view of a wiring substrate according to Embodiment 2;

[0034] Figure 8 It is along Figure 7 A cross-sectional view taken along line VIII-VIII shown;

[0035] 9A to 9C Each is a diagram for describing a method for manufacturing a wiring substrate according to Embodiment 2;

[0036] Fig.10 is a partial top view showing a modified embodiment; and

[0037] Fig.11 It is along Fig.10 A cross-sectional view taken along line XI-XI is shown. DETAILED DESCRIPTION

[0038] Hereinafter, a wiring substrate and a method of manufacturing the same according to an embodiment will be described with reference to the accompanying drawings.

[0039] Example 1

[0040] Figures 1 to 3 A wiring substrate 10 according to the present embodiment is shown. In the present embodiment, description is made using a semiconductor package substrate on which a semiconductor device is mounted as an example of the wiring substrate 10. Figure 1 It is a partial top view of the wiring substrate 10 . Figure 2 It is along Figure 1The cross-sectional view is taken along the line II-II shown in FIG. Figure 3 It is a partially enlarged cross-sectional view of the mounting pad 30 .

[0041] like Figures 1 to 3 As shown, the wiring substrate 10 includes a base material 11, a metal pad 12, a terminal wiring layer 13, a wiring layer 14, an insulating layer 15, an etching stopper layer 16 and a metal layer 17. The wiring substrate 10 includes a plurality of mounting pads 30 on its surface. The mounting pads 30 are composed of the metal pads 12 and the metal layer 17. The mounting pads 30 are solder mask defined (SMD) terminals. The pad area of ​​the mounting pad 30 is defined by an opening 15a formed in the insulating layer 15.

[0042] The substrate 11 is made of a material such as polyimide, liquid crystal polymer, polyethylene terephthalate (PET), epoxy resin, phenolic resin, glass epoxy resin, glass or silicon wafer. The metal pad 12, the terminal wiring layer 13 and the wiring layer 14 are formed on one main surface 11a of the substrate 11. In addition, an insulating layer 15 for insulating and protecting the terminal wiring layer 13 and the wiring layer 14 is provided on the main surface 11a of the substrate 11. The insulating layer 15 is also provided to cover the periphery of the metal pad 12.

[0043] The metal pad 12 is made of a metal such as copper. Figure 1 As shown in FIG. 1 , in a plan view of metal pad 12, metal pad 12 is formed in a circular shape. In addition, at least a portion of the side surface and the upper surface of metal pad 12 are covered by insulating layer 15. A portion of the upper surface of metal pad 12 is exposed through opening 15a formed in insulating layer 15. In addition, as shown in FIG. Figure 1 As shown, metal pad 12 is connected to terminal wiring layer 13 .

[0044] As described in detail below, the upper surface of metal pad 12 is etched to have a recess 12a, such as Figure 2 and Figure 3 As shown. The depth Hm of the recess 12a is any value equal to about 10% to 50% of the thickness of the metal pad 12. For example, the depth Hm of the recess 12a is 1 to 5 μm, for example, 3 μm. Figure 3 As shown, depth Hm of recess 12 a is the depth of the most recessed portion relative to the upper surface of metal pad 12 .

[0045] The terminal wiring layer 13 and the wiring layer 14 are made of metal such as copper. The terminal wiring layer 13 and the wiring layer 14 are covered with an insulating layer 15 so as to be insulated and protected.

[0046] The metal layer 17 is provided to cover the upper surface of the metal pad 12 exposed through the opening portion 15a of the insulating layer 15. The metal layer 17 is formed by an electroless nickel immersion gold (ENIG) process or an electroless nickel electroless palladium immersion gold (ENEPIG) process. In the present embodiment, an example using the ENIG process is described. The metal layer 17 includes a Ni film 17a and an Au film 17b. The Ni film 17a of the metal layer 17 fills the recess 12a of the metal pad 12 and is also provided in the opening portion 15a. The metal layer 17 (Ni film 17a) is provided to cover the protrusion 16a of the etching stopper layer 16. In other words, the metal layer 17 (Ni film 17a) is formed to extend to the inside of the undercut formed below the inner end of the etching stopper layer 16. Specifically, as Figure 3 As shown, the metal layer 17 (Ni film 17a) is formed to cover the portion below the protruding portion 16a of the etching stopper layer 16. Due to the difference in film thickness, a step 18 is formed between the etching stopper layer 16 and the Ni film 17a.

[0047] The insulating layer 15 is made of an insulating material such as polyimide. An opening 15a for partially exposing the upper surface of the metal pad 12 is formed in the insulating layer 15. The shape of the terminal is defined by the opening 15a. Figure 1 As shown, the opening portion 15a is formed to be circular in a plan view. Although an example in which the insulating layer 15 is made of a varnish type photosensitive polyimide is described in the present embodiment, the photosensitive polyimide may also be a film type. In addition, the material of the insulating layer 15 is not limited to the polyimide resin material. The insulating layer 15 may also be made of another material having insulating properties. For example, the insulating layer 15 may be made of a material such as a phenolic resin material, an epoxy resin material, a polyurethane material, or a polyester material. Alternatively, the insulating layer 15 may be made of a thermosetting material other than a photosensitive thermosetting material.

[0048] The etching stopper layer 16 is disposed between the upper surface of the metal pad 12 and the insulating layer 15 mounted on the metal pad. In addition, the etching stopper layer 16 is disposed to surround the lower end of the opening portion 15a. In addition, the etching stopper layer 16 extends radially outward from the lower end of the opening portion 15a of the insulating layer 15. Therefore, as Figure 1 As shown, etching stopper layer 16 has a ring-shaped planar shape. Etching stopper layer 16 is made of an inorganic material different from the material of making metal pad 12. As the inorganic material, a material that can improve the adhesion between metal pad 12 and insulating layer 15 and is not easily etched by an etchant used in the surface etching process of metal pad 12 before forming metal layer 17 is used. In view of this, in the case where metal pad 12 is made of Cu, etching stopper layer 16 is made of a material such as Ni, Ti or Cr.

[0049] like Figure 2 and Figure 3 As shown, the etching stopper layer 16 is arranged to partially cover the upper surface of the metal pad 12. Alternatively, the etching stopper layer 16 can be arranged to cover the entire upper surface of the metal pad 12. The width L1 of a portion of the etching stopper layer 16 extending between the insulating layer 15 and the metal pad 12 is preferably greater than the amount of undercut expected by etching to form the recess 12a of the metal pad 12. The amount of undercut varies depending on the depth Hm and / or the nature of the etchant. When a typical etchant is used, an undercut having an amount of undercut equal to 0.1 to 1 times the etching depth (corresponding to the depth Hm) can be formed. When an etchant that may form an undercut is used, an undercut having an amount of undercut equal to 1 to 3 times the etching depth (corresponding to the depth Hm) can be formed. Therefore, the width L1 is preferably greater than a value in the range of 0.1 to 3 times the depth Hm. In the case where the amount of undercut is less than the minimum resolution size when the etching stopper is formed, the width L1 is preferably greater than the minimum resolution size.

[0050] In addition, if Figure 1 and Figure 2 As shown, since the inner end of the etching stopper layer 16 protrudes toward the center of the opening portion 15a relative to the inner peripheral surface of the opening portion 15a, the etching stopper layer 6 has a protrusion 16a. In addition, the etching stopper layer 16 is in contact with the metal layer 17 (Ni film 17a) at least at one end on the side of the opening portion 15a. The thickness Hb of the etching stopper layer 16 is preferably 1μm or greater. In addition, when the etching stopper layer 16 is made of Ni, high conduction loss may be caused because Ni is a ferromagnetic material. Therefore, depending on the application of the wiring substrate 10, it may be preferred to provide the etching stopper layer 16 only around the lower end of the opening portion 15a without extending it to the outer edge of the metal pad 12.

[0051] The metal layer 17 is provided to cover the upper surface of the metal pad 12 exposed through the opening 15a of the insulating layer 15. The metal layer 17 is formed by an electroless nickel immersion gold (ENIG) process. The metal layer 17 includes a Ni film 17a and an Au film 17b. The Ni film 17a of the metal layer 17 fills the concave portion 12a of the metal pad 12 and is provided in the opening 15a. The metal layer 17 (Ni film 17a) is formed to extend into the undercut 12d formed below the inner end of the etching stopper layer 16. Specifically, as shown in FIG. Figure 3 As shown, the metal layer 17 (Ni film 17a) is formed to cover the protruding portion 16a of the etching stopper layer 16 by a process separate from the process of forming the etching stopper layer 16. Due to the difference in film thickness, a step 18 is formed between the etching stopper layer 16 and the Ni film 17a.

[0052] Alternatively, if Figure 4 As shown, the inner end of the etching stopper layer 16 may not protrude relative to the inner peripheral surface of the opening portion 15 a. Figure 4 is along the line corresponding to Figure 1 A cross-sectional view of the mounting pad 30 taken along line II-II shown in Figure 1 . The protrusion 16a of the etch stop layer 16 may break and cause foreign matter defects. In this case, it is preferable to form the etch stop layer 16 so as not to protrude relative to the inner peripheral surface of the opening 15a. When the protrusion 16a is not provided in the etch stop layer 16, it is preferable that the etch stop layer 6 covers the lower end of the opening 15a, as Figure 4 shown, in order to prevent the penetration of the etchant and the plating solution. Therefore, the inner end of the etch stop layer 16 is located at the lower end of the opening 15a. In other words, it is preferable that the inner diameter of the etch stop layer 16 is equal to the inner diameter of the opening 15a. Further, as Figure 4 shown, the Ni film 17a of the metal layer 17 covers the etch stop layer 15 at the undercut 12d formed below the inner end of the etch stop layer 16. Due to the difference in film thickness, a step 18 is formed between the etch stop layer 16 and the Ni film 17a.

[0053] Next, as Figure 3 shown, the diameter of the metal pad 12 is denoted as Wm, and the inner diameter of the opening 15a of the insulating layer 15 is denoted as width Wo. Further, Wbi indicates the inner diameter of the etch stop layer 16, and Wbo indicates the outer diameter of the etch stop layer 16. L1 indicates the length of a part of the etch stop layer 16 located between the metal pad 12 and the insulating layer 15. L2 indicates the length by which the protrusion 16a protrudes from the inner peripheral surface of the opening 15a. The width L of the etch stop layer 16 is equal to the sum of the length L1 and the length L2 (L = L1 + L2). Further, as Figure 4 shown, the etch stop layer 16 may not protrude into the opening 15a, but preferably covers the lower end of the opening 15a. Therefore, L2 of the etch stop layer 16 satisfies the inequality L2 ≥ 0.

[0054] In addition, the inner diameter Wo of the opening 15a is equal to or greater than the inner diameter Wbi of the etch stop layer 16 (Wbi ≤ Wo). Further, the inner diameter Wo of the opening 15a is smaller than the outer diameter Wm of the metal pad 12 (Wo < Wm). Therefore, the inner diameter Wbi of the etch stop layer 16, the inner diameter Wo of the opening 15a, and the outer diameter Wm of the metal pad 12 satisfy the relationship represented by Wbi ≤ Wo < Wm.

[0055] Next, the etch stop layer 16 may be formed to partially cover the upper surface of the metal pad 12. The etch stop layer 16 may be formed to reach the end of the outer periphery of the metal pad 12. Therefore, the outer diameter Wbo of the etch stop layer 16 is equal to or less than the outer diameter Wm of the metal pad 12 (Wbo ≤ Wm).

[0056] In the wiring substrate 10 of the present embodiment, the etching stopper layer 16 improves the adhesion between the metal pad 12 and the insulating layer 15. Therefore, even when the undercut 12d is formed under the insulating layer 15 during the pre-treatment etching before forming the Ni film 17a of the metal layer 17, the insulating layer 15 can be suppressed from peeling off from the metal pad 12 during the etching process or the plating process.

[0057] For example, one method of suppressing the peeling of the insulating layer is to reduce the undercut in the insulating layer. This can be achieved by reducing the amount of etching in the pre-treatment etching on the upper surface of the pad. However, in recent years, people have been looking forward to the refinement or densification of wiring, and the size of the opening portion for exposing the pad has been narrowed. As a result, a problem has arisen in that the development residues generated during the formation of the opening portion in the insulating layer may remain on the pad surface, thereby contaminating the pad surface. When the Ni plating is formed, the contaminated pad surface may cause defects. Therefore, the pad surface must be subjected to sufficient pre-treatment etching. In the wiring substrate 10 of the present embodiment, there is good adhesion between the metal pad 12 and the insulating layer 15. Therefore, the wiring substrate 10 can withstand the stress in the manufacturing process, such as the stress in the formation of the Ni plating or the formation of the Au plating, while allowing the formation of the undercut 12d.

[0058] In addition, without peeling during the manufacturing process, the etching stopper layer 16 improves the adhesion between the metal pad 12 and the insulating layer 15, and thus can suppress the peeling of the insulating layer 15 due to external stress (such as heat or water) during long-term use of the product. In addition, the etching stopper layer 16 can suppress the metal (especially Cu) contained in the metal pad 12 from being dispersed into the insulating layer 15, thereby enhancing the adhesion reliability.

[0059] Next, a method of manufacturing the wiring substrate 10 according to the present embodiment will be described with reference to the drawings.

[0060] First, if Figure 5A As shown, a metal pad 12 is formed on a substrate 11. For example, the metal pad 12 is formed by the following method. First, a seed layer (not shown) is formed. The seed layer may be pre-set on the substrate 11. Then, a resist (not shown) is formed by applying a dry film and performing exposure and development, the resist having an opening formed at a region where the metal pad 12 is to be set. Electrolytic copper plating is performed on the seed layer to form a copper layer. Subsequently, the resist is moved, and then the seed layer except the wiring layer is removed, thereby forming the metal pad 12.

[0061] Next, if Figure 5BAs shown, by coating the substrate 11 and the metal pad 12 with a resist solution and performing exposure and development, a resist 81 is formed, which has an opening 81a formed at a region where the etching stopper layer 16 is to be provided. In addition, in the case where the etching stopper layer 16 does not protrude into the opening portion 15a of the insulating layer 15 (in the case of L2=0), the position of the opening 81a of the resist 81 is adjusted when designing the resist.

[0062] Next, if Figure 5C As shown, the surface of metal pad 12 exposed through opening 81a is etched with an etchant, thereby forming recess 12b.

[0063] Next, if Figure 5D As shown, an etching stopper layer 16 is formed on the recess 12b by dry plating (such as sputtering), wet plating, a lamination method using a metal foil, etc. An inorganic material is used as the material of the etching stopper layer 16. An inorganic material is used as the inorganic material described below: it can improve the adhesion between the metal pad 12 and the insulating layer 15, and is not easily etched by the etchant used in the surface etching process of the metal pad 12 before forming the metal layer 17. In the case where the metal pad 12 is made of Cu, Ni, Ti, Cr, etc., an inorganic material can be used. A selective etchant that can remove only Cu is used as an etchant. Depending on the inorganic material used, any commercially available selective etchant can be used.

[0064] Applicable etchants include, but are not limited to, the following etchants. In the case where Ni is used as an inorganic material, a neutral to weakly alkaline etchant (e.g., SF-5420, MEC COMPANY LTD.) can be used. In the case where Ti is used as an inorganic material, a (sulfuric acid-) hydrogen peroxide-phosphoric acid etchant (e.g., WLC-C2, Mitsubishi Gas Chemical Trading, Inc.) can be used. In the case where Cr is used as an inorganic material, a sulfuric acid-hydrogen peroxide etchant (e.g., CB-801Y, MEC COMPANY LTD.) can be used.

[0065] Next, the resist 81 is peeled off. Subsequently, the insulating layer 15 having the opening portion 15a corresponding to the pad region of the mounting pad 30 is formed by spraying a varnish type photosensitive polyimide and then baking and hardening. Fig. 6A As shown. The insulating layer 15 can be made of a film-type photosensitive polyimide. The material of the insulating layer 15 is not limited to the polyimide resin material, and can also be other materials with insulating properties. For example, the insulating layer 15 can be made of a phenolic resin material, an epoxy resin material, a polyurethane material, a polyester material, etc. In addition, a thermosetting material other than a photosensitive thermosetting material can be used as the material of the insulating layer 15.

[0066] The surface of the metal pad 12 exposed by the opening 15a is etched by an etchant. For example, in the case where the metal pad 12 is made of copper and the etching stopper layer 16 is made of Ni, a neutral to weakly alkaline etchant (e.g., SF-5420, MECCOMPANY LTD.) is used as an etchant. By this etching, a recess 12a is formed on the surface of the metal pad 12, as shown in FIG. Figure 6B In addition, since wet etching is isotropic etching, the portion below the inner end of the etching stopper layer 16 is also etched, thereby forming an undercut 12d, as shown in FIG. Figure 6B shown.

[0067] Then, if Figure 6C As shown, a Ni film (Ni plated film) 17a and an Au film (Au plated film) 17b are formed on the recess 12a by ENIG treatment. Thus, the Ni plated film 17a is also formed inside the undercut 12d. The Ni nickel plated film 17a is formed to cover the protruding portion 16a of the etching stopper layer 16. In addition, due to the difference in film thickness, a step 18 is formed between the etching stopper layer 16 and the Ni plated film 17a. Alternatively, the metal layer 17 may be formed by ENEPIG treatment.

[0068] By the above-described method, the wiring substrate 10 is manufactured.

[0069] The manufacturing method of the wiring substrate 10 according to the present embodiment includes the step of forming the etching stopper layer 16 after forming the metal pad 12, and thus it is possible to suppress the insulating layer 15 from being peeled off from the upper surface of the metal pad during the surface etching process of the metal pad 12. In addition, by providing the etching stopper layer 16, the adhesion between the insulating layer 15 and the metal pad 12 can be improved, so that the peeling of the insulating layer 15 due to the stress applied during the formation of the metal layer 17 can be suppressed.

[0070] In addition, since etching stopper layer 16 can improve the adhesion between metal pad 12 and insulating layer 15, peeling of insulating layer 15 due to external stress can be suppressed during long-term use of a product including wiring substrate 10. In addition, since etching stopper layer 16 can suppress the metal (especially Cu) contained in metal pad 12 from being dispersed into insulating layer 15, adhesion reliability can be enhanced.

[0071] Example 2

[0072] A wiring substrate 20 according to Embodiment 2 will be described with reference to the drawings. The wiring substrate 20 of the present embodiment is different from the wiring substrate 10 according to Embodiment 1 in the shape of the etching stopper layer 26. The constituent elements common to Embodiment 1 are denoted by the same reference numerals as in Embodiment 1, and their detailed description is omitted.

[0073] Figure 7 and Figure 8 A wiring substrate 20 according to Embodiment 2 is shown. Figure 7 is a partial top view of the wiring substrate 20, and Figure 8 It is along Figure 7 A cross-sectional view taken along line VIII-VIII is shown.

[0074] like Figure 7 and Figure 8 As shown, the wiring substrate 20 includes a base material 11 , a metal pad 12 , a terminal wiring layer 13 , a wiring layer 14 , an insulating layer 15 , an etching stopper layer 26 , and a metal layer 17 .

[0075] The etching stopper layer 26 is made of Ni, for example, as in Embodiment 1, and extends between the metal pad 12 and the insulating layer 15, as shown in FIG. Figure 8 As shown. In addition, the etching stopper layer 26 is provided to surround the lower end of the opening portion 15a. In addition, the etching stopper layer 26 extends radially outward from the lower end of the opening portion 15a of the insulating layer 15 to the outer peripheral side edge of the metal pad 12. In addition, the etching stopper layer 26 is formed to cover the side surface of the outer periphery of the metal pad 12. As shown Figure 7 As shown, the metal pad 12 is connected to the terminal wiring layer 13. Therefore, the etching stopper layer 26 covers the side surface of the metal pad 12 except for the portion connected to the terminal wiring layer 13.

[0076] In addition, if Figure 7 As shown, the etching stopper layer 26 has a ring-shaped planar shape. Figure 7 and Figure 8 As shown, the etching stop layer 26 is provided to cover the entire upper surface of the metal pad 12, except for the area where the opening 15a is located. Figure 7 and Figure 8 As shown, the inner end of the etching stopper layer 26 protrudes inward relative to the inner peripheral surface of the opening portion 15a. Therefore, the etching stopper layer 26 has a protruding portion 26a. In addition, the thickness Hb2 of the etching stopper layer 26 is preferably 1μm or more. The width L21 of the portion extending between the insulating layer 15 and the metal pad 12 is preferably greater than the amount of undercut expected by etching to form the recessed portion 12a of the metal pad 12. The width L21 is preferably greater than a value in the range of 0.1 to 3 times the depth Hm.

[0077] The metal layer 17 is provided to cover the upper surface of the metal pad 12 exposed through the opening portion 15a of the insulating layer 15. In the present embodiment, the metal layer 17 is formed to exist in the undercut 12d formed below the inner end of the etching stopper layer 26. Specifically, as shown in FIG. Figure 8As shown, the metal layer 17 is formed to cover the portion below the protrusion 26a of the etching stopper layer 26. Due to the difference in film thickness, a step difference 18 is formed between the etching stopper layer 26 and the Ni film 17a.

[0078] As in Example 1, the etching stopper layer 26 may not protrude inside the opening 15a, but preferably covers the lower end of the opening 15a. Therefore, when the length by which the protrusion 26a protrudes from the inner peripheral surface of the opening 15a is represented by L22, the length L22 satisfies the inequality L22≥0. Further, the width L20 of the etching stopper layer 26 is equal to the sum of the length L21 and the length L22 (L20 = L21 + L22).

[0079] Next, the diameter of the metal pad 12 is represented by Wm, and the inner diameter of the opening 15a of the insulating layer 15 is represented by Wo. Further, the inner diameter of the etching stopper layer 26 is represented by Wb2i, and the outer diameter of the etching stopper layer 26 is represented by Wb2o. The inner diameter Wo of the opening 15a is equal to or greater than the inner diameter Wb2i of the etching stopper layer 26 (Wb2i≤Wo). Further, the inner diameter Wo of the opening 15a is less than the outer diameter Wm of the metal pad 12 (Wo < Wm). Therefore, the inner diameter Wb2i of the etching stopper layer 26, the inner diameter Wo of the opening 15a, and the outer diameter Wm of the metal pad 12 satisfy the relationship represented by Wb2i≤Wo < Wm.

[0080] Next, the etching stopper layer 26 extends from the lower end of the opening 15a to the upper surface of the metal pad 12 and is formed to cover the side surface of the metal pad 12. Therefore, in the present embodiment, the outer diameter Wb2o of the etching stopper layer 26 is greater than the outer diameter Wm of the metal pad 12 (Wb2o>Wm).

[0081] In the wiring substrate 20 according to the present embodiment, the side surface of the metal pad 12 is covered with the etching stopper layer 26. Thereby, dispersion of a metal such as Cu from the side surface of the metal pad 12 to the insulating layer 15 can be suppressed. As a result, deterioration and peeling of the insulating layer 15 can be suppressed, and peeling of the insulating layer 15 from the upper surface of the metal pad 12 can be suppressed as in Example 1.

[0082] Then, a method for manufacturing the wiring substrate 20 will be described with reference to the drawings.

[0083] First, as in Example 1, a metal pad 12 is formed on the base material 11.

[0084] Then, a resist 82 is formed by coating the base material 11 and the metal pad 12 with a resist solution and performing exposure and development. The resist 82 has an opening 82a formed in the region where the etching stopper layer 26 is to be provided. Specifically, in the present embodiment, the opening 82a is formed such that the side surface of the metal pad 12 is exposed through the resist 82, as Fig. 9A As shown, an etching stopper layer 26 is formed on the side surface of the metal pad 12. Fig. 9B As shown, the surface of metal pad 12 exposed through opening 82a is etched by an etchant, thereby forming recess 12c.

[0085] Then, if Fig. 9C As shown, an etching stopper layer 26 is formed on the recessed portion 12c by dry plating (such as sputtering), wet plating, etc. The etching stopper layer 26 is formed by, for example, chemical Ni plating.

[0086] Then, the resist 82 is peeled off. After this step, as in Embodiment 1, the insulating layer 15 is formed on the substrate 11, and surface etching is performed on the metal pad 12 exposed through the opening 15a of the insulating layer 15. Subsequently, ENIG treatment is performed, thereby forming the metal layer 17 on the metal pad 12.

[0087] By the above-described method, the wiring substrate 20 is manufactured.

[0088] The manufacturing method of the wiring substrate 20 according to the present embodiment includes the step of forming the etching stopper layer 26 after forming the metal pad 12, wherein the etching stopper layer 26 is formed to cover the side surface of the metal pad 12. Thus, the adhesion between the side surface of the metal pad 12 and the insulating layer 15 can be improved, and the metal can be suppressed from being dispersed into the insulating layer 15. As a result, as in Embodiment 1, the degradation and peeling of the insulating layer 15 can be suppressed, and the peeling of the insulating layer 15 from the upper surface of the metal pad 12 can be suppressed.

[0089] Although the present disclosure has been described with reference to the embodiments, the present disclosure is not limited to these embodiments. It is obvious to those skilled in the art that various modifications, improvements, combinations, etc. may be made.

[0090] Although the above-mentioned embodiments 1 and 2 relate to examples in which the planar shapes of the opening 15a and the metal pad 12 are circular and the planar shapes of the etching stopper layers 16 and 26 are ring-shaped, the planar shapes are not limited to these shapes. For example, the planar shape may be a polygon such as a square, rectangle or hexagon, or an ellipse. The planar shape may be a polygon with chamfered corners.

[0091] Fig.10 A modified embodiment of the wiring substrate 10 according to Embodiment 1 is shown. In addition, Fig.11 It is along Fig.10 The cross-sectional view taken along the line XI-XI shown in FIG. Fig.10 and Fig.11 As shown, the metal pad 12 and the opening portion 15a may be formed to have a rectangular planar shape. The etching stopper layer 16 may be formed to have a rectangular frame shape in a plan view.

[0092] In addition, in the case where the planar shape is a rectangle, the inequality Wbi≤Wo<Wm is satisfied, where Wm represents the width of the metal pad 12, Wo represents the width of the opening 15a of the insulating layer 15, Wbi represents the width of the opening of the etching stopper layer 16, and Wbo represents the width of the profile of the etching stopper layer 16. Similarly, the length L2 of the protrusion 16a of the etching stopper layer 16 satisfies the inequality L2≥0. For example, in the case where the planar shape is a rectangle, it can be Fig.11 The width is defined in the longitudinal cross section shown. Alternatively, the width may be defined in a transverse cross section or a diagonal cross section instead of in a longitudinal cross section. This is also true for the wiring substrate 20 according to Embodiment 2.

[0093] In addition, although a semiconductor package substrate is used as an example of a wiring substrate in the above-mentioned embodiment, the wiring substrate is not limited to the semiconductor package substrate. The wiring substrate may be a printed circuit board as long as a semiconductor device can be mounted thereon. In addition, the wiring substrate may be a single-sided board, a double-sided board, a multi-layer board, etc.

[0094] Furthermore, the above-described embodiment describes an exemplary case where metal pad 12 and opening portion 15a have the same planar shape. However, these planar shapes may be the same as or different from each other. Furthermore, the planar shape may be any shape.

[0095] Although the semi-additive method is described as an example of a method for manufacturing a metal pad in the above-described embodiment, the manufacturing method is not limited to this method. For example, any manufacturing method such as a full-additive method may be used.

[0096] The present disclosure allows various embodiments and modifications without departing from the broader spirit and scope of the present disclosure. In addition, the above embodiments are used to explain the present disclosure and do not limit the scope of the present disclosure. In other words, the scope of the present disclosure is limited by the attached claims, rather than by the embodiments. Then, various modifications within the spirit of the claims and the disclosure equivalent to the claims are considered to be within the scope of the present disclosure.

Claims

1. A wiring substrate having a mounting pad for mounting a semiconductor device on its surface, the wiring substrate comprising: A metal pad disposed on one of the major surfaces of the substrate; an insulating layer provided to cover a side surface of the metal pad and at least a portion of an upper surface of the metal pad and provided with an opening portion exposing a portion of the upper surface of the metal pad; and a metal layer disposed on the metal pad exposed by the opening, wherein A pad region of the mounting pad is defined by the opening formed in the insulating layer, and The wiring substrate further includes an etching stopper layer disposed between an upper surface of the metal pad and the insulating layer, the etching stopper layer being disposed to surround a lower end of the opening portion and extending outwardly from the lower end of the opening portion toward an outer circumference.

2. The wiring substrate according to claim 1, wherein: The etching stopper layer is in contact with the metal layer at least at one end portion on the opening side.

3. The wiring substrate according to claim 1, wherein The etch stop layer is made of a metal different from a metal made of the metal pad.

4. The wiring substrate according to claim 1, wherein: The etching stopper layer is made of an inorganic material.

5. The wiring substrate according to claim 1, wherein An end portion of the etching stopper layer on the opening portion side protrudes toward the center of the opening portion relative to an inner peripheral surface of the opening portion.

6. The wiring substrate according to claim 1, wherein The etching stopper layer extends to an outer peripheral side edge of the metal pad and covers a side surface of the metal pad.

7. The wiring substrate according to claim 1, wherein: An end portion of the etching stopper layer on the opening side is located at a lower end of the opening.

8. A method for manufacturing a wiring substrate having mounting pads for mounting a semiconductor device on its surface, the manufacturing method comprising the steps of: forming an etch stop layer on a metal pad provided on one of the major surfaces of the substrate; forming an insulating layer covering the side surface of the metal pad and at least a portion of the upper surface of the metal pad, and providing an opening portion exposing a portion of the upper surface of the metal pad; as well as forming a metal layer on the metal pad exposed by the opening, wherein A pad region of the mounting pad is defined by the opening formed in the insulating layer, and The etching stopper layer is formed to surround a lower end of the opening portion and to extend outward from the lower end of the opening portion toward an outer circumference.

9. The method for manufacturing a wiring substrate according to claim 8, wherein: The metal layer is formed so as to be in contact with at least one end portion of the etching stopper layer on the opening side.

10. The method for manufacturing a wiring substrate according to claim 8, wherein: The etch stop layer is made of a metal different from a metal made of the metal pad.

11. The method for manufacturing a wiring substrate according to claim 8, wherein: The etching stopper layer is made of an inorganic material.

12. The method for manufacturing a wiring substrate according to claim 8, wherein: The end portion of the etching stopper layer on the opening portion side is formed to protrude toward the center of the opening portion relative to the inner peripheral surface of the opening portion.

13. The method for manufacturing a wiring substrate according to claim 8, wherein: The etch stopper layer is formed to extend to an outer peripheral side edge of the metal pad and cover a side surface of the metal pad.

14. The method for manufacturing a wiring substrate according to claim 8, wherein: The end portion of the etching stopper layer on the opening portion side is formed so as to be located at a lower end of the opening portion.

Images