A signal processing method and related device based on a radio frequency system-on-chip

Abstract

An embodiment of the present application provides a signal processing method and related device based on a radio frequency system-on-chip. The method includes: receiving a target linear frequency modulation signal; determining a complex number array in the frequency domain; determining the energy value of each frequency component according to the amplitude and phase of each element to obtain a plurality of energy values; performing a sliding window summation operation on the plurality of energy values in the time domain to obtain a plurality of total energy values; determining the maximum total energy value among the plurality of total energy values; and determining the target symbol value of the preamble of the target linear frequency modulation signal according to the maximum total energy value. After receiving the target linear frequency modulation signal, a complex number array can be determined according to a preset down-converted linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the preamble of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm, which is beneficial to improving the accuracy of positioning the starting position of signal data.

Description

Technical Field

[0001] This application belongs to the field of signal processing of radio frequency system-on-chip (RF SoC), and particularly relates to a signal processing method and related device based on an RF SoC. Background Art

[0002] In recent years, with the rapid development of the Internet of Things (IoT), thousands of devices are connected to the network every day. Facing such a huge market demand, traditional digital signal processing technologies have long been overwhelmed, and more requirements such as high computing power and low power consumption are put forward for the new generation of digital signal processing. The RF SoC equipped with a radio frequency module has become an important support for the development of the IoT. However, in order to adapt to the needs of the IoT, there are still many problems to be solved in the signal processing of the RF SoC. Summary of the Invention

[0003] The embodiments of this application provide a signal processing method and related device based on an RF SoC. After receiving a target linear frequency modulation (LFM) signal, a complex number array can be determined according to a preset down-converted LFM signal and the target LFM signal, and the target symbol value of the preamble of the target LFM signal can be determined according to the maximum energy value algorithm, which is beneficial to improving the accuracy of positioning the starting position of signal data.

[0004] In a first aspect, the embodiments of this application provide a signal processing method based on an RF SoC, which is applied to the digital signal processor of the RF SoC. The RF SoC includes the digital signal processor and a microcontroller; the method includes:

[0005] Receiving a target LFM signal;

[0006] Determining the multiplication operation result of the target LFM signal and a preset down-converted LFM signal to obtain a target signal;

[0007] Performing a fast Fourier transform (FFT) on the target signal to obtain a complex number array in the frequency domain. The complex number array includes multiple elements, and a single element includes the amplitude and phase of a frequency component;

[0008] Determining the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values;

[0009] Performing a sliding window summation operation on the multiple energy values in time sequence to obtain multiple total energy values;

[0010] Determining the maximum total energy value among the multiple total energy values;

[0011] Determining the target symbol value of the preamble of the target LFM signal according to the maximum total energy value.

[0012] In a possible example, after receiving the target chirp signal, it includes:

[0013] Obtain the signal strength information of the target chirp signal;

[0014] Determine the target gain value according to the signal strength information;

[0015] Call the driver layer function to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the radio frequency module according to the target gain value.

[0016] In a possible example, the calling the driver layer function to transmit the target gain value to the microcontroller includes:

[0017] Call the first driver layer function to store the target gain value in the target storage area of the inter-processor communication peripheral;

[0018] Call the second driver layer function to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executing program and read the target gain value stored in the inter-processor communication peripheral after receiving the interrupt request message.

[0019] In a possible example, the determining the target gain value according to the signal strength information includes:

[0020] Determine the average power of the target chirp signal according to the signal strength information;

[0021] Obtain the historical average power of the historical processing period;

[0022] Determine the change rate of the signal strength according to the average power and the historical average power;

[0023] Determine the first adjustment coefficient according to the change rate of the signal strength;

[0024] Perform a fast Fourier transform on the target chirp signal to obtain a target spectrum;

[0025] Determine the bandwidth, center frequency and flatness of the target spectrum;

[0026] Determine the second adjustment coefficient according to the bandwidth, the center frequency and the flatness;

[0027] Determine the matching degrees of the target chirp signal with multiple template signals respectively;

[0028] Determine the target template signal with the largest matching degree among the multiple template signals;

[0029] Determine a reference gain value according to the target template signal;

[0030] Determine the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the base gain value.

[0031] In a possible example, the determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the base gain value includes:

[0032] Determine a first gain value according to the base gain value and the first adjustment coefficient;

[0033] Determine a second gain value according to the first gain value, the second adjustment coefficient, and the flatness;

[0034] Determine a target weight according to the matching degree of the target template signal;

[0035] Determine the target gain value according to the target weight, the second gain value, and the reference gain value.

[0036] In a possible example, before receiving the target chirp signal, it includes:

[0037] Obtain the number of the first data slices produced in the current state;

[0038] Determine the number of the second data slices consumed in the current state;

[0039] Judge whether the number of the first data slices and the number of the second data slices meet the target constraint conditions;

[0040] If it is judged that the number of the first data slices and the number of the second data slices meet the target constraint conditions, then determine to receive the target chirp signal.

[0041] In a second aspect, an embodiment of the present application provides a signal processing device based on a radio frequency system-on-chip, which is applied to a digital signal processor of the radio frequency system-on-chip. The radio frequency system-on-chip includes the digital signal processor and a microcontroller. The device includes a receiving unit, a determining unit, and a sliding window operation unit; wherein,

[0042] The receiving unit is configured to receive a target chirp signal;

[0043] The determining unit is configured to determine a multiplication operation result of the target chirp signal and a preset down-converted chirp signal to obtain a target signal;

[0044] The determining unit is further configured to perform a fast Fourier transform on the target signal to obtain a complex number array in the frequency domain. The complex number array includes a plurality of elements, and a single element includes the amplitude and phase of a frequency component.

[0045] The determining unit is further configured to determine the energy value of each frequency component according to the amplitude and phase of each element, so as to obtain a plurality of energy values.

[0046] The sliding window operation unit is configured to perform a sliding window summation operation on the plurality of energy values in time series to obtain a plurality of total energy values.

[0047] The determining unit is further configured to determine the maximum total energy value among the plurality of total energy values.

[0048] The determining unit is further configured to determine the target symbol value of the preamble of the target linear frequency modulation signal according to the maximum total energy value.

[0049] A third aspect of the present application provides an electronic device, including: a processor and a memory; and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for performing some or all of the steps described in the first aspect.

[0050] A fourth aspect of the embodiments of the present application provides a computer-readable storage medium, where the computer-readable storage medium is used to store a computer program, and the computer program enables a computer to execute instructions for performing some or all of the steps described in the first aspect of the embodiments of the present application.

[0051] A fifth aspect of the embodiments of the present application provides a computer program product, where the computer program product includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to enable a computer to execute some or all of the steps described in the first aspect of the embodiments of the present application. The computer program product may be a software installation package.

[0052] It can be seen that in the embodiment of the present application, the digital signal processor of the radio frequency system-on-chip can first receive the target chirp signal, and then determine a complex number array in the frequency domain according to the target chirp signal and the preset down-converted chirp signal. The complex number array includes multiple elements, and a single element includes the amplitude and phase of a frequency component. Then, according to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain multiple energy values. Further, a sliding window summation operation is performed on the multiple energy values in the time domain to obtain multiple total energy values. Still further, the maximum total energy value among the multiple total energy values is determined. Finally, the target symbol value of the preamble of the target chirp signal is determined according to the maximum total energy value. After receiving the target chirp signal, the complex number array can be determined according to the preset down-converted chirp signal and the target chirp signal, and the target symbol value of the preamble of the target chirp signal can be determined according to the maximum energy value algorithm. Compared with traversing all energy values to find the largest one, the influence of interference and noise is reduced, which is beneficial to improving the accuracy of signal data starting position positioning. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained according to these drawings.

[0054] Figure 1 is a schematic structural diagram of a radio frequency system-on-chip provided by an embodiment of the present application;

[0055] Figure 2 is a schematic flowchart of a signal processing method based on a radio frequency system-on-chip provided by an embodiment of the present application;

[0056] Figure 3 is a schematic flowchart of a signal processing provided by an embodiment of the present application;

[0057] Figure 4 is a schematic flowchart of another signal processing method based on a radio frequency system-on-chip provided by an embodiment of the present application;

[0058] Figure 5 is a schematic flowchart of a process for transmitting a target gain value;

[0059] Figure 6 is a schematic flowchart of a signal data reception management provided by an embodiment of the present application;

[0060] Figure 7It is a schematic structural diagram of an electronic device provided by an embodiment of the present application;

[0061] Figure 8 It is a block diagram of the functional units of a signal processing device based on a radio frequency system-on-chip provided by an embodiment of the present application. Specific embodiments

[0062] In order to enable those skilled in the art to better understand the solution of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

[0063] The terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion. For example, a process, method, system, product or device that includes a series of steps or units is not limited to the listed steps or units, but optionally further includes steps or units not listed, or optionally further includes other steps or units inherent to these processes, methods, products or devices.

[0064] Referring to "embodiment" in this article means that a specific feature, structure or characteristic described in connection with the embodiment can be included in at least one embodiment of the present application. The appearance of this phrase in various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art will explicitly and implicitly understand that the embodiments described herein can be combined with other embodiments.

[0065] The "and / or" in the embodiments of the present application describes the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent the following three situations: A exists alone; A and B exist simultaneously; B exists alone. Among them, A and B can be singular or plural.

[0066] In the embodiments of the present application, the symbol " / " can represent that the associated objects before and after are an "or" relationship. In addition, the symbol " / " can also represent a division sign, that is, perform a division operation. For example, A / B can represent A divided by B.

[0067] The "at least one (piece)" or its similar expression in the embodiments of the present application refers to any combination of these items, including any combination of a single item (piece) or plural items (pieces), meaning one or more, and "more than one" means two or more than two. For example, at least one (piece) of a, b, or c can represent the following seven cases: a, b, c, a and b, a and c, b and c, a, b, and c. Each of a, b, and c can be an element or a set containing one or more elements.

[0068] In the embodiments of the present application, "equal to" can be used in conjunction with "greater than" and is applicable to the technical solutions adopted when it is greater than, or can also be used in conjunction with "less than" and is applicable to the technical solutions adopted when it is less than. When "equal to" is used in conjunction with "greater than", it is not used in conjunction with "less than"; when "equal to" is used in conjunction with "less than", it is not used in conjunction with "greater than".

[0069] To better understand the solutions of the embodiments of the present application, the electronic devices, related concepts, and backgrounds that may be involved in the embodiments of the present application will be introduced first below.

[0070] The electronic device in the application embodiment is a device with wireless communication function, which can be called a terminal, user equipment (UE), mobile station (MS), mobile terminal (MT), access terminal device, in-vehicle terminal device, industrial control terminal device, UE unit, UE station, mobile station, remote station, remote terminal device, mobile device, UE terminal device, wireless communication device, UE agent or UE device, etc. The terminal device can be fixed or mobile. It should be noted that the terminal device can support at least one wireless communication technology, such as LTE, new radio (NR), wideband code division multiple access (WCDMA), etc. For example, the terminal device can be a mobile phone, tablet (pad), desktop computer, laptop computer, all-in-one computer, in-vehicle terminal, virtual reality (VR) terminal device, augmented reality (AR) terminal device, wireless terminal in industrial control, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, wireless terminal in smart home, cellular phone, cordless phone, session initiation protocol (SIP) phone, wireless local loop (WLL) station, personal digital assistant (PDA), handheld device with wireless communication function, electronic device or other processing devices connected to a wireless modem, wearable device, terminal device in a future mobile communication network or terminal device in a future evolved public land mobile network (PLMN), etc.

[0071] Please refer to Figure 1 , Figure 1 which is a schematic diagram of the architecture of a radio frequency system-on-chip provided by the embodiment of the present application. As Figure 1As shown, the radio frequency system-on-chip (RFSoC) chip 1 includes a digital signal processor 10, a microcontroller 20, a first peripheral 30 of the digital signal processor 10, a second peripheral 40 of the microcontroller 20, a radio frequency module 50, a digital front end 60, and a digital front end interface 70. Among them, the digital signal processor 10 is respectively connected to the first peripheral 30 and the microcontroller 20, the microcontroller 20 is respectively connected to the second peripheral 40 and the digital front end, the second peripheral 40 is connected to the radio frequency module 50, and the digital front end 60 is respectively connected to the digital front end interface 70 and the radio frequency module 50.

[0072] Among them, the radio frequency system-on-chip is an RFSoC chip that can be used for Internet of Things communication.

[0073] Among them, the digital signal processor 10 can be a DSP (Digital Signal Processing) core. The digital signal processor 10 can select the CEVA-BX1 architecture. The CEVA-BX1 architecture uses an 11-stage pipeline and a 5-way VLIW microarchitecture, providing parallel processing of a dual scalar computing engine, load / store, and program control, with a main frequency of 2 GHz.

[0074] Among them, the first peripheral 30 includes an asynchronous transceiver UART, a digital front end DFE data interface, a direct memory access DMA, an inter-processor communication (IPC) peripheral, a timer Timer, and a hardware accelerator. The hardware accelerator can include an FFT fast Fourier transform, a trigger, a multiplier, etc. The UART is a debugging interface that can output print information. The DFE interface is responsible for data interaction with the digital front end DFE. The DMA allows the peripheral to directly transfer data to the memory of the digital signal processor 10 or transfer data from the memory of the digital signal processor 10 to the peripheral.

[0075] Among them, the microcontroller 20 can be an MCU core. The microcontroller 20 can select the arm cortex-m0. Its biggest feature is a low-power design. Its core architecture is ARMv6M, and its computing power can reach 0.9 DMIPS / MHz.

[0076] Among them, the second peripheral 40 includes an asynchronous transceiver UART / SPI interface, a DFE control interface, a timer Timer, and a WatchDog watchdog timer. The SPI interface is used for the microcontroller 20 to configure the radio frequency module 50 and the digital front end 60.

[0077] Among them, a driver layer can be designed. The driver layer directly interacts with the hardware device, responsible for the initialization, configuration, and control of the hardware device. The driver layer implements specific hardware driver programs and provides operation interfaces for the hardware device. Specifically, DSP peripheral drivers, MCU peripheral drivers, and RF drivers are designed. The DSP peripheral driver mainly configures, controls, and manages interrupts for the UART / DFE data interface, DMA, IPC, Timer, and hardware accelerator. The MCU peripheral driver mainly configures, controls, and manages interrupts for the UART / SPI interface, DFE control interface, Timer, and WatchDog. The RF driver is developed to implement the control of the RF module and DFE, mainly including transceiver (Rx / Tx) control and frequency point, bandwidth, and filter coefficient configuration.

[0078] Among them, the digital signal processor 10 of the radio frequency system-on-chip 1 can receive signal data from an external device through the DFE interface. For example, it can receive a chirp signal.

[0079] Among them, a hardware abstraction layer, namely the HAL development mode, can be designed. As a bridge connecting the hardware driver and the upper-layer program, HAL is finally encapsulated in the form of a function library. The upper-layer physical layer algorithm program can call the standard HAL interface to operate the hardware. Through the HAL design, the portability of the code can be improved, the development of the hardware driver can be simplified, and the stability and security of the system can be enhanced.

[0080] In a possible example, the digital signal processor 10 of the radio frequency system-on-chip 1 can first receive a target chirp signal. Then, the digital signal processor 10 determines a complex number array in the frequency domain according to the target chirp signal and a preset down-converted chirp signal. The complex number array includes multiple elements, and a single element includes the amplitude and phase of a frequency component. Then, the digital signal processor 10 determines the energy value of each frequency component according to the amplitude and phase of each element, obtaining multiple energy values. Further, the digital signal processor 10 performs a sliding window summation operation on the multiple energy values in the time domain, obtaining multiple total energy values. Still further, the digital signal processor 10 determines the maximum total energy value among the multiple total energy values. Finally, the digital signal processor 10 determines the target symbol value of the preamble of the target chirp signal according to the maximum total energy value. After receiving the target chirp signal, the complex number array can be determined according to the preset down-converted chirp signal and the target chirp signal, and the target symbol value of the preamble of the target chirp signal can be determined according to the maximum energy value algorithm. Compared with traversing all energy values to find the largest one, the influence of interference and noise is reduced, which is beneficial to improving the accuracy of signal data start position positioning.

[0081] Please refer to Figure 2 , Figure 2It is a schematic flowchart of a signal processing method based on a radio frequency system-on-chip provided by an embodiment of the present application, which is applied to a digital signal processor of a radio frequency system-on-chip. The radio frequency system-on-chip includes the digital signal processor and a microcontroller. The method includes:

[0082] Step S201: Receive a target chirp signal.

[0083] Among them, the DFE interface receives the target chirp signal from an external device, and transfers the target chirp signal from the DFE interface RAM to the internal Buffer of the digital signal processor through DMA.

[0084] Among them, the digital signal processor can divide the internal Buffer into 2×Q parts, one part is used for read operation, and the other part is used for write operation, allowing read and write operations to be performed in parallel. Here, the internal interface Buffer needs to be able to store data in the case of the maximum time slot format SF and the maximum oversampling rate multiple Q.

[0085] Step S202: Determine the multiplication result of the target chirp signal and a preset down-converted chirp signal to obtain a target signal.

[0086] Step S203: Perform a fast Fourier transform on the target signal to obtain a complex number array in the frequency domain. The complex number array includes multiple elements, and a single element includes the amplitude and phase of a frequency component.

[0087] Among them, the preset down-converted chirp signal can be set according to actual needs and is not limited here.

[0088] Among them, perform an FFT transform on the target signal to obtain a complex number array in the frequency domain.

[0089] Among them, the operation formula is as follows: , represents the target signal, represents the target chirp signal, represents the preset down-converted chirp signal.

[0090] Step S204: Determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values.

[0091] Among them, assume that the element in the complex number array is Z = A×e jm , where A represents the amplitude and m represents the phase. According to Euler's formula e jn = cosm + jsinm, then Z = Acosm + jAsinm. The energy value = .

[0092] Step S205: Perform a sliding window summation operation on the multiple energy values in time sequence to obtain multiple total energy values.

[0093] Among them, the multiple energy values are arranged in order. A single window corresponds to one energy value. The sliding window summation operation starts from the first energy value, and the number of windows for each summation is a preset number. Each time, the window slides one window in the order of window arrangement.

[0094] Among them, the preset number can be set manually or default by the system, and is not limited here. For example, the preset number can be 3, that is, the energy of 3 windows each time.

[0095] Among them, the energy values of the preset number of adjacent points are accumulated according to the following formula:

[0096] Step S206: Determine the maximum total energy value among the multiple total energy values.

[0097] Step S207: Determine the target symbol value of the preamble of the target linear frequency modulation signal according to the maximum total energy value.

[0098] Among them, the formula for the target symbol value of the preamble is as follows: , represents the target symbol value to be detected.

[0099] Specifically, the digital signal processor can design multiple algorithm modules. The multiple algorithm modules include a preamble synchronization detection algorithm module, a frequency offset calculation algorithm module, a frequency offset compensation algorithm module, a Payload detection algorithm module, and a decoding algorithm module. The algorithm steps executed by the preamble detection algorithm module can include Step S202 - Step S206.

[0100] Among them, the frequency offset estimation operation is to calculate the frequency offset for multiple linear frequency modulation signals. Specifically, the following operations are performed on each linear frequency modulation signal to obtain multiple downchirp detection values: Determine the complex number array in the frequency domain according to the linear frequency modulation signal and the preset up-frequency linear frequency modulation signal. The complex number array includes multiple elements, and a single element includes the amplitude and phase of a frequency component; Determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values; Perform a sliding window summation operation on the multiple energy values to obtain multiple total energy values; Determine the maximum total energy value among the multiple total energy values and use this maximum total energy value as the downchirp detection value; Calculate the average value of the multiple downchirp detection values to obtain the frequency offset.

[0101] Among them, the frequency offset compensation algorithm module is used to compensate the subsequent data according to the frequency offset calculated by the frequency offset calculation algorithm module. The Payload detection algorithm module is used to locate the starting position of the Payload and demodulate the data after the starting position. The decoding algorithm module includes Gray mapping, diagonal interleaving decoding, channel whitening, decoding, and CRC check. The front-to-back order of multiple algorithm modules in signal processing is as Figure 3 shown, Figure 3 which is a schematic flowchart of a signal processing provided by an embodiment of the present application: preamble synchronization detection - frequency offset calculation - frequency offset compensation - Payload detection - decoding.

[0102] It can be seen that in the embodiment of the present application, the digital signal processor of the radio frequency system-on-chip can first receive the target linear frequency modulation signal, and then determine the complex number array in the frequency domain according to the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal. The complex number array includes multiple elements, and a single element includes the amplitude and phase of a frequency component. Then, according to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain multiple energy values. Further, a sliding window summation operation is performed on the multiple energy values in the time domain to obtain multiple total energy values. Further, the maximum total energy value among the multiple total energy values is determined. Finally, according to the maximum total energy value, the target symbol value of the preamble of the target linear frequency modulation signal is determined. After receiving the target linear frequency modulation signal, the complex number array can be determined according to the preset down-converted linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the preamble of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm. Compared with traversing multiple energy values to find the maximum energy value among them, it is less affected by interference and noise, which is beneficial to improving the accuracy of positioning the starting position of signal data.

[0103] Please refer to Figure 4 , Figure 4 which is a schematic flowchart of another signal processing method based on the radio frequency system-on-chip provided by an embodiment of the present application. Among them, after receiving the target linear frequency modulation signal, the above method may further include the following steps:

[0104] Step S401, obtaining the signal strength information of the target linear frequency modulation signal;

[0105] Among them, the signal strength information includes the average power of the target linear frequency modulation signal.

[0106] Step S402, determining the target gain value according to the signal strength information;

[0107] Among them, in order to keep the signal strength of the linear frequency modulation signal received by the digital signal processor within a suitable strength range to ensure the accuracy and stability of signal processing, it is necessary to perform gain control on the radio frequency module.

[0108] Step S403: Call the driver layer function to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the RF module according to the target gain value.

[0109] Among them, the upper-layer application of the digital signal processor calls the hardware abstraction function HAL_RfSetGain in the function library of the hardware abstraction layer in the HAL development mode, and transmits the target gain value to the microcontroller through this hardware abstraction function HAL_RfSetGain.

[0110] Optionally, the steps for the microcontroller to perform gain control are as follows: First, configure the SPI communication. Then, construct an SPI communication command according to the gain control register address and gain value of the RF module. Next, send the SPI communication command to the RF module through the SPI interface. Finally, obtain the response signal of the RF module, and judge whether the gain control is successful according to the response signal. If it fails, resend the command or check the error reason.

[0111] Among them, configuring the SPI communication includes setting the working mode, clock frequency, data bit number of the SPI, and configuring the chip select model, configuring the chip select pin as the output mode, and setting the initial state as high level. When it is necessary to communicate with the RF module, pull down the chip select signal to select the RF module.

[0112] It can be seen that in this example, the digital signal processor quickly calculates the gain value, and transmits the target gain value to the microcontroller by calling the driver layer function, which is beneficial to improving the efficiency and stability of the gain control of the RF module.

[0113] Please refer to Figure 5 , Figure 5 is a schematic flowchart of a process for transmitting the target gain value provided by an embodiment of the present application. Among them, when calling the driver layer function to transmit the target gain value to the microcontroller, it includes:

[0114] Step S501: Call the first driver layer function to store the target gain value in the target storage area of the inter-processor communication peripheral;

[0115] Among them, the digital signal processor can call the first driver layer function DRV_DspIpcD2MMem32Write to write the target gain value into the target storage area of the inter-processor communication peripheral.

[0116] Step S502: Call the second driver layer function to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executing program and read the target gain value stored in the inter-processor communication peripheral after receiving the interrupt request message.

[0117] Among them, the digital signal processor can call DRV_DspIpcD2MIntSend to send an interrupt request message to the microcontroller. The microcontroller parses the interrupt request message, pauses the currently executing program, and reads the target gain value stored in the target storage area of the inter-processor communication peripheral.

[0118] It can be seen that in this example, by quickly calculating the gain value by the digital signal processor and transmitting the target gain value to the microcontroller by calling the driver layer function, it is beneficial to improve the efficiency and stability of the gain control of the radio frequency module.

[0119] In a possible example, the determining the target gain value according to the signal strength information includes: determining the average power of the target chirp signal according to the signal strength information; obtaining the historical average power of the historical processing period; determining the change rate of the signal strength according to the average power and the historical average power; determining a first adjustment coefficient according to the change rate of the signal strength; performing a fast Fourier transform on the target chirp signal to obtain a target spectrum; determining the bandwidth, center frequency, and flatness of the target spectrum; determining a second adjustment coefficient according to the bandwidth, the center frequency, and the flatness; respectively determining the matching degrees of the target chirp signal with multiple template signals; determining the target template signal with the largest matching degree among the multiple template signals; determining a reference gain value according to the target template signal; and determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the base gain value.

[0120] Among them, (average power - historical average power) / number of cycles = change rate of signal strength, and the number of cycles refers to the number of historical processing cycles, and the number of historical processing cycles can be preset.

[0121] Among them, if it is determined that the change rate of the signal strength is greater than 0 and greater than the preset rising threshold, it means that the signal strength is rising rapidly, and there may be an over-strong signal about to appear. At this time, the change rate of the signal strength can be brought into the adjustment coefficient formula of the rising amplitude to obtain the first adjustment coefficient; if it is determined that the change rate of the signal strength is less than 0 and the absolute value of the change rate of the signal strength is greater than the preset falling threshold, it means that the signal strength is falling rapidly, and there may be a weak signal about to appear. At this time, the change rate of the signal strength can be brought into the adjustment coefficient formula of the falling amplitude to obtain the first adjustment coefficient. The adjustment coefficient formula of the rising amplitude is as follows: , is a proportionality constant, is the first adjustment coefficient, is the change rate of the signal strength, is the preset rising threshold; the adjustment coefficient formula of the falling amplitude is as follows: , is a proportionality constant, is the first adjustment coefficient, is the change rate of signal strength, is the preset down threshold. The preset up threshold and the preset down threshold can be set manually or defaulted by the system, which are not limited here.

[0122] Among them, the flatness reflects the uniformity of the spectrum within the entire frequency band. The flatness formula is as follows: , represents the flatness, is the target spectrum obtained after performing FFT transformation on the target linear frequency modulation signal, where .

[0123] Among them, the calculation formula of the second adjustment coefficient is as follows: , where represents the second adjustment coefficient, is the proportionality constant, is the bandwidth, is the ideal bandwidth, is the center frequency, is the ideal center frequency, and m and n are the weight coefficients of the bandwidth and the center frequency respectively.

[0124] Among them, the correlation coefficient between the target linear frequency modulation signal and each template signal can be calculated. The formula of the correlation coefficient is as follows: , represents the correlation coefficient, is the template signal. The closer the correlation coefficient is to 1, the higher the matching degree. Among them, the matching degree = (correlation coefficient + 1) / 2. The template signal can be a preset linear frequency modulation signal, and each template signal can correspond to a reference gain value.

[0125] It can be seen that in this example, when the digital signal processor determines the target gain value, considering the average power, bandwidth, center frequency, flatness and matching degree is beneficial to improving the accuracy of gain value determination and the stability of gain control.

[0126] In a possible example, in terms of determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient and the base gain value, the above method may include the following steps: determining a first gain value according to the base gain value and the first adjustment coefficient; determining a second gain value according to the first gain value, the second adjustment coefficient and the flatness; determining a target weight according to the matching degree of the target template signal; determining the target gain value according to the target weight, the second gain value and the reference gain value.

[0127] Among them, the basic gain value = the current signal power - the target signal power, where the target signal power can be the ideal signal power, and the current signal power is the current signal power of the target linear frequency modulation signal.

[0128] Among them, if the signal strength rises rapidly, the basic gain value is appropriately reduced. At this time, the first gain value = the basic gain value × (1 - the first adjustment coefficient); if the signal strength rises rapidly, the basic gain value is appropriately increased. At this time, the first gain value = the basic gain value × (1 + the first adjustment coefficient).

[0129] Among them, the second gain value = the first gain value × (1 - the second adjustment coefficient × flatness).

[0130] Among them, the target gain value = the target weight × the second gain value + (1 - the target weight) × the reference gain value.

[0131] Among them, the target weight is associated with the matching degree. The larger the matching degree, the smaller the target weight; the smaller the matching degree, the larger the target weight.

[0132] It can be seen that in this example, when the digital signal processor determines the target gain value, considering the average power, bandwidth, center frequency, flatness, and matching degree is beneficial to improving the accuracy of gain value determination and the stability of gain control.

[0133] Please refer to Figure 6 , Figure 6 which is a schematic flow diagram of signal data reception management provided by an embodiment of the present application. Among them, before receiving the target linear frequency modulation signal, it includes:

[0134] Step S601: Obtain the number of the first data slices produced in the current state.

[0135] Among them, the number of the first data slices produced increases by 1 in a DMA one-time transfer interruption.

[0136] Step S602: Determine the number of the second data slices consumed in the current state.

[0137] Among them, the calculation formula for the number of the second data slices consumed is: , where start_index is the index of the consumed data, and slices_cost is the number of the second data slices consumed.

[0138] Step S603: Determine whether the number of the first data slices and the number of the second data slices meet the target constraint conditions.

[0139] Among them, the target constraint condition is (slicesnum / (2×Q) × (2×Q) - slices_cost >= 2×2×Q), where slicesnum is the number of the first data slices produced.

[0140] Step S604, if it is determined that the number of the first data slices and the number of the second data slices satisfy the target constraint condition, then it is determined to receive the target linear frequency modulation signal.

[0141] It can be seen that in this example, the reception management of the target linear frequency modulation signal can be performed, which is beneficial to improving the stability of DFE interface data transmission.

[0142] Please refer to Figure 7 , Figure 7 which is a schematic structural diagram of an electronic device provided by an embodiment of the present application, applied to a digital signal processor of a radio frequency system-on-chip, and the radio frequency system-on-chip includes the digital signal processor and a microcontroller; as Figure 6 shown, the electronic device includes a processor, a memory, a communication interface, and one or more programs. Among them, the above one or more programs are stored in the above memory, and the above one or more programs are configured with instructions for the above processor to execute the following steps:

[0143] Receive a target linear frequency modulation signal;

[0144] According to the target linear frequency modulation signal and a preset down-converted linear frequency modulation signal, determine a complex number array in the frequency domain. The complex number array includes a plurality of elements, and a single element includes the amplitude and phase of a frequency component;

[0145] According to the amplitude and phase of each element, determine the energy value of each frequency component to obtain a plurality of energy values;

[0146] Perform a sliding window summation operation on the plurality of energy values in time sequence to obtain a plurality of total energy values;

[0147] Determine the maximum total energy value among the plurality of total energy values;

[0148] According to the maximum total energy value, determine the target symbol value of the preamble of the target linear frequency modulation signal.

[0149] It can be seen that in the embodiments of the present application, the electronic device may first receive a target linear frequency modulation signal, and then determine a complex number array in the frequency domain according to the target linear frequency modulation signal and a preset down-converted linear frequency modulation signal. The complex number array includes multiple elements, and a single element includes the amplitude and phase of a frequency component. Then, according to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain multiple energy values. Further, a sliding window summation operation is performed on the multiple energy values in the time domain to obtain multiple total energy values. Further still, the maximum total energy value among the multiple total energy values is determined. Finally, the target symbol value of the preamble of the target linear frequency modulation signal is determined according to the maximum total energy value. After receiving the target linear frequency modulation signal, the complex number array can be determined according to the preset down-converted linear frequency modulation signal and the target linear frequency modulation signal, and the target symbol value of the preamble of the target linear frequency modulation signal can be determined according to the maximum energy value algorithm. Compared with traversing all energy values to find the largest one, the influence of interference and noise is reduced, which is beneficial to improving the accuracy of signal data starting position positioning.

[0150] In a possible example, in terms of determining the complex number array in the frequency domain according to the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal, the above program includes instructions for performing the following steps:

[0151] Determine the multiplication operation result of the target linear frequency modulation signal and the preset down-converted linear frequency modulation signal to obtain a target signal;

[0152] Perform a fast Fourier transform on the target signal to obtain the complex number array in the frequency domain.

[0153] In a possible example, after receiving the target linear frequency modulation signal, the above program includes instructions for performing the following steps:

[0154] Obtain the signal strength information of the target linear frequency modulation signal;

[0155] Determine the target gain value according to the signal strength information;

[0156] Call a driver layer function to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the radio frequency module according to the target gain value.

[0157] In a possible example, in terms of calling a driver layer function to transmit the target gain value to the microcontroller, the above program includes instructions for performing the following steps:

[0158] Call a first driver layer function to store the target gain value in the target storage area of the inter-processor communication peripheral;

[0159] Call the second driver layer function to send an interrupt request message to the microcontroller, which is used to pause the currently executing program and read the target gain value stored in the inter-processor communication peripheral after receiving the interrupt request message.

[0160] In a possible example, in terms of determining the target gain value according to the signal strength information, the above program includes instructions for performing the following steps:

[0161] Determine the average power of the target chirp signal according to the signal strength information;

[0162] Obtain the historical average power of the historical processing period;

[0163] Determine the change rate of the signal strength according to the average power and the historical average power;

[0164] Determine the first adjustment coefficient according to the change rate of the signal strength;

[0165] Perform a fast Fourier transform on the target chirp signal to obtain a target spectrum;

[0166] Determine the bandwidth, center frequency, and flatness of the target spectrum;

[0167] Determine the second adjustment coefficient according to the bandwidth, the center frequency, and the flatness;

[0168] Determine the matching degrees of the target chirp signal with multiple template signals respectively;

[0169] Determine the target template signal with the largest matching degree among the multiple template signals;

[0170] Determine the reference gain value according to the target template signal;

[0171] Determine the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the basic gain value.

[0172] In a possible example, in terms of determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the basic gain value, the above program further includes instructions for performing the following steps:

[0173] Determine the first gain value according to the basic gain value and the first adjustment coefficient;

[0174] Determine the second gain value according to the first gain value, the second adjustment coefficient, and the flatness;

[0175] Determine a target weight according to the matching degree of the target template signal;

[0176] Determine the target gain value according to the target weight, the second gain value, and the reference gain value.

[0177] In a possible example, before receiving the target chirp signal, the above program further includes instructions for performing the following steps:

[0178] Obtain the number of first data slices produced in the current state;

[0179] Determine the number of second data slices consumed in the current state;

[0180] Judge whether the number of the first data slices and the number of the second data slices meet the target constraint conditions;

[0181] If it is judged that the number of the first data slices and the number of the second data slices meet the target constraint conditions, determine to receive the target chirp signal.

[0182] The above mainly introduces the solution of the embodiment of the present application from the perspective of the execution process on the method side. It can be understood that in order for an electronic device to implement the above functions, it includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art should easily realize that, combining the units and algorithm steps of each example described in the embodiments provided in this article, the present application can be implemented in the form of hardware or a combination of hardware and computer software. Whether a certain function is executed in the way of hardware or computer software driving hardware depends on the specific application and design constraint conditions of the technical solution. Professional technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present application.

[0183] Embodiments of the present application can divide the electronic device into functional units according to the above method examples. For example, each functional unit can be divided corresponding to each function, or two or more functions can be integrated into one processing unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit. It should be noted that the division of units in the embodiments of the present application is illustrative, only a logical function division, and there can be other division methods in actual implementation.

[0184] In the case of dividing each functional module corresponding to each function, Figure 8 is a block diagram of the functional unit composition of a signal processing device based on a radio frequency system-on-chip provided by an embodiment of the present application, as Figure 8As shown in the figure, a digital signal processor applied to a radio frequency system-on-chip (RF SoC), where the RF SoC includes the digital signal processor and a microcontroller; the device includes a receiving unit 801, a determining unit 802, a sliding window operation unit 803, and a transmitting unit 804; wherein,

[0185] The receiving unit 801 is configured to receive a target chirp signal;

[0186] The determining unit 802 is configured to determine a complex number array in the frequency domain according to the target chirp signal and a preset down-converted chirp signal, the complex number array includes a plurality of elements, and a single element includes the amplitude and phase of a frequency component;

[0187] The determining unit 802 is further configured to determine the energy value of each frequency component according to the amplitude and phase of each element, and obtain a plurality of energy values;

[0188] The sliding window operation unit 803 is configured to perform a sliding window summation operation on the plurality of energy values in time sequence to obtain a plurality of total energy values;

[0189] The determining unit 802 is further configured to determine the maximum total energy value among the plurality of total energy values;

[0190] The determining unit 802 is further configured to determine the target symbol value of the preamble of the target chirp signal according to the maximum total energy value.

[0191] It can be seen that in the embodiment of the present application, the signal processing device based on the radio frequency system-on-chip can first receive the target chirp signal, and then determine a complex number array in the frequency domain according to the target chirp signal and the preset down-converted chirp signal. The complex number array includes a plurality of elements, and a single element includes the amplitude and phase of a frequency component. Then, according to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain a plurality of energy values. Further, a sliding window summation operation is performed on the plurality of energy values in the time domain to obtain a plurality of total energy values. Further, the maximum total energy value among the plurality of total energy values is determined. Finally, the target symbol value of the preamble of the target chirp signal is determined according to the maximum total energy value. After receiving the target chirp signal, a complex number array can be determined according to the preset down-converted chirp signal and the target chirp signal, and the target symbol value of the preamble of the target chirp signal can be determined according to the maximum energy value algorithm. Compared with traversing all energy values to find the largest one, the influence of interference and noise is reduced, which is beneficial to improving the accuracy of signal data start position positioning.

[0192] In a possible example, in terms of determining the complex number array in the frequency domain according to the target chirp signal and the preset down-converted chirp signal, the determining unit 802 is specifically configured to:

[0193] Determine the multiplication operation result of the target chirp signal and the preset down-chirp signal to obtain the target signal;

[0194] Perform a fast Fourier transform on the target signal to obtain the complex number array in the frequency domain.

[0195] In a possible example, after receiving the target chirp signal, the determining unit 802 is specifically configured to:

[0196] Obtain the signal strength information of the target chirp signal;

[0197] Determine the target gain value according to the signal strength information;

[0198] Call the driver layer function to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the radio frequency module according to the target gain value.

[0199] In a possible example, in terms of calling the driver layer function to transmit the target gain value to the microcontroller, the transmitting unit 804 is specifically configured to:

[0200] Call the first driver layer function to store the target gain value in the target storage area of the inter-processor communication peripheral;

[0201] Call the second driver layer function to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executing program and read the target gain value stored in the inter-processor communication peripheral after receiving the interrupt request message.

[0202] In a possible example, in terms of determining the target gain value according to the signal strength information, the determining unit 802 is further specifically configured to:

[0203] Determine the average power of the target chirp signal according to the signal strength information;

[0204] Obtain the historical average power of the historical processing period;

[0205] Determine the change rate of the signal strength according to the average power and the historical average power;

[0206] Determine the first adjustment coefficient according to the change rate of the signal strength;

[0207] Perform a fast Fourier transform on the target chirp signal to obtain the target spectrum;

[0208] Determine the bandwidth, center frequency, and flatness of the target spectrum;

[0209] Determine a second adjustment coefficient according to the bandwidth, the center frequency, and the flatness;

[0210] Determine the matching degrees of the target chirp signal and multiple template signals respectively;

[0211] Determine a target template signal with the maximum matching degree among the multiple template signals;

[0212] Determine a reference gain value according to the target template signal;

[0213] Determine the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the basic gain value.

[0214] In a possible example, in terms of determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient, and the basic gain value, the determining unit 802 is further specifically configured to:

[0215] Determine a first gain value according to the basic gain value and the first adjustment coefficient;

[0216] Determine a second gain value according to the first gain value, the second adjustment coefficient, and the flatness;

[0217] Determine a target weight according to the matching degree of the target template signal;

[0218] Determine the target gain value according to the target weight, the second gain value, and the reference gain value.

[0219] In a possible example, before receiving the target chirp signal, the determining unit 802 is further specifically configured to:

[0220] Obtain the number of first data slices produced in the current state;

[0221] Determine the number of second data slices consumed in the current state;

[0222] Judge whether the number of first data slices and the number of second data slices meet the target constraint conditions;

[0223] If it is judged that the number of first data slices and the number of second data slices meet the target constraint conditions, then determine to receive the target chirp signal.

[0224] It should be noted that all relevant contents of the steps involved in the above method embodiments can be cited in the function descriptions of the corresponding functional modules, and will not be elaborated here.

[0225] The electronic device provided in this embodiment is used to execute the above-mentioned signal processing method based on the radio frequency system-on-chip, so the same effects as those of the above-mentioned implementation method can be achieved.

[0226] In the case of adopting integrated units, the electronic device may include a processing module, a storage module, and a communication module. Among them, the processing module can be used to control and manage the operations of the electronic device. For example, it can be used to support the electronic device to execute the steps performed by the above-mentioned functional units. The storage module can be used to support the electronic device to execute storing program codes, data, and the like. The communication module can be used to support the communication between the electronic device and other devices.

[0227] Among them, the processing module can be a processor or a controller. It can implement or execute various exemplary logic blocks, modules, and circuits described in combination with the disclosure of this application. The processor can also be a combination that realizes computing functions, such as a combination including one or more microprocessors, a combination of digital signal processing (DSP) and a microprocessor, and so on. The storage module can be a memory. Specifically, the communication module can be a device for interacting with other electronic devices, such as a radio frequency circuit, a Bluetooth chip, a Wi-Fi chip, etc.

[0228] This application embodiment also provides a computer storage medium. Among them, this computer storage medium stores a computer program for electronic data exchange, and this computer program enables a computer to execute part or all of the steps of any method recorded in the above-mentioned method embodiments. The above-mentioned computer includes an electronic device.

[0229] This application embodiment also provides a computer program product. The above-mentioned computer program product includes a non-transitory computer-readable storage medium storing a computer program, and the above-mentioned computer program is operable to enable a computer to execute part or all of the steps of any method recorded in the above-mentioned method embodiments. This computer program product can be a software installation package, and the above-mentioned computer includes a control platform.

[0230] It should be noted that for the foregoing method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that this application is not limited by the described action sequence, because according to this application, certain steps can be adopted in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0231] In the above embodiments, the descriptions of each embodiment have their own emphases. For the parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0232] In several embodiments provided by the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the above division of units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the displayed or discussed coupling, direct coupling, or communication connection between each other can be through some interfaces. The indirect coupling or communication connection of the device or unit can be in an electrical or other form.

[0233] The units described above as separate components may or may not be physically separated. The components displayed as units may or may not be physical units, that is, they can be located in one place, or they can be distributed to multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0234] In addition, in each embodiment of the present application, the functional units can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit. The above integrated units can be implemented in the form of hardware or in the form of software functional units.

[0235] If the above integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable memory. Based on such an understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the above methods in each embodiment of the present application. And the aforementioned memory includes: USB flash drives, read-only memories (ROM, Read-Only Memory), random access memories (RAM, Random Access Memory), mobile hard disks, magnetic disks, or optical disks and other media that can store program codes.

[0236] Those of ordinary skill in the art can understand that all or part of the steps in the above methods of the embodiments can be completed by instructing relevant hardware through a program. This program can be stored in a computer-readable memory, and the memory can include: flash drives, read-only memories, random access memories, magnetic disks, or optical disks, etc.

[0237] The above has introduced the embodiments of the present application in detail. Specific examples are used in this article to elaborate on the principle and implementation manner of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application; at the same time, for those of ordinary skill in the art, according to the idea of the present application, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present application.

Claims

1. A signal processing method based on a radio frequency system-on-chip chip, characterized in that: A digital signal processor applied to a radio frequency system-on-chip chip, wherein the radio frequency system-on-chip chip comprises the digital signal processor and a microcontroller, and the digital signal processor is connected to the microcontroller; the method comprises: receiving a target linear frequency modulation signal; Determine a multiplication result of the target linear frequency modulation signal and a preset down-conversion linear frequency modulation signal to obtain a target signal; Performing a fast Fourier transform on the target signal to obtain a complex array in the frequency domain, the complex array including a plurality of elements, a single element including an amplitude and a phase of a frequency component; According to the amplitude and phase of each element, the energy value of each frequency component is determined to obtain multiple energy values; Performing a sliding window summation operation on the multiple energy values ​​in time series to obtain multiple total energy values; determining a maximum total energy value among the plurality of total energy values; A target symbol value of the preamble code of the target linear frequency modulation signal is determined according to the maximum total energy value.

2. The method according to claim 1, characterized in that After receiving the target linear frequency modulation signal, the method further comprises: Acquire signal strength information of the target linear frequency modulation signal; Determining a target gain value according to the signal strength information; The driver layer function is called to transmit the target gain value to the microcontroller, and the microcontroller is used to perform gain control on the radio frequency module according to the target gain value.

3. The method according to claim 2, characterized in that The calling of the driver layer function to transmit the target gain value to the microcontroller includes: Calling the first driver layer function to store the target gain value in a target storage area of ​​the inter-processor communication peripheral device; The second driver layer function is called to send an interrupt request message to the microcontroller, and the microcontroller is used to pause the currently executed program after receiving the interrupt request message, and read the target gain value stored in the inter-processor communication peripheral.

4. The method according to claim 2, characterized in that: The step of determining a target gain value according to the signal strength information includes: Determining an average power of the target linear frequency modulation signal according to the signal strength information; Get the historical average power of the historical processing cycle; Determining a rate of change of signal strength according to the average power and the historical average power; Determining a first adjustment coefficient according to the rate of change of the signal strength; Performing a fast Fourier transform on the target linear frequency modulation signal to obtain a target spectrum; Determining the bandwidth, center frequency and flatness of the target spectrum; Determining a second adjustment coefficient according to the bandwidth, the center frequency and the flatness; respectively determining the matching degree between the target linear frequency modulation signal and a plurality of template signals; Determining a target template signal having the greatest matching degree among the multiple template signals; Determining a reference gain value according to the target template signal; The target gain value is determined according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient and a basic gain value.

5. The method according to claim 4, characterized in that The determining the target gain value according to the reference gain value, the first adjustment coefficient, the second adjustment coefficient and the basic gain value includes: Determining a first gain value according to the basic gain value and the first adjustment coefficient; Determining a second gain value according to the first gain value, the second adjustment coefficient and the flatness; Determining a target weight according to the matching degree of the target template signal; The target gain value is determined according to the target weight, the second gain value and the reference gain value.

6. The method according to claim 1, characterized in that Before receiving the target linear frequency modulation signal, the method includes: Get the number of first data slices produced in the current state; Determine the number of second data slices consumed in the current state; Determining whether the number of the first data slices and the number of the second data slices meet a target constraint condition; If it is determined that the first data slice quantity and the second data slice quantity meet the target constraint condition, it is determined to receive the target linear frequency modulation signal.

7. The method according to any one of claims 1 to 6, characterized in that: The RF system-on-chip chip also includes a first peripheral of the digital signal processor, a second peripheral of the microcontroller, a RF module, a digital front end and a digital front end interface. The digital signal processor is respectively connected to the first peripheral and the microcontroller, the microcontroller is respectively connected to the second peripheral and the digital front end, the second peripheral is connected to the RF module, and the digital front end is respectively connected to the digital front end interface and the RF module.

8. A signal processing device based on a radio frequency system-on-chip, characterized in that: A digital signal processor applied to a radio frequency system-on-chip chip, wherein the radio frequency system-on-chip chip comprises the digital signal processor and a microcontroller; the device comprises a receiving unit, a determining unit and a sliding window operation unit; wherein, The receiving unit is used to receive a target linear frequency modulation signal; The determining unit is used to determine a multiplication result of the target linear frequency modulation signal and a preset down-conversion linear frequency modulation signal to obtain a target signal; The determination unit is further used to perform a fast Fourier transform on the target signal to obtain a complex array in the frequency domain, the complex array including a plurality of elements, a single element including an amplitude and a phase of a frequency component; The determination unit is further used to determine the energy value of each frequency component according to the amplitude and phase of each element to obtain multiple energy values; The sliding window operation unit is used to perform a sliding window summation operation on the multiple energy values ​​in time series to obtain multiple total energy values; The determining unit is further configured to determine a maximum total energy value among the multiple total energy values; The determining unit is further configured to determine a target symbol value of a preamble code of the target linear frequency modulation signal according to the maximum total energy value.

9. An electronic device, characterized in that: The method comprises a processor and a memory, wherein the memory is used to store one or more programs and is configured to be executed by the processor, wherein the programs include instructions for executing the steps in the method according to any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: A computer program for electronic data exchange is stored, wherein the computer program enables a computer to execute the method according to any one of claims 1 to 7.

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