Electronic device

Abstract

The invention discloses an electronic device which comprises a substrate and a plurality of sub-pixels. The plurality of sub-pixels are arranged on the substrate, the plurality of sub-pixels are arranged along a first direction and a second direction, and the first direction is different from the second direction. One of the plurality of sub-pixels has a first width in the first direction and a second width in the second direction, and the ratio of the first width to the second width is greater than 0.66 and less than 1.5.

Description

Technical Field

[0001] The present invention relates to an electronic device, and in particular to an electronic device comprising a plurality of sub-pixels. Background Art

[0002] With the advancement of technology, electronic devices have become an indispensable item in modern people's lives. In electronic devices such as virtual reality (VR) devices and liquid crystal display devices, products with small pixel sizes are often unable to increase resolution due to the limitations of production machines. Summary of the invention

[0003] One of the purposes of the present invention is to provide an electronic device that can improve the resolution, process feasibility and / or product yield of the electronic device, or achieve power saving effect through special sub-pixel design and arrangement.

[0004] The present invention provides an electronic device, comprising a substrate and a plurality of sub-pixels. The plurality of sub-pixels are disposed on the substrate, wherein the plurality of sub-pixels are arranged along a first direction and a second direction, and the first direction is different from the second direction. One of the plurality of sub-pixels has a first width in the first direction and a second width in the second direction, and a ratio of the first width to the second width is greater than 0.66 and less than 1.5. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 FIG. 1 is a partial top view of an electronic device according to a first embodiment of the present invention.

[0006] Figure 2 It is a partial top view schematic diagram of a variation of the electronic device of the first embodiment of the present invention.

[0007] Figure 3 It is a partial top view schematically showing another variant embodiment of the electronic device of the first embodiment of the present invention.

[0008] Figure 4 FIG. 1 is a partial top view of an electronic device according to a second embodiment of the present invention.

[0009] Figures 5 to 8 Partial top view schematic diagram of some variant embodiments of the electronic device of the second embodiment of the present invention.

[0010] Fig. 9 FIG. 4 is a partial top view of an electronic device according to a third embodiment of the present invention.

[0011] Fig.10 It is a partial top view schematic diagram of a variation of the electronic device of the third embodiment of the present invention.

[0012] Fig.11 It is a partial top view schematic diagram of another variant embodiment of the electronic device of the third embodiment of the present invention.

[0013] Fig.12 It is a partial top view schematically showing another variant embodiment of the electronic device of the third embodiment of the present invention.

[0014] Fig.13 FIG. 4 is a partial top view of an electronic device according to a fourth embodiment of the present invention.

[0015] Fig.14 It is a partial top view schematic diagram of a variation of the electronic device of the fourth embodiment of the present invention.

[0016] Fig.15 It is a partial top view schematically showing another variant embodiment of the electronic device of the fourth embodiment of the present invention.

[0017] Explanation of the accompanying drawings: 100-substrate; 200-sub-pixel; 200G-pixel group; 210-first sub-pixel; 220-second sub-pixel; 230-third sub-pixel; C1-first sub-pixel column; C2-second sub-pixel column; C3-third sub-pixel column; C4-fourth sub-pixel column; C5-fifth sub-pixel column; D1-first distance; D2-second distance; D3-third distance; D4-fourth distance; DL, DL1, DL2-data line; ED-electronic device; GL-scan line; L1, L10-first row; L2, L20-second row; R1-first sub-pixel row; R2-second sub-pixel row; SC-semiconductor layer; SCa, SCb, SCc, SCd, SCe, SCf, SCg, SCh-semiconductor pattern; TFT, TFT1, TFT2-thin film transistor; W1-first width; W2-second width; X, Y, Z-direction. DETAILED DESCRIPTION

[0018] The present invention is described in detail below in conjunction with specific embodiments and drawings. It should be noted that, in order to make it easier for readers to understand and the drawings are concise, the multiple drawings in the present invention only depict a portion of the device or structure, and the specific elements in the drawings are not drawn according to the actual scale. In addition, the number and size of each element in the figure are only for illustration and are not intended to limit the scope of the present invention.

[0019] Certain words are used throughout the specification and claims of the present invention to refer to specific components. It should be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. The present invention is not intended to distinguish between components that have the same function but different names. In the specification and claims of the present invention, the words "comprise", "include" and "have" are open-ended words, so they should be interpreted as "including but not limited to..." When the terms "comprise", "include" and / or "have" are used in the specification of the present invention, they specify the presence of the features, regions, steps, operations and / or elements, but do not exclude the presence or addition of one or more other features, regions, steps, operations, elements and / or combinations thereof.

[0020] When an element or film layer is referred to as being "on" or "connected to" another element or film layer, it may be directly on or directly connected to the other element or film layer, or there may be intervening elements or film layers between the two. Conversely, when an element is referred to as being "directly on" or "directly connected to" another element or film layer, there may be no intervening elements or film layers between the two.

[0021] Directional terms mentioned in the present invention, such as "upper", "lower", "front", "back", "left", "right", etc., are only used to refer to the directions of the accompanying drawings. Therefore, the directional terms used are used for explanation, not for limiting the present invention.

[0022] The ordinal numbers used in the specification and claims of the present invention, such as "first", "second", etc., are used to modify the elements. They do not imply or represent any previous ordinal numbers of the element (or elements), nor do they represent the order of one element and another element, or the order of the manufacturing method. The use of these ordinal numbers is only used to make the element with a certain name clearly distinguishable from another element with the same name. The claims of the present invention and the specification may not use the same words. Accordingly, the first component in the specification may be the second component in the claim.

[0023] The terms "equal," "equal" or "same," "substantially" or "approximately" are generally interpreted as being within 20% of a given value or range, or within 10%, 5%, 3%, 2%, 1% or 0.5% of a given value or range.

[0024] The electronic device described in the present invention can be applied to a display device, a light-emitting device, a backlight device, a virtual reality device, an augmented reality (AR) device, an antenna device, a sensing device or a splicing device, but is not limited thereto. The electronic device may be a bendable or flexible electronic device. The electronic device may, for example, include liquid crystal, a light emitting diode, fluorescence, phosphorescence, other suitable display media or a combination of the foregoing, but is not limited thereto. The display device may be a non-self-luminous display device or a self-luminous display device. The antenna device may be a liquid crystal antenna device or a non-liquid crystal antenna device, and the sensing device may be a sensing device for sensing capacitance, light, heat or ultrasound, but is not limited thereto. The electronic device may, for example, include electronic components such as passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. The diode may include a light-emitting diode or a photodiode. The light emitting diode may include, for example, an organic light emitting diode (OLED), a sub-millimeter light emitting diode (mini LED), a micro LED or a quantum dot light emitting diode (quantum dot LED), but is not limited thereto. The splicing device may be, for example, a display splicing device or an antenna splicing device, but is not limited thereto. It should be noted that the electronic device may be any combination of the foregoing, but is not limited thereto. The electronic device may have peripheral systems such as a drive system, a control system, a light source system, etc. to support a display device, an antenna device, a wearable device (for example, including an augmented reality or virtual reality device), a vehicle-mounted device (for example, including a car windshield), or a splicing device.

[0025] It should be understood that the features of several different embodiments may be replaced, reorganized, or mixed to implement other embodiments without departing from the spirit of the present invention.

[0026] Please refer to Figure 1 , which is a partial top view schematic diagram of an electronic device according to a first embodiment of the present invention. Figure 1As shown, the electronic device ED includes a substrate 100 and a plurality of sub-pixels 200, and the plurality of sub-pixels 200 are disposed on the substrate 100. The plurality of sub-pixels 200 can be disposed within the working area (or active area) of the electronic device ED. When the electronic device ED includes a display panel, or when the electronic device ED is a display device, the working area is, for example, a display area, but is not limited thereto. The plurality of sub-pixels 200 are arranged along a direction X (which can be referred to as a first direction) and a direction Y (which can be referred to as a second direction), and the direction X is different from the direction Y. For example, the direction X can be perpendicular to the direction Y, but is not limited thereto. One of the plurality of sub-pixels 200 has a first width W1 in the direction X and a second width W2 in the direction Y, where the ratio of the first width W1 to the second width W2 is greater than 0.66 and less than 1.5 (i.e., 0.66 < W1 / W2 < 1.5). Alternatively, in some embodiments, the relative widths of each of the sub-pixels 200 in the direction X and the direction Y can all meet the above range. For example, the ratio of the first width W1 to the second width W2 can be 1.5:2, that is, the ratio of the first width W1 to the second width W2 can be 0.75, but is not limited thereto. Through the above width design and arrangement of the sub-pixels 200, more sub-pixels 200 can be disposed within the working area of the electronic device ED, that is, the pixel density (pixels per inch, PPI) can be increased, thereby improving the resolution of the electronic device ED. It should be noted that Figure 1 Only the arrangement of a part of the sub-pixels 200 on the substrate 100 when looking down at the electronic device ED along the direction Z is shown. In fact, more sub-pixels 200 can be disposed on the substrate 100. The plurality of sub-pixels 200 can be arranged on the substrate 100 into a plurality of sub-pixel rows extending along the direction X and a plurality of sub-pixel columns extending along the direction Y, for example (but not limited to) in an array arrangement. Among them, the direction Z can be the normal direction of the electronic device ED and parallel to the looking-down direction of the electronic device ED and the normal direction of the surface of the substrate 100, that is, the direction Z can be perpendicular to the upper surface or the lower surface of the substrate 100, and the direction X and the direction Y can be perpendicular to the direction Z respectively.

[0027] According to Figure 1In the illustrated embodiment, since the first width W1 of the sub-pixel 200 in the direction X is smaller than the second width W2 thereof in the direction Y, within the working area of ​​the electronic device ED (taking the length of the working area in the direction X and the length in the direction Y as an example), the number of sub-pixels 200 disposed in the direction X may be greater than the number of sub-pixels 200 disposed in the direction Y. Specifically, the plurality of sub-pixels 200 may have a first row L1 extending along the direction X and a second row L2 extending along the direction Y, and the number of sub-pixels 200 in the first row L1 is greater than the number of sub-pixels 200 in the second row L2, that is, the number of sub-pixels 200 in a row extending along the direction X may be greater than the number of sub-pixels 200 in a column extending along the direction Y.

[0028] The electronic device ED may include at least one scanning line (eg Figure 5 The scan line GL shown in FIG. 1 and at least one data line (eg Figure 5 The data line DL shown in the figure), the scan line and the data line are arranged on the substrate 100, and the scan line can extend substantially along the direction X, and the data line DL can extend substantially along the direction Y. The first width W1 and the second width W2 of the sub-pixel 200 can be the distance between the same side edges of two adjacent data lines and the distance between the same side edges of two adjacent scan lines, or can also be the distance between the center lines of two adjacent data lines and the distance between the center lines of two adjacent scan lines. For example, Figure 1 As shown (can be matched with Figure 5 ), the first width W1 of the sub-pixel 200 may be the shortest distance measured from one side (e.g., the left side) of one data line to the same side (e.g., the left side) of another adjacent data line in the direction X, and the second width W2 of the sub-pixel 200 may be the shortest distance measured from one side (e.g., the bottom side) of one scan line to the same side (e.g., the bottom side) of another adjacent scan line in the direction Y, wherein the sides of two adjacent scan lines overlapping the data lines in the direction Z may be used as a measurement reference, for example (but not limited to). In some embodiments, the electronic device ED may further include at least one insulating layer, at least one conductive layer, and / or a thin film transistor (e.g., Figure 5 or Fig.13 The thin film transistor (TFT) and other film layers and components shown in the figure are not limited to this.

[0029] like Figure 1As shown, the plurality of sub-pixels 200 may include a first sub-pixel 210, a second sub-pixel 220 and a third sub-pixel 230, which may be sub-pixels with different functions, such as sub-pixels representing different colors respectively. For example, the first sub-pixel 210 may be a red sub-pixel, the second sub-pixel 220 may be a green sub-pixel, and the third sub-pixel 230 may be a blue sub-pixel, but not limited thereto. When the electronic device ED has a display function, the first sub-pixel 210, the second sub-pixel 220, and the third sub-pixel 230 may represent sub-pixels that can respectively generate light of different colors, for example, by providing a color filter and / or a light-emitting element that can emit light of different colors, the sub-pixel 200 may present different colors. Several sub-pixels 200 may constitute a pixel, for example, a pixel may include a first sub-pixel 210, a second sub-pixel 220 and a third sub-pixel 230, but not limited thereto. According to an embodiment of the present invention, the plurality of sub-pixels 200 may be divided into a plurality of pixel groups 200G, and a pixel group 200G (such as Figure 1 ) is the minimum repeating unit of the arrangement of the sub-pixels 200 , and a plurality of pixel groups 200G may be arranged side by side along the direction X and the direction Y on the substrate 100 .

[0030] by Figure 1 Taking the electronic device ED as an example, the pixel group 200G as the minimum repeating unit may be composed of two first sub-pixels 210, two second sub-pixels 220, and two third sub-pixels 230. In the pixel group 200G, the first row along the direction X may include the first sub-pixel 210, the second sub-pixel 220, and the third sub-pixel 230 in sequence, and the second row may include the third sub-pixel 230, the first sub-pixel 210, and the second sub-pixel 220 in sequence, but the present invention is not limited thereto.

[0031] In some embodiments, the data lines may be connected and driven in a zigzag manner. Figure 1 The plurality of sub-pixels 200 shown, for example, a data line may be connected to a portion of the sub-pixels 200 of two adjacent sub-pixel columns. Specifically, the plurality of sub-pixels 200 may include a first sub-pixel column C1, a second sub-pixel column C2, a third sub-pixel column C3, a fourth sub-pixel column C4, and a fifth sub-pixel column C5 extending along a direction Y and arranged side by side in a direction X. A data line may be connected to an even-numbered sub-pixel 200 of the first sub-pixel column C1, that is, the data line may drive the second sub-pixel 200 (e.g., Figure 1 The third sub-pixel 230 is shown), and another data line can be connected to the odd-numbered sub-pixels 200 of the first sub-pixel row C1 and the even-numbered sub-pixels 200 of the second sub-pixel row C2, that is, the other data line can drive the first sub-pixel 200 of the first sub-pixel row C1 (such as Figure 1The first sub-pixel 210 is shown as well as the second sub-pixel 200 of the second sub-pixel column C2 (as shown in FIG. Figure 1 The first sub-pixel 210 is shown in FIG. 1 ). The data line driving the sub-pixels 200 of the same color can reduce the frequency of switching the data line to different colors, thereby achieving power saving. In addition, another data line can be connected to the odd-numbered sub-pixels 200 of the second sub-pixel column C2 and the even-numbered sub-pixels 200 of the third sub-pixel column C3 (such as FIG. 1 ). Figure 1 The second sub-pixel 220 and the second sub-pixel 220 are shown in sequence. Another data line can be connected to the odd-numbered sub-pixels 200 of the third sub-pixel row C3 and the even-numbered sub-pixels 200 of the fourth sub-pixel row C4 (eg, Figure 1 The third sub-pixel 230 and the third sub-pixel 230 are shown in sequence. Another data line can be connected to the odd-numbered sub-pixels 200 of the fourth sub-pixel row C4 and the even-numbered sub-pixels 200 of the fifth sub-pixel row C5 (eg, Figure 1 The first sub-pixel 210 and the first sub-pixel 210 are shown in sequence, and so on. The above design can reduce the frequency of color switching and achieve power saving effect. According to this embodiment, a data line can alternately connect the sub-pixels 200 in two adjacent sub-pixel columns. In other words, adjacent pixels in a row of sub-pixel columns are connected to different data lines.

[0032] Please refer to Figure 2 , which is a partial top view schematic diagram of a variation of the electronic device of the first embodiment of the present invention, wherein for the sake of simplicity of the drawings, Figure 2 and subsequent Figures 3 to 15 Only a portion of the sub-pixel arrangement is shown and the substrate is omitted (see Figure 1 ). Figure 2 The sub-pixel arrangement 200 shown can be represented by Figure 1 The color arrangement of the sub-pixel 200 shown in FIG. 2 is transposed. In the present invention, "transposition" may mean exchanging rows and columns, for example, Figure 1 The color arrangement of the first row of sub-pixels 200 is converted to Figure 2 The color arrangement of the first column of sub-pixels 200 is shown, and Figure 1 The color arrangement of the second row of sub-pixels 200 is converted to Figure 2 The color arrangement of the second column of sub-pixels 200 is shown, and so on. Figure 2In the illustrated embodiment, since the first width W1 of the sub-pixel 200 in the direction X is smaller than the second width W2 thereof in the direction Y, the number of sub-pixels 200 disposed in the direction X may be greater than the number of sub-pixels 200 disposed in the direction Y within the working area of ​​the electronic device ED (taking the length of the working area in the direction X and the length in the direction Y as an example), that is, the number of sub-pixels 200 in a row extending along the direction X may be greater than the number of sub-pixels 200 in a column extending along the direction Y. The plurality of sub-pixels 200 may include a pixel group 200G as a minimum repeating unit, and the pixel group 200G may be composed of two first sub-pixels 210, two second sub-pixels 220, and two third sub-pixels 230. In the pixel group 200G, the first row along the direction X may include the first sub-pixel 210 and the third sub-pixel 230 in sequence, the second row may include the second sub-pixel 220 and the first sub-pixel 210 in sequence, and the third row may include the third sub-pixel 230 and the second sub-pixel 220 in sequence, but the present invention is not limited thereto.

[0033] In some embodiments, the data lines may be connected and driven in a zigzag manner. Figure 2 Specifically, a data line can connect and drive the odd-numbered sub-pixels 200 of the first sub-pixel row C1 and the even-numbered sub-pixels 200 of the second sub-pixel row C2 (eg, Figure 2 The data lines are shown in the order of the first sub-pixel 210, the first sub-pixel 210, the third sub-pixel 230, the third sub-pixel 230, the second sub-pixel 220 and the second sub-pixel 220, which can reduce the frequency of switching different colors of the data line, thereby achieving the effect of power saving. In addition, another data line can be connected to the odd-numbered sub-pixels 200 of the second sub-pixel row C2 and the even-numbered sub-pixels 200 of the third sub-pixel row C3 (such as Figure 2 The sequence shown is the third sub-pixel 230 , the second sub-pixel 220 , the second sub-pixel 220 , the first sub-pixel 210 , the first sub-pixel 210 , and the third sub-pixel 230 , and so on, which can reduce the frequency of color switching and save power.

[0034] Please refer to Figure 3 , which is a partial top view schematic diagram of another variant embodiment of the electronic device of the first embodiment of the present invention. Figure 3In the illustrated embodiment, two adjacent sub-pixel rows may be staggered. Specifically, the plurality of sub-pixels 200 may include a first sub-pixel row R1 and a second sub-pixel row R2 extending along a direction X, and the sub-pixels 200 of the first sub-pixel row R1 and the sub-pixels 200 of the second sub-pixel row R2 may be staggered. Two adjacent sub-pixel rows (e.g., the first sub-pixel row R1 and the second sub-pixel row R2) may be staggered by a first distance D1 in the direction X, wherein the first distance D1 may be the shortest distance measured from an edge of one of the sub-pixel rows (e.g., the first sub-pixel row R1) to the same side edge of another adjacent sub-pixel row (e.g., the second sub-pixel row R2) in the direction X. For example, the first distance D1 may be half of the first width W1 of the sub-pixel 200, but is not limited thereto. By horizontally staggering the sub-pixels 200 of two adjacent sub-pixel rows, the thin film transistors corresponding to the sub-pixels 200 can be staggered, so that the distance between the thin film transistors is increased, thereby improving the process feasibility, product yield and / or resolution. The plurality of sub-pixels 200 may include a pixel group 200G (such as Figure 3 ).

[0035] Please refer to Figure 4 , which is a partial top view of an electronic device according to a second embodiment of the present invention. Figure 4 In the illustrated embodiment, two adjacent sub-pixel columns may be staggered. In detail, the plurality of sub-pixels 200 may have a first sub-pixel column C1 and a second sub-pixel column C2 extending along a direction Y, and the sub-pixels 200 of the first sub-pixel column C1 and the sub-pixels 200 of the second sub-pixel column C2 may be staggered. Two adjacent sub-pixel columns (e.g., the first sub-pixel column C1 and the second sub-pixel column C2) may be staggered by a second distance D2 in the direction Y, wherein the second distance D2 may be the shortest distance measured from an edge of one of the sub-pixel columns (e.g., the first sub-pixel column C1) to the same side edge of another adjacent sub-pixel column (e.g., the second sub-pixel column C2) in the direction Y. For example, the second distance D2 may be half of the second width W2 of the sub-pixel 200, but is not limited thereto. The plurality of sub-pixels 200 may include a pixel group 200G (e.g., Figure 4 ).

[0036] Some variant embodiments of the electronic device ED with a vertically staggered sub-pixel 200 in two adjacent sub-pixel columns will be described in further detail below. Figures 5 to 8 , Figures 5 to 8 FIG. 1 is a partial top view schematic diagram of some variant embodiments of the electronic device of the second embodiment of the present invention. Figures 5 to 8As shown, the electronic device ED may include a plurality of sub-pixels 200, a plurality of scan lines GL, a plurality of data lines DL, a patterned semiconductor layer SC, and a plurality of thin film transistors TFT. The sub-pixels 200 of two adjacent sub-pixel columns (for example, the first sub-pixel column C1 and the second sub-pixel column C2) are staggered, wherein the staggered manner is that the boundaries of the sub-pixels 200 parallel to the direction X are staggered with each other. The scan line GL may extend substantially along the direction X, and the data line DL may extend substantially along the direction Y. The thin film transistor TFT may include a drain, a source, a gate, a semiconductor layer, and a gate dielectric layer, wherein a portion of the scan line GL may constitute the gate of the thin film transistor TFT, a portion of the data line DL may constitute the source and / or drain of the thin film transistor TFT, a portion of the semiconductor layer SC may constitute the semiconductor layer of the thin film transistor TFT, and the area overlapping with the gate may serve as the channel region of the thin film transistor TFT. As shown in FIG. Figure 5 As shown, the semiconductor layer SC may include a plurality of semiconductor patterns (e.g., semiconductor pattern SCa, semiconductor pattern SCb, semiconductor pattern SCc, and semiconductor pattern SCd), the semiconductor pattern may constitute a semiconductor layer in each thin film transistor TFT and may, for example, have a "U"-shaped pattern with an opening facing upward, but not limited thereto. Each sub-pixel 200 may be coupled to one of the thin film transistors TFT, for example, the thin film transistor TFT and the sub-pixel 200 may be connected one-to-one, but not limited thereto.

[0037] according to Figure 5 In the embodiment shown, the pattern of each scanning line GL can be parallel to the direction X, and the thin film transistors TFT are arranged in sequence along the corresponding scanning lines GL in an aligned manner, that is, the thin film transistors TFT are arranged without misalignment, so that the size of the channel region (channel) of the thin film transistor TFT remains unchanged, thereby reducing the electrical property difference of the thin film transistor TFT. The design that the pattern of each scanning line GL is linear and parallel to the direction X can make the thin film transistor TFT more consistent in electrical performance. Figure 5 As shown, for example, semiconductor pattern SCa, semiconductor pattern SCb, semiconductor pattern SCc, and semiconductor pattern SCd may correspond to the first sub-pixel 210, the third sub-pixel 230, the second sub-pixel 220, and the first sub-pixel 210 of the first sub-pixel column C1 from top to bottom, and so on.

[0038] according to Figure 6In the embodiment shown, the pattern of each scanning line GL may be curved, and the thin film transistors TFT are sequentially arranged in an up-and-down staggered manner along the corresponding scanning lines GL, so that the pixel aperture ratios (aperture ratios) of each sub-pixel column are equal, that is, the pixel aperture ratio of the first sub-pixel column C1 is equal to the pixel aperture ratio of the second sub-pixel column C2. The "pixel aperture ratio" mentioned in the present invention may represent the ratio between the area of ​​the light-transmitting region of the sub-pixel and the area of ​​the sub-pixel as a whole, wherein the light-transmitting region of the sub-pixel may be, for example, the area outside the light-impermeable regions such as the wiring area and the transistor area. Figure 6 As shown, for example, the semiconductor pattern SCa, the semiconductor pattern SCb, the semiconductor pattern SCc, and the semiconductor pattern SCd may correspond to the first sub-pixel 210, the third sub-pixel 230, the second sub-pixel 220, and the first sub-pixel 210 of the first sub-pixel column C1 from top to bottom, respectively; the semiconductor pattern SCe, the semiconductor pattern SCf, the semiconductor pattern SCg, and the semiconductor pattern SCh may correspond to the second sub-pixel 220, the first sub-pixel 210, the third sub-pixel 230, and the second sub-pixel 220 of the second sub-pixel column C2 from top to bottom, respectively, and so on. In some embodiments, as Figure 6 As shown, a portion of the semiconductor pattern may be a general U-shaped pattern (for example, the semiconductor pattern corresponding to the first sub-pixel column C1 and the second sub-pixel column C2), and another portion of the semiconductor pattern may be an oblique U-shaped pattern (for example, the semiconductor pattern corresponding to the third sub-pixel column C3 and the fourth sub-pixel column C4), but the semiconductor pattern of the present invention is not limited to the above. In other embodiments, all semiconductor patterns may be general U-shaped patterns, or all semiconductor patterns may be oblique U-shaped patterns.

[0039] according to Figure 7 In the illustrated embodiment, the pattern of each scanning line GL may be curved, and the thin-film transistors TFT are staggered so that the pixel aperture ratios of each sub-pixel column are equal, that is, the pixel aperture ratio of the first sub-pixel column C1 is equal to the pixel aperture ratio of the second sub-pixel column C2. In addition, a portion of the thin-film transistors TFT may be flipped, that is, the opening direction of the U-shaped pattern of the semiconductor layer of a portion of the thin-film transistors TFT is opposite to the opening direction of the U-shaped pattern of the semiconductor layer of another portion of the thin-film transistors TFT. For example, the thin-film transistor TFT2 corresponding to the second sub-pixel column C2 may be flipped, with the U-shaped pattern of its semiconductor layer opening facing downward, while the thin-film transistor TFT1 corresponding to the first sub-pixel column C1 is not flipped, with the U-shaped pattern of its semiconductor layer opening facing upward. According to the above-mentioned semiconductor patterns corresponding to the first sub-pixel column C1 and the second sub-pixel column C2, the design at the source terminal or the drain terminal may be relatively consistent, which may further reduce the electrical property difference of the thin-film transistor TFT. Figure 7As shown, for example, the semiconductor pattern SCa, the semiconductor pattern SCb, the semiconductor pattern SCc, and the semiconductor pattern SCd may correspond to the first sub-pixel 210, the third sub-pixel 230, the second sub-pixel 220, and the first sub-pixel 210 of the first sub-pixel column C1 from top to bottom, respectively, and the semiconductor pattern SCe, the semiconductor pattern SCf, the semiconductor pattern SCg, and the semiconductor pattern SCh may correspond to the second sub-pixel 220, the first sub-pixel 210, the third sub-pixel 230, and the second sub-pixel 220 of the second sub-pixel column C2 from top to bottom, respectively, and so on.

[0040] according to Figure 8 In the embodiment shown, the pattern of each scanning line GL can be bent, and the thin film transistors TFT are staggered so that the pixel aperture ratios of each sub-pixel column are equal. In addition, a portion of the thin film transistors TFT can be flipped to reduce the electrical property differences of the thin film transistors TFT. Furthermore, the data lines DL can be connected and drive the sub-pixels 200 in a zigzag staggered manner to Figure 8 The data line DL1 is shown as an example. The data line DL1 can be connected to at least one of the sub-pixels 200 of the first sub-pixel column C1 and at least one of the sub-pixels 200 of the second sub-pixel column C1. Specifically, the data line DL1 can be connected to the odd-numbered sub-pixels 200 of the second sub-pixel column C2 and the even-numbered sub-pixels 200 of the first sub-pixel column C1 (e.g., Figure 8 The second sub-pixel 220, the third sub-pixel 230, the third sub-pixel 230 and the first sub-pixel 210 are shown in sequence, which correspond to the semiconductor pattern SCa, the semiconductor pattern SCb, the semiconductor pattern SCc, and the semiconductor pattern SCd, respectively. Another data line DL2 can be connected to the odd-numbered sub-pixels 200 of the third sub-pixel row C3 and the even-numbered sub-pixels 200 of the second sub-pixel row C2 (such as Figure 8 Shown in sequence are the first sub-pixel 210, the first sub-pixel 210, the second sub-pixel 220 and the second sub-pixel 220, which correspond to the semiconductor pattern SCe, the semiconductor pattern SCf, the semiconductor pattern SCg, the semiconductor pattern SCh), and so on. The frequency of switching different colors of the data line DL can be reduced, thereby achieving the effect of saving power.

[0041] Please refer to Fig. 9 , which is a partial top view schematic diagram of an electronic device according to a third embodiment of the present invention. Fig. 9As shown, a plurality of sub-pixels 200 are arranged along direction X and direction Y, and the sub-pixel 200 has a first width W1 in direction X and a second width W2 in direction Y. For example, the ratio of the first width W1 to the second width W2 may be 2:1.5, that is, the ratio of the first width W1 to the second width W2 may be 1.33, but is not limited thereto. By designing and arranging the width of the sub-pixels 200, more sub-pixels 200 may be arranged in the working area of ​​the electronic device ED, thereby improving the resolution of the electronic device ED. According to Fig. 9 In the illustrated embodiment, since the second width W2 of the sub-pixel 200 in the direction Y is smaller than the first width W1 in the direction X, the number of sub-pixels 200 arranged in the direction Y can be greater than the number of sub-pixels 200 arranged in the direction X in the working area of ​​the electronic device ED. Specifically, the plurality of sub-pixels 200 may have a first row L10 extending along the direction X and a second row L20 extending along the direction Y, and the number of sub-pixels 200 in the first row L10 is smaller than the number of sub-pixels 200 in the second row L20, that is, the number of sub-pixels 200 in a column extending along the direction Y can be greater than the number of sub-pixels 200 in a row extending along the direction X. The plurality of sub-pixels 200 may include a pixel group 200G (e.g., a pixel group 200G) as a minimum repeating unit. Fig. 9 ).

[0042] The scanning line ( Fig. 9 The data line (not shown) can extend along direction X and the data line can extend along direction Y. According to the dual-channel design of the U-shaped semiconductor layer, a certain distance must be provided between the source and the drain of the thin-film transistor connected to the sub-pixel 200 in direction X to reduce the probability of short circuit between channels. When the minimum or process-limited channel width / spacing of the thin-film transistor in direction X is H microns (μm), in order to ensure the dual channel width and the distance between the channels, the minimum width of the sub-pixel 200 in direction X must be 4H microns. When the channel length of the thin-film transistor in direction Y is V microns, the minimum width of the sub-pixel 200 in direction Y only needs to be 2V microns (the distance of one channel length and one spacing), and the minimum width of the sub-pixel 200 in direction Y can be further reduced by reducing the channel length of the thin-film transistor in direction Y. As can be seen from the above, the width of the sub-pixel 200 in direction X will be more restricted due to the design of the dual-channel thin-film transistor, while the width in direction Y will not be affected by the dual-channel design, so a smaller size can be accepted. Therefore, by Fig. 9 The width design and arrangement of the sub-pixel 200 shown in the figure makes the first width W1 of the sub-pixel 200 in the direction X larger than the second width W2 in the direction Y, which is beneficial to the dual-channel design, thereby improving the process feasibility and product yield.

[0043] In some embodiments, the data lines may be connected and driven in a zigzag manner. Fig. 9 Specifically, a data line can connect and drive the odd-numbered sub-pixels 200 of the first sub-pixel row C1 and the even-numbered sub-pixels 200 of the second sub-pixel row C2 (eg, Fig. 9 Another data line may be connected to the odd-numbered sub-pixels 200 of the second sub-pixel row C2 and the even-numbered sub-pixels 200 of the third sub-pixel row C3 (eg, Fig. 9 The sequence shown is the second sub-pixel 220, the second sub-pixel 220, the second sub-pixel 220, and the second sub-pixel 220, and so on. The frequency of switching different colors of the data line can be reduced, thereby achieving the effect of power saving.

[0044] Please refer to Fig.10 , which is a partial top view schematic diagram of a variation embodiment of the electronic device of the third embodiment of the present invention. Fig.10 The sub-pixel arrangement 200 shown can be represented by Fig. 9 The color arrangement of the sub-pixel 200 shown in FIG. Fig. 9 The color arrangement of the first row of sub-pixels 200 is converted to Fig.10 The color arrangement of the first column of sub-pixels 200 is shown, and Fig. 9 The color arrangement of the second row of sub-pixels 200 is converted to Fig.10 The color arrangement of the second column of sub-pixels 200 is shown, and so on. Fig.10 In the embodiment shown, since the second width W2 of the sub-pixel 200 in the direction Y is smaller than the first width W1 thereof in the direction X, the number of sub-pixels 200 arranged in the direction Y can be greater than the number of sub-pixels 200 arranged in the direction X within the working area of ​​the electronic device ED. That is, the number of sub-pixels 200 in a column extending along the direction Y can be greater than the number of sub-pixels 200 in a row extending along the direction X. The plurality of sub-pixels 200 may include a pixel group 200G (e.g., Fig.10 ).

[0045] In some embodiments, the data lines may be connected and driven in a zigzag manner. Fig.10 Specifically, a data line can connect and drive the odd-numbered sub-pixels 200 of the first sub-pixel row C1 and the even-numbered sub-pixels 200 of the second sub-pixel row C2 (eg, Fig.10The first sub-pixel 210, the first sub-pixel 210 and the third sub-pixel 230 are shown in sequence. Another data line can be connected to the odd-numbered sub-pixels 200 of the second sub-pixel row C2 and the even-numbered sub-pixels 200 of the third sub-pixel row C3 (such as Fig.10 The third sub-pixel 230, the second sub-pixel 220 and the second sub-pixel 220 are shown in sequence. Another data line can be connected to the odd-numbered sub-pixels 200 of the third sub-pixel row C3 and the even-numbered sub-pixels 200 of the fourth sub-pixel row C4 (such as Fig.10 The first sub-pixel 210, the first sub-pixel 210 and the third sub-pixel 230 are shown in sequence, and so on. The frequency of switching different colors of the data line can be reduced, thereby achieving the effect of power saving.

[0046] Please refer to Fig.11 , which is a partial top view schematic diagram of another variant embodiment of the electronic device of the third embodiment of the present invention. Fig.11 In the embodiment shown, two adjacent sub-pixel rows can be staggered. In detail, the plurality of sub-pixels 200 may have a first sub-pixel row R1 and a second sub-pixel row R2 extending along the direction X, and the sub-pixels 200 of the first sub-pixel row R1 and the sub-pixels 200 of the second sub-pixel row R2 are staggered. Two adjacent sub-pixel rows (e.g., the first sub-pixel row R1 and the second sub-pixel row R2) may be staggered by a third distance D3 in the direction X, wherein the third distance D3 may be the shortest distance obtained by measuring from an edge of one of the sub-pixel rows (e.g., the first sub-pixel row R1) to the same side edge of another adjacent sub-pixel row (e.g., the second sub-pixel row R2) in the direction X. For example, the third distance D3 may be half of the first width W1 of the sub-pixel 200, but is not limited thereto. Through the design of horizontal staggering of the sub-pixels 200 of the above-mentioned two adjacent sub-pixel rows, the thin film transistors corresponding to the sub-pixels 200 may be staggered, so that the distance between the thin film transistors is increased, thereby improving the process feasibility and product yield. The plurality of sub-pixels 200 may include a pixel group 200G (eg, Fig.11 ).

[0047] Please refer to Fig.12 , which is a partial top view schematic diagram of another variant embodiment of the electronic device of the third embodiment of the present invention. Fig.12In the illustrated embodiment, two adjacent sub-pixel columns may be staggered. In detail, the plurality of sub-pixels 200 may have a first sub-pixel column C1 and a second sub-pixel column C2 extending along a direction Y, and the sub-pixels 200 of the first sub-pixel column C1 and the sub-pixels 200 of the second sub-pixel column C2 may be staggered. Two adjacent sub-pixel columns (e.g., the first sub-pixel column C1 and the second sub-pixel column C2) may be staggered by a fourth distance D4 in the direction Y, wherein the fourth distance D4 may be the shortest distance measured from an edge of one of the sub-pixel columns (e.g., the first sub-pixel column C1) to the same side edge of another adjacent sub-pixel column (e.g., the second sub-pixel column C2) in the direction Y. For example, the fourth distance D4 may be half of the second width W2 of the sub-pixel 200, but is not limited thereto. The plurality of sub-pixels 200 may include a pixel group 200G (e.g., Fig.12 ).

[0048] Fig.12 The vertical misalignment design of the sub-pixels 200 in two adjacent sub-pixel columns can be further combined with the above-mentioned embodiment. Figures 5 to 8 The extending direction of the scan line GL, the staggered arrangement of the thin film transistor TFT, the flip arrangement of the thin film transistor TFT and / or the design of the data line DL connecting and driving the sub-pixel 200 in a zigzag staggered manner, etc., so as to achieve the corresponding effects, will not be repeated here.

[0049] Please refer to Fig.13 , which is a partial top view schematic diagram of an electronic device according to a fourth embodiment of the present invention. Fig.13 As shown, the plurality of sub-pixels 200 may have different colors in a time sequence, that is, the electronic device ED may include a field sequential color (FSC) system. For example, the electronic device ED may include a backlight unit having a red light emitting element, a green light emitting element, and a blue light emitting element, so that each sub-pixel 200 may have different colors at different times without the need for additional color filters. Fig.13 In the embodiment shown, the electronic device ED may include a plurality of scan lines GL extending along a direction X, a plurality of data lines DL extending along a direction Y, and a plurality of thin film transistors TFT. Each sub-pixel 200 may be coupled to one of the thin film transistors TFT. The detailed structure of the thin film transistor TFT may refer to the aforementioned embodiment and will not be described in detail here.

[0050] Please refer to Fig.14 , which is a partial top view schematic diagram of a variation of the electronic device of the fourth embodiment of the present invention. Fig.14In the illustrated embodiment, two adjacent sub-pixel rows may be staggered. Specifically, the plurality of sub-pixels 200 may have a first sub-pixel row R1 and a second sub-pixel row R2 extending along a direction X, and the sub-pixels 200 of the first sub-pixel row R1 and the sub-pixels 200 of the second sub-pixel row R2 are staggered. For example, between adjacent sub-pixels 200 in the same vertical row, their sides parallel to the direction Y are staggered left and right from each other. By adopting the design of horizontal staggering of the sub-pixels 200 of two adjacent sub-pixel rows, the thin-film transistors TFT corresponding to the sub-pixels 200 may be staggered, so that the distance between the thin-film transistors TFT is increased, thereby improving the process feasibility and product yield. Fig.14 As shown, the pattern of each scan line GL may be straight and parallel to the direction X, and the pattern of each data line DL may substantially extend along the direction Y and have a curved portion.

[0051] Please refer to Fig.15 , which is a partial top view schematic diagram of another variant embodiment of the electronic device of the fourth embodiment of the present invention. Fig.15 In the embodiment shown, two adjacent sub-pixel columns may be staggered. In detail, the plurality of sub-pixels 200 may have a first sub-pixel column C1 and a second sub-pixel column C2 extending along a direction Y, and the sub-pixels 200 of the first sub-pixel column C1 and the sub-pixels 200 of the second sub-pixel column C2 are staggered, for example, between adjacent sub-pixels 200 in the same horizontal row, their sides parallel to the direction X are staggered left and right with each other. By means of the vertical staggered design of the sub-pixels 200 of the two adjacent sub-pixel columns, the thin-film transistors TFT corresponding to the sub-pixels 200 may be on different horizontal lines, making the opaque area less obvious and blurred, thereby improving the visibility of the electronic device ED. Fig.15 As shown, the pattern of each data line DL may be straight and parallel to the direction Y, and the pattern of each scan line GL may substantially extend along the direction X and have a curved portion.

[0052] In summary, the electronic device according to the embodiment of the present invention can improve the resolution, process feasibility and / or product yield of the electronic device through special sub-pixel design and arrangement and other sub-pixel rendering (SPR) technology. In addition, the data lines are connected and drive the sub-pixels in a zigzag staggered manner, which can achieve power saving effect.

[0053] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An electronic device, characterized in that: include: a substrate; as well as A plurality of sub-pixels are disposed on the substrate, wherein the plurality of sub-pixels are arranged along a first direction and a second direction, and the first direction is different from the second direction; One of the plurality of sub-pixels has a first width in the first direction and a second width in the second direction, and a ratio of the first width to the second width is greater than 0.66 and less than 1.

5.

2. The electronic device according to claim 1, wherein: The plurality of sub-pixels have a first row extending along the first direction and a second row extending along the second direction, and the number of the plurality of sub-pixels in the first row is greater than the number of the plurality of sub-pixels in the second row.

3. The electronic device according to claim 1, wherein: The plurality of sub-pixels have a first row extending along the first direction and a second row extending along the second direction, and the number of the plurality of sub-pixels in the first row is smaller than the number of the plurality of sub-pixels in the second row.

4. The electronic device according to claim 1, wherein: The plurality of sub-pixels have a first sub-pixel row and a second sub-pixel row, and the plurality of sub-pixels in the first sub-pixel row and the plurality of sub-pixels in the second sub-pixel row are staggered.

5. The electronic device according to claim 1, wherein: The plurality of sub-pixels include a first sub-pixel row and a second sub-pixel row, and the plurality of sub-pixels in the first sub-pixel row and the plurality of sub-pixels in the second sub-pixel row are staggered.

6. The electronic device as claimed in claim 5, characterized in that: The pixel aperture ratio of the first sub-pixel column is equal to the pixel aperture ratio of the second sub-pixel column.

7. The electronic device according to claim 6, wherein: It also includes a data line disposed on the substrate and extending along the second direction, wherein the data line is connected to at least one of the plurality of sub-pixels in the first sub-pixel column and at least one of the plurality of sub-pixels in the second sub-pixel column.

8. The electronic device as claimed in claim 1, wherein: The invention also includes a scanning line which is arranged on the substrate and extends along the first direction.

9. The electronic device as claimed in claim 8, characterized in that: The invention also includes a data line which is arranged on the substrate and extends along the second direction.

10. The electronic device according to claim 9, wherein: The plurality of sub-pixels include a first sub-pixel column and a second sub-pixel column, and the data line is connected to odd-numbered sub-pixels in the first sub-pixel column and even-numbered sub-pixels in the second sub-pixel column.

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