Ultrasonic detection device

Abstract

The invention relates to an ultrasonic detection device, which is arranged in a neck card body and comprises a driving signal forming unit, an ultrasonic signal processing unit, a signal processing unit, a signal processing unit, a signal processing unit and a signal processing unit, and is characterized in that the driving signal forming unit is used for receiving externally input control information and forming ultrasonic signal output matched with the control information according to the control information; the control signal forming circuit receives the control information and forms an emission time sequence control signal output matched with the control information according to the control information; the driving signal forming circuit receives the emission time sequence control signal and forms a driving logic signal according to the emission time sequence control signal; the high-voltage pulse forming circuit receives the driving logic signal and forms a high-voltage driving signal according to the driving logic signal for output; a feedback signal formed based on the ultrasonic signal is collected, and a display signal matched with the feedback signal is formed and output according to the feedback signal.

Description

Technical Field

[0001] The invention relates to the medical field, and in particular to an ultrasonic detection device. Background Art

[0002] Tracheotomy is a surgical procedure that creates an opening in the anterior wall of the trachea in the neck and inserts a tracheal cannula to establish a temporary or long-term artificial airway. It is mainly used to solve upper airway obstruction or patients who require long-term mechanical ventilation to ensure smooth gas exchange. There are mainly two types of tracheotomy: traditional surgical tracheotomy and percutaneous tracheotomy. Percutaneous tracheotomy is increasingly widely used in clinical practice due to its advantages such as less trauma, quick recovery, convenient operation, and short time consumption. However, due to individual differences, the operator needs to use ultrasound positioning before the operation and then blindly puncture, or the operator needs to hold the ultrasound detection device in one hand and the puncture needle in the other hand to puncture the trachea. This operation lacks stability and has great safety risks. Summary of the invention

[0003] In view of the shortcomings of the prior art, the present invention provides an ultrasonic detection device which is easy to use and improves the stability and safety of surgery. Specifically: An ultrasonic detection device, which is built into a set of neck card bodies, includes: A driving signal forming unit is used to receive external input control information and form an ultrasonic signal output matching the control information according to the control information; specifically, A control signal forming circuit, used for receiving the control information and forming a transmission timing control signal output matching the control information according to the control information; A drive signal forming circuit, used for receiving the transmission timing control signal and forming the drive logic signal according to the transmission timing control signal; A high-voltage pulse forming circuit is used to receive the driving logic signal and form a high-voltage driving signal output according to the driving logic signal; the high-voltage driving signal includes a first high-voltage driving sub-signal and a second high-voltage driving sub-signal, A first energy conversion circuit is used to receive the high-voltage drive signal and generate the ultrasonic signal output that matches the control information according to the high-voltage drive signal. The receiving unit collects a feedback signal formed based on the ultrasonic signal, and forms a display signal output matching the feedback signal according to the feedback signal.

[0004] Preferably, in the above-mentioned ultrasonic detection device, the drive signal forming circuit comprises: a first operational amplifier U3, the positive input terminal of the first operational amplifier U3 is connected to the first output terminal EPT50+ of the drive signal forming unit, the reverse input terminal of the first operational amplifier U3 is connected to the ground through the first resistor R11, and the second resistor R12 is connected to the first power supply +5V; the output terminal of the first operational amplifier U3 forms a first emission timing control sub-signal output; wherein the first operational amplifier U3 amplifies the first output terminal EPT50+ of the drive signal forming unit to form a first emission timing control sub-signal; A second operational amplifier U2, wherein the positive input terminal of the second operational amplifier U2 is connected to the second output terminal EPT50- of the drive signal forming unit, and the reverse input terminal of the second operational amplifier U2 is connected to the first power supply +5V and the fourth resistor R9 through the third resistor R8 and the ground respectively; the output terminal of the second operational amplifier U2 forms a second emission timing control sub-signal output; wherein the second operational amplifier U2 amplifies the second output terminal EPT50- of the drive signal forming unit to form a second emission timing control sub-signal.

[0005] Preferably, in the above-mentioned ultrasonic detection device, the positive input terminal of the first operational amplifier U3 is connected to the first output terminal EPT50+ of the drive signal forming unit through the first capacitor C16, and the first output terminal EPT50+ of the drive signal forming unit is grounded through the fifth resistor R13; The positive input terminal of the second operational amplifier U2 is connected to the second output terminal EPT50- of the driving signal forming unit through the second capacitor C11. At the same time, the second output terminal EPT50- of the driving signal forming unit is connected to the first power supply +5V through the sixth resistor R10. The second capacitor C11 and the sixth resistor R10 also form a low-pass filter RC circuit.

[0006] Preferably, in the above-mentioned ultrasonic detection device, the first decoupling circuit is connected between the power supply terminal and the ground terminal of the first operational amplifier U3, the power supply terminal of the first operational amplifier U3 is connected to the first power supply +5V, the ground terminal of the first operational amplifier U3 is connected to the common ground, and the first decoupling circuit is formed by connecting the third capacitor C14 and the fourth capacitor C15 in parallel. The second decoupling circuit is connected between the power supply terminal and the ground terminal of the second operational amplifier U2. The power supply terminal of the second operational amplifier U2 is connected to the first power supply +5V, and the ground terminal of the second operational amplifier U2 is connected to the common ground. The second decoupling circuit is formed by the fifth capacitor C12 and the sixth capacitor C13 in parallel.

[0007] Preferably, in the above-mentioned ultrasonic detection device, the high-voltage pulse forming circuit includes a third integrated circuit U4 and a fourth integrated circuit U5, The input terminal IN pin of the third integrated circuit U4 receives the first transmission timing control sub-signal, the OE pin of the third integrated circuit U4 is connected to the second power supply 10V through the seventh resistor R14, and the VS of the third integrated circuit U4 + The GND pins of the third integrated circuit U4 are connected to the VS pins of the third integrated circuit U4. - pin, the VL pin of the third integrated circuit U4 and grounded; the OUT pin of the third integrated circuit U4 forms the output end of the third integrated circuit U4 to output the first high-voltage driving sub-signal; The input end of the fourth integrated circuit U5 receives the second transmission timing control sub-signal, the OE pin of the fourth integrated circuit U5 is connected to the second power supply 10V through the eighth resistor R15, and the VS of the fourth integrated circuit U5 is connected to the second power supply 10V through the eighth resistor R15. + The pins are connected to the second power supply 10V and the VH pin respectively, and are grounded through the sixth capacitor C19; the GND pins of the fourth integrated circuit U5 are connected to the VS pins of the fourth integrated circuit U5 respectively. - The pin is connected to the VL pin of the fourth integrated circuit U5 and is grounded; the OUT pin of the fourth integrated circuit U5 forms the output end of the fourth integrated circuit U5 to output the second high-voltage driving sub-signal.

[0008] Preferably, in the above-mentioned ultrasonic detection device, the first energy conversion circuit comprises: The first energy conversion sub-circuit includes a first PMOS tube, the gate of the first PMOS tube is connected to the OUT pin of the third integrated circuit U4 through the seventh capacitor C18, the first current limiting resistor R16 is connected to the source of the first PMOS tube, the source of the first PMOS tube is connected to the +10V pin through the tenth resistor R17, connected to the common ground through the first transmit filter circuit, and connected to the common ground through the first DC voltage stabilizing circuit, and the drain of the first PMOS tube is connected to the input end of the ultrasonic output device through the first diode D3; wherein the first transmit filter circuit is formed by the ninth capacitor C21 and the tenth capacitor TC2 connected in parallel, The second energy conversion sub-circuit, the second energy conversion sub-circuit includes a second NMOS tube, the gate of the second NMOS tube is connected to the OUT pin of the fourth integrated circuit U5 through the eighth capacitor C20, the second current limiting resistor R19 is connected to the source of the second NMOS tube, the source of the second NMOS tube is connected to the -10V pin through the eleventh resistor R18, connected to the common ground through the second transmit filter circuit, and connected to the common ground through the second DC voltage stabilizing circuit, and the drain of the second NMOS tube is connected to the input end of the ultrasonic output device through the second diode D4; wherein the second transmit filter circuit is formed by the eleventh capacitor C22 and the twelfth capacitor TC3 connected in parallel.

[0009] Preferably, in the above-mentioned ultrasonic detection device, the driving signal forming unit further comprises: a first suppression circuit connected to the energy conversion unit, specifically comprising: A first inverter U6A, wherein the input end of the first inverter U6A is connected to the 56th pin of the STM32F405RGT6 chip to output the RTZ signal, and the output end is connected to the input end of the fifth integrated circuit U7, a second inverter U6B, wherein the input end of the second inverter U6B is connected to the output end of the first inverter U6A, and the output end of the second inverter U6B is connected to the input end of the sixth integrated circuit U8, The OE pin of the fifth integrated circuit U7 is connected to the second power supply 10V through the twelfth resistor R21, the VS+ pin of the fifth integrated circuit U7 is connected to the VH pin of the fifth integrated circuit U7 and the second power supply 10V respectively, and the connection point formed by the VS+ pin of the fifth integrated circuit U7 and the VH pin of the fifth integrated circuit U7 is grounded through the filter capacitor C24; the VL pin of the fifth integrated circuit U7, the VS- pin of the fifth integrated circuit U7 and the GND pin of the fifth integrated circuit U7 are all grounded, and the OE pin OUT pin of the fifth integrated circuit U7 is connected to the gate of the third MOS tube Q3, The OE pin of the sixth integrated circuit U8 is connected to the second power supply 10V through the thirteenth resistor R22, the VS+ pin of the sixth integrated circuit U8 is respectively connected to the VH pin of the sixth integrated circuit U8 and the second power supply 10V, and the connection point formed by the VS+ pin of the sixth integrated circuit U8 and the VH pin of the sixth integrated circuit U8 is grounded through the filter capacitor C24; the VL pin of the sixth integrated circuit U8, the VS- pin of the sixth integrated circuit U8 and the GND pin of the sixth integrated circuit U8 are all grounded, the OE pin OUT pin of the sixth integrated circuit U8 is connected to the gate of the fourth MOS tube Q4, and the drain of the fourth MOS tube Q4 is connected to the drain of the third MOS tube Q3.

[0010] Preferably, in the above-mentioned ultrasonic detection device, the receiving unit specifically includes: The preamplifier includes a first transistor Q5, a second transistor Q6, and a third transistor Q7 for three-stage amplification, and is used to amplify the weak feedback signal to form an amplified echo signal output, specifically including: The first transistor Q5, the acquisition unit is connected to the base of the first transistor, the collector of the first transistor is respectively connected to the base of the second transistor, connected to the third voltage 15V through the echo first resistor R28, and the emitter of the first transistor is connected to the fourth power supply -5V through the echo second resistor R25 and the echo third resistor R26; The collector of the second triode Q6 is connected to the third voltage 15V through the echo fourth resistor R29, the emitter of the second triode is grounded through the echo fifth resistor R30, and the emitter of the second triode is connected to the base of the third triode through the echo sixth resistor R31; The collector of the third transistor Q7 is connected to the third voltage 15V, the emitter of the third transistor Q7 is grounded through the echo sixth resistor R32, and is connected to the connection point of the echo second resistor R25 and the echo third resistor R26 through the echo seventh resistor R27, and the echo seventh resistor R27 is equivalent to a feedback resistor, wherein the emitter of the third transistor Q7 forms the output end of the preamplifier.

[0011] Preferably, the above-mentioned ultrasonic detection device further comprises: The detection circuit includes a detection coupling capacitor C31, which is used to receive the amplified echo signal. The detection filter circuit is formed by the detection inductor L1 and the freewheeling diode D18. The detection comparator U9, the reverse end of the detection comparator U9 is connected to the output end of the detection filter circuit through the fourteenth resistor R36, the forward end of the detection comparator U9 is connected to the output end of the detection filter circuit through the fifteenth resistor R38 and the sixteenth resistor R37, and the output end of the detection comparator U9 is connected to the reverse end of the detection comparator U9 through a detection feedback circuit to form a negative feedback network.

[0012] Preferably, the above-mentioned ultrasonic detection device further includes a second conversion circuit, the second conversion circuit includes a second conversion comparator U10, the inverting end of the second conversion comparator U10 is connected to the output end of the detection comparator U9, the non-phase end of the second conversion comparator U10 is connected to the REFL pin of the seventh integrated circuit U11 through the first conversion resistor R42, and the output end of the second conversion comparator is connected to the input pin of the seventh integrated circuit U11.

[0013] Compared with the prior art, the present invention has the following beneficial effects: The above-mentioned ultrasonic detection device is built inside a set of neck card body. During the operation, the set of neck card body is fixed to the target area of ​​the patient's neck, and the image of the subcutaneous detection area is obtained through real-time detection of the ultrasonic detection device. Specifically, a drive signal forming unit is used to receive control information input from the outside, and form an ultrasonic signal output matching the control information according to the control information; specifically includes a control signal forming circuit, which is used to receive the control information, and form a transmission timing control signal output matching the control information according to the control information; a drive signal forming circuit, which is used to receive the transmission timing control signal, and form the drive logic signal according to the transmission timing control signal. A high-voltage pulse forming circuit is used to receive the drive logic signal, and form a high-voltage drive signal output according to the drive logic signal; a first energy conversion circuit is used to receive the high-voltage drive signal, and form the ultrasonic signal output matching the control information according to the high-voltage drive signal; the ultrasonic signal acts on the patient's neck to form a feedback signal, and the receiving unit collects the feedback signal formed based on the ultrasonic signal, and forms a display signal output matching the feedback signal according to the feedback signal; the surgical operator performs the surgical operation according to the display signal. This method greatly improves the safety and stability of the operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 A circuit diagram of a driving signal forming circuit in an ultrasonic detection device provided by an embodiment of the present invention; Figure 2 A circuit diagram of a high-voltage pulse forming circuit in an ultrasonic detection device provided by an embodiment of the present invention; Figure 3 A circuit diagram of a first energy conversion circuit in an ultrasonic detection device provided by an embodiment of the present invention; Figure 4 A circuit diagram of a first suppression circuit in an ultrasonic detection device provided by an embodiment of the present invention; Figure 5 A circuit diagram of a preamplifier in an ultrasonic detection device provided by an embodiment of the present invention; Figure 6 A circuit diagram of the detection circuit in an ultrasonic detection device provided by an embodiment of the present invention; Figure 7 A circuit diagram of the second conversion comparator in an ultrasonic detection device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0015] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0016] An ultrasonic detection device, which is built into a set of neck card bodies, includes: A driving signal forming unit is used to receive external input control information and form an ultrasonic signal output matching the control information according to the control information; specifically, A control signal forming circuit is used to receive the control information, and to form an emission timing control signal output that matches the control information according to the control information; wherein the externally input control information at least includes a preset imaging parameter signal, such as a frequency signal and a pulse signal, and the control signal forming circuit forms an emission timing control signal according to the preset imaging parameter signal. Schematically, the control signal forming circuit can be formed by an STM32F405RGT6 chip. Pin 58 of the STM32F405RGT6 chip outputs an EPT50+ signal, and pin 57 outputs an EPT50- signal, and the EPT50+ signal and the EPT50- signal are emission timing control signals. Wherein, the EPT50+ forms the first output terminal of the drive signal forming unit, and EPT50- forms the second output terminal of the drive signal forming unit. A drive signal forming circuit is used to receive the transmission timing control signal and form the drive logic signal according to the transmission timing control signal. The drive signal forming circuit specifically includes: like Figure 1 As shown, a first operational amplifier U3, the positive input terminal of the first operational amplifier U3 is connected to the first output terminal EPT50+ of the drive signal forming unit, and the reverse input terminal of the first operational amplifier U3 is connected to the ground through the first resistor R11 and the second resistor R12 is connected to the first power supply +5V; the output terminal of the first operational amplifier U3 forms a first emission timing control sub-signal output; wherein the first operational amplifier U3 amplifies the first output terminal EPT50+ of the drive signal forming unit to form a first emission timing control sub-signal; A second operational amplifier U2, wherein the positive input terminal of the second operational amplifier U2 is connected to the second output terminal EPT50- of the drive signal forming unit, and the reverse input terminal of the second operational amplifier U2 is connected to the first power supply +5V and the fourth resistor R9 through the third resistor R8 and the ground; the output terminal of the second operational amplifier U2 forms a second emission timing control sub-signal output; wherein the second operational amplifier U2 amplifies the second output terminal EPT50- of the drive signal forming unit to form a second emission timing control sub-signal; The first resistor R11 and the second resistor R12 in the above-mentioned drive signal forming circuit are used to set the gain of the first operational amplifier U3, and the first emission timing control sub-signal output matching the subsequent circuit is formed by adjusting the first resistor R11 and the second resistor R12; similarly, the third resistor R8 and the fourth resistor R9 are used to set the gain of the second operational amplifier U2, and the second emission timing control sub-signal output matching the subsequent circuit is formed by adjusting the third resistor R8 and the fourth resistor R9; In order to further improve the stability of the driving signal forming circuit, based on the above embodiment, the following further aspects are included: The first output terminal EPT50+ of the drive signal forming unit is connected to the positive input terminal of the first operational amplifier U3 through the first capacitor C16, and the first output terminal EPT50+ of the drive signal forming unit is grounded through the fifth resistor R13. The first capacitor C16 and the fifth resistor R13 form a low-pass filter RC circuit, and the first capacitor C16 and the fifth resistor R13 are used to remove high-frequency noise in the EPT50+ signal to form a stable first emission timing control sub-signal; Similarly, the positive input terminal of the second operational amplifier U2 is connected to the second output terminal EPT50- of the drive signal forming unit through the second capacitor C11. At the same time, the second output terminal EPT50- of the drive signal forming unit is connected to the first power supply +5V through the sixth resistor R10. The second capacitor C11 and the sixth resistor R10 also form a low-pass filter RC circuit. The second capacitor C11 and the sixth resistor R10 are intended to remove high-frequency noise in the EPT50- signal to form a stable second emission timing control sub-signal.

[0017] In order to further improve the stability of the driving signal forming circuit, based on the above embodiment, schematically, it further includes: The first decoupling circuit is connected between the power supply terminal and the ground terminal of the first operational amplifier U3. The power supply terminal of the first operational amplifier U3 is connected to the first power supply +5V, and the ground terminal of the first operational amplifier U3 is connected to the common ground. The first decoupling circuit is formed by the third capacitor C14 and the fourth capacitor C15 connected in parallel. The first decoupling circuit is intended to absorb the ripple and high-frequency noise in the first power supply +5V, so that the first operational amplifier U3 obtains a stable power supply voltage, thereby preventing the first operational amplifier U3 from operating abnormally due to voltage fluctuations.

[0018] The second decoupling circuit is connected between the power supply terminal and the ground terminal of the second operational amplifier U2. The power supply terminal of the second operational amplifier U2 is connected to the first power supply +5V, and the ground terminal of the second operational amplifier U2 is connected to the common ground. The second decoupling circuit is formed by the fifth capacitor C12 and the sixth capacitor C13 connected in parallel. The second decoupling circuit is intended to absorb the ripple and high-frequency noise in the first power supply +5V so that the second operational amplifier U2 obtains a stable power supply voltage to avoid abnormal operation of the second operational amplifier U2 due to voltage fluctuations.

[0019] A high-voltage pulse forming circuit is used to receive the driving logic signal and form a high-voltage driving signal output according to the driving logic signal; the high-voltage driving signal includes a first high-voltage driving sub-signal and a second high-voltage driving sub-signal, schematically, as shown Figure 2 As shown, the high voltage pulse forming circuit includes a third integrated circuit U4 and a fourth integrated circuit U5. The input terminal IN pin of the third integrated circuit U4 receives the first emission timing control sub-signal, and is intended to convert the low-voltage first emission timing control sub-signal into a first high-voltage drive sub-signal output; the OE pin of the third integrated circuit U4 is connected to the second power supply 10V through the seventh resistor R14, and the VS of the third integrated circuit U4 + The GND pins of the third integrated circuit U4 are connected to the VS pins of the third integrated circuit U4. - The OUT pin of the third integrated circuit U4 forms the output terminal of the third integrated circuit U4 to output the first high-voltage drive sub-signal; The input end of the fourth integrated circuit U5 receives the second emission timing control sub-signal, aiming to convert the low-voltage second emission timing control sub-signal into a second high-voltage drive sub-signal output; the OE pin of the fourth integrated circuit U5 is connected to the second power supply 10V through the eighth resistor R15, and the VS of the fourth integrated circuit U5 is connected to the second power supply 10V through the eighth resistor R15. +The GND pins of the fourth integrated circuit U5 are respectively connected to the VS pins of the fourth integrated circuit U5. - The OUT pin of the fourth integrated circuit U5 forms the output terminal of the fourth integrated circuit U5 to output the second high-voltage driving sub-signal.

[0020] The seventh resistor R14 and the fifth capacitor C17, the eighth resistor R15 and the sixth capacitor C19 are all decoupling circuits, which are intended to filter out high-frequency noise in the second power supply 10V, so that the third integrated circuit U4 and the fourth integrated circuit U5 obtain stable voltages, and reduce the impact of fluctuations in the second power supply 10V on the third integrated circuit U4 and the fourth integrated circuit U5. It should be noted that the third integrated circuit and the fourth integrated circuit can both be operational amplifiers.

[0021] The high-voltage pulse forming circuit is formed by a third integrated circuit U4 and a fourth integrated circuit U5. The third integrated circuit U4 and the fourth integrated circuit U5 are relatively small in size and are easy to be miniaturized.

[0022] The first energy conversion circuit is used to receive the high-voltage drive signal and form the ultrasonic signal output matching the control information according to the high-voltage drive signal; specifically, like Figure 3 As shown, the first energy conversion subcircuit includes a first PMOS tube, the gate of the first PMOS tube is connected to the OUT pin of the third integrated circuit U4 through the seventh capacitor C18, the first current limiting resistor R16 is connected to the source of the first PMOS tube, the source of the first PMOS tube is connected to the +10V pin through the tenth resistor R17, connected to the common ground through the first transmission filter circuit, and connected to the common ground through the first DC voltage stabilizing circuit, and the drain of the first PMOS tube is connected to the input end of the ultrasonic output device through the first diode D3; wherein the first transmission filter circuit is formed by the ninth capacitor C21 and the tenth capacitor TC2 in parallel, and the first DC voltage stabilizing circuit is formed by three series diodes. The first diode D3 is a protection diode, which is intended to prevent the circuit from being damaged by overvoltage or overcurrent. The seventh capacitor C18 is intended to filter out high-frequency noise in the first high-voltage driving sub-signal to ensure stable operation of the circuit. The first current limiting resistor R16 is intended to achieve the functions of current limiting, voltage division and bias to prevent overcurrent in the first PMOS tube. At the same time, it is combined with the tenth resistor R17 to achieve voltage division to provide a suitable bias voltage to drive the first PMOS tube to turn on or off.

[0023] The second energy conversion subcircuit includes a second NMOS tube, the gate of the second NMOS tube is connected to the OUT pin of the fourth integrated circuit U5 through the eighth capacitor C20, the second current limiting resistor R19 is connected to the source of the second NMOS tube, the source of the second NMOS tube is connected to the -10V pin through the eleventh resistor R18, connected to the common ground through the second transmission filter circuit, and connected to the common ground through the second DC voltage stabilizing circuit, and the drain of the second NMOS tube is connected to the input end of the ultrasonic output device through the second diode D4; wherein the second transmission filter circuit is formed by the eleventh capacitor C22 and the twelfth capacitor TC3 in parallel, and the first DC voltage stabilizing circuit is formed by three series diodes. The second diode D4 is a protection diode, which is intended to prevent the circuit from being damaged by overvoltage or overcurrent. The eighth capacitor C20 is intended to filter out high-frequency noise in the second high-voltage driving sub-signal to ensure stable operation of the circuit. The second current limiting resistor R19 is intended to achieve the functions of current limiting, voltage division and bias to prevent overcurrent in the second NMOS tube. At the same time, it is combined with the eleventh resistor R18 to achieve voltage division to provide a suitable bias voltage to drive the second NMOS tube to turn on or off.

[0024] The first energy conversion circuit is intended to realize the transmission function of the ultrasonic signal, and forms a driving signal by controlling the conduction and cutoff of the first PMOS tube and the second NMOS tube to drive the ultrasonic output device to output the ultrasonic signal.

[0025] The receiving unit collects a feedback signal formed based on the ultrasonic signal, and forms a display signal output matching the feedback signal according to the feedback signal.

[0026] The above-mentioned ultrasonic detection device is built inside a set of neck card body. During the operation, the set of neck card body is fixed to the target area of ​​the patient's neck, and the image of the subcutaneous detection area is obtained through real-time detection of the ultrasonic detection device. Specifically, a drive signal forming unit is used to receive control information input from the outside, and form an ultrasonic signal output matching the control information according to the control information; specifically includes a control signal forming circuit, which is used to receive the control information, and form a transmission timing control signal output matching the control information according to the control information; a drive signal forming circuit, which is used to receive the transmission timing control signal, and form the drive logic signal according to the transmission timing control signal. A high-voltage pulse forming circuit is used to receive the drive logic signal, and form a high-voltage drive signal output according to the drive logic signal; a first energy conversion circuit is used to receive the high-voltage drive signal, and form the ultrasonic signal output matching the control information according to the high-voltage drive signal; the ultrasonic signal acts on the patient's neck to form a feedback signal, and the receiving unit collects the feedback signal formed based on the ultrasonic signal, and forms a display signal output matching the feedback signal according to the feedback signal; the surgical operator performs the surgical operation according to the display signal. This method greatly improves the safety and stability of the operation.

[0027] As a further preferred embodiment, the above-mentioned ultrasonic detection device, wherein the driving signal forming unit further includes: a first suppression circuit, connected to the energy conversion unit, for suppressing aftershocks formed based on the ultrasonic signal after the ultrasonic signal is output. Aftershocks are easily generated after the ultrasonic signal is output, and the aftershock signal is easy to interfere with the accuracy of ultrasonic feedback signal acquisition. The first suppression circuit suppresses the aftershock signal to prevent the aftershock signal from interfering with the subsequent echo signal. Specifically including: Figure 4 As shown, A first inverter U6A, wherein the input end of the first inverter U6A is connected to the 56th pin of the STM32F405RGT6 chip to output the RTZ signal, and the output end is connected to the input end of the fifth integrated circuit U7, a second inverter U6B, wherein the input end of the second inverter U6B is connected to the output end of the first inverter U6A, and the output end of the second inverter U6B is connected to the input end of the sixth integrated circuit U8, The OE pin of the fifth integrated circuit U7 is connected to the second power supply 10V through the twelfth resistor R21, and the VS+ pin of the fifth integrated circuit U7 is connected to the VH pin of the fifth integrated circuit U7 and the second power supply 10V respectively. The connection point formed by the VS+ pin of the fifth integrated circuit U7 and the VH pin of the fifth integrated circuit U7 is grounded through the filter capacitor C24. The filter capacitor C24 is intended to filter out the ripple in the second power supply 10V to improve the stability of the power supply voltage. The VL pin of the fifth integrated circuit U7, the VS- pin of the fifth integrated circuit U7 and the GND pin of the fifth integrated circuit U7 are all grounded, and the OE pin OUT pin of the fifth integrated circuit U7 is connected to the gate of the third MOS tube Q3, The OE pin of the sixth integrated circuit U8 is connected to the second power supply 10V through the thirteenth resistor R22, and the VS+ pin of the sixth integrated circuit U8 is connected to the VH pin of the sixth integrated circuit U8 and the second power supply 10V respectively. The connection point formed by the VS+ pin of the sixth integrated circuit U8 and the VH pin of the sixth integrated circuit U8 is grounded through the filter capacitor C24. The filter capacitor C24 is intended to filter out the ripple in the second power supply 10V to improve the stability of the power supply voltage. The VL pin of the sixth integrated circuit U8, the VS- pin of the sixth integrated circuit U8 and the GND pin of the sixth integrated circuit U8 are all grounded, and the OE pin OUT pin of the sixth integrated circuit U8 is connected to the gate of the fourth MOS tube Q4, and the drain of the fourth MOS tube Q4 is connected to the drain of the third MOS tube Q3.

[0028] Since the input signals of the fifth integrated circuit U7 and the sixth integrated circuit U8 are opposite, and the drain of the fourth MOS tube Q4 is connected to the drain of the third MOS tube Q3, the fifth integrated circuit U7, the third MOS tube Q3, the sixth integrated circuit U8, and the fourth MOS tube Q4 suppress a pair of opposite signals to complete the suppression of aftershocks.

[0029] As a further preferred embodiment, the receiving unit specifically includes: like Figure 5 As shown, the preamplifier includes a first transistor Q5, a second transistor Q6, and a third transistor Q7 for three-stage amplification, which is intended to amplify the weak feedback signal to form an amplified echo signal output. Specifically, it includes: The first transistor Q5, the acquisition unit is connected to the base of the first transistor, the collector of the first transistor is respectively connected to the base of the second transistor, connected to the third voltage 15V through the echo first resistor R28, and the emitter of the first transistor is connected to the fourth power supply -5V through the echo second resistor R25 and the echo third resistor R26; The collector of the second transistor Q6 is connected to the third voltage 15V through the echo fourth resistor R29, the emitter of the second transistor is grounded through the echo fifth resistor R30, and the emitter of the second transistor is connected to the base of the third transistor through the echo sixth resistor R31.

[0030] The collector of the third transistor Q7 is connected to the third voltage 15V, the emitter of the third transistor Q7 is grounded through the echo sixth resistor R32, and is connected to the connection point of the echo second resistor R25 and the echo third resistor R26 through the echo seventh resistor R27, and the echo seventh resistor R27 is equivalent to a feedback resistor, wherein the emitter of the third transistor Q7 forms the output end of the preamplifier.

[0031] A detection circuit, wherein the input end of the detection circuit is connected to the output end of the preamplifier; specifically, the detection circuit comprises: Figure 6 As shown, The detection coupling capacitor C31 is used to receive the amplified echo signal, filter out the high-frequency carrier signal in the amplified echo signal, and only allow the low-frequency carrier to pass; The detection filter circuit is formed by the detection inductor L1 and the freewheeling diode D18, and is intended to filter out the low-frequency carrier signal in the amplified echo signal; at this time, both the high-frequency carrier signal and the low-frequency carrier signal in the amplified echo signal are filtered out; The detection comparator U9, the reverse end of the detection comparator U9 is connected to the output end of the detection filter circuit through the fourteenth resistor R36, the forward end of the detection comparator U9 is connected to the output end of the detection filter circuit through the fifteenth resistor R38 and the sixteenth resistor R37, and the output end of the detection comparator U9 is connected to the reverse end of the detection comparator U9 through a detection feedback circuit to form a negative feedback network. The detection feedback circuit is formed by the detection feedback capacitor C35 and the detection feedback resistor R29 connected in parallel.

[0032] As a further preferred implementation scheme, based on the above embodiment, a second suppression circuit is provided between the second conversion circuit and the detection circuit, which is intended to suppress the aftershock signal in the receiving wave phase. The working principle of the second suppression circuit is the same as that of the first suppression circuit, which will not be elaborated here.

[0033] A second conversion circuit, wherein the second conversion circuit comprises: like Figure 7As shown, the second conversion comparator, the inverting end of the second conversion comparator U10 is connected to the output end of the detection comparator U9, the non-phase end of the second conversion comparator U10 is connected to the REFL pin of the seventh integrated circuit U11 through the first conversion resistor R42, and the output end of the second conversion comparator is connected to the input pin of the seventh integrated circuit U11. The acquisition unit acquires sound signals, that is, sound signals fed back after the ultrasonic signal contacts the target area.

[0034] The REFM pin of the seventh integrated circuit U11 is connected to the second power supply 10V, and the CK pin of the seventh integrated circuit U11 is connected to a clock signal. The D0 pin, D1 pin, D2 pin, and D3 pin of the seventh integrated circuit U11 convert the input analog signal into a digital signal output. The digital signal is transmitted to the display unit for display.

[0035] The above description of the disclosed embodiments enables one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An ultrasonic detection device, characterized in that: Built into a set of neck card body, including, A driving signal forming unit, used for receiving control information input from the outside, and forming an ultrasonic signal output matching the control information according to the control information; Specifically include: A control signal forming circuit, used for receiving the control information and forming a transmission timing control signal output matching the control information according to the control information; A drive signal forming circuit, used for receiving the transmission timing control signal and forming a drive logic signal according to the transmission timing control signal; A high-voltage pulse forming circuit is used to receive the driving logic signal and form a high-voltage driving signal output according to the driving logic signal; the high-voltage driving signal includes a first high-voltage driving sub-signal and a second high-voltage driving sub-signal, A first energy conversion circuit, configured to receive the high-voltage drive signal and generate the ultrasonic signal output matching the control information according to the high-voltage drive signal; The receiving unit collects a feedback signal formed based on the ultrasonic signal, and forms a display signal output matching the feedback signal according to the feedback signal.

2. The ultrasonic detection device according to claim 1, characterized in that: The drive signal forming circuit comprises: a first operational amplifier U3, wherein the positive input terminal of the first operational amplifier U3 is connected to the first output terminal EPT50+ of the drive signal forming unit, and the reverse input terminal of the first operational amplifier U3 is connected to the ground through the first resistor R11 and the second resistor R12 is connected to the first power supply +5V; the output terminal of the first operational amplifier U3 forms a first emission timing control sub-signal output; wherein the first operational amplifier U3 amplifies the first output terminal EPT50+ of the drive signal forming unit to form a first emission timing control sub-signal; A second operational amplifier U2, wherein the positive input terminal of the second operational amplifier U2 is connected to the second output terminal EPT50- of the drive signal forming unit, and the reverse input terminal of the second operational amplifier U2 is connected to the first power supply +5V and the fourth resistor R9 through the third resistor R8 and the ground respectively; the output terminal of the second operational amplifier U2 forms a second emission timing control sub-signal output; wherein the second operational amplifier U2 amplifies the second output terminal EPT50- of the drive signal forming unit to form a second emission timing control sub-signal.

3. The ultrasonic detection device according to claim 2, characterized in that: The positive input terminal of the first operational amplifier U3 is connected to the first output terminal EPT50+ of the drive signal forming unit through the first capacitor C16, and the first output terminal EPT50+ of the drive signal forming unit is grounded through the fifth resistor R13; The positive input terminal of the second operational amplifier U2 is connected to the second output terminal EPT50- of the driving signal forming unit through the second capacitor C11. At the same time, the second output terminal EPT50- of the driving signal forming unit is connected to the first power supply +5V through the sixth resistor R10. The second capacitor C11 and the sixth resistor R10 also form a low-pass filter RC circuit.

4. The ultrasonic detection device according to claim 3, characterized in that: The first decoupling circuit is connected between the power supply terminal and the ground terminal of the first operational amplifier U3. The power supply terminal of the first operational amplifier U3 is connected to the first power supply +5V, and the ground terminal of the first operational amplifier U3 is connected to the common ground. The first decoupling circuit is formed by connecting the third capacitor C14 and the fourth capacitor C15 in parallel. The second decoupling circuit is connected between the power supply terminal and the ground terminal of the second operational amplifier U2. The power supply terminal of the second operational amplifier U2 is connected to the first power supply +5V, and the ground terminal of the second operational amplifier U2 is connected to the common ground. The second decoupling circuit is formed by the fifth capacitor C12 and the sixth capacitor C13 in parallel.

5. The ultrasonic detection device according to claim 3, characterized in that: The high voltage pulse forming circuit includes a third integrated circuit U4 and a fourth integrated circuit U5. The input terminal IN pin of the third integrated circuit U4 receives the first transmission timing control sub-signal, the OE pin of the third integrated circuit U4 is connected to the second power supply 10V through the seventh resistor R14, and the VS of the third integrated circuit U4 + The GND pins of the third integrated circuit U4 are connected to the VS pins of the third integrated circuit U4. - pin, the VL pin of the third integrated circuit U4 and grounded; the OUT pin of the third integrated circuit U4 forms the output end of the third integrated circuit U4 to output the first high-voltage driving sub-signal; The input end of the fourth integrated circuit U5 receives the second transmission timing control sub-signal, the OE pin of the fourth integrated circuit U5 is connected to the second power supply 10V through the eighth resistor R15, and the VS of the fourth integrated circuit U5 is connected to the second power supply 10V through the eighth resistor R15. + The pins are connected to the second power supply 10V and the VH pin respectively, and are grounded through the sixth capacitor C19; the GND pins of the fourth integrated circuit U5 are connected to the VS pins of the fourth integrated circuit U5 respectively. - The pin is connected to the VL pin of the fourth integrated circuit U5 and is grounded; the OUT pin of the fourth integrated circuit U5 forms the output end of the fourth integrated circuit U5 to output the second high-voltage driving sub-signal.

6. The ultrasonic detection device according to claim 5, characterized in that: The first energy conversion circuit comprises: The first energy conversion sub-circuit includes a first PMOS tube, the gate of the first PMOS tube is connected to the OUT pin of the third integrated circuit U4 through the seventh capacitor C18, the first current limiting resistor R16 is connected to the source of the first PMOS tube, the source of the first PMOS tube is connected to the +10V pin through the tenth resistor R17, connected to the common ground through the first transmit filter circuit, and connected to the common ground through the first DC voltage stabilizing circuit, and the drain of the first PMOS tube is connected to the input end of the ultrasonic output device through the first diode D3; wherein the first transmit filter circuit is formed by the ninth capacitor C21 and the tenth capacitor TC2 connected in parallel, The second energy conversion sub-circuit, the second energy conversion sub-circuit includes a second NMOS tube, the gate of the second NMOS tube is connected to the OUT pin of the fourth integrated circuit U5 through the eighth capacitor C20, the second current limiting resistor R19 is connected to the source of the second NMOS tube, the source of the second NMOS tube is connected to the -10V pin through the eleventh resistor R18, connected to the common ground through the second transmit filter circuit, and connected to the common ground through the second DC voltage stabilizing circuit, and the drain of the second NMOS tube is connected to the input end of the ultrasonic output device through the second diode D4; wherein the second transmit filter circuit is formed by the eleventh capacitor C22 and the twelfth capacitor TC3 connected in parallel.

7. The ultrasonic detection device according to claim 3, characterized in that: The driving signal forming unit further includes: a first suppression circuit connected to the energy conversion unit, specifically including: A first inverter U6A, wherein the input end of the first inverter U6A is connected to the 56th pin of the STM32F405RGT6 chip to output the RTZ signal, and the output end is connected to the input end of the fifth integrated circuit U7, a second inverter U6B, wherein the input end of the second inverter U6B is connected to the output end of the first inverter U6A, and the output end of the second inverter U6B is connected to the input end of the sixth integrated circuit U8, The OE pin of the fifth integrated circuit U7 is connected to the second power supply 10V through the twelfth resistor R21, the VS+ pin of the fifth integrated circuit U7 is connected to the VH pin of the fifth integrated circuit U7 and the second power supply 10V respectively, and the connection point formed by the VS+ pin of the fifth integrated circuit U7 and the VH pin of the fifth integrated circuit U7 is grounded through the filter capacitor C24; the VL pin of the fifth integrated circuit U7, the VS- pin of the fifth integrated circuit U7 and the GND pin of the fifth integrated circuit U7 are all grounded, and the OE pin OUT pin of the fifth integrated circuit U7 is connected to the gate of the third MOS tube Q3, The OE pin of the sixth integrated circuit U8 is connected to the second power supply 10V through the thirteenth resistor R22, the VS+ pin of the sixth integrated circuit U8 is respectively connected to the VH pin of the sixth integrated circuit U8 and the second power supply 10V, and the connection point formed by the VS+ pin of the sixth integrated circuit U8 and the VH pin of the sixth integrated circuit U8 is grounded through the filter capacitor C24; the VL pin of the sixth integrated circuit U8, the VS- pin of the sixth integrated circuit U8 and the GND pin of the sixth integrated circuit U8 are all grounded, the OE pin OUT pin of the sixth integrated circuit U8 is connected to the gate of the fourth MOS tube Q4, and the drain of the fourth MOS tube Q4 is connected to the drain of the third MOS tube Q3.

8. The ultrasonic detection device according to claim 1, characterized in that: The receiving unit specifically includes: The preamplifier includes a first transistor Q5, a second transistor Q6, and a third transistor Q7 for three-stage amplification, and is used to amplify the weak feedback signal to form an amplified echo signal output, specifically including: The first transistor Q5, the acquisition unit is connected to the base of the first transistor, the collector of the first transistor is respectively connected to the base of the second transistor, connected to the third voltage 15V through the echo first resistor R28, and the emitter of the first transistor is connected to the fourth power supply -5V through the echo second resistor R25 and the echo third resistor R26; The collector of the second triode Q6 is connected to the third voltage 15V through the echo fourth resistor R29, the emitter of the second triode is grounded through the echo fifth resistor R30, and the emitter of the second triode is connected to the base of the third triode through the echo sixth resistor R31; The collector of the third transistor Q7 is connected to the third voltage 15V, the emitter of the third transistor Q7 is grounded through the echo sixth resistor R32, and is connected to the connection point of the echo second resistor R25 and the echo third resistor R26 through the echo seventh resistor R27, and the echo seventh resistor R27 is equivalent to a feedback resistor, wherein the emitter of the third transistor Q7 forms the output end of the preamplifier.

9. The ultrasonic detection device according to claim 8, characterized in that: Also includes: The detection circuit includes a detection coupling capacitor C31, which is used to receive the amplified echo signal. The detection filter circuit is formed by the detection inductor L1 and the freewheeling diode D18. The detection comparator U9, the reverse end of the detection comparator U9 is connected to the output end of the detection filter circuit through the fourteenth resistor R36, the forward end of the detection comparator U9 is connected to the output end of the detection filter circuit through the fifteenth resistor R38 and the sixteenth resistor R37, and the output end of the detection comparator U9 is connected to the reverse end of the detection comparator U9 through a detection feedback circuit to form a negative feedback network.

10. The ultrasonic detection device according to claim 9, characterized in that: It also includes a second conversion circuit, which includes a second conversion comparator U10, the inverting end of the second conversion comparator U10 is connected to the output end of the detection comparator U9, the non-phase end of the second conversion comparator U10 is connected to the REFL pin of the seventh integrated circuit U11 through the first conversion resistor R42, and the output end of the second conversion comparator is connected to the input pin of the seventh integrated circuit U11.

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