Chip sealing performance and resistance detection equipment and control method thereof
By designing chip sealing and resistance detection equipment, synchronous detection is achieved using mobile modules and fixtures, the existing equipment's low efficiency and large volume are solved, and efficient and accurate detection results are achieved.
Patent Information
- Application Number
- CN202510135333.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-07
- Publication Date
- 2025-05-13
- Estimated Expiration
- 2045-02-07
AI Technical Summary
Existing chip detection equipment is less efficient when performing airtightness detection and resistance detection, the equipment is large in size, and it is difficult to ensure the position accuracy of resistance detection and the protection probe.
A chip sealing and resistance detection device is designed to realize synchronous operation between the resistance detection module and the sealing detection module through the combination of the mobile module and the fixture. The device includes a movable movable abutment, a resistance detection module and a sealing detection module, which ensures alignment of the probe with the probe point with the top block and protects the probe.
It improves chip detection efficiency, saves space in the detection mechanism, ensures the position accuracy of resistance detection, and protects the probe, achieving efficient sealing and resistance detection.
Smart Images

Figure CN119984648A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of chip detection technology, and in particular to a chip sealing and resistance detection device and a control method thereof. Background Art
[0002] During the manufacturing process, the chip needs to be tested for various performances. For chips with airtight components and special resistance requirements, airtightness testing and resistance testing are usually performed.
[0003] At present, air tightness testing and resistance testing are usually carried out in sequence. At the air tightness testing station, the air tightness testing instrument is used to evacuate the chip's test area and collect air tightness data. Then the chip is transferred to the resistance testing station for resistance testing through a manipulator or motion module. When unqualified products appear during the air tightness testing process, they will be removed through a special channel, and qualified products will enter the next step of resistance testing.
[0004] The air tightness detection and resistance detection in the prior art are of low efficiency and the overall equipment is relatively large. Summary of the invention
[0005] An object of the present invention is to provide a chip sealing and resistance detection device with high detection efficiency and small overall volume.
[0006] Another object of the present invention is to provide data support for further comprehensive analysis of chip conditions.
[0007] A further object of the present invention is to ensure the positional accuracy of resistance detection and to protect the probe.
[0008] An embodiment of the present invention provides a chip sealing and resistance detection device, comprising:
[0009] A moving module comprises a moving base which can move in a horizontal direction;
[0010] A fixture is fixedly mounted on the motion base, and the fixture includes a first cavity for positioning the chip to be tested;
[0011] A resistance detection module is fixedly mounted on the moving base and located below the fixture. The resistance detection module and the fixture follow the moving base to move from the material receiving position to the detection position. The resistance detection module is used to detect the on / off state of the resistance element of the chip to be tested at the detection position.
[0012] A sealing detection module is arranged at the detection position and includes a liftable sealing pressure head and an airtight test joint. A second cavity is provided on the lower surface of the sealing pressure head. The second cavity is connected to the airtight test joint. The airtight test joint is connected to an airtight detection instrument. When the fixture is located at the detection position, the sealing pressure head descends to a height that fits with the fixture, so that the second cavity and the first cavity together form a sealed space.
[0013] Optionally, the resistance detection module includes a probe base and a probe group installed on the upper surface of the probe base;
[0014] One of the probe base and the fixture is provided with a guide sleeve, and the other is provided with a guide column. The guide sleeve and the guide column are matched to ensure that the probe group is aligned with the probe points corresponding to the resistor element.
[0015] Optionally, the resistance detection module also includes a top block that can be raised and lowered relative to the probe base, the top block is provided with through holes for passing each probe of the probe group, when the top block does not contact the chip to be tested, the probe is located in the through hole, after the top block contacts the chip to be tested, the probe can be controllably extended out of the through hole and contact with the corresponding probe point.
[0016] Optionally, the probe is detachably connected to the probe base.
[0017] Optionally, the chip sealing and resistance detection device further includes a photoelectric sensor for detecting whether the chip to be tested reaches the detection position.
[0018] Optionally, resistance detection and sealing detection are performed simultaneously.
[0019] In particular, the present invention further provides a chip sealing and resistance detection control method for controlling the chip sealing and resistance detection device described in any one of the above, the method comprising:
[0020] Control the motion base to move from the material receiving position to the detection position;
[0021] When the moving base reaches the detection position, controlling the resistance detection module and the sealing detection module to start simultaneously;
[0022] After the resistance detection and the sealing detection are completed, the moving base is controlled to return from the detection position to the material receiving position.
[0023] Optionally, the step of controlling the resistance detection module and the sealing detection module to start simultaneously includes:
[0024] Control the sealing pressure head to be pressed down to a state of being in contact with the fixture, and start the air tightness detection instrument;
[0025] The resistance detection module is controlled to move upward until the probe contacts the detection point.
[0026] Optionally, when the moving base reaches the detection position, before the step of controlling the resistance detection module and the sealing detection module to start simultaneously, the step further includes:
[0027] A photoelectric sensor is used to identify whether the chip to be tested has reached the detection position.
[0028] Optionally, after the step of controlling the resistance detection module and the sealing detection module to start simultaneously, the step further includes:
[0029] Determine whether the air tightness meets the requirements;
[0030] When the air tightness does not meet the requirements, the resistance detection is stopped or the resistance detection data is marked as abnormal;
[0031] When the air tightness meets the requirements, the air tightness detection data and the resistance detection data are saved correspondingly.
[0032] According to the first aspect of the present invention, there is provided a device capable of simultaneously realizing sealing detection and resistance detection of a chip, by installing a resistance detection module together with a jig for positioning the chip to be tested on a moving base, the moving base is moved with the resistance detection module and the jig to the bottom of the sealing detection module, and then the sealing detection module and the resistance detection module are started, so that both detections can be carried out simultaneously at one workstation, thereby improving detection efficiency and saving space of the detection mechanism.
[0033] Furthermore, the device can simultaneously detect the sealing and resistance of the chip, so that the sealing and resistance data can be obtained at the same time and a corresponding relationship can be easily formed, so that the data can reflect the resistance situation under the current sealing, establish a relationship between the two, and provide data support for further comprehensive analysis of the chip situation.
[0034] According to the second aspect of the present invention, by providing a guide sleeve and a guide column between the probe base and the fixture, the position alignment between each probe on the probe base and the probe point on the fixture can be ensured, thereby ensuring that the test can be performed accurately.
[0035] Furthermore, the resistance detection module also includes a top block. After the resistance detection module is started, the probe base and the top block rise together until the top block contacts the bottom surface of the chip to be tested. At this time, the probe is located in the through hole of the top block and will not directly hit the chip to be tested, thereby protecting the probe. By setting the guide mechanism and the top block, on the one hand, the alignment of the probe and the probe point is ensured, and at the same time, the position of the probe is further limited by the through hole in the top block, which protects the probe while ensuring the position accuracy.
[0036] According to the third aspect of the present invention, the present application also provides a chip sealing and resistance detection equipment control method, which is used to stop resistance detection or mark the resistance detection data as abnormal when the airtightness does not meet the requirements. Stopping resistance detection can save detection costs. Whether the airtightness meets the requirements or not, its correspondence with the resistance detection data can provide data support for further analysis of the performance of the chip to be tested. By marking the detection data when the airtightness does not meet the requirements as abnormal, it can facilitate targeted analysis. BRIEF DESCRIPTION OF THE DRAWINGS
[0037] Figure 1 It is a structural schematic diagram of a chip sealing and resistance detection device according to an embodiment of the present invention when it is in a material receiving state;
[0038] Figure 2 It is a structural schematic diagram of a chip sealing and resistance detection device in a detection state according to an embodiment of the present invention;
[0039] Figure 3 for Figure 1 A schematic diagram of the structure of a resistance detection module of a chip sealing and resistance detection device in an embodiment;
[0040] Figure 4 for Figure 1 A schematic structural diagram of a sealing detection module of a chip sealing and resistance detection device in an embodiment;
[0041] Figure 5 A schematic diagram of the structure of a resistance detection module and a chip to be tested of a chip sealing and resistance detection device according to an embodiment of the present invention;
[0042] Figure 6 is a flow chart of a chip sealing and resistance detection control method according to an embodiment of the present invention;
[0043] Reference numerals:
[0044] 100-chip sealing and resistance detection equipment, 10-moving module, 11-moving base, 111-support part, 12-transverse cylinder, 20-jig, 201-first cavity, 30-resistance detection module, 31-probe base, 32-probe, 33-guide column, 34-top block, 35-floating structure, 36-lifting cylinder, 40-sealing detection module, 41-sealing pressure head, 42-fixed bracket, 43-pressing cylinder, 200-chip to be tested. DETAILED DESCRIPTION
[0045] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.
[0046] It should be noted that when a component is referred to as being "fixed to" or "disposed on" another component, it may be directly on the other component or there may also be a central component. When a component is considered to be "connected to" another component, it may be directly connected to the other component or there may be a central component at the same time. The terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used in the specification of this application are for illustrative purposes only and do not represent the only implementation method.
[0047] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0048] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first feature is directly in contact with the second feature, or the first feature and the second feature are in contact indirectly through an intermediate medium. Moreover, a first feature being “above”, “above”, or “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, or “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.
[0049] Unless otherwise defined, all technical and scientific terms used in the specification of this application have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used in the specification of this application includes any and all combinations of one or more related listed items.
[0050] Figure 1 Schematic diagram of the structure of a chip sealing and resistance detection device 100 in a material receiving state according to an embodiment of the present invention. Figure 2FIG. 1 is a schematic structural diagram of a chip sealing and resistance detection device 100 in a detection state according to an embodiment of the present invention. Figure 3 for Figure 1 A schematic structural diagram of the resistance detection module 30 of the chip sealing and resistance detection device 100 in the embodiment. Figure 4 for Figure 1 A schematic diagram of the structure of the sealing detection module 40 of the chip sealing and resistance detection device 100 in the embodiment. Figure 1 As shown, in one embodiment of the present invention, a chip sealing and resistance detection device 100 includes a moving module 10, a fixture 20, a resistance detection module 30 and a sealing detection module 40. The moving module 10 includes a moving base 11 that can move in the horizontal direction. The fixture 20 is fixed at the moving base 11, and the fixture 20 includes a first cavity 201 for positioning the chip 200 to be tested. The chip 200 to be tested here is a chip with a cover plate on one side (the chip here can be a semi-finished product), and the cover plate is a cover plate with sealing requirements between the chip substrate, for example, the cover plate is an optical glass plate. The other side of the chip is the corresponding probe point of the resistance element to be tested, and the resistance element here can be a thermistor. After the chip 200 to be tested is positioned on the fixture 20, its two sides correspond to the resistance detection module 30 and the sealing detection module 40 respectively. In this embodiment, the resistance detection module 30 is below the fixture 20, and the sealing detection module 40 is above the fixture 20. In other embodiments, the placement positions of the two detection modules can also be exchanged, which is not limited here. The resistance detection module 30 is fixedly mounted on the motion base 11 and is located below the fixture 20. The resistance detection module 30 and the fixture 20 follow the motion base 11 from the receiving position ( Figure 1 A) moves to the detection position ( Figure 1 B), the resistance detection module 30 is used to detect the on-off of the resistance element of the chip to be tested 200 at the detection position. The resistance detection module 30 uses a probe 32 in contact with the probe point and a corresponding detection circuit system to realize the detection function. The sealing detection module 40 is arranged at the detection position and includes a sealing pressure head 41 that can be raised and lowered and an airtight test joint (not shown). The lower surface of the sealing pressure head 41 is provided with a second cavity, the second cavity is connected to the airtight test joint, and the airtight test joint is connected to the airtight detection instrument. When the fixture 20 is located at the detection position, the sealing pressure head 41 drops to a height that fits the fixture 20 so that the second cavity and the first cavity 201 form a sealed space together. The sealed space here can include the substrate and cover plate of the chip to be tested 200, and it is not necessary to enclose the entire chip to be tested 200. In this embodiment, the bottom surface of the chip to be tested 200 is exposed to facilitate the resistance detection. In this embodiment, the resistance detection and the sealing detection can be carried out simultaneously, or they can be carried out step by step at the same station (detection position).
[0051] When performing a sealing test, a sealed space is directly formed by using the second cavity of the sealing pressure head 41 and the first cavity 201 at the fixture 20. As long as the fixture 20 is moved to the testing position, the sealing pressure head 41 is moved down and the airtightness testing instrument connected to the airtightness test joint is started to complete the vacuuming and testing.
[0052] The present embodiment provides a device capable of simultaneously realizing sealing detection and resistance detection of a chip, by installing the resistance detection module 30 together with the jig 20 for positioning the chip to be tested 200 on the moving base 11, and the moving base 11 moves with the resistance detection module 30 and the jig 20 to the bottom of the sealing detection module 40, and then starting the sealing detection module 40 and the resistance detection module 30 to perform two kinds of detection at the same time at one workstation, thereby improving the detection efficiency and saving the space of the detection mechanism.
[0053] Furthermore, the device can simultaneously detect the sealing and resistance of the chip, so that the sealing and resistance data can be obtained at the same time and a corresponding relationship can be easily formed, so that the data can reflect the resistance situation under the current sealing, establish a relationship between the two, and provide data support for further comprehensive analysis of the chip situation.
[0054] In a further embodiment, Figure 1 As shown, the moving module 10 includes a lateral cylinder 12, and the moving base 11 is driven to move by the lateral cylinder 12. The sealing detection module 40 also includes a fixed bracket 42 and a pressing cylinder 43. The fixed bracket 42 is used to install the pressing cylinder 43. The pressing cylinder 43 is connected to the top of the sealing pressure head 41 and is used to drive the sealing pressure head 41 to move up and down. The airtightness test joint can be set on the side of the sealing pressure head 41. Figure 3 As shown, the motion base includes an overhead support portion 111, and the support portion 111 is used to accommodate the resistance detection module 30. It should be noted that: Figure 3 The horizontal plate on the top of the support portion 111 is hidden in the figure so as to make the connection between the fixture 20 and the resistance detection module 30 clear.
[0055] Figure 5 FIG. 1 is a schematic diagram of the structure of the resistance detection module 30 and the chip to be tested 200 of the chip sealing and resistance detection device 100 according to an embodiment of the present invention. Figure 5As shown, in one embodiment, the resistance detection module 30 includes a probe base 31 and a probe group installed on the upper surface of the probe base 31, where the number of probe groups can be multiple, and each probe group includes two probes 32 corresponding to two probe points of a resistor element. One of the probe base 31 and the fixture 20 is provided with a guide sleeve (not shown), and the other is provided with a guide column 33, and the guide sleeve and the guide column 33 are adapted to ensure that the probe group is aligned with the probe points corresponding to the resistor element. The probe base 31 is connected to a lifting cylinder 36, and the lifting cylinder 36 drives the probe base 31 to rise and fall. Figure 5 In the illustrated embodiment, the guide post 33 is arranged at the probe base 31, and the guide sleeve is arranged at the fixture 20. Further, the resistance detection module 30 also includes a top block 34 that can be raised and lowered relative to the probe base 31, and the top block 34 is provided with a through hole for each probe 32 of the probe group to be penetrated. When the top block 34 does not contact the chip to be tested 200, the probe 32 is located in the through hole. After the top block 34 contacts the chip to be tested 200, the probe 32 can be controllably extended out of the through hole and contacted with the corresponding probe point. Here, a floating structure 35 can be arranged between the top block 34 and the probe base 31, and the floating structure 35 includes a spring whose two ends are respectively connected to the top block 34 and the probe base 31, and a guide post is arranged in the middle of the spring. In other embodiments, the top block 34 can also be provided with a lifting drive mechanism for actively controlling the height of the top block 34 relative to the probe base 31.
[0056] In this embodiment, by providing a guide sleeve and a guide column 33 between the probe base 31 and the fixture 20 , the position alignment between each probe on the probe base 31 and the probe point on the fixture 20 can be ensured, thereby ensuring that the test can be performed accurately.
[0057] Further, the resistance detection module 30 also includes a top block 34. After the resistance detection module 30 is started, the probe base 31 and the top block 34 rise together until the top block 34 contacts the bottom surface of the chip to be tested 200. At this time, the probe is located in the through hole of the top block 34 and will not directly hit the chip to be tested 200, thereby protecting the probe. As the probe base 31 continues to rise, the top block 34 does not move, and the probe is exposed from the through hole of the top block 34, and then the resistance test is performed. This embodiment ensures the alignment of the probe with the probe point by setting the guide mechanism and the top block 34, and further limits the position of the probe through the through hole in the top block 34, thereby protecting the probe while ensuring the position accuracy.
[0058] In one embodiment, the probe is detachably connected to the probe base 31. For example, the probe is connected to the probe base 31 by threaded connection, so as to facilitate replacement.
[0059] In a further embodiment, the chip sealing and resistance detection device 100 further includes a photoelectric sensor for detecting whether the chip to be tested 200 reaches the detection position. The photoelectric sensor can be used to determine whether there is a chip to be tested 200 at the detection position, thereby facilitating the realization of automated detection.
[0060] Figure 6 FIG. 1 is a flow chart of a chip sealing and resistance detection control method according to an embodiment of the present invention. Figure 6 As shown, the present application also provides a control method for controlling the chip sealing and resistance detection device 100 in any of the above embodiments, the method comprising:
[0061] Step S100, controlling the moving base 11 to move from the material receiving position to the detection position;
[0062] Step S200, identifying whether the chip 200 to be tested has reached the detection position;
[0063] Step S300, when the moving base 11 reaches the detection position, the resistance detection module 30 and the sealing detection module 40 are controlled to start simultaneously;
[0064] Step S400, after the resistance detection and the sealing detection are completed, the moving base 11 is controlled to return from the detection position to the material receiving position.
[0065] In step S100 , the time when the motion base 11 starts to move can be determined by detecting whether the chip 200 to be tested reaches the testing position, or a sign of the end of the previous process (for example, the robot releases the fixture 20 ).
[0066] In step S200 , detection may be performed by a photoelectric sensor or other commonly used position sensors, which are not limited here.
[0067] Step S300 specifically includes: controlling the sealing pressure head 41 to be pressed down to a state of being in contact with the fixture 20, and starting the airtightness detection instrument; and at the same time controlling the resistance detection module 30 to move upward until the probe contacts the detection point.
[0068] In a further embodiment, a top block 34 detection step can be added to step S300, that is, detecting the moment when the top block 34 contacts the chip to be tested 200. When it is detected that the top block 34 contacts the chip to be tested 200, the moving speed of the probe base 31 is reduced so that the probe can slowly move to the probe point, thereby further protecting the probe.
[0069] Furthermore, after step S300, the following steps are further included:
[0070] Determine whether the air tightness meets the requirements;
[0071] When the air tightness does not meet the requirements, the resistance detection is stopped or the resistance detection data is marked as abnormal;
[0072] When the air tightness meets the requirements, the air tightness detection data and the resistance detection data are saved correspondingly.
[0073] The airtightness detection instrument can detect whether the airtightness of the chip 200 to be tested meets the requirements. If the airtightness of the chip 200 to be tested does not meet the requirements, the resistance detection can be stopped or the resistance detection data bit can be marked as abnormal. This is because airtightness has a certain influence on whether the resistance detection is qualified. For example, poor airtightness will also lead to unqualified resistance detection. Therefore, the resistance detection data with poor airtightness can also be considered unreliable. At this time, ending the resistance detection can save the detection cost. Of course, whether the airtightness meets the requirements or not, its correspondence with the resistance detection data can provide data support for further analysis of the performance of the chip 200 to be tested. By marking the detection data when the airtightness does not meet the requirements as abnormal, it can facilitate the targeted analysis.
[0074] Furthermore, the present application can transfer products that fail the air tightness test and / or resistance test to the same unqualified assembly line (NG line), and the qualified products enter the next process, wherein each product in the unqualified assembly line carries specific test data, so it is convenient to distinguish the type of unqualified situation, such as products that interrupt the resistance test due to unqualified air tightness, products that pass the air tightness test but fail the resistance test, etc., without the need to set up multiple unqualified assembly lines to flow out the corresponding products, thereby further saving equipment space.
[0075] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.
Claims
1. A chip sealing and resistance detection device, characterized in that: include: A moving module comprises a moving base which can move in a horizontal direction; A fixture is fixedly mounted on the motion base, and the fixture includes a first cavity for positioning the chip to be tested; A resistance detection module is fixedly mounted on the moving base and located below the fixture. The resistance detection module and the fixture follow the moving base to move from the material receiving position to the detection position. The resistance detection module is used to detect the on / off state of the resistance element of the chip to be tested at the detection position. A sealing detection module is arranged at the detection position and comprises a sealing pressure head and an airtightness test joint which can be raised and lowered. A second cavity is arranged on the lower surface of the sealing pressure head. The second cavity is communicated with the airtightness test joint. The airtightness test joint is connected with an airtightness detection instrument. When the jig is located at the detection position, the sealing pressure head is lowered to a height that fits the jig, so that the second cavity and the first cavity form a sealed space together. The resistance detection module includes a probe base and a probe group installed on the upper surface of the probe base; One of the probe base and the fixture is provided with a guide sleeve, and the other is provided with a guide column, and the guide sleeve and the guide column are adapted to ensure that the probe group is aligned with the probe points corresponding to the resistor element; The resistance detection module further comprises a top block which can be raised and lowered relative to the probe base, the top block being provided with through holes for inserting each probe of the probe group, the probe being located in the through holes when the top block is not in contact with the chip to be tested, and the probe being controllably extended out of the through holes and in contact with corresponding probe points after the top block is in contact with the chip to be tested; Resistance testing and sealing testing are carried out simultaneously.
2. The chip sealing and resistance detection device according to claim 1, characterized in that: The probe is detachably connected to the probe base.
3. The chip sealing and resistance detection device according to claim 1 or 2, characterized in that: It also includes a photoelectric sensor for detecting whether the chip to be tested reaches the detection position.
4. A chip sealing and resistance detection control method, used to control the chip sealing and resistance detection device according to any one of claims 1 to 3, characterized in that: The method comprises: Control the motion base to move from the material receiving position to the detection position; When the moving base reaches the detection position, controlling the resistance detection module and the sealing detection module to start simultaneously; After the resistance detection and the sealing detection are completed, the moving base is controlled to return from the detection position to the material receiving position.
5. The chip sealing and resistance detection control method according to claim 4, characterized in that: The step of controlling the resistance detection module and the sealing detection module to start simultaneously includes: Control the sealing pressure head to be pressed down to a state of being in contact with the fixture, and start the air tightness detection instrument; The resistance detection module is controlled to move upward until the probe contacts the detection point.
6. The chip sealing and resistance detection control method according to claim 4, characterized in that: When the moving base reaches the detection position, before the step of controlling the resistance detection module and the sealing detection module to start simultaneously, the method further includes: A photoelectric sensor is used to identify whether the chip to be tested has reached the detection position.
7. The chip sealing and resistance detection control method according to any one of claims 4 to 6, characterized in that: After the step of controlling the resistance detection module and the sealing detection module to start simultaneously, the method further includes: Determine whether the air tightness meets the requirements; When the air tightness does not meet the requirements, the resistance detection is stopped or the resistance detection data is marked as abnormal; When the air tightness meets the requirements, the air tightness detection data and the resistance detection data are saved correspondingly.
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