Junction temperature simulation test method and test system of diode chip, and storage medium

Abstract

The invention provides a junction temperature simulation test method and test system for a diode chip and a storage medium, and the method comprises the following steps: testing and determining the highest junction temperature of the diode chip under a pulse current signal; wherein the diode chip is not packaged by glue pouring. The junction temperature simulation test can be carried out before the diode chip is packaged, the junction temperature simulation test does not need to be carried out after the diode chip is packaged into a junction box, and the efficiency of diode chip type selection and photovoltaic module adaptation can be greatly improved; meanwhile, the junction temperature simulation test is carried out on the diode chip at the design end, appropriate and accurate redundancy can be reserved, and mismatch caused by function degradation of the diode junction box in the operation process of the photovoltaic module is reduced.

Description

Technical Field

[0001] The present application relates to the technical field of junction temperature testing of solar devices, and in particular to a junction temperature simulation testing method, a testing system and a storage medium for a diode chip. Background Art

[0002] During the operation of photovoltaic modules, when some solar cell components are blocked or damaged, in addition to reducing the working efficiency of the module, it may also cause hot spot effects, seriously affecting the safe operation of photovoltaic modules. Diode junction boxes are an effective means to protect solar cell components, but the selection and adaptation process of diode junction boxes in traditional technologies is time-consuming and not conducive to improving product R&D efficiency. Summary of the invention

[0003] Based on this, it is necessary to provide a method, a test system and a storage medium that can effectively improve the efficiency and accuracy of junction temperature testing.

[0004] In a first aspect, a junction temperature simulation test method of a diode chip of the present application comprises the following steps: testing and determining the maximum junction temperature of the diode chip under a pulse current signal;

[0005] Wherein, the diode chip is not packaged by glue.

[0006] In one embodiment, in the test method, the diode chip is selected from one or more of a planar Schottky diode chip, a trench Schottky diode chip and a MOS tube chip.

[0007] In one embodiment, in the test method, the number of tests to determine the maximum junction temperature of the diode chip is greater than 1; and the test temperature is different each time.

[0008] In one embodiment, in the test method, the test temperatures for determining the maximum junction temperature of the diode chip include 25°C, 50°C, 75°C, 100°C, 125°C, 150°C, 175°C and 200°C.

[0009] In one embodiment, the testing method comprises the following steps:

[0010] Stabilizing the ambient temperature of the diode chip at a preset temperature;

[0011] Providing a pulse current signal to the diode chip to test the forward voltage drop of the diode chip; wherein the number of times the forward voltage drop of the diode chip is tested is greater than 1, and the test time of each test is different;

[0012] The maximum junction temperature of the diode chip is determined according to the preset temperature and the forward voltage drop of the diode chip.

[0013] In one embodiment, in the test method, the diode chip is a planar Schottky diode chip or a trench Schottky diode chip, the pulse width of the pulse current signal provided to the diode chip satisfies ≤1ms, and the test provides a forward voltage drop of the diode chip when the pulse current signal is 0.1ms, 0.2ms, 0.3ms, 0.4ms, 0.5ms, 0.6ms, 0.7ms, 0.8ms, 0.9ms and 1ms.

[0014] In one embodiment, in the test method, the diode chip is a MOS tube chip, the pulse width of the pulse current signal provided to the diode chip is in the range of 10ms to 20ms, and the forward voltage drop of the diode chip is tested when the pulse current signal is provided at 10ms, 11ms, 12ms, 13ms, 14ms, 15ms, 16ms, 17ms, 18ms, 19ms and 20ms.

[0015] In one embodiment, in the test method, the step of determining the maximum junction temperature of the diode chip according to the preset temperature and the forward voltage drop of the diode chip includes:

[0016] Determining a relationship between the forward voltage drop of the diode chip and the preset temperature according to the preset temperature and the forward voltage drop;

[0017] The maximum junction temperature of the diode chip is determined according to the relationship between the thermal resistance coefficient, the current, the forward voltage drop of the diode chip and the preset temperature.

[0018] In a second aspect, a junction temperature simulation test system of a diode chip of the present application comprises: a test device, a temperature adjustment device and a control device;

[0019] The testing device comprises a power supply module and a voltage detection module, wherein the power supply module is used to provide a pulse current, and the voltage detection module is used to test the forward voltage drop at both ends of the diode chip;

[0020] The temperature regulating device is used to provide a preset ambient temperature;

[0021] The control device is electrically connected to the test device and the temperature adjustment device, and is used to obtain the forward voltage drop across the diode chip measured by the voltage detection module in the test device and the preset ambient temperature provided by the temperature adjustment device, so as to determine the relationship between the voltage drop across the diode chip and the preset ambient temperature, and further determine the maximum junction temperature of the diode chip.

[0022] In a third aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the simulation test method described in the first aspect.

[0023] The junction temperature simulation test method, system and storage medium provided in the present application can perform a junction temperature simulation test before packaging the diode chip, without the need to perform a junction temperature simulation test after packaging the diode chip into a junction box, which can greatly improve the efficiency of diode chip selection and adaptation to photovoltaic modules; at the same time, by performing a junction temperature simulation test on the diode chip at the design end, a suitable and accurate redundancy can be reserved to reduce the mismatch caused by functional degradation of the diode junction box during the operation of the photovoltaic module. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0025] Figure 1 This is a flowchart of a junction temperature simulation test method for a diode chip in one embodiment of the present application;

[0026] Figure 2 This is a flowchart of a junction temperature simulation test method for a diode chip in another embodiment of the present application;

[0027] Figure 3 This is a flowchart of a junction temperature simulation test method for a diode chip in yet another embodiment of the present application;

[0028] Figure 4 This is a flowchart of a junction temperature simulation test method for a diode chip in another embodiment of the present application;

[0029] Figure 5 A flowchart of a junction temperature simulation test method for a diode chip in another embodiment of the present application;

[0030] Figure 6 This is a schematic diagram of the structure of a junction temperature simulation test system for a diode chip in one embodiment of the present application;

[0031] Figure 7 This is a structural schematic diagram of a junction temperature simulation test system for a diode chip in another embodiment of the present application;

[0032] Figure 8 This is a structural schematic diagram of a junction temperature simulation test system for a diode chip in yet another embodiment of the present application;

[0033] Description of the accompanying drawings: test device (1), power module (11), constant current and voltage regulated power supply (111), adjustable resistor (112), ammeter (113), voltage detection module (12), voltage drop test device (121), temperature adjustment device (2), environmental chamber (21), temperature acquisition instrument (22), control device (3), and diode chip (4). DETAILED DESCRIPTION

[0034] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0035] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0036] It can be understood that the terms "first", "second", etc. used in this application can be used to describe various objects in this article, but these objects are not limited by these terms. These terms are only used to distinguish the first object from another object.

[0037] It should be noted that when an element is considered to be "connected" to another element, it can be directly connected to the other element, or connected to the other element through an intermediate element. In addition, the "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is transmission of electrical signals or data between the connected objects.

[0038] When used herein, the singular forms "a", "an", "said", "the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include", "comprise", "have", etc. specify the presence of stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the relevant listed items.

[0039] Junction temperature refers to the highest temperature of the chip in the electronic device, which is often higher than the shell temperature and surface temperature of the electronic device. The junction temperature can be used to obtain the required heat dissipation time and appropriate thermal resistance from the chip end to the package device shell, which is also related to whether the chip in the device can operate safely. The junction temperature of the bypass diode is an important factor in selecting and determining whether the bypass diode is suitable, and it is also an indicator to determine whether the thermal performance of the bypass diode meets the requirements of the component.

[0040] In the photovoltaic field, the maximum temperature that power generation panels can withstand is 200°C. If the ambient temperature or the temperature of the device exceeds this value, the electronic components on the back of the panel may fall off, and the photovoltaic module cannot work properly. Therefore, the maximum junction temperature (Maximum Junction Temperature) of the diode chip needs to be controlled below 200°C. The maximum junction temperature can be used to calculate the thermal resistance from the device housing to the environment at a given power consumption, so as to select a suitable heat sink. It can be seen that once the maximum operating temperature of the device and the heat sink or model are selected, it is necessary to ensure that the junction temperature of the device where the diode chip is located is lower than the maximum operating temperature of the device, otherwise the electronic components on the back of the panel in the photovoltaic module may fall off, affecting the normal operation of the module, and may also cause the diode chip to fail and fail to provide protection for the solar cell components.

[0041] During the operation of photovoltaic modules, when some solar cell elements are blocked or damaged, it is easy to reduce the working efficiency of the module. For example, if about 10% of the panels in the solar power station are blocked by trees and dust in the natural environment, it may cause 60% power loss of the photovoltaic power station; at the same time, this kind of blocking may also cause hot spot effect, which is an important factor affecting the quality and safety of photovoltaic modules in practical applications, and even seriously affects the safe operation of photovoltaic modules. The diode junction box is an effective means to protect solar cell elements. Usually, bypass diodes are set at both ends of the current output of photovoltaic modules or one or several solar cell elements, so that the current generated by the normally working solar cell elements can directly bypass the abnormal working state of the solar cell elements, produce a bypass effect, and make the current generated by the normally working cell directly output through the bypass diode, avoiding the adverse effects caused by the circuit blockage, and ensuring the normal operation of the photovoltaic module power generation system.

[0042] Early diode junction boxes can be produced using a non-glue-filled method. This type of photovoltaic junction box can be freely disassembled and can be disassembled and repaired when the device fails, which will not affect the performance of the photovoltaic junction box. However, since this type of junction box is not sealed with glue, its waterproof performance is poor and it ages quickly. For glue-filled photovoltaic junction boxes, traditional technologies use EU standards such as IEC61215 and IEC61730 to test the packaged diode chips, but testing the packaged junction box with reference to this standard method often requires a long selection and matching test process. Specifically, as the current generated by a single solar cell (for example, 20 to 25 mA / cm 2 ) has increased, and higher requirements have been placed on the limit of the current that the diode chip can withstand. For example, the industry currently uses trench Schottky chips with larger channel lengths as diode chips for photovoltaic modules, but this type of wide-groove MOS chip often requires a longer screening cycle in the actual selection and adaptation process, and the photovoltaic junction box currently prepared by the glue-filling and sealing method cannot be adjusted when the test fails, resulting in great waste and reduced efficiency. At the same time, the current junction temperature test objects are all finished junction boxes. The junction box is installed on the photovoltaic module or made into a small sample of the junction box test, and then the junction temperature test is carried out to determine whether the design is feasible. However, from the chip design end to the component factory, it needs to go through two production processes, the packaging factory and the junction box factory, to verify whether it can meet the junction temperature requirements of the target product, further extending the development project cycle.

[0043] Those skilled in the art generally believe that conducting a junction temperature test after glue sealing can obtain more accurate maximum junction temperature test data, and the reliability of the maximum junction temperature test is higher. More importantly, this test method meets the requirements of current mainstream standards. However, the inventor of this application has discovered through creative work that a junction temperature simulation test of a diode can be performed at the chip design end of a photovoltaic junction box, and has provided a junction temperature simulation test method for a diode chip, which can predict the maximum junction temperature with high accuracy at the chip design end without the need to test the diode chip after packaging. This not only avoids the waste of diode chips, but also greatly shortens the project cycle, saves time and effort, and effectively improves the efficiency of new product development.

[0044] The present application provides a method that can effectively improve the efficiency and accuracy of junction temperature testing.

[0045] In the first aspect, a junction temperature simulation test method of a diode chip of the present application is described in detail. Figure 1 , including the following steps: testing and determining the maximum junction temperature of the diode chip under a pulse current signal;

[0046] Wherein, the diode chip is not packaged by glue.

[0047] The junction temperature simulation test method provided in the present application can perform a junction temperature simulation test on the diode chip before packaging it, without the need to perform a junction temperature simulation test after packaging the diode chip into a junction box, which can greatly improve the efficiency of diode chip selection and adaptation to photovoltaic modules; at the same time, by performing a junction temperature simulation test on the diode chip at the design end, a suitable and accurate redundancy can be reserved to reduce the mismatch caused by functional degradation of the diode junction box during the operation of the photovoltaic module.

[0048] It can be understood that the aforementioned glue encapsulation refers to the conventional technology of first encapsulating the diode chip with other components, such as copper sheets, terminals, cables and box bottom, etc. The test object in the junction temperature simulation test method provided in this application is the diode chip that has not been encapsulated with glue.

[0049] The junction temperature simulation test method provided in this application does not need to be performed after the diode chip is packaged, which can greatly improve the development efficiency. At the same time, because the test is performed before packaging, the difference between the actual temperature of the diode chip and the ambient temperature can be smaller, and a more accurate numerical relationship between the corresponding parameters of the diode chip can be calculated, thereby obtaining a more accurate maximum junction temperature of the diode.

[0050] The commonly used method in traditional junction temperature simulation test methods is to refer to the steps in the international standard IEC61646. Specifically, there are two test methods: steady-state method and transient method. The steady-state method measures the surface junction temperature of the bypass diode and the thermal resistance specified by the manufacturer, and calculates it using the following formula: T j =T case +R th ×U D ×I D , where T j is the junction temperature of the diode, T case is the case temperature of the diode, R th is the thermal resistance of the diode, U D is the diode voltage, I D The transient method is to pass a constant current through the bypass diode to stabilize it, then pass a pulse current for a fixed time to measure the voltage drop corresponding to the current, and repeat this process many times to obtain U D Diode voltage drop and diode junction temperature T j The relationship between them can be used to calculate the maximum junction temperature of the diode.

[0051] In one embodiment, in the test method, the diode chip is selected from one or more of a planar Schottky diode chip, a trench Schottky diode chip, and a MOS transistor chip. It can be understood that the diode chip can be selected according to the needs of the application.

[0052] In one embodiment, in the test method, the number of tests for determining the highest junction temperature of the diode chip is greater than 1; each test temperature is different. The number of tests is recorded as i, which can be 8≤i≤12, and i can also be selected from 8 times, 9 times, 10 times, 11 times, 12 times, etc.

[0053] In one embodiment, in the test method, the test temperatures for determining the maximum junction temperature of the diode chip include 25°C, 50°C, 75°C, 100°C, 125°C, 150°C, 175°C and 200°C.

[0054] In one embodiment, reference Figure 2 , the test method comprises the following steps:

[0055] Stabilizing the ambient temperature of the diode chip at a preset temperature;

[0056] Providing a pulse current signal to the diode chip to test the forward voltage drop of the diode chip; wherein the number of times the forward voltage drop of the diode chip is tested is greater than 1, and the test time of each test is different;

[0057] The maximum junction temperature of the diode chip is determined according to the preset temperature and the forward voltage drop of the diode chip.

[0058] It is understandable that in order to stabilize the ambient temperature of the diode chip at a preset temperature during the test, a variety of methods can be used. For example, the diode chip is placed in an environmental chamber, and the temperature fluctuation in the environmental chamber is minimal. It is determined that the system in the environmental chamber containing the diode chip reaches an equilibrium state, and then the actual temperature of the diode chip is considered to be equal to the set temperature of the environmental chamber. It is also possible to use a component with a temperature detection function to monitor the surface temperature or internal temperature of the diode chip in real time, so as to determine that the actual temperature of the diode chip is equal to the set temperature of the environmental chamber.

[0059] It can be understood that in the step of testing the forward voltage drop of the diode chip in the testing method, a voltage drop testing device can be used to collect the voltage waveform across the diode.

[0060] It can be understood that in the step of providing a pulse current signal to the diode chip and testing the forward voltage drop of the diode chip, the pulse current signal provided can be one or several. When several pulse current signals are provided, each pulse signal can have the same or different pulse widths.

[0061] In one embodiment, the testing method comprises the following steps:

[0062] Stabilizing the ambient temperature of the diode chip at a preset temperature;

[0063] A pulse current signal is provided to the diode chip, and the forward voltage drop of the diode chip is tested at several times.

[0064] In one embodiment, in the test method, a pulse current signal is provided to the diode chip, and in the step of testing the forward voltage drop of the diode chip, the number of times of testing the forward voltage drop of the diode chip is greater than 1, and the test time of each time is different;

[0065] In one embodiment, in the test method, a pulse current signal is provided to the diode chip, and in the step of testing the forward voltage drop of the diode chip, the number of times the forward voltage drop of the diode chip is tested is greater than 1, and each test time is different. The number of times the forward voltage drop of the diode chip is tested is recorded as j, and further can be 8≤j≤12, and j can also be selected from 8 times, 9 times, 10 times, 11 times and 12 times.

[0066] In one embodiment, in the test method, the step of determining the maximum junction temperature of the diode chip according to the preset temperature and the forward voltage drop of the diode chip includes:

[0067] S620: Determine a relationship between the forward voltage drop of the diode chip and the preset temperature according to the preset temperature and the forward voltage drop;

[0068] S640: Determine the maximum junction temperature of the diode chip according to the relationship between the thermal resistance coefficient, the current, the forward voltage drop of the diode chip and the preset temperature.

[0069] In one embodiment, reference Figure 3 , the testing method comprises the following steps:

[0070] S100: Stabilizing the ambient temperature of the diode chip at a preset temperature;

[0071] S300: providing a pulse current signal to the diode chip to test the forward voltage drop of the diode chip;

[0072] S620: Determine a relationship between the forward voltage drop of the diode chip and the preset temperature according to the preset temperature and the forward voltage drop;

[0073] S640: Determine the maximum junction temperature of the diode chip according to the relationship between the thermal resistance coefficient, the current, the forward voltage drop of the diode chip and the preset temperature;

[0074] Wherein, the diode chip is not packaged by glue.

[0075] As mentioned above, the present application does not limit the method of stabilizing the ambient temperature of the diode chip at a preset temperature.

[0076] In one embodiment, in step S620, the zeroth law of thermodynamics is used, that is, when two systems A (environmental system) and B (diode chip system) that are in thermal equilibrium and have a thermal difference come into contact with each other, heat transfer will occur between them. After a certain period of time, the states of the two systems no longer change and reach a common thermally stable state. The thermally stable state means that the temperatures of the two systems are equal. For a system that has reached a thermal equilibrium state, the temperature inside is uniformly distributed and has a definite and constant temperature value. At this time, △Q of both systems A (environmental system) and B (diode chip system) is 0. Therefore, the ambient temperature (for example, the preset temperature is 200°C) maintains a stable initial state at 200°C, and the thermodynamic state of the ambient temperature is Q A , the thermodynamic state of the diode chip is Q B When the temperature is maintained for more than a certain period of time (for example, 30 minutes), the temperature of the diode chip begins to remain stable. At this time, the environment in the oven and the diode chip reach a thermally stable state, and the temperatures of the two are the same, that is: △Q = Q A -Q B =0.

[0077] In one embodiment, in step S620, due to the V Fi =V Fi =V+I Fi ×R; V is the barrier voltage between metal and N-type semiconductor, I Fi is the current flowing through the diode, and R is the resistance of the diode chip. For the same chip, as the temperature rises, the barrier voltage V decreases, and the current I Fi , the resistance R remains unchanged, and V Fi becomes smaller. That is, the voltage drop of the bypass diode is negatively correlated with the temperature. The higher the junction temperature, the lower the voltage drop. That is, the forward voltage drop of the bypass diode is negatively correlated with the temperature: VF∝1 / T. Therefore, by obtaining several sets of temperature and corresponding voltage drop data, the relationship between temperature and voltage drop can be obtained based on these points through linear regression simulation method: V F =k×T+B, where V F is the forward voltage drop, V F is the temperature, k and B are the slope and intercept of the straight line fitted by the least squares method, respectively.

[0078] In the present application, there is no limitation on the subject that determines the relationship between the forward voltage drop of the diode chip and the preset temperature in step S620. It can be obtained by issuing instructions through a control program, calculating by a calculation module and substituting it into the formula, or by other methods.

[0079] In one embodiment, reference Figure 4 The test method (denoted as C1) comprises the following steps:

[0080] S100: Stabilizing the ambient temperature of the diode chip at a first preset temperature T1;

[0081] S301: Provide a pulse current signal to the diode chip, test the j-time forward voltage drop of the diode chip, and calculate the average pulse signal V at the first preset temperature. F1 , where 8≤j≤12;

[0082] S310: Repeat steps S100 and S301 to test at the i-th preset temperature T i The average pulse signal V Fi , where 8≤i≤12;

[0083] S620: According to the preset temperatures T1 to T1 of the 1st to ith time i and forward voltage drop V Fi1 ~V Fi , the relationship between the forward voltage drop of the diode chip and the preset temperature is determined by the least square method: V F = k × V F +B, where V F is the forward voltage drop, V F is the temperature, k and B are the slope and intercept of the straight line fitted by the least squares method, respectively;

[0084] S640: According to the thermal resistance coefficient R th 、Current I F and the voltage drop of the diode chip V F The relationship between the maximum junction temperature T of the diode chip is determined by jmax , where T jmax Satisfies the following formula:

[0085]

[0086] It can be understood that the thermal resistance coefficient and current IF are brought into It can be obtained that at this current I F Under this condition, the maximum junction temperature of the target product is T jmax .

[0087] In this application, the maximum junction temperature T of the diode chip is determined in step S640. jmax There is no limitation on the subject, and it can be obtained by issuing instructions through the control program, and the calculation module can calculate it by inputting the formula, or it can be calculated by manually inputting the formula.

[0088] Test method C1 can be used to quickly and accurately simulate and verify the junction temperature value of the final target product to determine whether it meets the requirements. At the same time, the operation is simple and the simulation accuracy of the junction temperature value is high.

[0089] It can be understood that the relationship between the voltage drop of the diode chip under test and the preset temperature can also be determined by using other methods in the linear regression method, and is not limited to the least square method.

[0090] In one embodiment, the thermodynamic state Q of the ambient temperature is A =R th *I Fi *V Fi Thermodynamic state Q (heat generated by the chip and conducted outward) and ambient temperature B =T-75 (the rated pulse current is passed through the bypass diode, and the chip generates heat) into △Q = Q A -Q B =0, the following formula is obtained:

[0091] In one embodiment, in the test method, the diode chip is a planar Schottky diode chip or a trench Schottky diode chip, the pulse width of the pulse current signal provided to the diode chip satisfies ≤1ms, and the front voltage drop of the diode chip is tested at multiple moments when the pulse signal is provided.

[0092] In the present application, there is no limitation on the number of pulse current signals provided to the diode chip. The number of pulse signals provided may be one or more.

[0093] In one embodiment, in the test method, the diode chip is a planar Schottky diode chip or a trench Schottky diode chip, the pulse width of the pulse current signal provided to the diode chip satisfies ≤1ms, and the test provides a forward voltage drop of the diode chip when the pulse current signal is 0.1ms, 0.2ms, 0.3ms, 0.4ms, 0.5ms, 0.6ms, 0.7ms, 0.8ms, 0.9ms and 1ms.

[0094] The number of pulse current signals provided to the opposite diode chip may be one or more. The following takes the diode chip as a trench Schottky diode chip as an example.

[0095] In one embodiment, a pulse current with a pulse width of 1 ms is provided to a trench Schottky diode chip. After the pulse current with a pulse width of 1 ms is passed into the trench Schottky diode chip, the forward voltage drop of the diode chip is tested at 0.1 ms, 0.2 ms, 0.3 ms, 0.4 ms, 0.5 ms, 0.6 ms, 0.7 ms, 0.8 ms, 0.9 ms and 1 ms of power-on.

[0096] In one embodiment, a plurality of pulse currents with different pulse widths are provided to a trench Schottky diode chip, and the pulse widths of the pulse current signals provided to the diode chip include testing 0.1ms, 0.2ms, 0.3ms, 0.4ms, 0.5ms, 0.6ms, 0.7ms, 0.8ms, 0.9ms and 1ms for providing the pulse current signals, and the forward voltage drop of the diode chip is tested when the current signal of the corresponding pulse current switches from a high level to a low level, that is, after pulse currents with pulse widths of 0.1ms, 0.2ms, 0.3ms, 0.4ms, 0.5ms, 0.6ms, 0.7ms, 0.8ms, 0.9ms and 1ms are respectively tested, the forward voltage drop of the diode chip is detected at 0.1ms, 0.2ms, 0.3ms, 0.4ms, 0.5ms, 0.6ms, 0.7ms, 0.8ms, 0.9ms and 1ms when power is turned on.

[0097] Schottky diode is the mainstream bypass diode in the photovoltaic industry. Its microstructure is metal-semiconductor contact, i.e., MN junction. Its working principle is that N-type semiconductor contains a large number of free electrons, which are majority electrons; there are fewer free electrons in precious metals, so the difference in electron concentration at both ends is large, and electrons diffuse from N-type semiconductor to the metal end. The difference in free charge concentration generates the built-in potential of the MN junction, i.e., Schottky barrier. The magnitude of the barrier voltage depends on the difference in free charge concentration between the metal and the N-type semiconductor. The free charge concentration in N-type semiconductors depends on the doping concentration of elements such as P, and has basically nothing to do with temperature; the free charge concentration in metals is determined by the intrinsic concentration, which is greatly affected by temperature. As the temperature rises, the intrinsic concentration increases. Therefore, when the temperature rises, the difference in free charge concentration between the metal and the semiconductor becomes smaller, and then the barrier voltage becomes smaller.

[0098] In one embodiment, in the test method, the diode chip is a MOS tube chip, the pulse width of the pulse current signal provided to the diode chip is in the range of 10ms to 20ms, and the forward voltage drop of the diode chip is tested when the pulse current signal is provided at 10ms, 11ms, 12ms, 13ms, 14ms, 15ms, 16ms, 17ms, 18ms, 19ms and 20ms.

[0099] The pulse width selection of the pulse current signal is related to the diode chip, but even for the same type of diode chip, a more appropriate pulse width selection of the pulse signal helps to obtain a more accurate relationship between the junction temperature and the voltage drop. If the pulse width interval of the selected pulse current signal is not appropriate, it may also cause the MOS chip to start working. At this time, the measured V F It is not the parameter of the MOS chip, but may be the parameter of the parasitic diode; if it is too high, it will also cause additional heat.

[0100] In one embodiment, reference Figure 5 , the testing method comprises the following steps:

[0101] S100: Stabilize the ambient temperature of the diode chip at a first preset temperature of 25°C;

[0102] S301: Provide a pulse current signal to the diode chip, test the forward voltage drop of the diode chip 10 times, and calculate the average pulse signal V at the first preset temperature. F1 ;

[0103] S310: Repeat steps S100 and S200 to test the average pulse signal V at the i-th preset temperature T2-T8 (50°C, 75°C, 100°C, 125°C, 150°C, 175°C and 200°C) F2 ~V F8 ;

[0104] S620: According to the 1st to 8th preset temperatures T1 to T8 and the forward voltage drop V F1 ~V F8 , the relationship between the forward voltage drop of the diode chip and the preset temperature is determined by the least square method: V F = k × V F +B, where V F is the forward voltage drop, V F is the temperature, k and B are the slope and intercept of the straight line fitted by the least squares method, respectively;

[0105] S640: According to the thermal resistance coefficient R th 、Current I F and the voltage drop of the diode chip V F The relationship between the diode chip and the preset temperature is used to determine the maximum junction temperature T jmax , where T jmax Satisfies the following formula:

[0106]

[0107] Second, reference Figure 6, the present application provides a junction temperature simulation test system for a diode chip, comprising: a test device 1, a temperature adjustment device 2 and a control device 3;

[0108] The testing device comprises a power supply module 11 and a voltage detection module 12, wherein the power supply module 11 is used to provide a pulse current, and the voltage detection module 12 is used to test the forward voltage drop across the diode chip;

[0109] The temperature regulating device is used to provide a preset ambient temperature;

[0110] The control device is electrically connected to the test device and the temperature adjustment device ( Figure 6 The single dotted line in the figure indicates an electrical connection), which is used to obtain the forward voltage drop across the diode chip measured by the voltage detection module in the test device and the preset ambient temperature provided by the temperature adjustment device, so as to determine the relationship between the voltage drop across the diode chip and the preset ambient temperature, and then determine the maximum junction temperature of the diode chip.

[0111] The execution subject provided in the present application may be a device with information processing capabilities, such as the control device 3 described in the second aspect, or an external electronic device connected to the control device 3, such as a signal processing module of a test platform. In one embodiment, the external electronic device may be any computer device.

[0112] It can be understood that the description of the execution subject in the following embodiments is an optional example and is not limited thereto, as long as the method shown in this example can be executed.

[0113] In one embodiment, the temperature regulating device 2 includes an environmental chamber 21 and a temperature collector 22, wherein the environmental chamber 21 is used to accommodate the test object, i.e., the diode chip, and provide heat under the instruction of the control device (see also Figure 7 and Figure 8 , where the single dashed line represents an electrical connection). As described above, heat is transferred from the environmental system (system A) in the environmental box to the diode chip (system B) (assuming that the environmental box needs to be heated according to the instruction of the control device to increase the internal temperature of the diode chip contained in the environmental box), and a thermally stable state is finally achieved between the two systems through heat transfer.

[0114] In one embodiment, reference Figure 7 (You can also refer to Figure 8), in the test system, the power module 11 in the test device includes a constant current regulated power supply 111, the voltage detection module 12 includes a voltage drop test instrument 121, and the power module also includes an adjustable resistor 112 and an ammeter 113; wherein the adjustable resistor 112 is used to adjust the power supply voltage, and the ammeter 113 is used to display the transient current of the loop. In this embodiment, the adjustable resistor 112 and the ammeter 113 are considered to be the same as the constant current regulated power supply 111, and are matching components of the constant current regulated power supply 111 that the power module 11 is used to match. It can be understood that some commercial constant current regulated power supplies have been integrated with adjustable resistors and ammeters, which can display the actual voltage and current values ​​of the loop in real time when the required pulse current is set, and the electrical signal provided by the current generator is set according to the user. At this time, the commercial constant current regulated power supply is equivalent to a power module, and the additional voltage detection module and adjustable resistor mentioned above are no longer needed.

[0115] Understandably, Figure 8 The double-dashed frame includes a test device 1 and a temperature control device 2, and a control device 3 is electrically connected to the test device 1 and the temperature control device 2 (indicated by a single dashed line). The objects electrically connected to the control device 3 also include specific modules, components, instruments, etc. in the test device 1 and the temperature control device 2.

[0116] It can be understood that the power module of the test device is suitable for providing a pulse current of a set pulse width, which can be a constant current regulated power supply including a pulse mode, providing the required pulse current for the sample to be tested, or other electronic components that can provide pulse current. The ammeter 113 is an electronic component used to display the loop current and monitor the loop current, and can be a multimeter. The adjustable resistor 112 is used as a loop load to ensure that the regulated power supply voltage is in a normal working state, and at the same time, it can avoid the fluctuation of the instantaneous current when the circuit is closed, so that the system loop current reaches a stable test current, and can be a linear sliding rheostat. The voltage drop test device 121 is a device that can measure the voltage of the component to be tested, and can be a device that changes with time by collecting the voltage waveform at both ends of the component to be tested. The environmental chamber is a device that provides a heat source and can achieve insulation to provide the set temperature required for the test. The environmental chamber can also include a temperature acquisition device to monitor the ambient temperature of the test sample.

[0117] In one embodiment, the diode chip uses a 150mil trench Schottky diode chip, simulates a 210 photovoltaic module (a 210 photovoltaic module refers to a module cell size of 210×210mm, and it can be understood that the test method provided in this application can be used for simulation tests of photovoltaic modules of various sizes), a 25A junction box, and a maximum junction temperature value of a module diode package product. The thermal resistance coefficient of the combined product is 11°C / W. The junction temperature simulation test method of the diode chip is as follows:

[0118] 1) Place the diode chip sample in an environmental chamber, adjust the temperature of the environmental chamber (06) to 25°C (T1), and monitor the ambient temperature with a temperature acquisition instrument (04). After the temperature stabilizes, maintain 25°C for at least 30 minutes. At this time, the diode chip temperature reaches 25°C and stabilizes. Turn on the power supply (01), and a pulse current I with a predetermined test current and a pulse width of 1ms is passed through the diode chip. F The voltage waveform at both ends of the diode is collected by using the voltage drop test device (05), and the forward voltage drop of the diode at 0.1ms, 0.2ms, 0.3ms, 0.4ms, 0.5ms, 0.6ms, 0.7ms, 0.8ms, 0.9ms, and 1ms within 1ms of power on is recorded, and the average value is taken and recorded as V F1 ;

[0119] 2) The same method is used to obtain the average forward voltage drop at 50℃ (T2), 75℃ (T3), 100℃ (T4), 125℃ (T5), 150℃ (T6), 175℃ (T7) and 200℃ (T8), which are recorded as V F2 、V F3 、V F4 、V F5 、V F6 、V F7 , and V F8 , as shown in the following table:

[0120] Table 1: Setting temperature T in one embodiment of this application i With the average forward voltage drop V Fi The value of

[0121] i <![CDATA[T i (i is selected from 1 to 8)]]> <![CDATA[V Fi (i is selected from 1 to 8)]]> 1 25℃ 0.490V 2 50℃ 0.474V 3 75℃ 0.460V 4 100℃ 0.446V 5 125℃ 0.433V 6 150℃ 0.419V 7 175℃ 0.398V 8 200℃ 0.383V

[0122] 3) The voltage drop of the diode chip is negatively correlated with the temperature. Using the average value of the 8 set temperatures and forward voltage drop obtained above to perform linear regression (temperature-voltage drop), we can get: V F =-0.0006×T+0.5057

[0123] 4) Substitute the above formula into the verified thermodynamic equilibrium formula of the junction box when working in the forward direction: Q A =R th ×I Fi ×V Fi , Q B =T j -75, △Q=Q A -Q B =0, the highest junction temperature is obtained: Among them, 75℃ is the operating temperature of the component. At 75℃, the forward rated current is passed into the bypass diode. The bypass diode continues to heat up and the temperature rises until it stabilizes. At this time, the diode chip temperature is considered to be the highest junction temperature value that the bypass diode can reach in actual operation, that is, T jmax .

[0124] 5) The thermal resistance coefficient R th (11 / w), current I F (25A) is substituted into the current I F Under this condition, the maximum junction temperature of the target product is T jmax :

[0125] That is, the maximum junction temperature of the product at 25A is 183.75. The industry standard stipulates that the junction temperature value cannot exceed 200℃. 183.75℃<200℃, which means that the maximum junction temperature value of the 150mil trench Schottky diode chip, simulated 210 photovoltaic module, 25A junction box, and module diode package product meets the standard requirements, proving that the 150mil trench Schottky diode chip can be used in this combination product.

[0126] After the analog chip is packaged, a junction box is made and then glue is poured and welded to prepare a sample. The junction temperature is tested according to IEC 61215. The highest junction temperature is 180.85° C., which meets the standard and is close to the simulated junction temperature value of the present invention.

[0127] It can be understood that the diode chip can be made into diodes with different forms of packaging (axial diodes, surface-mount diodes, module diodes, etc.), can be made into junction boxes of different designs, and can be made into components or junction box test samples of different specifications. It is only necessary to calculate the thermal resistance coefficient of the target product system to calculate the junction temperature of the product diode under the test current IF, and compare it with the maximum junction temperature value allowed by the company standards and industry standards to quickly estimate the thermal performance of the target product.

[0128] For comparison, the traditional method is used to test the junction temperature of the junction box product after the glue is poured. The first attempt: In order to develop a 25A junction box in conjunction with the 210 photovoltaic module, the diode chip uses a 165mil trench Schottky diode chip. After the analog chip is packaged, the sample is poured with glue and welded after the junction box is made. The junction temperature test is carried out according to IEC 61215. The maximum junction temperature is 170℃, which meets the standard; the margin is high, and it is believed that the chip area can be further reduced; the second attempt: the diode chip uses a 130mil trench Schottky diode chip. After the analog chip is packaged, the sample is poured with glue and welded after the junction box is made. The junction temperature test is carried out according to IEC 61215. The maximum junction temperature is 210℃, which does not meet the standard; the third attempt: the diode chip uses a 150mil trench Schottky diode chip. After the analog chip is packaged, the sample is poured with glue and welded after the junction box is made. The junction temperature test is carried out according to IEC 61215. The maximum junction temperature is 186℃, which meets the standard. It can be seen from this that, using the traditional method, that is, after preliminary calculation, the first attempt is to use a 165mil trench Schottky diode chip to make a junction box through glue filling, and the highest junction temperature obtained is 170℃, which is still far from the maximum junction temperature of 200℃ generally considered acceptable in the industry; based on the first test, a smaller 130mil trench Schottky diode chip is used to make a junction box through glue filling, and the highest junction temperature obtained is 210℃. Because it is higher than 200℃, it cannot meet the requirements of solar photovoltaic modules, and the next exploration is needed; the third attempt is to choose a 150mil trench Schottky diode chip to make a junction box through glue filling, and the highest junction temperature obtained meets the requirements. Therefore, the exploration process required by the traditional method is relatively long, and generally requires two production processes from the chip design end to the module factory, the packaging factory and the junction box factory, to verify whether the junction temperature requirements of the target product can be met, further extending the development project cycle.

[0129] By comparison, it can be seen that the method of performing junction temperature simulation testing on diode chips at the design end provided in this application can not only greatly improve the efficiency of diode chip selection and adaptation of photovoltaic modules, but also reserve appropriate and accurate redundancy, thereby reducing the mismatch caused by functional degradation of the diode junction box during the operation of the photovoltaic module.

[0130] In a third aspect, the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the simulation test method described in the first aspect, and further, the computer-readable storage medium is non-volatile.

[0131] It can be understood that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited thereto. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited thereto.

[0132] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0133] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0134] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be based on the attached claims, and the specification can be used to interpret the scope of the claims.

Claims

1. A junction temperature simulation test method for a diode chip, characterized in that: The method comprises the following steps: testing and determining the maximum junction temperature of the diode chip under a pulse current signal; Wherein, the diode chip is not packaged by glue.

2. The testing method according to claim 1, characterized in that: The diode chip is selected from one or more of a planar Schottky diode chip, a trench Schottky diode chip and a MOS tube chip.

3. The testing method according to claim 1, characterized in that: The test determines that the maximum junction temperature of the diode chip is tested more than once, and the test temperature is different each time.

4. The testing method according to claim 3, characterized in that: The test temperatures for determining the maximum junction temperature of the diode chip include 25°C, 50°C, 75°C, 100°C, 125°C, 150°C, 175°C and 200°C.

5. The testing method according to claim 1, characterized in that: The steps include: Stabilizing the ambient temperature of the diode chip at a preset temperature; Providing a pulse current signal to the diode chip to test the forward voltage drop of the diode chip; wherein the number of times the forward voltage drop of the diode chip is tested is greater than 1, and the test time of each test is different; The maximum junction temperature of the diode chip is determined according to the preset temperature and the forward voltage drop of the diode chip.

6. The testing method according to claim 5, characterized in that: The diode chip is a planar Schottky diode chip or a trench Schottky diode chip. The pulse width of the pulse current signal provided to the diode chip satisfies ≤1ms. The forward voltage drop of the diode chip is tested when the pulse current signal is provided at 0.1ms, 0.2ms, 0.3ms, 0.4ms, 0.5ms, 0.6ms, 0.7ms, 0.8ms, 0.9ms and 1ms.

7. The testing method according to claim 5, characterized in that: The diode chip is a MOS tube chip. The pulse width of the pulse current signal provided to the diode chip is in the range of 10ms to 20ms. The forward voltage drop of the diode chip is tested when the pulse current signal is provided at 10ms, 11ms, 12ms, 13ms, 14ms, 15ms, 16ms, 17ms, 18ms, 19ms and 20ms.

8. The testing method according to claim 5, characterized in that: The step of determining the maximum junction temperature of the diode chip according to the preset temperature and the forward voltage drop of the diode chip comprises: Determining a relationship between the forward voltage drop of the diode chip and the preset temperature according to the preset temperature and the forward voltage drop; The maximum junction temperature of the diode chip is determined according to the relationship between the thermal resistance coefficient, the current, the forward voltage drop of the diode chip and the preset temperature.

9. A junction temperature simulation test system for a diode chip, characterized in that: include: Test equipment, temperature regulation equipment and control equipment; The testing device comprises a power supply module and a voltage detection module, wherein the power supply module is used to provide a pulse current, and the voltage detection module is used to test the forward voltage drop at both ends of the diode chip; The temperature regulating device is used to provide a preset ambient temperature; The control device is electrically connected to the test device and the temperature adjustment device, and is used to obtain the forward voltage drop across the diode chip measured by the voltage detection module in the test device and the preset ambient temperature provided by the temperature adjustment device, so as to determine the relationship between the voltage drop across the diode chip and the preset ambient temperature, and further determine the maximum junction temperature of the diode chip.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the simulation test method according to any one of claims 1 to 8 are implemented.

Images