Inspection method for inspection chip and integrated circuit test system

Abstract

The present application relates to a spot-check chip and a method for spot-checking an integrated circuit testing system. The spot-check chip is applied to the integrated circuit testing system; the integrated circuit testing system is used to detect a chip to be detected; the spot-check chip includes: a first chip body and a first packaging structure for packaging the first chip body; by setting the first chip body of the spot-check chip to be the same as the second chip body of the chip to be detected, the need for re-layout design of the spot-check chip is avoided, the manufacturing cost of the spot-check chip is reduced, and the production of the spot-check chip is made more convenient. By making at least one of the corresponding packaging structures or the connection relationships between the packaging structure and the chip body of the first packaging structure of the spot-check chip and the second packaging structure of the chip to be detected different, the spot-check chip and the chip to be detected can be distinguished when the integrated circuit testing system performs detection, thereby improving the detection accuracy and detection efficiency of the integrated circuit testing system.

Description

Technical Field

[0001] This application relates to the technical field of chip detection, and particularly to a spot-check chip and a spot-check method for an integrated circuit test system. Background Art

[0002] In all stages of integrated circuit research, development, production, application, etc., it is necessary to repeatedly inspect and test the integrated circuit to ensure product quality, so as to ensure that the produced integrated circuit products meet the requirements. As a specific form of integrated circuit, a chip can be detected by an integrated circuit test system to evaluate the functions and performances of the components in the chip.

[0003] To ensure the accuracy of chip detection and improve the reliability of detection results, technicians need to regularly spot-check the integrated circuit test system to detect whether the integrated circuit test system has a fault. When detecting the integrated circuit test system, a spot-check chip is required. By testing the spot-check chip, it is determined whether the integrated circuit test system has a fault based on whether the test result is consistent with the expected result.

[0004] In the current related technologies, the spot-check chip usually has special ID information built in. Therefore, this spot-check chip needs to be independently manufactured through lithography and obtained through encapsulation. That is, it is necessary to separately manufacture a spot-check chip with special ID information during the production process. Therefore, the production cost of manufacturing the spot-check sample is relatively high, and the production process is relatively cumbersome. Summary of the Invention

[0005] Based on this, it is necessary to provide a spot-check chip and a spot-check method for an integrated circuit test system in view of the above technical problems.

[0006] In a first aspect, this application provides a spot-check chip, which is applied to an integrated circuit test system; the integrated circuit test system is used to detect a chip to be detected; the spot-check chip includes: a first chip body and a first encapsulation structure for encapsulating the first chip body; the first chip body of the spot-check chip is the same as the second chip body of the chip to be detected; the first encapsulation structure of the spot-check chip and the second encapsulation structure of the chip to be detected are different in at least one of the encapsulation structure or the connection relationship between the encapsulation structure and the chip body.

[0007] In one embodiment, the first encapsulation structure includes a structure body and encapsulation pins provided on the structure body; pin pads are provided on the first chip body; the pin pads are connected to the encapsulation pins; the first encapsulation structure of the spot-check chip is the same as the second encapsulation structure of the chip to be detected; the first connection relationship between the encapsulation pins and the pin pads in the first encapsulation structure of the spot-check chip is different from the second connection relationship between the encapsulation pins and the pin pads in the second encapsulation structure of the chip to be detected.

[0008] In one embodiment, if the encapsulation pins in the second encapsulation structure of the chip to be detected include floating pins; the floating pins in the first encapsulation structure of the spot-check chip are connected to the power supply pad or the ground pad of the first chip body.

[0009] In one embodiment, if the power supply pad in the second chip body of the chip to be detected is connected to the first encapsulation pin in the second encapsulation structure; the ground pad in the second chip body is connected to the second encapsulation pin in the second encapsulation structure; then the power supply pad in the first chip body of the spot-check chip is connected to any encapsulation pin other than the first encapsulation pin in the first encapsulation structure; or the ground pad in the first chip body of the spot-check chip is connected to any encapsulation pin other than the second encapsulation pin in the first encapsulation structure.

[0010] In one embodiment, pin pads are provided on the first chip body; the first encapsulation structure includes a structure body, encapsulation pins provided on the structure body, and electrical components; the pin pads of the first chip body are respectively connected to the encapsulation pins of the first encapsulation structure; the electrical components are connected between at least one pin pad of the first encapsulation structure and the power supply pad; or the electrical components are connected between at least one pin pad of the first encapsulation structure and the ground pad; or the electrical components are connected to the encapsulation pins.

[0011] In one embodiment, the electrical component includes a secondary chip; the power supply pad of the first chip body is connected to the third encapsulation pin of the first encapsulation structure; the ground pad of the first chip body is connected to the fourth encapsulation pin of the first encapsulation structure; the bidirectional transmission pad of the first chip body is connected to the fifth encapsulation pin of the first encapsulation structure; the power supply pad of the secondary chip is connected to the third encapsulation pin of the first encapsulation structure; the ground pad of the secondary chip is connected to the fourth encapsulation pin of the first encapsulation structure; the bidirectional transmission pad of the secondary chip is connected to the fifth encapsulation pin of the first encapsulation structure.

[0012] In one embodiment, the electrical component includes a secondary chip; a power pad of the first chip body is connected to a third package pin of the first package structure; a ground pad of the first chip body is connected to a fourth package pin of the first package structure; an input pad of the first chip body is connected to a fifth package pin of the first package structure; an output pad of the first chip body is connected to a sixth package pin of the first package structure; a power pad of the secondary chip is connected to the third package pin of the first package structure; a ground pad of the secondary chip is connected to the fourth package pin of the first package structure; a bidirectional transmission pad of the secondary chip is respectively connected to the fifth package pin and the sixth package pin of the first package structure.

[0013] In a second aspect, the present application further provides a method for checking the points of an integrated circuit test system, the method including: a loading module places a detection chip on a test station; the detection chip includes a chip to be detected or a check chip; the check chip is the check chip according to any one of the first aspects described above; the detection chip is detected through a conventional test mode, and it is determined whether the detection chip is a check chip based on the detection result; if the detection chip is a check chip, the check chip is detected through a check mode.

[0014] In one embodiment, the detecting the detection chip through a conventional test mode and determining whether the detection chip is a check chip based on the detection result includes: detecting the detection chip through an electrical characteristic test to determine an electrical characteristic test result; determining whether the detection chip is a check chip according to the electrical characteristic test result.

[0015] In one embodiment, the detecting the detection chip through a conventional test mode and determining whether the detection chip is a check chip based on the detection result includes: detecting the detection chip through an open / short circuit test to determine an open / short circuit test result; determining whether the detection chip is a check chip according to the open / short circuit test result.

[0016] In one embodiment, the detecting the detection chip through a conventional test mode and determining whether the detection chip is a check chip based on the detection result includes: detecting the detection chip through a communication test to determine an output response; determining whether the detection chip is a check chip according to the output response.

[0017] The above-mentioned inspection chip and the inspection method of the integrated circuit testing system are such that the inspection chip is applied to the integrated circuit testing system, and this integrated circuit testing system is used to detect the chip to be tested. The inspection chip includes: a first chip body and a first encapsulation structure for encapsulating the first chip body. The first chip body of the inspection chip is the same as the second chip body of the chip to be tested, and at least one of the first encapsulation structure of the inspection chip and the second encapsulation structure of the chip to be tested is different in the encapsulation structure or the connection relationship between the encapsulation structure and the chip body. By setting the first chip body of the inspection chip to be the same as the second chip body of the chip to be tested, the need for re-designing the mask for the inspection chip is avoided, reducing the manufacturing cost of the inspection chip and making the production of the inspection chip more convenient. By making at least one of the corresponding encapsulation structures or the connection relationships between the encapsulation structure and the chip body of the first encapsulation structure of the inspection chip and the second encapsulation structure of the chip to be tested different, the inspection chip and the chip to be tested can be distinguished when the integrated circuit testing system conducts the detection, thereby improving the detection accuracy and efficiency of the integrated circuit testing system. Description of the Drawings

[0018] Figure 1 Schematic diagram of the structure of the inspection chip in one embodiment;

[0019] Figure 2 Schematic diagram of the structure of the first type of inspection chip in one embodiment;

[0020] Figure 3 Schematic diagram of the structure of the second type of inspection chip in one embodiment;

[0021] Figure 4 Schematic diagram of the structure of the third type of inspection chip in one embodiment;

[0022] Figure 5 Schematic diagram of the structure of the fourth type of inspection chip in one embodiment;

[0023] Figure 6 Schematic flow chart of the inspection method of the integrated circuit testing system in one embodiment. Detailed Embodiments

[0024] In order to make the objectives, technical solutions and advantages of the present application clearer, the following further describes the present application in detail with reference to the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0025] It should be noted that the terms "first", "second", etc. used in this application may be used herein to describe various components, but these components are not limited by these terms. These terms are only used to distinguish a first component from another component. For example, without departing from the scope of this application, the first control module may be referred to as the second control module, and similarly, the second control module may be referred to as the first control module. Both the first control module and the second control module are control modules, but they are not the same control module.

[0026] In all stages of integrated circuit research, development, production, application, etc., it is necessary to repeatedly inspect and test the integrated circuit to ensure product quality, so as to ensure that the produced integrated circuit products meet the requirements. As a specific form of integrated circuit, a chip can be detected by an integrated circuit test system, and the functions and performances of the components in the chip can be evaluated. In order to ensure the accuracy of chip detection and improve the reliability of detection results, technicians need to regularly conduct spot checks on the integrated circuit test system to detect whether there are any abnormal faults in the integrated circuit test system. When detecting the integrated circuit test system, a spot-check chip is required. By testing the spot-check chip and based on whether the test result is consistent with the expected result, it is judged whether the integrated circuit test system has a fault.

[0027] The spot-check chip is a standard chip with good product quality and no abnormality. The test results of testing the spot-check chip when the integrated circuit test system has no abnormal faults are pre-stored as the expected results. When conducting a spot check on the integrated circuit test system through the spot-check chip, the spot-check chip is detected in real time to obtain real-time test results. The real-time test results are compared with the expected results. If an abnormality occurs, the integrated circuit test system has an abnormal fault.

[0028] In the current related technologies, the spot-check chip is usually a standard sample with built-in special ID information. However, such a spot-check sample needs to be processed through a mask-making process independent of normal mass-produced products to obtain a chip, and then through packaging to obtain a standard sample. That is, it is necessary to separately produce a spot-check chip with built-in special ID information and conduct logistics management during the production and manufacturing process. It can be seen that this method of manufacturing spot-check samples has a high production cost and a cumbersome production process.

[0029] An embodiment of this application provides a spot-check chip, which does not need to improve the integrated circuit itself of the spot-check chip. Instead, by setting independent and different packaging structures for the spot-check chip during the packaging process of the spot-check chip, the spot-check chip can present an output response significantly different from that of the chip to be detected during the test process of the integrated circuit test system, so as to realize the spot check of the integrated circuit test system by the spot-check chip.

[0030] In one embodiment, asFigure 1 As shown, a spot-check chip 100 is provided, and this spot-check chip 100 is applied to an integrated circuit test system. The integrated circuit test system is used to test the chip to be detected or the spot-check chip 100. Among them, the chip to be detected is a chip for which its product quality and product performance need to be determined. When the integrated circuit test system tests the chip to be detected, according to the test results obtained by the integrated circuit test system, the product quality and product performance of the chip to be detected can be determined. When the integrated circuit test system tests the spot-check chip 100, according to the test results obtained by the integrated circuit test system, it can be determined whether the integrated circuit test system has an abnormal fault, that is, to perform a fault detection on the integrated circuit test system itself. In this embodiment, the integrated circuit test system is not specifically limited, and it only needs to be able to detect the product quality and product performance of the chip.

[0031] The spot-check chip 100 includes: a first chip body 110 and a first encapsulation structure 120 for encapsulating the first chip body 110. The first chip body 110 of the spot-check chip 100 is the same as the second chip body of the chip to be detected; the first encapsulation structure 120 of the spot-check chip 100 and the second encapsulation structure of the chip to be detected are different in at least one of the encapsulation structure or the connection relationship between the encapsulation structure and the chip body.

[0032] The spot-check chip 100 includes a first chip body 110 and a first encapsulation structure 120 for encapsulating the first chip body 110. The chip to be detected includes a second chip body and a second encapsulation structure for encapsulating the second chip body. The chip body is an integrated circuit composed of a large number of transistors and other electrical components connected to each other. In order to prevent impurities in the air from corroding the circuits in the chip body during the use of the chip body, the chip body needs to be encapsulated by an encapsulation structure. The encapsulation structure is to connect the pin pads on the chip body to the encapsulation pins of the encapsulation structure through connection methods such as wires, so that the chip can be connected to other external components. Therefore, the encapsulation structure can play a role in protecting the chip body and providing mechanical support and electrical connection.

[0033] When designing the spot-check chip 100, based on the chip to be detected, the first chip body 110 of the spot-check chip 100 and the second chip body of the chip to be detected can use the same chip design. This avoids the need for re-layout design of the spot-check chip 100, reduces the manufacturing cost of the spot-check chip 100, and makes the production of the spot-check chip 100 more convenient. Herein, the first chip body 110 being the same as the second chip body means that the wafers, substrates, transistors, other electrical components, installation positions, and connection relationships corresponding to the first chip body 110 are exactly the same as those corresponding to the second chip body. That is to say, it can be obtained by reusing the design and manufacturing process of the chip to be detected.

[0034] When packaging the spot-check chip 100, at least one of the first packaging structure 120 of the spot-check chip 100 and the second packaging structure of the chip to be detected is different in terms of the packaging structure or the connection relationship between the packaging structure and the chip body. Specifically, if the packaging structures are different, when packaging the chip to be detected, it can be directly packaged through the structure body corresponding to the second packaging structure; when packaging the spot-check chip 100, the first packaging structure 120 can include a structure body 121, other chips or other electrical components, and at the same time, package the other chips or other electrical components through the structure body 121. Specifically, if the connection relationship between the packaging structure and the chip body is different, it can be that the connection relationship between the second packaging structure and the second chip body is different from the connection relationship between the first packaging structure 120 and the first chip body 110. It can be understood that between the chip to be detected and the spot-check chip 100, it can be that the packaging structures are different, or the connection relationship between the packaging structure and the chip body is different, or both the packaging structure and the connection relationship between the packaging structure and the chip body are different. Through the differences between the chip to be detected and the spot-check chip 100, the integrated circuit test system can more accurately and conveniently distinguish between the two when detecting the chip to be detected or the spot-check chip 100, so as to enter the spot-check mode when detecting the spot-check chip 100, improving the detection accuracy and detection efficiency of the integrated circuit test system.

[0035] In one embodiment, the spot-check chip 100 and the chip to be detected have different corresponding connection relationships between the packaging structure and the chip body. Specifically: the first packaging structure 120 includes a structure body 121 and packaging pins 122 provided on the structure body 121; there are pin pads 111 provided on the first chip body 110; the pin pads 111 are connected to the packaging pins 122; the first packaging structure 120 of the spot-check chip 100 is the same as the second packaging structure of the chip to be detected; the first connection relationship between the packaging pins 122 and the pin pads 111 in the first packaging structure 120 of the spot-check chip 100 is different from the second connection relationship between the packaging pins and the pin pads in the second packaging structure of the chip to be detected.

[0036] The first packaging structure 120 of the inspection chip 100 includes a structure body 121 and packaging pins 122 provided on the structure body 121. The second packaging structure of the chip to be detected also includes a structure body and packaging pins provided on the structure body. Among them, the structure body 121 is used to fix the chip body and provide a basic framework for the packaging structure. For example, the structure body 121 can be obtained by processes such as injection molding or die-casting molding, and the material of the structure body 121 can be epoxy resin, silicone or ceramic material, etc. The packaging pins 122 are fixedly installed on the structure body 121. The packaging pins 122 are the external interface part of the packaging structure. After the chip body is packaged through the packaging structure, the chip is connected to other electrical components through the packaging pins 122.

[0037] Pin pads 111 are provided on the first chip body 110. Pin pads are also provided on the chip body to be detected. Among them, the pin pads 111 can be the PAD areas of the chip body, that is, metal areas. By connecting the pin pads 111 with the packaging pins 122, the connection between the chip body and other external electrical components of the chip is realized. The pin pads 111 can be made of conductive materials such as aluminum, copper or gold. The shape of the pin pads 111 can be rectangular or circular, etc. In this embodiment, the material and shape of the pin pads 111 are not specifically limited, and it is only necessary to satisfy that the pin pads 111 are provided on the chip body.

[0038] The first packaging structure 120 corresponds to the structure body 121, the number of packaging pins, and the setting positions of the packaging pins; the second packaging structure corresponds to the structure body, the number of packaging pins, and the setting positions of the packaging pins. When the connection relationship between the packaging structure and the chip body is different, the first packaging structure 120 corresponding to the inspection chip 100 is the same as the second packaging structure of the chip to be detected. Specifically, the structure body, the number of packaging pins, and the setting positions of the packaging pins corresponding to the first packaging structure 120 and the second packaging structure are all the same. At this time, in the inspection chip 100, the connection relationship between the packaging pins 122 of the first packaging structure 120 and the pin pads 111 of the first chip body 110 is the first connection relationship; in the chip to be detected, the connection relationship between the packaging pins of the second packaging structure and the pin pads of the second chip body is the second connection relationship. The first connection relationship is different from the second connection relationship. More specifically, the different connection relationships can be the different corresponding relationships between the packaging pins and the pin pads.

[0039] A spot-check chip 100 provided in this embodiment can distinguish the spot-check chip 100 and the chip to be detected without changing the package structure by keeping the first package structure 120 exactly the same as the second package structure of the chip to be detected and adjusting the connection relationship between the package pins 122 and the pin pads 111. Further, the production cost of the spot-check chip 100 is reduced.

[0040] Based on different connection relationships between the package structure and the chip body, the spot-check chip 100 can include two types, namely the first type of spot-check chip and the second type of spot-check chip.

[0041] In one embodiment, for the first type of spot-check chip, as Figure 2 shown, if the package pins in the second package structure of the chip to be detected include floating pins; the floating pins in the first package structure 120 of the spot-check chip 100 are connected to the power pad or the ground pad of the first chip body 110. Among them, the floating pin can be a package pin that is not connected to the pin pad in the package structure and usually has no specific function, so it remains floating. That is, if there are floating pins that are not connected to the pin pads in the chip to be detected, when packaging the spot-check chip 100, the floating pins at the corresponding positions are connected to the power pad of the first chip body 110, or the floating pins at the corresponding positions are connected to the ground pad of the first chip body 110. If there are multiple floating pins, at least one of the multiple floating pins is connected to the power pad of the first chip body 110; or at least one of the multiple floating pins is connected to the ground pad of the first chip body 110. And, the connection relationship between the other package pins 122 except the floating pins in the first package structure 120 and the pin pads 111 of the first chip body 110 is exactly the same as that of the chip to be detected. The power pad is used to connect the power voltage to provide a stable power supply for the chip. Exemplarily, the power pad can include a metal area on the chip body for connecting the positive power supply. The ground pad is used to connect to the ground potential to provide a stable ground potential reference for the chip. Exemplarily, the ground pad can include a metal area on the chip body for connecting the negative or ground potential.

[0042] In one specific embodiment, when designing the package structure of some chips, there are usually floating pins. The floating pins are not connected to any external circuit and have no actual electrical connection, only used to meet the packaging requirements of components or maintain the integrity of components. Based on this, when designing the package of the spot-check chip 100, the floating pins corresponding to the chip to be detected can be found, and the floating pins at the corresponding positions in the first package structure 120 of the spot-check chip 100 are connected to the power pad or ground pad of the first chip body 110 inside the package structure. Thus, for the first type of spot-check chips obtained, during open / short circuit detection, it appears as a floating pin shorted to ground or a floating pin shorted to power. Therefore, during the process of the integrated circuit test system performing conventional tests, if it is detected that for a certain chip during open / short circuit detection, its floating pin shows a short to ground or a short to power, it can be determined that the chip is the spot-check chip 100, and the integrated circuit test system automatically enters the spot-check mode to perform spot-check tests on the spot-check chip 100, and after the spot-check chip 100 is tested, it automatically resumes the conventional test mode.

[0043] The first type of spot-check chips involved in this embodiment do not need to be separately processed during the chip manufacturing process. Only during the packaging process of the spot-check chip 100, the floating pins of the spot-check chip 100 are specially connected, and then the spot-check chip 100 that can be accurately identified by the integrated circuit test system can be obtained.

[0044] In one embodiment, for the second type of spot-check chips, as Figure 3 shown, if the power pad in the second chip body 210 of the chip to be detected 200 is connected to the first package pin in the second package structure 220; the ground pad in the second chip body 210 is connected to the second package pin in the second package structure 220; then the power pad in the first chip body 110 of the spot-check chip 100 is connected to any package pin 122 in the first package structure 120 except the first package pin; or the ground pad in the first chip body 110 of the spot-check chip 100 is connected to any package pin 122 in the first package structure 120 except the second package pin.

[0045] Based on the package design of the chip 200 to be detected, record the package pins connected to the power pads in the second chip body 210 and use them as the first package pins; record the package pins connected to the ground pads in the second chip body 210 and use them as the second package pins. When performing a package design on the inspection chip 100, reconnect the power pad in the first chip body 110 to any package pin 122 in the first package structure 120 other than the first package pin. Alternatively, when performing a package design on the inspection chip 100, reconnect the ground pad in the first chip body 110 to any package pin 122 in the first package structure 120 other than the second package pin. It can be understood that only the connection position of the power pad in the first chip body 110 can be different from that of the chip 200 to be detected, or only the connection position of the ground pad in the first chip body 110 can be different from that of the chip 200 to be detected; it is also possible that the connection positions of the power pad and any one or more other pin pads 111 in the first chip body 110 are all different from those of the chip 200 to be detected; it is also possible that the connection positions of the ground pad and any one or more other pin pads 111 in the first chip body 110 are all different from those of the chip 200 to be detected; it is also possible that the connection positions of all the pin pads 111 in the first chip body 110 are all different from those of the chip 200 to be detected.

[0046] In one specific embodiment, regarding the connection relationship between the package pins and the pin pads in the chip, the connection relationship between the package pins 122 and the pin pads 111 inside the inspection chip 100 is different from the connection relationship between the package pins and the pin pads inside the chip 200 to be detected. The connection relationship of the chip 200 to be detected and the connection relationship of the inspection chip 100 are as Figure 3As shown. Taking the connection relationship between the package pins inside the chip 200 to be detected and the pin pads as a reference, on this basis, all the package pins 122 in the inspection chip 100 are sequentially rotated clockwise to be connected to the next pin pad 111. Based on the design of the above connection method, the chip 200 to be detected and the inspection chip 100 can be distinguished. When actually detecting through an integrated circuit test system, due to the different internal connection relationships of the chip 200 to be detected and the inspection chip 100, therefore, two sets of test excitations for open / short circuit tests need to be set, the first test excitation for the chip 200 to be detected and the second test excitation for the inspection chip 100. Among them, since only the internal connection relationships of the chip 200 to be detected and the inspection chip 100 are different, therefore, the compositions of the first test excitation and the second test excitation are exactly the same, except that the corresponding relationship between each signal in the test excitation and the package pin 122 is different. Its corresponding relationship is determined according to the connection relationship between the package pin 122 and the pin pad. When the integrated circuit test system detects the chip, the integrated circuit test system first provides the first test excitation to test the chip and obtains the first set of test results. If there is no abnormality in the first set of test results or only some package pins are abnormal, that is, all package pins pass the open / short circuit test or only some package pins fail the open / short circuit test, then it is determined that the currently tested chip is the chip 200 to be detected, and then subsequent sorting operations are performed on the chip 200 to be detected according to the first set of test results. If all package pins in the first set of test results are abnormal, that is, all package pins fail the open / short circuit test, then it is determined that the currently tested chip is the inspection chip 100. At this time, the integrated circuit test system provides the second test excitation to test the inspection chip 100 and obtains the second set of test results. If there is no abnormality in the second set of test results or only some package pins are abnormal, that is, all package pins pass the open / short circuit test or only some package pins fail the open / short circuit test, then the second set of test results is used as the inspection result to analyze the current state of the integrated circuit test system.

[0047] The second type of inspection chip involved in this embodiment does not need to be separately processed during the chip manufacturing process. Only during the packaging process of the inspection chip 100, the internal connection relationship of the inspection chip 100 is made different from that of the chip 200 to be detected, and then the inspection chip 100 that can be accurately identified by the integrated circuit test system can be obtained.

[0048] In one embodiment, the inspection chip 100 and the chip to be detected have different corresponding packaging structures. Specifically: pin pads 111 are provided on the first chip body 110; the first packaging structure 120 includes a structure body 121, packaging pins 122 provided on the structure body 121, and electrical components 123; the pin pads 111 of the first chip body 110 are respectively connected to the packaging pins 122 of the first packaging structure 120; the electrical components 123 are connected between at least one pin pad 111 of the first packaging structure 120 and the power supply pad; or the electrical components 123 are connected between at least one pin pad 111 of the first packaging structure 120 and the ground pad; or the electrical components 123 are connected to the packaging pins 122.

[0049] The first packaging structure 120 of the inspection chip 100 includes a structure body 121, packaging pins 122 provided on the structure body 121, and electrical components 123. The second packaging structure of the chip to be detected includes a structure body and packaging pins provided on the structure body. The first packaging structure 120 adds electrical components 123 compared to the second packaging structure. Among them, the structure body 121 is used to fix the chip body and provide a basic framework for the packaging structure. For example, the structure body 121 can be obtained by processes such as injection molding or die casting, and the material of the structure body 121 can be epoxy resin, silicone, or ceramic material, etc. The packaging pins 122 are fixedly installed on the structure body 121. The packaging pins 122 are the external interface part of the packaging structure. After the chip body is packaged through the packaging structure, the chip is connected to other external electrical components through the packaging pins 122. It can be understood that in this embodiment, the connection relationship between the packaging pins 122 of the first packaging structure 120 of the inspection chip 100 and the pin pads 111 of the first chip body 110 is the first connection relationship; the connection relationship between the packaging pins of the second packaging structure of the chip to be detected and the pin pads of the second chip body is the second connection relationship. The first connection relationship and the second connection relationship are exactly the same. The electrical components 123 of the first packaging structure 120 can be other types of chips, resistors, capacitors, diodes, transistors, etc. For example, if the electrical components 123 are of types such as resistors, capacitors, diodes, transistors, etc., the electrical components 123 can be connected between at least one pin pad 111 of the first packaging structure 120 and the power supply pad, or the electrical components 123 can be connected between at least one pin pad 111 of the first packaging structure 120 and the ground pad. If the electrical components 123 are other types of chips, the corresponding pin pads 111 of the electrical components 123 can be respectively connected to the packaging pins 122 of the first packaging structure 120.

[0050] A spot-check chip 100 provided in this embodiment realizes flexible adjustment of the electrical characteristics between the pin pad 111 and the package pin 122 by introducing an electrical component 123 into the first package structure 120, thereby distinguishing the spot-check chip 100 from the chip to be detected. Further, the production cost of the spot-check chip 100 is reduced.

[0051] Based on the different package structures corresponding to the spot-check chip 100 and the chip to be detected, the spot-check chip 100 can include three types, namely the third type of spot-check chip, the fourth type of spot-check chip, and the fifth type of spot-check chip.

[0052] In one embodiment, for the third type of spot-check chip, as Figure 4 shown, the electrical component 123 includes a secondary chip; the power pad of the first chip body 110 is connected to the third package pin of the first package structure 120; the ground pad of the first chip body 110 is connected to the fourth package pin of the first package structure 120; the bidirectional transmission pad of the first chip body 110 is connected to the fifth package pin of the first package structure 120; the power pad of the secondary chip is connected to the third package pin of the first package structure 120; the ground pad of the secondary chip is connected to the fourth package pin of the first package structure 120; the bidirectional transmission pad of the secondary chip is connected to the fifth package pin of the first package structure 120.

[0053] When the spot-check chip 100 is designed for packaging, if the first chip body 110 of the spot-check chip 100 has an I / O port, that is, a bidirectional transmission pad, record the package pin 122 connected to the power pad of the first chip body 110 and use it as the third package pin; record the package pin 122 connected to the ground pad of the first chip body 110 and use it as the fourth package pin; record the package pin 122 connected to the bidirectional transmission pad of the first chip body 110 and use it as the fifth package pin. When packaging the secondary chip, connect the power pad of the secondary chip to the third package pin; connect the ground pad of the secondary chip to the fourth package pin; connect the bidirectional transmission pad of the secondary chip to the fifth package pin. Among them, the secondary chip only needs to be able to generate an output response to the input test stimulus. Since the I / O port of the first chip body 110 will output a response signal, and the I / O port of the secondary chip will output a response signal; the second chip body is exactly the same as the first chip body 110, and the response signals output by the I / O ports of the second chip body and the first chip body 110 are the same. The two response signals of the first chip body 110 and the secondary chip must be different from the response signal of the second chip body after being superimposed. Thus, the signal output by the I / O port of the chip to be detected is different from the signal output by the I / O port of the spot-check chip 100; further, the chip to be detected is distinguished from the spot-check chip 100 through the response signal.

[0054] In one embodiment, for the fourth type of inspection chip, as Figure 5 shown, the electrical component 123 includes a secondary chip; the power supply pad of the first chip body 110 is connected to the third packaging pin of the first packaging structure 120; the ground pad of the first chip body 110 is connected to the fourth packaging pin of the first packaging structure 120; the input pad of the first chip body 110 is connected to the fifth packaging pin of the first packaging structure 120; the output pad of the first chip body 110 is connected to the sixth packaging pin of the first packaging structure 120; the power supply pad of the secondary chip is connected to the third packaging pin of the first packaging structure 120; the ground pad of the secondary chip is connected to the fourth packaging pin of the first packaging structure 120; the bidirectional transmission pads of the secondary chip are respectively connected to the fifth packaging pin and the sixth packaging pin of the first packaging structure 120.

[0055] When the inspection chip 100 is designed for packaging, if the first chip body 110 of the inspection chip 100 does not have an I / O port, that is, a bidirectional transmission pad, record the packaging pin 122 connected to the power supply pad of the first chip body 110 and use it as the third packaging pin; record the packaging pin 122 connected to the ground pad of the first chip body 110 and use it as the fourth packaging pin; record the packaging pin 122 connected to the input pad of the first chip body 110 and use it as the fifth packaging pin; record the packaging pin 122 connected to the output pad of the first chip body 110 and use it as the sixth packaging pin. When packaging the secondary chip, connect the power supply pad of the secondary chip to the third packaging pin; connect the ground pad of the secondary chip to the fourth packaging pin; connect the bidirectional transmission pads of the secondary chip to the fifth packaging pin and the sixth packaging pin respectively. Among them, the secondary chip only needs to be able to generate an output response to the input test excitation. Since the OUT port of the first chip body 110 will output a response signal and the I / O port of the secondary chip will output a response signal; the second chip body is exactly the same as the first chip body 110, and the response signals output by the OUT port of the second chip body and the first chip body 110 are the same. The two response signals of the first chip body 110 and the secondary chip will surely be different from the response signal of the second chip body after being superimposed. Thus, the signal output by the OUT port of the chip to be detected is different from the signal output by the OUT port of the inspection chip 100; further distinguish the chip to be detected from the inspection chip 100 through the response signal.

[0056] In one specific embodiment, the connection relationship between the package pins 122 of the first package structure 120 of the inspection chip 100 and the pin pads 111 of the first chip body 110 is the first connection relationship; the connection relationship between the package pins of the second package structure of the chip to be detected and the pin pads of the second chip body is the second connection relationship. The first connection relationship is exactly the same as the second connection relationship. Only when packaging the inspection chip 100, other electrical components 123 are packaged inside at the same time. If the electrical component 123 is a secondary chip, then when packaging the inspection chip 100, the first chip body 110 and the secondary chip are co-packaged. The secondary chip is a special chip dedicated to identifying the inspection chip 100. According to the situation of the pin pads 111 of the first chip body 110, the secondary chip needs to have at least three pin pads, namely a power supply pad, a ground pad, and a bidirectional transmission pad. When packaging the inspection chip 100, each pin pad of the secondary chip is respectively connected to a specific package pin 122 of the first package structure 120. There are specifically two cases during packaging. In the first case, the first chip body 110 has an I / O port. At this time, during packaging, the power supply pad, the ground pad, and the bidirectional transmission pad of the secondary chip are respectively connected to the VDD, GND, and I / O package pins of the first package structure. In the second case, the first chip body 110 does not have an I / O port. At this time, during packaging, the power supply pad, the ground pad, and the bidirectional transmission pad of the secondary chip are respectively connected to the VDD, GND, IN, and OUT package pins of the first package structure. When the integrated circuit test system is performing a test, the chip can perform a test according to the test stimulus input through the I / O package pin or the IN package pin, and then output a response signal through the I / O package pin or the OUT package pin. Since the secondary chip is co-packaged inside the inspection chip 100, the response signals output by the inspection chip 100 and the chip to be detected through the I / O package pin or the OUT package pin are different. By detecting the output response signal, the inspection chip 100 can be identified. After the inspection chip 100 is identified, the integrated circuit test system automatically enters the inspection mode to perform an inspection test on the inspection chip 100, and after the inspection test of the inspection chip 100 is completed, it automatically resumes the normal test mode.

[0057] For the third type or fourth type of inspection chips involved in this embodiment, there is no need for separate processing during the chip manufacturing process. Only during the packaging process of the inspection chip, by co-packaging a secondary chip inside the inspection chip, an inspection chip that can be accurately identified by the integrated circuit test system can be obtained.

[0058] In one embodiment, for the fifth type of spot-check chip, the electrical components can be of types such as resistors, capacitors, diodes, transistors, etc. When packaging the spot-check chip, the electrical component 123 can be connected between at least one pin pad 111 of the first packaging structure 120 and the power pad, or the electrical component 123 can be connected between at least one pin pad 111 of the first packaging structure 120 and the ground pad. Since electrical components are added inside the spot-check chip, when the integrated circuit test system detects the chip, the chip to be detected and the spot-check chip have different responses based on the test, so that the chip to be detected and the spot-check chip can be distinguished. Furthermore, after the spot-check chip is recognized, the integrated circuit test system automatically enters the spot-check mode to perform spot-check testing on the spot-check chip, and after the testing of the spot-check chip is completed, it automatically resumes the conventional test mode.

[0059] The above embodiments are only used to explain the spot-check chip, and the spot-check chip can also be obtained through other similar packaging methods. It only needs to make the packaged spot-check chip present an output response significantly different from that of the chip to be detected during the test. When the integrated circuit test system enters the spot-check mode, the output response of the spot-check can be given according to the spot-check test excitation, thereby realizing the actual function of the spot-check chip. Based on the above, the embodiments of the present application do not need to improve the production link of the chip, but only need different packaging to realize the production of the spot-check chip. For integrated circuits, there are already mature industrial supporting facilities for the same chip with different packaging, so this solution can realize the production of the spot-check chip with low cost and convenient process.

[0060] In one embodiment, as Figure 6 shown, a spot-check method for an integrated circuit test system is provided, which specifically includes the following steps:

[0061] Step 601, the loading module places the detection chip on the test station.

[0062] Among them, the detection chip includes the chip to be detected or the spot-check chip. The spot-check chip is the spot-check chip of any of the above embodiments. The loading module is any mechanical device that can move the detection chip to the test station, and the present embodiment does not specifically limit the loading module. The integrated circuit test system includes one or more test stations. The test station can be a specific position in the integrated circuit test system for placing the detection chip and performing tests, and usually includes a fixing device, such as a fixture, to ensure the electrical connection between the detection chip and the test equipment. In this embodiment, the integrated circuit test system includes a conventional test mode and a spot-check mode. Among them, the conventional test mode is used to detect the product quality and product performance of the chip to be detected; the spot-check mode is used to determine whether the integrated circuit test system has abnormal faults based on the spot-check chip. A certain number of spot-check chips are mixed in the chip to be detected, and they are loaded and tested in sequence through the loading module.

[0063] Step 602: Detect the detection chip through the conventional test mode, and determine whether the detection chip is a spot-check chip based on the detection result.

[0064] The conventional test mode refers to the standard test process in an integrated circuit test system for detecting the functions and performance of the chip to be detected. The conventional test mode includes, for example: electrical characteristic tests and functional tests. Among them, the electrical characteristic tests include, for example, one or more of the following test items: open / short circuit test, leakage current test, static operating current test, and dynamic operating current test, etc.; the functional tests include, for example, communication tests, etc. After detecting the detection chip through the conventional test mode, the corresponding detection result is determined. And based on the detection result, it is determined whether the detection chip is the chip to be detected or the spot-check chip. For example, based on the open / short circuit state of the pins through the result of the open / short circuit test, it can be determined whether the detection chip is the chip to be detected or the spot-check chip. Based on the response of the communication test through the result of the communication test, it can be determined whether the detection chip is the chip to be detected or the spot-check chip.

[0065] Step 603: If the detection chip is a spot-check chip, detect the spot-check chip through the spot-check mode.

[0066] When it is determined that the detection chip is a spot-check chip, the integrated circuit test system switches to the spot-check mode, detects the spot-check chip through the spot-check mode, obtains the spot-check result, and thus determines whether there is an abnormal fault in the integrated circuit test system according to the spot-check result. After the spot-check mode test is completed, it automatically switches to the conventional test mode.

[0067] In this embodiment, by integrating a spot-check mode independent of the conventional test mode in the integrated circuit test system, and by using a spot-check chip different from the chip to be detected to wake up the spot-check mode of the integrated circuit test system to perform a spot-check operation on the spot-check chip, it is possible to realize the automatic spot-check of the integrated circuit test system by mixing a certain number of spot-check chips in the chip to be detected, thereby further improving the detection efficiency and detection accuracy of the integrated circuit test system.

[0068] In one embodiment, the detection chip is detected through electrical characteristic tests to determine the electrical characteristic test results; based on the electrical characteristic test results, it is determined whether the detection chip is a spot-check chip. Among them, the electrical characteristic tests include, for example, one or more of the following test items: open / short circuit test, leakage current test, static operating current test, dynamic operating current test, voltage test, resistance test, and impedance test, etc. Since at least one of the packaging structures between the chip to be detected and the spot-check chip or the connection relationship between the packaging structure and the chip body is different. Therefore, when testing the chip to be detected or the spot-check chip through electrical characteristic tests, the output responses of each packaging pin are different. The standard responses obtained by detecting the spot-check chip through electrical characteristic tests are pre-stored. Subsequently, after detecting the detection chip through electrical characteristic tests and obtaining the electrical characteristic test results, the electrical characteristic test results are compared with the standard responses to determine whether the detection chip is a spot-check chip.

[0069] In one embodiment, the detection chip is detected through an open / short circuit test to determine the open / short circuit test results; based on the open / short circuit test results, it is determined whether the detection chip is a spot-check chip.

[0070] Taking the first type of spot-check chip as an example, when performing an open / short circuit test, the integrated circuit test system sends test stimuli to each packaging pin of the detection chip. Usually, a current is applied to the packaging pin to be measured and its voltage is measured. Since the floating pins of the chip to be detected are not connected to the pin pads of the chip body and are in an open circuit state, the voltage results of the open / short circuit test show that the floating pins are in an open circuit state. In this case, the integrated circuit test system can identify that the detection chip is the chip to be detected, and then continue to test the chip to be detected and evaluate the performance of the chip to be detected based on all the test results for sorting operations. For the spot-check chip, since its floating pins are connected to GND or VDD, after sending the open / short circuit test stimuli to it, the received output response shows a short circuit to the ground or a short circuit to the power supply. In this case, the integrated circuit test system can identify that the detection chip is a spot-check chip, so that the integrated circuit test system enters the spot-check mode, continues to test the spot-check chip, and evaluates the performance of the integrated circuit test system based on all the test results. After the test is completed, it automatically returns to the normal test mode.

[0071] Taking the second type of spot-check chip as an example, during the open / short circuit test, the integrated circuit test system sends test stimuli to each package pin of the detection chip. Usually, a current is applied to the package pin under test and its voltage is measured. In the open / short circuit test, it is necessary to test the open / short circuit conditions of multiple package pins. Therefore, the integrated circuit test system needs to input test stimuli to each package pin separately to test whether each package pin is open or short. Since the pin pads of the chip body corresponding to each package pin of the chip to be detected and the spot-check chip are different, the integrated circuit test system needs to set two groups of test stimuli according to the corresponding relationships between the package pins and the pin pads of the two types of chips respectively to achieve accurate testing of the two types of chips. The compositions of the two groups of test stimuli are exactly the same, except that the corresponding relationship between each signal and the package pin is different, that is, the target package pin for signal transmission changes. When the integrated circuit test system detects the detection chip, the integrated circuit test system first provides the first test stimulus to test the detection chip and obtains the first group of test results. If there is no abnormality in the first group of test results or only some package pins are abnormal, that is, all package pins pass the open / short circuit test or only some package pins fail the open / short circuit test, it is determined that the detection chip being currently tested is the chip to be detected, and then subsequent sorting operations are performed on the chip to be detected according to the first group of test results. If all package pins in the first group of test results are abnormal, that is, all package pins fail the open / short circuit test, it is determined that the detection chip being currently tested is the spot-check chip. At this time, the integrated circuit test system provides the second test stimulus to test the spot-check chip and obtains the second group of test results. If there is no abnormality in the second group of test results or only some package pins are abnormal, that is, all package pins pass the open / short circuit test or only some package pins fail the open / short circuit test, the second group of test results is used as the spot-check result to analyze the current state of the integrated circuit test system.

[0072] In one embodiment, the detection chip is detected through communication testing to determine the output response; according to the output response, it is determined whether the detection chip is a spot-check chip.

[0073] Taking the third type of spot-check chip and the fourth type of spot-check chip as examples, during communication testing, the integrated circuit testing system tests the test stimuli input to the I / O package pins or IN package pins of the detection chip, and outputs response signals through the I / O package pins or OUT package pins. After the chip to be detected receives the test stimuli, only the chip body feeds back response signals according to the test stimuli. Based on the response signals fed back by the chip body, the secondary chip of the spot-check chip can also output responses according to the test stimuli. The response of the secondary chip can affect the response signals fed back by the chip body. Consequently, the response signals finally output from the I / O package pins or OUT package pins of the spot-check chip are the superposition of the response output by the chip body and the response output by the secondary chip. By pre-storing the standard output responses of the spot-check chips, after obtaining the output responses of the detection chips, they are compared with the standard output responses to determine whether the detection chips are spot-check chips.

[0074] In this embodiment, by identifying the spot-check chips and automatically switching to the spot-check mode, the automatic spot-check of the integrated circuit testing system can be realized by mixing a certain number of spot-check chips in the chips to be detected, further improving the detection efficiency and detection accuracy of the integrated circuit testing system.

[0075] It should be understood that although the steps in the flowcharts involved in the above-described embodiments are shown in sequence according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless there is a clear indication in this article, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or in turn with at least a part of other steps or steps or stages in other steps.

[0076] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0077] The above-described embodiments only represent several implementation manners of the present application. The description is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A spot-check chip, characterized in that, Applied to an integrated circuit test system; the integrated circuit test system is used to detect a chip to be detected; the spot-check chip includes: a first chip body and a first packaging structure for packaging the first chip body; The first chip body of the spot-check chip is the same as the second chip body of the chip to be detected; The first packaging structure of the spot-check chip and the second packaging structure of the chip to be detected are different in at least one of the packaging structure or the connection relationship between the packaging structure and the chip body.

2. The spot-check chip according to claim 1, wherein The first packaging structure includes a structure body and packaging pins provided on the structure body; pin pads are provided on the first chip body; the pin pads are connected to the packaging pins; The first packaging structure of the spot-check chip is the same as the second packaging structure of the chip to be detected; The first connection relationship between the packaging pins and the pin pads in the first packaging structure of the spot-check chip is different from the second connection relationship between the packaging pins and the pin pads in the second packaging structure of the chip to be detected.

3. The spot-check chip according to claim 2, wherein If the packaging pins in the second packaging structure of the chip to be detected include floating pins; The floating pins in the first packaging structure of the spot-check chip are connected to the power supply pad or the ground pad of the first chip body.

4. The spot-check chip according to claim 2, wherein If the power supply pad in the second chip body of the chip to be detected is connected to the first packaging pin in the second packaging structure; the ground pad in the second chip body is connected to the second packaging pin in the second packaging structure; Then the power supply pad in the first chip body of the spot-check chip is connected to any packaging pin other than the first packaging pin in the first packaging structure; Or The ground pad in the first chip body of the spot-check chip is connected to any packaging pin other than the second packaging pin in the first packaging structure.

5. The spot-check chip according to claim 1, characterized in that, Pin pads are provided on the first chip body; the first packaging structure includes a structure body, packaging pins provided on the structure body, and electrical components; The pin pads of the first chip body are respectively connected to the packaging pins of the first packaging structure; The electrical component is connected between at least one pin pad of the first packaging structure and the power supply pad; or the electrical component is connected between at least one pin pad of the first packaging structure and the ground pad; or the electrical component is connected to the packaging pin.

6. The inspection chip according to claim 5, wherein The electrical component includes a secondary chip; The power supply pad of the first chip body is connected to the third packaging pin of the first packaging structure; the ground pad of the first chip body is connected to the fourth packaging pin of the first packaging structure; the bidirectional transmission pad of the first chip body is connected to the fifth packaging pin of the first packaging structure; The power supply pad of the secondary chip is connected to the third packaging pin of the first packaging structure; the ground pad of the secondary chip is connected to the fourth packaging pin of the first packaging structure; the bidirectional transmission pad of the secondary chip is connected to the fifth packaging pin of the first packaging structure.

7. The inspection chip according to claim 5, characterized in that, The electrical component includes a secondary chip; The power supply pad of the first chip body is connected to the third package pin of the first package structure; the ground pad of the first chip body is connected to the fourth package pin of the first package structure; the input pad of the first chip body is connected to the fifth package pin of the first package structure; the output pad of the first chip body is connected to the sixth package pin of the first package structure; The power supply pad of the secondary chip is connected to the third package pin of the first package structure; the ground pad of the secondary chip is connected to the fourth package pin of the first package structure; the bidirectional transmission pads of the secondary chip are respectively connected to the fifth package pin and the sixth package pin of the first package structure.

8. A method for checking the points of an integrated circuit test system, characterized in that, The method includes: The loading module places the detection chip on the test station; the detection chip includes the chip to be detected or the spot-check chip; the spot-check chip is the spot-check chip described in any one of claims 1 to 7; Detect the detection chip through the conventional test mode, and determine whether the detection chip is a spot-check chip based on the detection result; If the detection chip is a spot-check chip, detect the spot-check chip through the spot-check mode.

9. The method according to claim 8, characterized in that, The step of detecting the detection chip through the conventional test mode and determining whether the detection chip is a spot-check chip based on the detection result includes: Detect the detection chip through electrical characteristic tests to determine the electrical characteristic test results; Determine whether the detection chip is a spot-check chip according to the electrical characteristic test results.

10. The method according to claim 8, wherein The step of detecting the detection chip through the conventional test mode and determining whether the detection chip is a spot-check chip based on the detection result includes: Detect the detection chip through open / short circuit tests to determine the open / short circuit test results; Determine whether the detection chip is a spot-check chip according to the open / short circuit test results.

11. The method according to claim 8, wherein The step of detecting the detection chip through the conventional test mode and determining whether the detection chip is a spot-check chip based on the detection result includes: Detect the detection chip through communication tests to determine the output response; Determine whether the detection chip is a spot-check chip according to the output response.

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