Photonic device and method

Abstract

Embodiments of the present disclosure relate to photonic devices and methods. A method of manufacturing a photonic device includes, in order: forming at least one metallization stage and a first bonding layer on a first substrate; forming a second bonding layer on the second high-resistivity substrate; bonding the first bonding layer to the second bonding layer; removing the first substrate; and forming a first optical component on the at least one metallization stage. A sum of a thickness of the first bonding layer and a thickness of the second bonding layer and a thickness of the at least one metallization stage is greater than 3 [mu] m.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to French Patent Application No. 2312182, filed on November 9, 2023, entitled “Procédé de fabrication d'undispositive photonique”, which is hereby incorporated herein by reference to the fullest extent permitted by law. Technical Field

[0003] The present description relates generally to the field of photonics, and more particularly to photonic components. The present disclosure relates more particularly to photonic components and methods of making the same. Background Art

[0004] A photonic component is a component enabling the generation, transmission, processing or conversion of an optical signal.The photonic component may further be adapted for processing electrical signals, such as for example for converting an optical signal into an electronic signal, or for converting an electronic signal into an optical signal.

[0005] Certain photonic component manufacturing methods may use techniques that are known and used to manufacture electronic components, such as, for example, microelectronics techniques.

[0006] It would be desirable to be able to at least partially improve certain aspects of known photonic devices and / or assemblies, and in particular to improve certain aspects of known photonic assembly manufacturing methods. Summary of the invention

[0007] There is a need for higher performance photonic devices and / or components.

[0008] There is a need for higher performance methods of manufacturing photonic components.

[0009] One embodiment overcomes all or part of the disadvantages of known photonic assemblies.

[0010] One embodiment overcomes all or part of the disadvantages of known methods of manufacturing photonic components.

[0011] One embodiment provides a method for manufacturing a photonic device, the method comprising the following consecutive steps: forming at least one metallization level and a first bonding layer on a first substrate; forming a second bonding layer on a second high-resistivity substrate, the second bonding layer being adapted to cooperate with the first bonding layer; bonding the first bonding layer to the second bonding layer; removing the first substrate; and forming a first optical component on a first surface of at least one metallization level, the first surface of at least one metallization level being opposite to a second surface of at least one metallization level, the second surface of at least one metallization level being in contact with the first bonding layer.

[0012] The sum of the thickness of the first bonding layer and the thickness of the second bonding layer and the thickness of the at least one metallization level is greater than 3 μm.

[0013] According to one embodiment, the sum is greater than 4 μm.

[0014] According to one embodiment, the first bonding layer is made of silicon oxide and the second bonding layer is made of silicon oxide.

[0015] According to one embodiment, the second high-resistivity substrate is a semiconductor substrate.

[0016] According to one embodiment, the second high-resistivity substrate has a resistivity greater than 500 ohm-cm.

[0017] According to one embodiment, the second high-resistivity substrate has a resistivity greater than 700 ohm-cm.

[0018] According to one embodiment, the first optical component is a waveguide, or a waveguide adapted to be coupled to an optical fiber, or a waveguide adapted to be coupled to a broadband optical fiber.

[0019] According to one embodiment, the at least one metallization level comprises at least one first electronic, optical or optoelectronic component.

[0020] According to one embodiment, at least one metallization level is adapted to be electrically coupled through a via having the first optical component formed therein.

[0021] According to one embodiment, the method comprises the step of forming a third layer on the first surface of the at least one metallization level during the step of forming the first component.

[0022] According to one embodiment, the third layer is made of a material selected from the group consisting of: indium phosphide (InP), a material including indium phosphide (InP), indium gallium arsenide (InGaAs), a material including indium gallium arsenide (InGaAs), aluminum gallium arsenide (AlGaAs), a material including aluminum gallium arsenide (AlGaAs), indium gallium arsenide phosphide (InGaAsP), a material including indium gallium arsenide phosphide (InGaAsP), lithium niobate (LiNbO3), a material including lithium niobate (LiNbO3), barium titanate (BaTiO3), a material including The photonic component 300 may be a laser. In the embodiment of the present invention, the ...

[0023] According to one embodiment, the first component is selected from the group consisting of: a semiconductor-insulator-semiconductor capacitor modulator, a photodiode, a phototransistor, a laser, and a Pockels effect modulator.

[0024] According to an embodiment, at least one metallization level is formed on the front surface of the first substrate.

[0025] According to one embodiment, at least one second optical component is formed on the rear surface of the second substrate.

[0026] According to one embodiment, the at least one second optical component is a waveguide.

[0027] Another embodiment provides a photonic device, which includes a first optical component arranged on a stack, the stack including, in sequence: a first surface of at least one metallization level, a first bonding layer, a second bonding layer, and a second high-resistivity substrate, wherein the sum of the thickness of the first bonding layer and the thickness of the second bonding layer and the thickness of at least one metallization level is greater than 3 μm.

[0028] According to one embodiment, the sum is approximately 4 μm.

[0029] According to one embodiment, the second high-resistivity substrate has a resistivity greater than 500 ohm-cm.

[0030] According to one embodiment, the first optical component is a waveguide.

[0031] According to one embodiment, the previously described photonic device is obtained by the previously described method.

[0032] According to an embodiment, at least one metallization level is formed on the front surface of the first substrate.

[0033] According to one embodiment, at least one second optical component is formed on the rear surface of the second substrate.

[0034] According to one embodiment, the at least one second optical component is a waveguide. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The above-mentioned features and advantages and other features and advantages will be described in detail in the remainder of the disclosure of specific embodiments given by way of illustration and not limitation with reference to the accompanying drawings, in which:

[0036] Figure 1 A cross-sectional view of an embodiment of a photonic assembly is shown;

[0037] Figure 2 Shows the manufacturing Figure 1 A cross-sectional view of the steps of the method for implementing the photonic assembly;

[0038] Figure 3 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0039] Figure 4 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0040] Figure 5 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0041] Figure 6 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0042] Figure 7 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0043] Figure 8 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0044] Fig. 9 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0045] Fig.10 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing a photonic assembly;

[0046] Fig.11 Shows the manufacturing Figure 1 A cross-sectional view of another step of the method for implementing the photonic assembly; and

[0047] Fig.12 A cross-sectional view of another embodiment of a photonic assembly is shown. DETAILED DESCRIPTION

[0048] Like features have been designated by like reference numerals in the various figures. In particular, common structural and / or functional features between the various embodiments may have like reference numerals and may address like structures, dimensions, and material properties.

[0049] For clarity, only those steps and elements that are helpful for understanding the described embodiments have been shown and described in detail.

[0050] Unless otherwise indicated, when reference is made to two elements being connected together, this means a direct connection without any intervening elements other than conductors, and when reference is made to two elements being coupled together, this means the two elements may be connected or they may be coupled via one or more other elements.

[0051] In the following description, when reference is made to absolute position qualifiers, such as "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as "top", "bottom", "upper", "lower", etc., or orientation qualifiers, such as "horizontal", "vertical", etc., unless otherwise specified, reference is made to the orientation of the drawing.

[0052] Unless otherwise specified, the expressions "about", "approximately", "substantially" and "approximately" mean plus or minus 10%, preferably plus or minus 5%.

[0053] The embodiments and implementations described below relate to photonic devices and methods of manufacturing the same.

[0054] According to one embodiment, the photonic device is a coupling device enabling reception of one or more optical signals transmitted by an optical fiber. The device is moreover more particularly adapted to receive one or more optical signals transmitted by a broadband optical fiber having a minimum bandwidth of, for example, 100 nm, for example a minimum bandwidth in the range of 1310 nm to 1550 nm.

[0055] Known photonic devices have disadvantages in broadband optical fibers and in particular in terms of material index matching problems between the material of the optical fiber and the material of the photonic device. Such matching problems may lead to degradation of the signal received from the optical fiber.

[0056] A photonic device according to an embodiment provides a method of overcoming this problem and further improving the transmission rate of data received from an optical fiber. To achieve this, the electronic device includes one or more high-performance electronic circuits, or even microelectronic circuits, which are formed inside and on top of a semiconductor substrate. The device then includes a waveguide that receives (multiple) signals from a broadband optical fiber, and a high-resistivity semiconductor substrate that allows the implementation of such an electronic circuit. The resistivity of the semiconductor substrate, referred to herein as a "high-resistivity substrate", is greater than 500 ohm-cm, preferably greater than 700 ohm-cm, or sometimes greater than 1 kiloohm-cm. In order to optically isolate the waveguide from the substrate, according to an embodiment, the photonic device includes a very thick optical insulating device, that is, the optical insulating device has a thickness greater than 3μm, which is arranged between the waveguide and the substrate. Such an embodiment of the photonic device is about Figure 1 to describe.

[0057] The method of manufacturing such a photonic device overcomes conventional disadvantages of electronic, microelectronic and / or photonic component manufacturing technology, and in particular overcomes disadvantages that may arise from using photonic devices such as those previously defined. Figures 2 to 11 to describe.

[0058] Figure 1 is a cross-sectional view of an embodiment of the photonic assembly 100 .

[0059] As previously described, the photonic component 100 is formed inside, on top of, and / or from a high-resistance semiconductor substrate 101, which is a substrate having a resistivity greater than 500 ohm-cm, such as a substrate having a resistivity preferably greater than 700 ohm-cm, or a substrate having a resistivity sometimes greater than 1 kilo-ohm·cm. According to one example, the resistivity of the substrate 101 is about 780 ohm-cm. According to one example, the substrate 101 is a silicon substrate.

[0060] On the surface 102 of the substrate 101, an optical and electrical insulating layer 103 is laid. The layer 103 is also used as a bonding layer in the method of manufacturing the device 100. According to one example, the layer 103 is a silicon oxide layer. When referring to a bonding layer, it should be understood that it can be a bonding layer, a fixing layer or a layer that allows one material to adhere to another material.

[0061] On the rear surface of substrate 101 opposite to surface 102, one or more optical components, such as waveguides, may be formed. Figure 1 Shown in.

[0062] On layer 103, there rests also another optical and electrically insulating layer 104. Layer 104 is also used as a bonding layer in the method of manufacturing device 100. According to one embodiment, layer 104 is a bonding layer adapted to cooperate with layer 103. According to one example, layer 104 is a silicon oxide layer.

[0063] According to one embodiment, the sum of the thickness of the layer 103 and the thickness of the layer 104 is greater than 2 μm, for example about 4 μm.

[0064] On layer 104, one or more metallization levels 105 are placed, and one or more metallization levels 105 are suitable for including one or more electronic, optical or optoelectronic devices 106 of the photonic device 100. According to one example, (multiple) devices 106 may include passive photonic components, such as waveguides, and / or active photonic components, such as modulators, photodiodes. Active photonic components can be assimilated to optoelectronic components. According to another example, device 106 can be a modulator, a radiator, etc. (Multiple) devices 106 can be formed inside and / or on top of a semiconductor substrate, such as a silicon (Si) or germanium (Ge) substrate. Each device 106 can also be laterally surrounded by a layer 114 of an electrically and / or optically insulating material (such as silicon oxide) to electrically and optically insulate it from other devices.

[0065] The component(s) 106 are formed, for example, from a substrate of the silicon-on-insulator (SOI) type, or as Figure 1 Portions of this layer as shown may remain on top of the component(s) 106. Similarly, an insulating layer 106B of the substrate, also referred to as a buried oxide (BOx) layer, rests on the semiconductor layer 106A.

[0066] The first metallization level Figure 1 1 is symbolized by placing device 106 in the device 100. According to an example, the device 100 comprises three metallization levels. According to an embodiment, the metallization level(s) 105 are considered optically insulating. In fact, the metallization level 105 comprises metal tracks made in a layer of dielectric material, obtained for example via a method of photolithography / growth of a metal, preferably copper, followed by a planarization method. From an optical point of view, only the dielectric part is an "insulator", while the metal tracks absorb optical signals.

[0067] According to an embodiment, the sum of the thickness of the layer 103 and the thickness of the layer 104 and the thickness of the metallization level(s) is greater than 3 μm, for example greater than 4 μm.

[0068] On the metallization level(s) 105, a layer 107 is placed, the layer 107 having an optical component 108 formed therein, the optical component 108 forming a waveguide. According to an example, the layer 107 is a silicon oxide layer and the optical component 108 is made of silicon nitride (SiN). According to an example, the thickness of the layer 107 is greater than 1 μm, for example about 1.5 μm. Thus, the optical component 108 is separated from the resistive substrate 101 by a stack, the stack comprising: an optical insulating layer 103, an optical insulating layer 104, the metallization level(s) 105 considered optically insulating, and an insulating layer 114 surrounding the device(s) 106.

[0069] As mentioned above, the thickness of the stack is greater than 3 μm, for example greater than 4 μm.

[0070] According to one embodiment, the optical component is adapted to be coupled to a broadband optical fiber, for example having a minimum bandwidth of 100 nm, for example in the range of 1310 to 1550 nm.

[0071] Layers are formed on layer 107 that enable the formation of electrical contacts of device 100. Specifically, an electrically insulating layer 109 covered by a passivation layer 110. According to one example, layer 109 is a silicon oxide layer having a thickness greater than 4 μm, for example about 5.3 μm. According to one example, passivation layer 110 is formed by a stack of silicon oxide layers and silicon nitride layers and has a thickness in the range of 1 to 3 μm.

[0072] Contacts may be formed in the photonic device 100. For this purpose, a first conductive via 111 is formed through the layer 107 and descends to one of the metallization levels 105. A conductive track 112 may be formed in the layer 109 and in contact with the first conductive via 111. According to one example, the conductors 111 and 112 are made of a metal or a metal alloy. According to one example, the material of the conductors 111 and 112 includes copper and / or a copper alloy. A contact 113 is then formed through the layer 109 and the passivation layer 110 to join the conductor 112. The formation of the conductors 111, 112 and 113 is described in detail in detail. Figures 8 to 11 According to one example, the contact is made of metal or metal alloy. According to one example, the material of the contact 113 includes aluminum and / or an alloy including aluminum.

[0073] Figures 2 to 11 It is a diagram showing the manufacturing process of Figure 1 A cross-sectional view of a device after the steps of a mode of implementation of a method of photonic assembly 100 of the type of photonic assembly described.

[0074] exist Figure 2In the step of forming a semiconductor substrate 201, for example a substrate of the silicon-on-insulator (SOI) type, is used to form one or more metallization levels 202 from its upper surface 203. The substrate 201 is formed by a semiconductor substrate 201A having a stack of an electrically insulating layer 201B and a semiconductor layer 201C resting thereon. The insulating layer 201B is also called a buried oxide (BOX) layer. The metallization level(s) 202 are about Figure 1 The type of metallization level(s) 105 described and includes information about Figure 1 At least one electronic component 204 of the type described by the component(s) 106. Figure 1 As shown, the first metallization level of the metallization level(s) 202 is symbolized by placing the component 204. In other words, Figure 2 In the embodiment, the first metallization level is located on the side of the surface 203 of the metallization level 202, and the surface 203 is opposite to the other surface 205 of the metallization level 202. Figure 1 As shown, the component 204 is surrounded by an insulating layer, and the insulating layer is not Figures 2 to 11 Shown.

[0075] The metallization level 202 and the components 204 are thus formed on the front surface of the substrate 201 .

[0076] exist Figure 2 After the steps Figure 3 In the steps of Figure 1 A first bonding layer 206 of the type described for the insulating layer 104 is deposited on the surface 205 of the metallization level(s) 202. According to one example, the layer 206 is a silicon oxide layer.

[0077] exist Figure 3 After the steps Figure 4 At the step of bonding, the second bonding layer 208 is used to bond the high resistivity substrate 209 to the Figure 3 More specifically, the substrate 209 is about Figure 1 The substrate 209 is a substrate of the type described for substrate 101, i.e., a semiconductor substrate having a resistivity greater than 500 ohm-cm, for example, a semiconductor substrate having a resistivity preferably greater than 700 ohm-cm, or a semiconductor substrate having a resistivity sometimes greater than 1 kilo-ohm-cm. According to one example, the resistivity of substrate 209 is about 780 ohm-cm. According to one example, substrate 209 is a silicon substrate. In addition, bonding layer 208 is about Figure 1 The type of insulating layer 103 is described. According to one embodiment, layer 208 is a bonding layer adapted to cooperate with bonding layer 206. According to one example, the bonding layer is a silicon oxide layer.

[0078] To achieve Figure 4In the step of bonding, bonding layer 208 is formed on the surface of substrate 209. The free surface of bonding layer 208 opposite to substrate 209 is then bonded to bonding layer 206, for example, by using a molecular bonding method.

[0079] Furthermore, as mentioned above, the sum of the thickness of layer 206 and the thickness of layer 208 is greater than 2 μm, for example about 4 μm. Furthermore, according to one embodiment, the sum of the thickness of layer 206 and the thickness of 208 and the thickness of metallization level(s) 202 is greater than 4 μm, for example greater than 5 μm.

[0080] At this step, an optical component may be formed on the rear surface of the substrate 209 (ie, the surface not covered by the bonding layer 208 ).

[0081] exist Figure 4 After the steps Figure 5 At step 4, the structure obtained at step 4 is turned upside down. Thus, the first metallization level of the metallization level (s) 202 is at Figure 5 Furthermore, the entire structure rests on a high resistivity substrate 209.

[0082] exist Figure 5 After the steps Figure 6 At the step of Figure 5 According to one example, the substrate 201A is removed by using a method combining a grinding step and a chemical removal step.

[0083] exist Figure 6 After the steps Figure 7 In the steps, Figure 1 An optical component of the type of optical component 108 is formed on the buried oxide layer 201B. For this purpose, a first layer 212 can be formed by a photolithography process and then etched to obtain the desired shape. A first portion of an insulating layer 210, for example made of silicon oxide, is then formed on the layer 212, for example by deposition and then chemical planarization. A second layer 211 can be formed on the first portion of the layer 210, for example by using a photolithography process and then an etching process. A second portion of the insulating layer 210 can then be formed to cover the layer 211. The assembly of the layers 210 to 212 can make it possible, for example, to form an optical fiber or other waveguide type passive component that allows coupling to an external optical fiber (not shown).

[0084] exist Figure 7 After the steps Figure 8At the step of , a first portion of the contact area is formed. Thus, a conductive via 213 is formed that passes completely through layer 210, insulating layer 201B, layer 201C, and a portion of metallization level (s) 202. Conductive via 213 thus extends between the upper surface of layer 210 and to the metallization level (s) 202. Conductive via 213 is about Figure 1 The type of the conductive via 111 described. In other words, the conductive via 213 is made of metal or a material including metal, for example, made of copper or an alloy including copper. For this purpose, deposition, photolithography, etching and planarization methods can be implemented here.

[0085] exist Figure 8 After the steps Fig. 9 At step 210, an electrically insulating layer 214 is formed on layer 210. According to one example, insulating layer 214 is a silicon oxide layer having a thickness greater than 2 μm (eg, about 2.8 μm).

[0086] In addition, Fig. 9 At step 214, a second portion of the contact area is formed. Thus, a conductive track 215 is formed that passes completely through layer 214. Conductive track 215 thus extends between the upper surface of layer 210 and contacts via 213. Conductive track 215 is about Figure 1 The type of conductive track 112 described. In other words, the conductive via 215 is made of metal or a material including metal, such as copper or an alloy including copper. For this purpose, deposition, lithography, etching and planarization methods can be implemented here.

[0087] exist Fig. 9 After the steps Fig.10 At the step of , the thickness of the electrically insulating layer 214 is increased to completely cover the conductive via 215. At this step, the layer 214 is Figure 1 The same type as described for layer 109. Thus, according to one example, layer 109 is a silicon oxide layer having a thickness greater than 4 μm, for example of about 5.3 μm.

[0088] exist Fig.10 After the steps Fig.11 At step 215, once the contact 215 has been formed, Figure 1A contact 217 of the type of contact 113 described is formed. For this purpose, an insulating layer, for example made of silicon oxide, is deposited. According to one example, the insulating layer has a thickness of about 0.6 μm. Lithography and etching steps are then carried out to form a cavity in layer 214 and layer 216 above via 215. The cavity is then filled with a layer made of the material forming contact 217, for example a metal or a metal alloy, for example aluminum or an alloy comprising aluminum. According to one example, this layer has a thickness of about 1.5 μm.

[0089] In addition, Fig.11 At the step of , an operation of passivation of layer 214 is implemented. For this purpose, a passivation layer 216 is formed on the accessible surface of layer 214. According to one example, the passivation layer is formed by a silicon oxide layer with a thickness of about 2 μm and an oxynitride layer with a thickness of 0.6 μm. Lithography and etching steps are then implemented to make the contacts accessible or to facilitate device assembly.

[0090] Fig.12 is a cross-sectional view of an embodiment of a photonic assembly 300 .

[0091] Photonic assembly 300 is similar to Figure 1 The components 100 described above are not described in detail here. Only the differences between them are highlighted below.

[0092] Thus, the photonic component 300 comprises all the elements of the component 100 and comprises a layer 301 made of material M, arranged in the layer 107, preferably on the upper surface of the metallization level 105. According to a variant, the layer 301 may be a layer stack.

[0093] According to a preferred embodiment, the layer 301 is directly arranged in alignment with the electronic device(s) 106 to enable, for example, optical coupling. Similarly, the optical component 108 and the device(s) 106 may also be at least partially aligned to enable optical coupling.

[0094] According to a first example, the material M is or comprises indium phosphide (InP). In this case, the photonic component 300 may be a semiconductor-insulator-semiconductor capacitor modulator, or SISCAP modulator.

[0095] According to a second example, the material M is or comprises indium gallium arsenide (InGaAs). In this case, the photonic component 300 may be a photodiode and / or a phototransistor.

[0096] According to a third example, the material M is or includes aluminum gallium arsenide (AlGaAs). In this case, the photonic component 300 may be a photonic component allowing the generation of electron pairs and / or the generation of light such as laser light.

[0097] According to a fourth example, the material M is or includes indium gallium arsenide phosphide (InGaAsP). In this case, the photonic component 300 may be a semiconductor-insulator-semiconductor capacitor modulator, or a photodiode.

[0098] According to a fifth example, the material M is or includes lithium niobate (LiNbO3). In this case, the photonic component 300 may be a Pockels effect modulator.

[0099] According to a sixth example, the material M is or comprises barium titanate (BaTiO3). In this case, the photonic component 300 may be a Pockels effect modulator.

[0100] According to a seventh example, layer 301 is a multi-quantum well (MQW) stack. According to one example, such a stack may include a layer made of a material from the following group: indium phosphide (InP), doped indium phosphide (InP), such as N-type or P-type doped indium phosphide (InP), indium gallium arsenide (InGaAs), doped indium gallium arsenide (InGaAs), such as N-type or P-type doped indium gallium arsenide (InGaAs), aluminum indium gallium arsenide (AlInGaAs), indium gallium arsenide (InGaAs), and indium gallium arsenide phosphide (InGaAsP). In this case, the photonic component 300 may be a laser.

[0101] Photonic component 300 may further comprise one or more contact areas 302 and / or 303 enabling electrical contact to be established with layer 301. According to one embodiment, contact areas 302 and / or 303 are formed in the same way as the contact areas formed by conductors 111 and 112 and contact 113.

[0102] The method of manufacturing the photon assembly 300 is similar to the method of manufacturing the photon assembly 100, but further includes the steps of: forming the layer 301; and if necessary, Figure 6 The steps described are similar to Figure 7 Between the steps described, layer 301 is etched or structured.

[0103] Various embodiments and variations have been described. Those skilled in the art will appreciate that certain features of these various embodiments and variations may be combined, and those skilled in the art will recognize other variations.

[0104] Finally, practical implementation of the described embodiments and variants is within the capabilities of a person skilled in the art based on the functional indications given above.

Claims

1. A method for manufacturing a photonic device, the method comprising: forming at least one metallization level and a first bonding layer on a first substrate; forming a second bonding layer on a second high-resistivity substrate; bonding the first bonding layer to the second bonding layer; removing the first substrate; as well as A first optical component is formed on a first surface of the at least one metallization level, the first surface of the at least one metallization level is opposite to a second surface of the at least one metallization level, the second surface of the at least one metallization level is in contact with the first bonding layer, and the sum of the thickness of the first bonding layer, the thickness of the second bonding layer and the thickness of the at least one metallization level is greater than 3 μm. The method according to claim 1 , wherein the sum is greater than 4 μm.

3. The method according to claim 1, wherein: The first bonding layer is silicon oxide, and The second bonding layer is silicon oxide. The method of claim 1 , wherein the second high-resistivity substrate is a semiconductor substrate.

5. The method of claim 1, wherein the second high-resistivity substrate has a resistivity greater than 500 ohm-cm.

6. The method of claim 5, wherein the second high-resistivity substrate has a resistivity greater than 700 ohm-cm.

7. The method of claim 1, wherein the first optical component is a waveguide, or a waveguide configured to be coupled to an optical fiber, or a waveguide configured to be coupled to a broadband optical fiber.

8. The method of claim 1, wherein the at least one metallization level comprises at least one first electronic, optical, or optoelectronic component.

9. The method of claim 1, wherein the at least one metallization level is electrically coupled to a via that passes through a layer having the first optical component formed therein.

10. The method according to claim 1, comprising: During formation of the first optical component, a third layer is formed on the first surface of the at least one metallization level.

11. The method according to claim 10, wherein: The third layer is selected from the group consisting of: indium phosphide InP, materials including indium phosphide InP, indium gallium arsenide InGaAs, materials including indium gallium arsenide InGaAs, aluminum gallium arsenide AlGaAs, materials including aluminum gallium arsenide AlGaAs, indium gallium arsenide phosphide InGaAsP, materials including indium gallium arsenide phosphide InGaAsP, lithium niobate LiNbO3, materials including lithium niobate LiNbO3, barium titanate BaTiO3, or materials including barium titanate BaTiO3; or The third layer is a multiple quantum well stack, which includes a layer of material selected from the group consisting of: indium phosphide InP, doped indium phosphide InP, N-type or P-type doped indium gallium arsenide InGaAs, doped indium gallium arsenide InGaAs, N-type or P-type doped aluminum indium gallium arsenide AlInGaAs, indium gallium arsenide InGaAs, or indium gallium arsenide phosphide InGaAsP.

12. The method of claim 10, wherein the first optical component is selected from the group consisting of a semiconductor-insulator-semiconductor capacitor modulator, a photodiode, a phototransistor, a laser, or a Pockels effect modulator.

13. The method of claim 1, wherein the at least one metallization level is formed on a front surface of the first substrate.

14. The method of claim 1, wherein at least one second optical component is formed on a rear surface of the second high-resistivity substrate.

15. The method of claim 14, wherein the at least one second optical component is a waveguide.

16. A photonic device, comprising: a first optical component disposed on the stack; as well as The stack, the stack comprises in sequence: a first surface of at least one metallization level; a first bonding layer; a second bonding layer; and a second high resistivity substrate; The sum of the thickness of the first bonding layer, the thickness of the second bonding layer and the thickness of the at least one metallization level is greater than 3 μm.

17. The photonic device of claim 16, wherein the sum is approximately 4 μm.

18. The photonic device of claim 16, wherein the second high-resistivity substrate has a resistivity greater than 500 ohm-cm.

19. The photonic device of claim 16, wherein the first optical component is a waveguide.

20. The photonic device of claim 16, wherein the first optical component is disposed on the first surface of the at least one metallization level, the first surface of the at least one metallization level being opposite to a second surface of the at least one metallization level, the second surface of the at least one metallization level being in contact with the first bonding layer.

21. The photonic device of claim 20, wherein the first optical component is disposed in an insulating layer disposed on the first surface of the at least one metallization level.

22. The photonic device of claim 16, wherein at least one second optical component is disposed on a rear surface of the second high-resistivity substrate.

23. The photonic device of claim 22, wherein the at least one second optical component is a waveguide.

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