Method and circuit for realizing bias compensation by using simulation mode

Abstract

The invention discloses a method and a circuit for realizing bias compensation by using an analog mode, and belongs to the technical field of radio frequency, the method mainly comprises the following steps: using a diode-connected MOS (Metal Oxide Semiconductor) tube as a load between a radio frequency circuit and a reference current source circuit, the drain electrode of the MOS tube is connected with the output end of the reference current source circuit, the source electrode of the MOS tube is grounded, the grid electrode of the MOS tube is connected with a radio frequency circuit, and the grid electrode of the MOS tube is further connected with the drain electrode of the MOS tube. According to the invention, the temperature and voltage detection is realized by using a simple circuit, the bias voltage can be automatically compensated, the reliability is high, the compensation linearity is better, and the influence of the system voltage and the chip temperature on the radio frequency performance can be obviously reduced.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency technology, and in particular to a method and a circuit for implementing bias compensation in an analog manner. Background Art

[0002] RF transceiver circuits are circuits used to process and transmit RF signals. RF signals are high-frequency signals, with a frequency range of tens of megahertz to several gigahertz, and are widely used in wireless communications, radar, RFID, and other fields. RF circuit performance is greatly affected by voltage and temperature. If there is no relatively stable external temperature and voltage environment, RF circuit performance may change significantly.

[0003] Specifically, in the CMOS circuit of the radio frequency circuit, in order to amplify the signal voltage without distortion, the voltage of the MOS tube must be biased, such as Figure 1 As shown, many existing RF circuits use resistor voltage division to bias the power supply voltage. The bias voltage generated by this bias method is as follows:

[0004] V g =VDD_RF*R2 / (R1+R2)

[0005] It can be seen from the above formula that the bias voltage is easily affected by the fluctuation of the power supply voltage VDD_RF, and the quadratic term of VI will be generated when the resistor divider biases, making the current generated by the bias in the RF circuit nonlinear and difficult to control.

[0006] Furthermore, the external temperature will also affect the bias voltage. In short, the gain of the MOS tube is seriously affected by the temperature and the power supply voltage. If a relatively stable gain value needs to be achieved, the bias voltage needs to be compensated according to the temperature and voltage values. Summary of the invention

[0007] The purpose of the present invention is to overcome the technical problems existing in the prior art and to provide a method and a circuit for implementing bias compensation using an analog method.

[0008] The objective of the present invention is achieved through the following technical solutions:

[0009] In a first aspect, a method for implementing bias compensation using an analog method is provided, the method comprising:

[0010] A diode-connected MOS tube is used as a load between a radio frequency circuit and a reference current source circuit, wherein the reference current source circuit is used to generate a bias current that varies with temperature and voltage, the drain of the MOS tube is connected to the output end of the reference current source circuit, the source of the MOS tube is grounded, the gate of the MOS tube is connected to the radio frequency circuit, and the gate of the MOS tube is also connected to its own drain.

[0011] In some embodiments, the reference current source circuit is used to generate a bias current that varies with temperature and voltage, including:

[0012] A voltage that changes with temperature is generated through a transistor, and the voltage is converted into a current signal as a bias reference current 1;

[0013] A reference current 2 that varies with the power supply voltage is generated through the CMOS tube.

[0014] Preferably, the method further comprises:

[0015] The reference current 1, the reference current 2 and the current without temperature coefficient are combined to obtain a set of bias currents that vary with temperature and voltage.

[0016] Preferably, the combining of the reference current 1, the reference current 2 and the current without temperature coefficient comprises:

[0017] Adjust reference current 1, reference current 2 and the proportionality coefficient without temperature coefficient according to the bias current requirement.

[0018] Preferably, the CMOS tube is a short channel CMOS tube.

[0019] In a second aspect, a circuit for implementing bias compensation using an analog method is provided, comprising a radio frequency circuit, a reference current source circuit, and a MOS tube connected between the radio frequency circuit and the reference current source circuit, wherein the MOS tube uses a diode connection as a load, the reference current source circuit is used to generate a bias current that varies with temperature and voltage, the drain of the MOS tube is connected to the output end of the reference current source circuit, the source of the MOS tube is grounded, the gate of the MOS tube is connected to the radio frequency circuit, and the gate of the MOS tube is also connected to its own drain.

[0020] In some embodiments, the reference current source circuit includes a first reference current circuit, a second reference current circuit, and a third reference current circuit connected in parallel between a power source and the MOS tube.

[0021] Preferably, the first reference current circuit comprises a transistor.

[0022] Preferably, the second reference current circuit includes a CMOS tube.

[0023] In some embodiments, a temperature detection circuit and a voltage detection circuit are further included, wherein the temperature detection circuit is connected to the first reference current circuit, and the voltage detection circuit is connected to the second reference current circuit.

[0024] It should be further explained that the technical features corresponding to the above options can be combined or replaced with each other to form a new technical solution if there is no conflict.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] (1) The present invention uses a diode-connected MOS tube as a load between the radio frequency circuit and the reference current source circuit, thereby offsetting the quadratic term of VI generated when the resistor divider biases, so that the current generated by the bias in the radio frequency circuit is linearly controllable; the reference current source circuit generates a bias current that varies with temperature and voltage, and the reference current 1, the reference current 2 and the current without a temperature coefficient are combined to obtain a set of bias currents that vary with temperature and voltage, which can automatically compensate for the bias voltage, has high reliability, good compensation linearity, and can significantly reduce the influence of system voltage and chip temperature on radio frequency performance.

[0027] (2) In one example, a temperature detection circuit and a voltage detection circuit are provided, and temperature and voltage detection are realized using a simple circuit, which facilitates the adjustment of the bias current. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 A schematic diagram of a resistor voltage division bias of a conventional radio frequency circuit according to an embodiment of the present invention;

[0029] Figure 2 A schematic diagram of a method for implementing bias compensation using an analog method according to an embodiment of the present invention;

[0030] Figure 3 A circuit structure diagram showing an embodiment of the present invention for implementing bias compensation in an analog manner;

[0031] Figure 4 A circuit schematic diagram of a first reference current circuit shown in an embodiment of the present invention;

[0032] Figure 5 A schematic diagram with a detection circuit shown in an embodiment of the present invention;

[0033] Figure 6 A diagram showing the relationship between the bias current and the power supply voltage according to an embodiment of the present invention;

[0034] Figure 7 FIG. 1 is a diagram showing the relationship between the bias current and the chip temperature according to an embodiment of the present invention. DETAILED DESCRIPTION

[0035] The technical solution of the present invention is clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. The components of the embodiments of the present application described and shown in the accompanying drawings can be arranged and designed in various configurations. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0036] It should be noted that the defects existing in the solutions in the above-mentioned prior art are the results obtained by the inventor after practice and careful research. Therefore, the discovery process of the above-mentioned problems and the solutions proposed in the embodiments of the present application for the above-mentioned problems below should all be the contributions made by the inventor to the present application in the process of invention and creation, and should not be understood as technical contents known to technical personnel in this field.

[0037] In view of the technical problems pointed out in the background technology, the embodiments provided by the present invention are as follows:

[0038] In an exemplary embodiment, a method for implementing bias compensation using an analog approach is provided, the method comprising:

[0039] A diode-connected MOS tube is used as a load between a radio frequency circuit and a reference current source circuit, wherein the reference current source circuit is used to generate a bias current that varies with temperature and voltage, the drain of the MOS tube is connected to the output end of the reference current source circuit, the source of the MOS tube is grounded, the gate of the MOS tube is connected to the radio frequency circuit, and the gate of the MOS tube is also connected to its own drain.

[0040] Specifically, Figure 2 As shown, a diode-connected MOS is used as the load. When the input current value is constant, the voltage generated is in The corresponding bias current is Ids2 = β2*(V gs -V th ) 2 ,in When both V th When taking the same value, When using resistor voltage divider, the Therefore, this method can offset the quadratic term of VI generated by the resistor divider bias, making the current generated by the bias in the RF circuit linearly controllable.

[0041] In the formula, V gsis the voltage value between the gate and source of the MOS tube, Ids1 is the current value between the source and drain of the left MOS tube, and Ids2 is the current value between the source and drain of the right MOS tube, i.e., the bias current. th is the MOS tube threshold voltage, μ n is the electron mobility, C ox is the gate oxide capacitance per unit area, W is the MOS tube gate width, and L is the MOS tube gate length.

[0042] Based on the above principles, Figure 3 As shown, a circuit for implementing bias compensation using an analog method is provided, including a radio frequency circuit, a reference current source circuit, and a MOS tube connected between the radio frequency circuit and the reference current source circuit, wherein the MOS tube uses a diode connection as a load, the reference current source circuit is used to generate a bias current that varies with temperature and voltage, the drain of the MOS tube is connected to the output end of the reference current source circuit, the source of the MOS tube is grounded, the gate of the MOS tube is connected to the radio frequency circuit, and the gate of the MOS tube is also connected to its own drain. Among them, the reference current source circuit includes a first reference current circuit, a second reference current circuit and a third reference current circuit connected in parallel between the power supply and the MOS tube, the first reference current circuit is used to generate a reference current 1, the drain of the output MOS tube M1 in the first reference current circuit is connected to the drain and gate of the MOS tube M4 in the current mirror, the second reference current circuit is used to generate a reference current source, the drain of the output MOS tube M2 in the second reference current circuit is connected to the drain and gate of the MOS tube M5 in the current mirror, the third reference current circuit is used to generate a current without a temperature coefficient, and the third reference current circuit is connected to the drain and gate of the MOS tube M3.

[0043] Furthermore, based on the diode-connected MOS tube as a load, as Figure 4 As shown, the first reference current circuit uses a triode to generate a voltage that varies with temperature and converts it into a current signal as a bias reference current 1. The second reference current circuit includes a CMOS tube, which uses the obvious channel length modulation effect of a short channel CMOS tube, and its current Ids = β*(V gs -V th ) 2 *(1+λV ds ),in Therefore, a reference current 2 that varies with the power supply voltage can be generated based on this principle. In the formula, λ is the channel length modulation coefficient, V ds It is the voltage value between the source and drain of the MOS tube.

[0044] Furthermore, the reference current 1, the reference current 2 and the current without temperature coefficient are combined to obtain a set of bias currents that vary with temperature and voltage. The bias current can be used to generate the bias voltage required by the radio frequency circuit on the diode-connected MOS tube. Figure 3 As shown, the values ​​of proportional coefficients a, b, c and n can be adjusted according to the needs to combine bias references with different temperature and voltage coefficients. For example, the temperature coefficient of reference current 1 is 20% / 100℃, and the voltage coefficient of reference current 2 is 40% / 1V. When a:b:c=1:2:2, the temperature coefficient of the output bias current is 8% / 100℃, and the voltage coefficient is 16% / 1V.

[0045] Furthermore, if Figure 5 As shown, it also includes a temperature detection circuit and a voltage detection circuit. The temperature detection circuit is connected to the first reference current circuit, and the voltage detection circuit is connected to the second reference current circuit. At the same time, the circuit detects the current without temperature coefficient to facilitate the subsequent adjustment of the bias current.

[0046] Further, Figure 6 The VI curve when the bias current and power supply voltage change, the horizontal axis is the power supply voltage, and the vertical axis is the change of current under different voltage coefficients. It can be seen that the value of the reference current is compensated with different current-voltage coefficients as the voltage changes. The current-voltage coefficient can be controlled by digital signals to switch the current path, that is, to adjust the above formula To meet the needs of different RF modules for bias compensation when the voltage changes.

[0047] Further, Figure 7 The TI curve of the bias current and chip temperature changes. The horizontal axis is the chip temperature, and the vertical axis is the change of current under different temperature coefficients. It can be seen that the value of the reference current is compensated with different current-temperature coefficients as the temperature changes. The current-temperature coefficient can be used to control the current path switch through digital signals, that is, to adjust the above formula To meet the bias compensation requirements of different RF modules when the temperature changes.

[0048] The above specific implementation methods are detailed descriptions of the present invention. It cannot be determined that the specific implementation methods of the present invention are limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions and substitutions can be made without departing from the concept of the present invention, which should be regarded as belonging to the protection scope of the present invention.

Claims

1. A method for implementing bias compensation using an analog method, characterized in that: The method comprises: A diode-connected MOS tube is used as a load between a radio frequency circuit and a reference current source circuit, wherein the reference current source circuit is used to generate a bias current that varies with temperature and voltage, the drain of the MOS tube is connected to the output end of the reference current source circuit, the source of the MOS tube is grounded, the gate of the MOS tube is connected to the radio frequency circuit, and the gate of the MOS tube is also connected to its own drain.

2. The method for implementing bias compensation using an analog method according to claim 1, characterized in that: The reference current source circuit is used to generate a bias current that varies with temperature and voltage, and includes: A voltage that changes with temperature is generated through a transistor, and the voltage is converted into a current signal as a bias reference current 1; A reference current 2 that varies with the power supply voltage is generated through the CMOS tube.

3. The method for implementing bias compensation using an analog method according to claim 2, characterized in that: The method further comprises: The reference current 1, the reference current 2 and the current without temperature coefficient are combined to obtain a set of bias currents that vary with temperature and voltage.

4. The method for implementing bias compensation using an analog method according to claim 3, characterized in that: The combining of the reference current 1, the reference current 2 and the current without temperature coefficient comprises: Adjust reference current 1, reference current 2 and the proportionality coefficient without temperature coefficient according to the bias current requirement.

5. The method for implementing bias compensation using an analog method according to claim 2, characterized in that: The CMOS tube is a short channel CMOS tube.

6. A circuit for implementing bias compensation using an analog method, characterized in that: It includes a radio frequency circuit, a reference current source circuit and a MOS tube connected between the radio frequency circuit and the reference current source circuit. The MOS tube uses a diode connection as a load. The reference current source circuit is used to generate a bias current that varies with temperature and voltage. The drain of the MOS tube is connected to the output end of the reference current source circuit, the source of the MOS tube is grounded, the gate of the MOS tube is connected to the radio frequency circuit, and the gate of the MOS tube is also connected to its own drain.

7. A circuit for implementing bias compensation using an analog method according to claim 6, characterized in that: The reference current source circuit includes a first reference current circuit, a second reference current circuit and a third reference current circuit which are connected in parallel between a power source and the MOS tube.

8. A circuit for implementing bias compensation using an analog method according to claim 7, characterized in that: The first reference current circuit includes a transistor.

9. The circuit for implementing bias compensation using an analog method according to claim 7, characterized in that: The second reference current circuit includes a CMOS tube.

10. The circuit for implementing bias compensation using an analog method according to claim 7, characterized in that: It also includes a temperature detection circuit and a voltage detection circuit. The temperature detection circuit is connected to the first reference current circuit, and the voltage detection circuit is connected to the second reference current circuit.

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