Obstacle avoidance global wiring method and system based on sparse maze graph

By adopting the global obstacle avoidance global wiring method based on sparse maze diagram in global wiring, using the OARSMT algorithm and sparse maze wiring algorithm, the problem of difficulty in effectively dealing with obstacles in the existing technology is solved, and an efficient and high-quality wiring solution is achieved.

CN119990054APending Publication Date: 2025-05-13SUN YAT SEN UNIV
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Patent Information

Application Number
CN202510062376.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-15
Publication Date
2025-05-13

AI Technical Summary

Technical Problem

The existing global wiring technology is difficult to effectively deal with obstacles, resulting in the wiring scheme violating design rules and the maze wiring is time-consuming, affecting efficiency and effectiveness.

Method used

The global obstacle avoidance wiring method based on sparse maze diagram is adopted, and the obstacle avoidance right angle Steiner minimum tree structure is constructed through the OARSMT algorithm, and dynamically planned it, combined with the sparse maze wiring algorithm for disassembly and redistribution, and finally the wiring results are optimized based on the sparse maze wiring algorithm for obstacle perception.

Benefits of technology

The number of networks that violate obstacle design rules has been significantly reduced, and the efficiency and quality of wiring has been improved, ensuring that all networks can effectively avoid obstacles.

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Abstract

The invention discloses an obstacle avoidance global wiring method and system based on a sparse maze graph, and the method comprises the steps: constructing an obstacle avoidance right-angle Steiner minimum tree structure through an OARSMT algorithm based on a target circuit layout with obstacle information, and carrying out the dynamic planning, and obtaining a preliminary obstacle avoidance wiring result; performing wire clearing and redistribution on the preliminary obstacle avoidance wiring result through a sparse labyrinth wiring algorithm guided by OARSMT to obtain a secondary obstacle avoidance wiring result; and clearing and rearranging the secondary obstacle avoidance wiring result based on a sparse labyrinth wiring algorithm of obstacle perception to obtain a final obstacle avoidance wiring result. According to the embodiment of the invention, the number of networks violating obstacle design rules can be reduced, and the efficiency of network global wiring is improved. The method can be widely applied to the technical field of circuit global wiring.
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Description

Technical Field

[0001] The present application relates to the technical field of circuit global wiring, and in particular to an obstacle avoidance global wiring method and system based on a sparse maze graph. Background Art

[0002] Routing is one of the most critical and time-consuming steps in physical design, and its results will directly affect the chip area, power consumption, reliability, etc. Routing is divided into global routing and detailed routing. Global routing is to roughly connect a group of pin collection networks with the same potential under a given layout to provide guidance for subsequent detailed routing. Therefore, the quality of global routing directly affects the workload of detailed routing and the overall performance of the circuit. The goal of global routing is to reduce wirelength, vias, and congestion without violating design rules. In addition, with the continuous development of manufacturing technology, the integration of chips continues to increase, and the number of networks in modern designs has increased dramatically. In order to adapt to more complex functional requirements or maintain consistency with the early design stage, more obstacles have appeared in global routing. These obstacles may be caused by macro cells, IP, 3D packaging, pre-wiring networks, power modules, etc. However, many global routers find it difficult to effectively handle these obstacles during the routing process, resulting in routing schemes that violate design rules by passing through obstacles.

[0003] Global routing is usually divided into two stages: initial routing and rip-up and reroute. For conventional global routers, design rules are not considered in the initial routing stage. Since obstacles are not considered, a large number of networks that violate the design rules will be generated in the initial routing stage. Although maze routing can be used for rerouting in the rip-up and reroute stage, maze routing is very time-consuming, which limits the overall efficiency and effectiveness of the routing process. Related technologies are designed to solve the obstacle avoidance right-angle Steiner minimum tree (OARSMT) problem. However, the introduction of obstacles further exacerbates the difficulty of the problem, which makes it impossible for algorithms such as FLUTE to produce effective solutions for obstacles. At present, the algorithms for solving the OARSMT problem are only focused on the tree generation stage.

[0004] In summary, the technical problems existing in the relevant technologies need to be improved. Summary of the invention

[0005] The main purpose of the embodiments of the present application is to propose an obstacle avoidance global wiring method and system based on a sparse maze graph, which can reduce the number of networks that violate obstacle design rules and improve the efficiency of global network wiring.

[0006] To achieve the above-mentioned purpose, an embodiment of the present application proposes an obstacle avoidance global routing method based on a sparse maze graph, the method comprising:

[0007] Based on the target circuit layout with obstacle information, the obstacle avoidance right-angle Steiner minimum tree structure is constructed through the OARSMT algorithm and dynamic programming is performed to obtain preliminary obstacle avoidance routing results.

[0008] The preliminary obstacle avoidance routing result is removed and re-routed by using the sparse maze routing algorithm guided by OARSMT to obtain a secondary obstacle avoidance routing result;

[0009] The sparse maze routing algorithm based on obstacle perception removes and reroutes the secondary obstacle avoidance routing result to obtain the final obstacle avoidance routing result.

[0010] In some embodiments, the target circuit layout with obstacle information is based on which an obstacle avoidance right-angle Steiner minimum tree structure is constructed by the OARSMT algorithm and dynamic programming is performed to obtain a preliminary obstacle avoidance wiring result, including:

[0011] Based on the target circuit layout, extracting spatial obstacle information of the target circuit layout, bounding box information corresponding to all networks in the target circuit layout, and pin information corresponding to all networks in the target circuit layout;

[0012] Mapping the spatial obstacle information to obtain obstacle information in a two-dimensional plane;

[0013] Traversing all networks in the target circuit layout, screening obstacle information on the two-dimensional plane that overlaps with the traversed network boundary box information, and constructing network input information in combination with pin information corresponding to the network;

[0014] Based on the network input information, the obstacle avoidance right-angle Steiner minimum tree structure is constructed through the OARSMT algorithm, and the layer allocation is performed through the dynamic programming algorithm to obtain preliminary wiring obstacle avoidance results.

[0015] In some embodiments, based on the network input information, the obstacle avoidance right-angle Steiner minimum tree structure is constructed by the OARSMT algorithm, and the layer allocation is performed by the dynamic programming algorithm to obtain a preliminary wiring obstacle avoidance result, including:

[0016] Based on the pin information in the input information, a rectangular minimum Steiner tree is generated by a fast minimum tree generation algorithm;

[0017] Removing the Steiner points in the obstacle information of the two-dimensional plane in the rectangular minimum Steiner tree and updating the Steiner points to obtain an updated obstacle avoidance rectangular Steiner minimum tree structure;

[0018] Reconnecting and updating the edges of the updated obstacle avoidance rectangular Steiner minimum tree structure and the obstacle information of the two-dimensional plane that overlap, and deleting redundant edges and points to obtain the obstacle avoidance rectangular Steiner minimum tree structure;

[0019] The obstacle avoidance right-angle Steiner minimum tree structure is layered and allocated using a dynamic programming algorithm to obtain the preliminary wiring obstacle avoidance result.

[0020] In some embodiments, the sparse maze routing algorithm guided by OARSMT performs wiring removal and rerouting on the preliminary obstacle avoidance routing result to obtain a secondary obstacle avoidance routing result, including:

[0021] Traversing preliminary obstacle avoidance routing results of all networks in the target circuit layout to obtain network traversal results;

[0022] Determine the number of overflow networks based on the network traversal result;

[0023] If the number of overflow networks is 0, directly output the final obstacle avoidance wiring result;

[0024] If the overflow network number is not 0;

[0025] The overflowed network is removed and re-routed using the sparse maze routing algorithm guided by OARSMT to obtain the secondary obstacle avoidance routing result.

[0026] In some embodiments, traversing preliminary obstacle avoidance routing results of all networks in the target circuit layout to obtain network traversal results includes:

[0027] Traversing preliminary obstacle avoidance routing results of all networks in the target circuit layout;

[0028] Obtaining the relationship between the capacity and demand of each grid on the path where the interconnection line generated by the network is located;

[0029] If the demand is greater than the capacity, the preliminary obstacle avoidance routing result of the network has overflow; if the demand is less than the capacity, the preliminary obstacle avoidance routing result of the network does not have overflow, and the network traversal result is output.

[0030] In some embodiments, the sparse maze routing algorithm guided by OARSMT is used to remove and reroute the overflowed network to obtain the secondary obstacle avoidance routing result, including:

[0031] Taking the path of a specific step length and the path of the pin in the overflowed network as the search space of the maze wiring, a general sparse graph is constructed;

[0032] The path where the obstacle avoidance right-angle Steiner minimum tree structure in the overflowed network is located is expanded to both sides by a preset range as a search space for maze wiring, and a grid line guided by OARSMT is constructed;

[0033] Merging the common sparse graph with the grid lines guided by the OARSMT to obtain a sparse graph guided by the OARSMT;

[0034] Based on the sparse graph guided by the OARSMT as the search space, the wiring optimization is performed through the breadth-first search algorithm to obtain a secondary obstacle avoidance wiring result.

[0035] In some embodiments, the obstacle-aware sparse maze routing algorithm performs wiring removal and rerouting on the secondary obstacle avoidance routing result to obtain a final obstacle avoidance routing result, including:

[0036] Performing obstacle network traversal on the secondary obstacle avoidance wiring result to obtain an obstacle network traversal result;

[0037] Determining the number of networks that pass through the obstacle based on the obstacle network traversal result;

[0038] If the number of networks passing through the obstacle is not 0;

[0039] The secondary obstacle avoidance wiring result is removed and re-routed by an obstacle-aware sparse maze wiring algorithm to obtain an optimized obstacle avoidance wiring result;

[0040] Until the number of networks passing through obstacles is 0, the final obstacle avoidance wiring result is obtained.

[0041] In some embodiments, performing obstacle network traversal on the secondary obstacle avoidance wiring result to obtain the obstacle network traversal result includes:

[0042] Traversing the obstacle network in the secondary obstacle avoidance wiring result to determine the grid of the path where the interconnection lines of the network are located and the area where the obstacles are located;

[0043] If the grid of the path where the interconnected lines of the network are located belongs to the area where the obstacle is located, then the secondary obstacle avoidance wiring result has a network that passes through the obstacle; if the grid of the path where the interconnected lines of the network are located does not belong to the area where the obstacle is located, then the secondary obstacle avoidance wiring result does not have a network that passes through the obstacle, and the obstacle network traversal result is output.

[0044] In some embodiments, the obstacle-aware sparse maze routing algorithm performs wiring removal and rerouting on the secondary obstacle avoidance routing result to obtain an optimized obstacle avoidance routing result, including:

[0045] Obtaining the edge where the obstacle boundary is located in the secondary obstacle avoidance routing result, and fusing them as the search space of maze routing;

[0046] The sparse maze routing algorithm based on obstacle perception optimizes the routing of the search space of the maze routing through a breadth-first search algorithm to obtain the optimized obstacle avoidance routing result.

[0047] To achieve the above object, another aspect of the embodiment of the present application provides an obstacle avoidance global routing system based on a sparse maze graph, the system comprising:

[0048] The first module is used to construct an obstacle avoidance right-angle Steiner minimum tree structure based on the target circuit layout with obstacle information through the OARSMT algorithm and perform dynamic programming to obtain preliminary obstacle avoidance routing results;

[0049] The second module is used to remove and re-route the preliminary obstacle avoidance routing result through the sparse maze routing algorithm guided by OARSMT to obtain a secondary obstacle avoidance routing result;

[0050] The third module is used to remove and re-route the secondary obstacle avoidance wiring result based on the obstacle-aware sparse maze wiring algorithm to obtain the final obstacle avoidance wiring result.

[0051] The embodiments of the present application include at least the following beneficial effects: The present application provides an obstacle avoidance global routing method and system based on a sparse maze graph. The scheme is based on a target circuit layout with obstacle information, and constructs an obstacle avoidance right-angle Steiner minimum tree structure through the OARSMT algorithm and performs dynamic planning. It can greatly reduce the networks that violate obstacle design rules in the initial routing stage, and further use the sparse maze routing algorithm guided by OARSMT to dismantle and reroute the preliminary obstacle avoidance routing results. Using the sparse maze routing guided by OARSMT can greatly improve the probability of the routing network avoiding obstacles while reducing congestion. Finally, the sparse maze routing algorithm based on obstacle perception dismantles and reroute the secondary obstacle avoidance routing results, which can ensure that the routing schemes generated by all networks avoid obstacles and improve the routing speed. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] Figure 1 It is a flow chart of an obstacle avoidance global routing method based on a sparse maze graph provided in an embodiment of the present application;

[0053] Figure 2It is a structural schematic diagram of an obstacle avoidance global wiring system based on a sparse maze graph provided in an embodiment of the present application;

[0054] Figure 3 It is a schematic diagram of dynamic programming of the OARSMT algorithm provided in the embodiment of the present application;

[0055] Figure 4 It is a schematic diagram of the steps of obstacle avoidance global routing of a sparse maze graph provided in an embodiment of the present application;

[0056] Figure 5 It is a schematic diagram of the initial wiring tree generation stage provided by an embodiment of the present application;

[0057] Figure 6 This is a schematic diagram of sparse maze wiring guided by OARSMT and sparse maze wiring with obstacle perception provided in an embodiment of the present application. DETAILED DESCRIPTION

[0058] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the embodiments of the present application. They are only examples of systems and methods consistent with some aspects of the embodiments of the present application as detailed in the attached claims.

[0059] It is understood that the terms "first", "second", etc. used in this application can be used to describe various concepts in this article, but unless otherwise specified, these concepts are not limited by these terms. These terms are only used to distinguish one concept from another concept. For example, without departing from the scope of the embodiment of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, the words "if" and "if" as used herein can be interpreted as "at the time of" or "when" or "in response to determination".

[0060] The terms "at least one", "multiple", "each", "any", etc. used in this application, at least one includes one, two or more, multiple includes two or more, each refers to each of the corresponding multiple, and any refers to any one of the multiple.

[0061] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0062] Reference Figure 1 , Figure 1 A flowchart of a global routing method for obstacle avoidance based on a sparse maze diagram provided by an embodiment of the present invention, referring to Figure 1 , the method comprises the following steps:

[0063] S100, based on the target circuit layout with obstacle information, the obstacle avoidance right-angle Steiner minimum tree structure is constructed through the OARSMT algorithm and dynamic programming is performed to obtain preliminary obstacle avoidance wiring results;

[0064] It should be noted that, in some embodiments, step S100 may include: S110, based on the target circuit layout, extracting the spatial obstacle information of the target circuit layout, the bounding box information corresponding to all networks in the target circuit layout, and the pin information corresponding to all networks in the target circuit layout; S120, mapping the spatial obstacle information to obtain the obstacle information of the two-dimensional plane; S130, traversing all networks in the target circuit layout, screening the obstacle information of the two-dimensional plane that overlaps with the traversed network boundary box information, and constructing the network input information in combination with the pin information corresponding to the network; S140, based on the network input information, constructing an obstacle avoidance right-angle Steiner minimum tree structure through the OARSMT algorithm, and performing layer allocation through the dynamic programming algorithm to obtain preliminary wiring obstacle avoidance results.

[0065] Among them, the step S140 may include: S141, based on the pin information in the input information, generating a rectangular minimum Steiner tree through a fast minimum tree generation algorithm; S142, removing the Steiner points in the obstacle information of the two-dimensional plane in the rectangular minimum Steiner tree, and updating it to obtain an updated obstacle avoidance rectangular Steiner minimum tree structure; S143, reconnecting and updating the edges overlapping with the obstacle information of the two-dimensional plane of the updated obstacle avoidance rectangular Steiner minimum tree structure, and deleting redundant edges and points to obtain an obstacle avoidance rectangular Steiner minimum tree structure; S144, layering the obstacle avoidance rectangular Steiner minimum tree structure through a dynamic programming algorithm to obtain preliminary wiring obstacle avoidance results.

[0066] In some specific embodiments, conventional global routers usually do not consider design rules in the initial routing stage, which often results in many networks that violate the design rules. Although they can be rerouted in the subsequent wire removal and rerouting stage, this will limit the efficiency and routing quality. Figure 5As shown in the tree generation result based on RSMT in (a), the traditional global router usually generates RSMT in the tree generation stage in the initial routing stage, which will cause many networks to pass through obstacles. In order to reduce the number of networks that violate the obstacle design rules in the initial routing stage, the embodiment of the present invention considers the information of obstacles in the tree generation stage and directly generates OARSMT, which will enable many networks to avoid obstacles in the initial routing stage. Figure 3 The tree generation result based on OARSMT in (a) is shown. The embodiment of the present invention uses the OARSMT algorithm to construct the OARSMT structure. This algorithm is extremely fast and does not consume too much time. The specific implementation steps of this algorithm in the present invention are as follows:

[0067] 1) Obtain the information of the completed circuit layout and convert the three-dimensional obstacle mapping into a two-dimensional obstacle. At this time, the obstacle is represented as a two-dimensional rectangle, such as Figure 5 (b) and Figure 5 (c) is shown in the grey rectangle.

[0068] 2) Get the bounding box of the network to be connected, and use the two-dimensional obstacle information overlapping with the bounding box and all the pins in the network as the input of the OARSMT algorithm. Finally, a two-dimensional Steiner right-angle minimum tree that completely avoids obstacles will be output, such as Figure 5 (b) as shown.

[0069] 3) First, generate RSMT for the pins in the network through the FLUTE algorithm, such as Figure 3 As shown in (a), the Steiner points generated inside the obstacle in RSMT are then moved out of the obstacle to make it legal, as shown in Figure 3 As shown in (b), the edges that overlap with obstacles are continuously updated, and finally the overlapping edges are merged and the redundant edges are deleted. Finally, an OARSMT that meets the requirements is obtained, as shown in Figure 3 (c) as shown.

[0070] 4) The two-dimensional tree generated by the OARSMT algorithm is assigned to layers through a dynamic programming algorithm, and a three-dimensional tree will be obtained, such as Figure 5 (c) as shown.

[0071] S200, using the sparse maze routing algorithm guided by OARSMT to remove and reroute the preliminary obstacle avoidance routing result to obtain a secondary obstacle avoidance routing result;

[0072] It should be noted that, in some embodiments, step S200 may include:

[0073] S210, traversing preliminary obstacle avoidance routing results of all networks in the target circuit layout to obtain network traversal results;

[0074] Specifically, the preliminary obstacle avoidance routing results of all networks in the target circuit layout are traversed; the relationship between the capacity and demand of each grid on the path where the interconnection lines generated by the network are located is obtained; if the demand is greater than the capacity, the preliminary obstacle avoidance routing results of the network have overflow; if the demand is less than the capacity, the preliminary obstacle avoidance routing results of the network do not have overflow, and the network traversal results are output.

[0075] S220, determining the number of overflow networks based on the network traversal result;

[0076] S230: If the number of overflow networks is 0, directly output the final obstacle avoidance wiring result.

[0077] S240, if the number of overflow networks is not 0;

[0078] S250, using the sparse maze routing algorithm guided by OARSMT to remove and reroute the overflowed network, and obtain a secondary obstacle avoidance routing result;

[0079] Specifically, the paths of specific step lengths and the paths of pins in the overflowed network are used as the search space for maze wiring, and an ordinary sparse graph is constructed; the path where the obstacle avoidance right-angle Steiner minimum tree structure in the overflowed network is located is expanded to a preset range on both sides as the search space for maze wiring, and the grid lines guided by OARSMT are constructed; the ordinary sparse graph is merged with the grid lines guided by OARSMT to obtain the sparse graph guided by OARSMT; based on the sparse graph guided by OARSMT as the search space, wiring optimization is performed through the breadth-first search algorithm to obtain a secondary obstacle avoidance wiring result.

[0080] In some specific embodiments, all networks are traversed, and then each network is checked to see if it is congested and thus overflows. Here, the capacity and demand of each grid on the path of the interconnection generated by the network are checked. If the demand is greater than the capacity, then it means that the network has overflowed. If all networks are traversed and no network overflows, then the number of overflow networks is 0 (the number of overflow networks includes the number of networks that violate the obstacle, because if a network violates the obstacle design rules, then it must be congested), that is, the result at this time meets the design requirements.

[0081] After the initial routing, although the number of networks that violate the obstacle design rules is greatly reduced, there are still many overflowing networks. In order to reduce congestion, we use OARSMT-guided sparse maze routing for the overflowing networks.

[0082] In the global routing stage, a maze routing algorithm is usually used to reroute networks that violate the design rules. However, ordinary maze routing is an extremely time-consuming algorithm. To solve this problem, a more effective and common solution is to use sparse maze routing, that is, to use the path of a specific step length and the path where the pin is located as the search space for maze routing, thereby constructing a sparse graph. This solution greatly improves the efficiency of the algorithm at the cost of limited routing quality loss. However, when obstacles exist, all paths in the resulting sparse graph may not be able to avoid obstacles, such as Figure 6 As shown in (a), all search paths cannot avoid obstacles. In order to improve the probability of avoiding obstacles and the quality of routing while ensuring speed, we use sparse maze routing guided by OARSMT. First, the paths where all edges in the OARSMT structure are located are extended to a specific range on both sides as the search space for maze routing, thereby constructing the grid lines guided by OARSMT, as shown in Figure 6 (b) is shown. Then the ordinary sparse graph and the grid lines guided by OARSMT are fused to obtain the sparse graph guided by OARSMT, as shown in Figure 6 (c) is shown. The sparse maze routing guided by OARSMT uses the sparse graph guided by OARSMT as the search space, and uses breadth-first search (BFS) or similar algorithms in this search space to find a path with the lowest cost from the starting point to the end point. The cost here includes line length, number of vias, congestion, and cost of violating obstacle design rules. The specific formula of path cost should be derived according to the specific requirements of circuit design. Compared with ordinary sparse maze routing, this scheme can greatly reduce the number of networks that violate obstacle design rules, and has certain improvements in line length and congestion, while the speed is basically the same. For relatively small test benchmarks, after this step, the routing schemes generated by all networks can successfully avoid obstacles.

[0083] S300, a sparse maze routing algorithm based on obstacle perception is used to remove and reroute the secondary obstacle avoidance routing result to obtain a final obstacle avoidance routing result;

[0084] It should be noted that, in some embodiments, step S300 may include:

[0085] S310, performing obstacle network traversal on the secondary obstacle avoidance wiring result to obtain an obstacle network traversal result;

[0086] Specifically, the obstacle network in the secondary obstacle avoidance wiring result is traversed to determine the grid of the path where the network's interconnected lines are located and the area where the obstacle is located; if the grid of the path where the network's interconnected lines are located belongs to the area where the obstacle is located, then the secondary obstacle avoidance wiring result has a network that passes through the obstacle; if the grid of the path where the network's interconnected lines are located does not belong to the area where the obstacle is located, then the secondary obstacle avoidance wiring result does not have a network that passes through the obstacle, and the obstacle network traversal result is output.

[0087] S320, determining the number of networks that pass through the obstacle based on the obstacle network traversal result;

[0088] S330, if the number of networks passing through the obstacle is not 0;

[0089] S340, removing and rerouting the preliminary obstacle avoidance wiring result by using an obstacle-aware sparse maze wiring algorithm to obtain an optimized obstacle avoidance wiring result;

[0090] Specifically, the edges of the obstacle boundaries in the preliminary obstacle avoidance wiring results are obtained and merged as the search space for maze wiring; based on the obstacle-aware sparse maze wiring algorithm, the search space for maze wiring is optimized through the breadth-first search algorithm to obtain the optimized obstacle avoidance wiring results.

[0091] S350, until the number of networks passing through obstacles is 0, and the final obstacle avoidance routing result is obtained.

[0092] In some specific embodiments, all networks are traversed at this time, and then the grids of the paths where the interconnected lines of each network are located are respectively detected to see if they are the areas where the obstacles are located. If so, it means that the result generated by this network passes through the obstacle, and then this network violates the obstacle design rules. If the paths where all the interconnected lines of all networks are located do not overlap with the areas where the obstacles are located, then the number of networks that pass through the obstacles is 0, that is, the result at this time meets the obstacle design requirements. Otherwise, these networks that pass through the obstacles must be subjected to obstacle-aware sparse maze wiring.

[0093] Although most of the test benchmark networks can avoid obstacles after OARSMT-guided sparse maze routing, it may not be possible to avoid obstacles for all networks if the test benchmark is very large. Therefore, we use obstacle-aware sparse maze routing as the final stage and only reroute the networks that violate the obstacle design rules.

[0094] The OARSMT generated in the tree generation stage of the initial wiring only considers obstacles that overlap with the bounding box of this network. Therefore, the generated result may not completely avoid obstacles with a very small probability. If this structure is used as a guide to construct a sparse graph guided by OARSMT, it may not be possible to generate a solution that can avoid obstacles, such as Figure 6 (e) To solve this problem, we build on the basis of ordinary sparse graphs, such as Figure 6 As shown in (d), all the edges where the obstacle boundaries are located are merged into the search space for maze wiring, thereby generating an obstacle-aware sparse graph, as shown in Figure 6 As shown in (f), similar to the sparse maze routing guided by OARSMT, the path with the lowest cost from the starting point to the end point is found through the breadth-first search algorithm on this graph, which is the obstacle-aware maze routing. This solution can almost ensure that all networks avoid obstacles, but due to the large number of obstacles, this method is time-consuming. However, after the sparse maze routing guided by OARSMT, the number of networks that violate the obstacle design rules is very small, and this method is still much faster than ordinary maze routing.

[0095] In summary, if Figure 4 As shown in the figure, the first stage is to take the obstacle information into account in the initial routing stage and build OARSMT in the tree generation stage, so that the networks that violate the obstacle design rules can be greatly reduced in the initial routing stage. The second stage is to reroute the overflow network after the initial routing. Here, the sparse maze routing guided by OARSMT is used, which can greatly improve the probability of the routing network avoiding obstacles while reducing congestion, and the time is very close to that of ordinary sparse maze routing. After the second stage, most of the test benchmark networks can avoid obstacles, but for more complex and very large-scale benchmark circuits, there may be a small number of networks that violate the obstacle design rules. In the third stage, the networks that violate the design rules generated in the second stage are rerouted using obstacle-aware sparse maze routing. The time overhead of obstacle-aware sparse maze routing is relatively large, but it is also much faster than ordinary maze routing, and basically any obstacles can be avoided.

[0096] Therefore, compared with the related art, the embodiments of the present invention have the following advantages:

[0097] 1) Considering the obstacle information in the initial routing stage, by generating OARSMT instead of RSMT in the tree generation stage, the number of networks that violate the obstacle design rules in the early stage can be greatly reduced, the pressure of the subsequent wiring removal and rewiring stage can be alleviated, and guidance can be provided for the subsequent maze routing.

[0098] 2) The sparse maze routing guided by OARSMT can reduce congestion while greatly reducing the number of networks that violate obstacle design rules. The speed is comparable to that of ordinary sparse maze routing, and the quality of the solution is better than that of ordinary sparse maze routing.

[0099] 3) Using obstacle-aware sparse maze routing as the final stage can ensure that all routing schemes generated by all networks avoid obstacles and are faster than ordinary maze routing.

[0100] Finally, the simulation verification is explained in combination with an actual engineering case. This embodiment uses the framework of the global router CUGR 2.0 to test the benchmark provided by the ISPD24 competition of the International Symposium on Physical Design (ISPD) on a server equipped with an Intel Xeon Gold 6348 CPU. Since the ISPD24 benchmark does not contain obstacles, we set the macros in the benchmark as obstacles for the embodiment, in which all wiring layers are prohibited from passing wires. In addition, we also added 60 random obstacles as additional test cases to each test case of the benchmark test.

[0101] The test results of this embodiment are shown in Table 1. The evaluation indicators of the ICCAD19 competition are adopted, including line length, through hole, congestion overflow cost, etc. At the same time, we also evaluate the obstacle violation cost. Among them: The benchmark with "*" in Table 1 represents the benchmark with 60 random obstacles added.

[0102] Table 1 Test results data table

[0103] Benchmarks Line length Through Hole Congestion overflow cost Obstacle Violation Cost ariane133_51 20024926 1044564 27 0 ariane133_68 22523507 1016901 2081 0 nvdla 55194032 1618224 22265 0 mempool_tile 18195439 1181067 56 0 bsg_chip 140708116 6646955 38909 0 mempool_group 773690198 31512071 8158528 0 cluster 2987681931 112637209 18747872 0 ariane133_51* 20043974 1045674 36 0 ariane133_68* 22601560 1018093 2229 0 nvdla* 55030327 1617499 21706 0 mempool_tile* 18207585 1181785 47 0 bsg_chip* 141106246 6653507 40133 0 mempool_group* 773939906 31529644 8171836 0 cluster* 2988697515 112720658 18838130 0

[0104] See also Figure 2 The embodiment of the present application further provides an obstacle avoidance global routing system based on a sparse maze graph, which can implement the above-mentioned obstacle avoidance global routing method based on a sparse maze graph, and the system includes:

[0105] The first module 201 is used to construct an obstacle avoidance right-angle Steiner minimum tree structure based on a target circuit layout with obstacle information through an OARSMT algorithm and perform dynamic programming to obtain a preliminary obstacle avoidance wiring result;

[0106] The second module 202 is used to remove and re-route the preliminary obstacle avoidance routing result by using the sparse maze routing algorithm guided by OARSMT to obtain a secondary obstacle avoidance routing result;

[0107] The third module 203 is used to remove and re-route the secondary obstacle avoidance wiring result based on the obstacle-aware sparse maze wiring algorithm to obtain the final obstacle avoidance wiring result.

[0108] It can be understood that the contents of the above method embodiments are all applicable to the present system embodiments, the functions specifically implemented by the present system embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0109] The preferred embodiments of the present invention are described above with reference to the accompanying drawings, but the scope of the rights of the present invention is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present invention should be within the scope of the rights of the present invention.

Claims

1. An obstacle avoidance global routing method based on sparse maze graph, characterized in that: The method comprises the following steps: Based on the target circuit layout with obstacle information, the obstacle avoidance right-angle Steiner minimum tree structure is constructed through the OARSMT algorithm and dynamic programming is performed to obtain preliminary obstacle avoidance routing results. The preliminary obstacle avoidance routing result is removed and re-routed by using the sparse maze routing algorithm guided by OARSMT to obtain a secondary obstacle avoidance routing result; The sparse maze wiring algorithm based on obstacle perception removes and re-routes the secondary obstacle avoidance wiring result to obtain the final obstacle avoidance wiring result.

2. The method according to claim 1, characterized in that Based on the target circuit layout with obstacle information, the obstacle avoidance right-angle Steiner minimum tree structure is constructed through the OARSMT algorithm and dynamic programming is performed to obtain preliminary obstacle avoidance wiring results, including: Based on the target circuit layout, extracting spatial obstacle information of the target circuit layout, bounding box information corresponding to all networks in the target circuit layout, and pin information corresponding to all networks in the target circuit layout; Mapping the spatial obstacle information to obtain obstacle information in a two-dimensional plane; Traversing all networks in the target circuit layout, screening obstacle information on the two-dimensional plane that overlaps with the traversed network boundary box information, and constructing network input information in combination with pin information corresponding to the network; Based on the network input information, the obstacle avoidance right-angle Steiner minimum tree structure is constructed through the OARSMT algorithm, and the layer allocation is performed through the dynamic programming algorithm to obtain preliminary wiring obstacle avoidance results.

3. The method according to claim 2, characterized in that Based on the network input information, the obstacle avoidance right-angle Steiner minimum tree structure is constructed by the OARSMT algorithm, and the layer allocation is performed by the dynamic programming algorithm to obtain a preliminary wiring obstacle avoidance result, including: Based on the pin information in the input information, a rectangular minimum Steiner tree is generated by a fast minimum tree generation algorithm; Removing the Steiner points in the obstacle information of the two-dimensional plane in the rectangular minimum Steiner tree and updating the Steiner points to obtain an updated obstacle avoidance rectangular Steiner minimum tree structure; Reconnecting and updating the edges of the updated obstacle avoidance rectangular Steiner minimum tree structure and the obstacle information of the two-dimensional plane that overlap, and deleting redundant edges and points to obtain the obstacle avoidance rectangular Steiner minimum tree structure; The obstacle avoidance right-angle Steiner minimum tree structure is layered and allocated using a dynamic programming algorithm to obtain the preliminary wiring obstacle avoidance result.

4. The method according to claim 1, characterized in that: The sparse maze routing algorithm guided by OARSMT performs wiring removal and rerouting on the preliminary obstacle avoidance routing result to obtain a secondary obstacle avoidance routing result, including: Traversing preliminary obstacle avoidance routing results of all networks in the target circuit layout to obtain network traversal results; Determine the number of overflow networks based on the network traversal result; If the number of overflow networks is 0, directly output the final obstacle avoidance wiring result; If the overflow network number is not 0; The overflowed network is removed and re-routed using the sparse maze routing algorithm guided by OARSMT to obtain the secondary obstacle avoidance routing result.

5. The method according to claim 4, characterized in that The preliminary obstacle avoidance routing results of all networks in the target circuit layout are traversed to obtain network traversal results, including: Traversing preliminary obstacle avoidance routing results of all networks in the target circuit layout; Obtaining the relationship between the capacity and demand of each grid on the path where the interconnection line generated by the network is located; If the demand is greater than the capacity, the preliminary obstacle avoidance routing result of the network has overflow; if the demand is less than the capacity, the preliminary obstacle avoidance routing result of the network does not have overflow, and the network traversal result is output.

6. The method according to claim 5, characterized in that The sparse maze routing algorithm guided by OARSMT is used to remove and reroute the overflowed network to obtain the secondary obstacle avoidance routing result, including: Taking the path of a specific step length and the path of the pin in the overflowed network as the search space of the maze wiring, a general sparse graph is constructed; The path where the obstacle avoidance right-angle Steiner minimum tree structure in the overflowed network is located is expanded to both sides by a preset range as a search space for maze wiring, and a grid line guided by OARSMT is constructed; Merging the common sparse graph with the grid lines guided by the OARSMT to obtain a sparse graph guided by the OARSMT; Based on the sparse graph guided by the OARSMT as the search space, the wiring optimization is performed through the breadth-first search algorithm to obtain a secondary obstacle avoidance wiring result.

7. The method according to claim 1, characterized in that The obstacle-aware sparse maze routing algorithm performs wiring removal and rerouting on the secondary obstacle avoidance routing result to obtain a final obstacle avoidance routing result, including: Performing obstacle network traversal on the secondary obstacle avoidance wiring result to obtain an obstacle network traversal result; Determining the number of networks that pass through the obstacle based on the obstacle network traversal result; If the number of networks passing through the obstacle is not 0; The secondary obstacle avoidance wiring result is removed and re-routed by an obstacle-aware sparse maze wiring algorithm to obtain an optimized obstacle avoidance wiring result; Until the number of networks passing through obstacles is 0, the final obstacle avoidance wiring result is obtained.

8. The method according to claim 7, characterized in that The performing obstacle network traversal on the secondary obstacle avoidance wiring result to obtain the obstacle network traversal result includes: Traversing the obstacle network in the secondary obstacle avoidance wiring result to determine the grid of the path where the interconnection lines of the network are located and the area where the obstacles are located; If the grid of the path where the interconnected lines of the network are located belongs to the area where the obstacle is located, then the secondary obstacle avoidance wiring result has a network that passes through the obstacle; if the grid of the path where the interconnected lines of the network are located does not belong to the area where the obstacle is located, then the secondary obstacle avoidance wiring result does not have a network that passes through the obstacle, and the obstacle network traversal result is output.

9. The method according to claim 8, characterized in that The obstacle-aware sparse maze routing algorithm performs wiring removal and rerouting on the secondary obstacle avoidance routing result to obtain an optimized obstacle avoidance routing result, including: Obtaining the edge where the obstacle boundary is located in the secondary obstacle avoidance routing result, and fusing them as the search space of maze routing; The sparse maze routing algorithm based on obstacle perception optimizes the routing of the search space of the maze routing through a breadth-first search algorithm to obtain the optimized obstacle avoidance routing result.

10. An obstacle avoidance global routing system based on sparse maze graph, characterized in that: The system comprises: The first module is used to construct an obstacle avoidance right-angle Steiner minimum tree structure based on the target circuit layout with obstacle information through the OARSMT algorithm and perform dynamic programming to obtain preliminary obstacle avoidance routing results; The second module is used to remove and re-route the preliminary obstacle avoidance routing result through the sparse maze routing algorithm guided by OARSMT to obtain a secondary obstacle avoidance routing result; The third module is used to remove and re-route the secondary obstacle avoidance wiring result based on the obstacle-aware sparse maze wiring algorithm to obtain the final obstacle avoidance wiring result.

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