Storage control method, circuit and micro-processing chip

Abstract

The embodiment of the invention provides a storage control method and circuit and a micro-processing chip, the method is applied to the storage control circuit, the storage control circuit comprises a nonvolatile memory and a phase change memory, and the nonvolatile memory stores user data; wherein the access speed of the phase change memory is higher than that of the non-volatile memory, and the anti-interference capability of the phase change memory is lower than that of the non-volatile memory; the method comprises the following steps of: in a test packaging stage, storing user data into a nonvolatile memory; and writing the user data in the non-volatile memory into the phase change memory when the phase change memory is powered on for the first time in the user use stage. In the test packaging stage, the user data is stored in the nonvolatile memory, so that the data security is protected, and the data loss in the test packaging stage is avoided; in the use stage of the user, the user data are stored in the phase change memory, the reading speed is high, and the efficiency is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor integrated circuits, and in particular to a storage control method, circuit and microprocessor chip. Background Art

[0002] Phase-Change Memory (PCM) is a new type of memory that uses the difference in conductivity between crystalline and amorphous phase change materials to achieve data storage. It has the advantages of low cost, fast read and write speed, high process compatibility, and single-bit changeability. It is one of the strong competitors to replace Flash and become the new generation of mainstream non-volatile memory.

[0003] However, phase change memory is not resistant to high temperatures. If the chip wafer test (Circuit Probing, CP) results, user data and other data are stored in the phase change memory, once the temperature in the chip packaging, welding and other processes exceeds the crystallization temperature of the phase change material, it may cause the phase change material to undergo a phase change, resulting in the loss of stored data. However, if the above data is stored in a non-volatile memory, for programs that need to read user data multiple times, the slow access speed of the non-volatile memory will lead to poor program performance. Summary of the invention

[0004] The embodiments of the present application provide a storage control method, circuit and microprocessor chip to achieve the effect of protecting data security.

[0005] In a first aspect, an embodiment of the present application provides a storage control method, which is applied to a storage control circuit, wherein the storage control circuit includes a processing module, a non-volatile memory and a phase change memory, wherein the non-volatile memory stores user data; wherein the access speed of the phase change memory is faster than that of the non-volatile memory, and the anti-interference ability of the phase change memory is lower than that of the non-volatile memory; the method includes:

[0006] During the test packaging phase, user data is stored in non-volatile memory;

[0007] When the device is powered on for the first time during the user use phase, the user data in the non-volatile memory is migrated to the phase change memory.

[0008] In this embodiment, user data is stored in a non-volatile memory during the test packaging stage, which can protect the user data from loss or error. When the power is turned on for the first time during the user use stage, the user data in the non-volatile memory is migrated to the phase change memory. The advantage of the fast reading speed of the phase change memory can be utilized to speed up the reading speed of user data during the user use stage.

[0009] In one embodiment, the method further comprises:

[0010] Determine whether the conditions for data migration are met;

[0011] If the data migration condition is met, a data migration operation is performed to migrate the user data stored in the non-volatile memory to the phase change memory.

[0012] In one embodiment, if the data migration condition is met, a data migration operation is performed to migrate the user data stored in the non-volatile memory to the phase change memory, specifically including:

[0013] receiving a temperature signal;

[0014] If the temperature represented by the temperature signal drops from higher than the first preset temperature to lower than the second preset temperature, the user data in the non-volatile memory is read, and the user data in the non-volatile memory is written into the phase change memory.

[0015] In this embodiment, the user data may be stored in a non-volatile memory when the temperature is high to avoid loss or error of the user data, and the user data may be migrated to a phase change memory when the temperature is low to increase the reading speed of the user data.

[0016] In one embodiment, if the data migration condition is met, a data migration operation is performed to migrate the user data stored in the non-volatile memory to the phase change memory, specifically including:

[0017] The non-volatile memory and the phase change memory both store the user data;

[0018] Detecting whether the user data in the non-volatile memory and the user data in the phase change memory are consistent;

[0019] If the user data in the non-volatile memory is inconsistent with the user data in the phase-change memory, the user data in the non-volatile memory is accessed and the user data in the non-volatile memory is written into the phase-change memory.

[0020] In this embodiment, both the non-volatile memory and the phase change memory store user data. Only when the user data in the non-volatile memory and the phase change memory are inconsistent, the user data in the non-volatile memory is written into the phase change memory, thereby avoiding frequent write operations.

[0021] In one embodiment, the method further comprises:

[0022] The non-volatile memory and the phase change memory both store the user data;

[0023] If the duration of the temperature represented by the temperature signal being higher than the first preset temperature value is greater than the first preset time, detecting whether the user data in the non-volatile memory and the user data in the phase change memory are consistent;

[0024] If the user data in the non-volatile memory is inconsistent with the user data in the phase-change memory, the user data in the non-volatile memory is accessed and the user data in the non-volatile memory is written into the phase-change memory.

[0025] In this embodiment, both the non-volatile memory and the phase change memory store the user data. When the temperature remains high, the user data in the phase change memory may be lost or erroneous. By detecting whether the user data in the non-volatile memory and the user data in the phase change memory are consistent, the status of the user data in the phase change memory can be quickly determined, and the user data in the phase change memory can be prevented from being lost or erroneous for a long time.

[0026] In one embodiment, if the user data in the non-volatile memory is inconsistent with the user data in the phase change memory, accessing the user data in the non-volatile memory and writing the user data in the non-volatile memory into the phase change memory specifically includes:

[0027] At least a portion of user data stored in the non-volatile memory is migrated to the phase-change memory, wherein the at least a portion of user data includes a portion where the user data in the non-volatile memory and the user data in the phase-change memory are inconsistent.

[0028] In this embodiment, the user data in the non-volatile memory is inconsistent with the user data in the phase change memory. All the user data in the non-volatile memory can be written into the phase change memory to ensure the integrity of the data; or only the inconsistent parts between the non-volatile memory and the phase change memory can be written into the phase change memory to speed up the writing speed.

[0029] In one embodiment, the non-volatile memory stores system parameters and system parameter flags corresponding to the system parameters; the system parameter flags are used to reflect the status of the system parameters; the storage control circuit also includes a system configuration module, the system configuration module includes a system parameter configuration register group and a system parameter status register group;

[0030] Before writing the user data in the non-volatile memory into the phase-change memory, the method further includes:

[0031] The system configuration module reads the system parameter flag bits in the non-volatile memory;

[0032] The system configuration module confirms whether the system parameter flag is valid. If the system parameter flag is valid, the system parameter corresponding to the system parameter flag is read and the system parameter is written into the system parameter configuration register group to complete the system parameter configuration.

[0033] In one of the embodiments, the non-volatile memory includes N system parameter flag bits and N system parameters, and the system parameter flag bits correspond to the system parameters one by one;

[0034] The system configuration module confirms whether the system parameter flag is valid, including:

[0035] If the i-th system parameter flag is valid, the system configuration module reads the system parameter corresponding to the system parameter flag and writes the system parameter into the system parameter configuration register group; 1≤i <N;

[0036] The system configuration module reads the i+1th system parameter flag bit and confirms whether the i+1th system parameter flag bit is valid;

[0037] If the i-th system parameter flag is invalid;

[0038] The system configuration module reads the i+1th system parameter flag bit and confirms whether the i+1th system parameter flag bit is valid.

[0039] In one embodiment, before reading the system parameter flag bit in the non-volatile memory, the method further includes:

[0040] The system configuration module queries the idle state of the non-volatile memory;

[0041] When the non-volatile memory is idle, the system configuration module reads the system parameter flag bit in the non-volatile memory.

[0042] In a second aspect, an embodiment of the present application provides a storage control circuit for executing any of the above-mentioned storage control methods.

[0043] In a third aspect, an embodiment of the present application provides a microprocessor chip for executing any of the above-mentioned storage control methods.

[0044] The storage control method, circuit and microprocessor chip provided in the embodiment of the present application are applied to the storage control circuit, the storage control circuit includes a non-volatile memory and a phase change memory, the non-volatile memory stores user data; wherein, the access speed of the phase change memory is faster than that of the non-volatile memory, and the anti-interference ability of the phase change memory is lower than that of the non-volatile memory; the method includes: in the test packaging stage, the user data is stored in the non-volatile memory; when the power is turned on for the first time in the user use stage, the user data in the non-volatile memory is written into the phase change memory. In the test packaging stage of the present application, the user data is stored in the non-volatile memory to protect the data security and avoid data loss in the test packaging stage; in the user use stage, the user data is stored in the phase change memory, which has a fast reading speed and improves efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0046] Figure 1 A schematic diagram of a storage control circuit provided in an embodiment of the present application;

[0047] Figure 2 A flowchart of a storage control method provided in one embodiment of the present application;

[0048] Figure 3 A flowchart of a storage control method provided in one embodiment of the present application;

[0049] Figure 4 A schematic diagram of the structure of a non-volatile memory provided in one embodiment of the present application;

[0050] Figure 5 A schematic diagram of system parameters and system parameter flags provided in an embodiment of the present application;

[0051] Figure 6 A flowchart of a storage control method provided in one embodiment of the present application.

[0052] Reference numerals:

[0053] 110, processing module; 120, storage module; 121, non-volatile memory; 122, phase change memory; 1211, first storage area; 1212, second storage area; 1213, third storage area.

[0054] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0055] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0056] Due to manufacturing process deviations, circuits such as low dropout regulators (LDO), RC oscillators, and sensors need to be calibrated during the wafer testing phase, and the calibration values ​​are stored in the on-chip non-volatile memory for use in the chip system initialization phase. In addition, user data is also written to the on-chip non-volatile memory for user use. If the above data is stored in Flash, the slow Flash access speed will result in poor program performance for programs that need to read user data multiple times. The read and write performance of phase change memory is better than Flash. However, phase change memory uses electric pulses to cause different temperature changes to achieve write 0 or write 1 operations. If these data are stored in phase change memory, high-temperature processes such as packaging and welding may cause data loss.

[0057] The storage control method provided in the embodiment of the present application is applied to a storage control circuit, wherein the storage control circuit includes a non-volatile memory and a phase change memory, wherein the non-volatile memory stores user data; wherein the access speed of the phase change memory is faster than that of the non-volatile memory, and the anti-interference ability of the phase change memory is lower than that of the non-volatile memory; the method includes: receiving a first power-on signal; writing the user data in the non-volatile memory into the phase change memory according to the first power-on signal; the first power-on signal is a signal for the first power-on of the storage control circuit in the user use stage. In the test packaging stage of the present application, user data is stored in the non-volatile memory to protect data security and avoid data loss in the test packaging stage; in the user use stage, user data is stored in the phase change memory, which has a fast reading speed and improves efficiency.

[0058] The technical solution of the present application and how the technical solution of the present application solves the above-mentioned technical problems are described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of the present application will be described below in conjunction with the accompanying drawings.

[0059] like Figure 1 As shown, Figure 1A schematic diagram of a storage control circuit provided for an embodiment of the present application, wherein the storage control circuit includes a processing module 110 and a storage module 120, wherein the storage module 120 includes a non-volatile memory 121 and a phase change memory 122; the processing module 110 is connected to the non-volatile memory 121 and the phase change memory 122, respectively; the non-volatile memory 121 stores user data; wherein the access speed of the phase change memory 122 is faster than that of the non-volatile memory 121, and the anti-interference capability of the phase change memory 122 is lower than that of the non-volatile memory 121; the processing module 110 is used to control the non-volatile memory 121 and the phase change memory 122.

[0060] The non-volatile memory 121 has a high anti-interference ability and is suitable for stable data storage, but the access speed is relatively slow; the phase change memory 122 has a fast access speed and is suitable for operations that require fast reading and writing. However, its anti-interference ability is low and it is not suitable for use in an interference environment. If the user data is stored in the phase change memory 122, it needs to go through high-temperature processes such as packaging and welding during the test packaging stage, which may cause the loss of user data. Therefore, the user data is stored in the non-volatile memory 121 during the test packaging stage, and the user data can be stored in the non-volatile memory 121 before or during the test packaging stage. In the user use stage, after the first power-on, the processing module 110 migrates the user data in the non-volatile memory 121 to the phase change memory 122 to ensure that the user data can be quickly accessed after the storage control circuit is started, thereby improving the response speed. The present application utilizes the performance of the non-volatile memory 121 and the phase change memory 122 to ensure data security and data integrity and improve the response speed.

[0061] In one embodiment, the processing module 110 performs read and write access to the non-volatile memory 121 and the phase change memory 122 through the system bus.

[0062] like Figure 2 As shown, Figure 2 This is a flowchart of a storage control method provided in an embodiment of the present application. The storage control method is applied to a storage control circuit. The storage control circuit includes a processing module 110, a non-volatile memory 121 and a phase change memory 122. The non-volatile memory 121 stores user data. The access speed of the phase change memory 122 is faster than that of the non-volatile memory 121, and the anti-interference ability of the phase change memory 122 is lower than that of the non-volatile memory 121. The method includes the following steps:

[0063] Step S201 : storing user data in the non-volatile memory 121 .

[0064] Specifically, the user data is stored in the non-volatile memory 121 before or during the test packaging stage. The non-volatile memory 121 has a strong anti-interference capability and can avoid data loss during the packaging stage.

[0065] Step S202 : when the power is turned on for the first time during the user use phase, the user data in the non-volatile memory 121 is written into the phase change memory 122 .

[0066] Specifically, when the storage control circuit is powered on for the first time during the user use phase, it can be understood as the first power signal received, that is, during the startup process of the storage control circuit when it is used for the first time, the processing module 110 will access the user data in the non-volatile memory 121 and migrate the user data in the non-volatile memory 121 to the phase change memory 122. The phase change memory 122 has a faster access speed. Writing user data into the phase change memory 122 can ensure that the user data is quickly accessed and improve operating efficiency; secondly, by setting automatic data transfer, the need for manual configuration is reduced. In the test packaging phase of the storage control method of this embodiment, user data is stored in the non-volatile memory 121 to protect data security and avoid data loss during the test packaging phase; in the user use phase, user data is stored in the phase change memory 122, which has a fast reading speed and improves efficiency.

[0067] In one embodiment, the non-volatile memory 121 is a multiple-programmable memory or a one-time programmable memory. The types of multiple-programmable memories include flash memory, erasable programmable read-only memory EPROM and other memories with strong environmental interference resistance.

[0068] In one embodiment, the phase change memory 122 may also be other memories with excellent performance but poor environmental interference resistance, such as magnetic random access memory STT-MRAM (spin transfer torque magnetic random access memory) and the like.

[0069] In one embodiment, if Figure 3 As shown, Figure 3 This is a flow chart of a storage control method provided in an embodiment of the present application, wherein step S202 specifically includes the following steps:

[0070] Step S301: Determine whether a data migration condition is met.

[0071] Step S302 : If the data migration condition is met, a data migration operation is performed to migrate the user data stored in the non-volatile memory 121 to the phase change memory 122 .

[0072] Specifically, the data migration conditions include the inconsistency of data in the non-volatile memory 121 and the phase change memory 122, or the need to improve system performance or the health status of the memory, available capacity or system restart, regular maintenance cycle, etc., and may also be other conditions, which are not listed here one by one. According to the data migration conditions, it is determined whether the non-volatile memory 121 and the phase change memory 122 need to perform data migration operations to optimize performance or ensure data integrity. When it is determined that the data migration conditions are met, the data migration operation is performed to migrate the user data in the non-volatile memory 121 to the phase change memory 122, making full use of the performance of the phase change memory 122 and speeding up the access speed of user data.

[0073] Similarly, under different data migration conditions, executing the data migration operation also includes migrating the user data in the phase change memory 122 to the non-volatile memory 121, using the excellent anti-interference ability of the non-volatile memory 121 to save the user data and avoid loss or error; placing the data in the most suitable memory according to the required data access speed and environmental conditions.

[0074] In one embodiment, step S301 specifically includes:

[0075] It is detected whether the user data in the nonvolatile memory 121 and the user data in the phase change memory 122 are consistent.

[0076] Step S302 specifically includes:

[0077] The non-volatile memory 121 and the phase change memory 122 both store user data during the test packaging stage. The user data in the non-volatile memory 121 and the user data in the phase change memory 122 are verified to confirm whether the user data in the phase change memory 122 is damaged or lost. If the verification result shows that the user data in the non-volatile memory 121 is inconsistent with the data in the phase change memory 122, the user data stored in the non-volatile memory 121 is migrated to the phase change memory 122.

[0078] Optionally, the storage control circuit also includes a verification module, which is connected to the processing module 110 and the storage module 120; user data is stored in the non-volatile memory 121 and the phase change memory 122, and the verification module is used to verify the user data in the non-volatile memory 121 and the phase change memory 122, and generate a control signal when the user data in the non-volatile memory 121 and the phase change memory 122 are inconsistent; the processing module 110 is used to migrate the user data of the non-volatile memory 121 to the phase change memory 122 according to the control signal.

[0079] If the user data in the nonvolatile memory 121 is inconsistent with the user data in the phase change memory 122 , the user data in the nonvolatile memory 121 is accessed and written into the phase change memory 122 .

[0080] Specifically, when it is detected that the user data in the non-volatile memory 121 is inconsistent with the user data in the phase change memory 122, at this time, due to the strong anti-interference capability of the non-volatile memory 121, the user data in the phase change memory 122 may be lost or damaged, and the user data in the non-volatile memory 121 may be written into the phase change memory 122. If it is detected that the user data in the non-volatile memory 121 is consistent with the user data in the phase change memory 122, it means that the user data in the phase change memory 122 is correct, and there is no need to re-write the user data in the non-volatile memory 121 into the second memory, thereby reducing the re-writing step.

[0081] In one embodiment, step 301 specifically includes:

[0082] Receive temperature signal.

[0083] Specifically, the storage control circuit also includes a temperature sensor, wherein the temperature sensor can be arranged inside or outside the storage control circuit, and can be adjusted according to actual conditions, and this application does not limit this. The temperature sensor is used to detect the temperature of the storage control circuit or the phase change memory 122 to avoid the loss or damage of user data in the phase change memory 122 due to excessive temperature. The temperature signal can be a temperature representing the entire storage control circuit, or a temperature representing the phase change memory 122.

[0084] Step S302 specifically includes:

[0085] If the temperature represented by the temperature signal drops from higher than the first preset temperature value to lower than the second preset temperature value, the user data in the non-volatile memory 121 is read, and the user data in the non-volatile memory 121 is written into the phase change memory 122 .

[0086] Specifically, due to the nature of the phase change memory 122, the data stored in the phase change memory 122 may be lost under high temperature conditions, so a first preset temperature value and a second preset temperature value are set, and the first preset temperature value is a high critical temperature. When the first preset temperature value is exceeded, the probability of the phase change memory 122 losing data is greatly increased. When the temperature represented by the temperature signal drops from higher than the first preset temperature value to lower than the second preset temperature value, the phase change memory 122 is in a safe state and is not prone to data loss. Therefore, the user data in the non-volatile memory 121 is allowed to be written into the phase change memory 122 to achieve a faster access speed.

[0087] Optionally, the second preset temperature value can be set to be the same as the first preset temperature value; the second preset temperature value can also be set to be less than the first preset temperature value; when the second preset temperature value is set to be less than the first preset temperature value, it is to avoid repeated data migration to the phase change memory 122 when the temperature fluctuates around the first preset temperature.

[0088] Specifically, both the non-volatile memory 121 and the phase change memory 122 store user data. When the temperature represented by the temperature signal drops from higher than a first preset temperature value to lower than a second preset temperature value, the user data stored in the non-volatile memory 121 and the phase change memory 122 are first verified. If the verification results are inconsistent, the user data stored in the non-volatile memory 121 is migrated to the phase change memory 122; if the verification results are consistent, the data migration operation is not performed, which can reduce the frequency of data reading and writing and improve work efficiency.

[0089] In one embodiment, step S301 further includes:

[0090] A temperature signal is received, and if the temperature represented by the temperature signal is higher than a first preset temperature value for a duration greater than a first preset time, it is detected whether the user data in the non-volatile memory 121 is consistent with the user data in the phase change memory 122 .

[0091] Step S302 also includes:

[0092] If the user data in the non-volatile memory 121 is inconsistent with the user data in the phase-change memory 122 , the user data in the non-volatile memory 121 is migrated to the phase-change memory 122 .

[0093] Specifically, if it is detected that the temperature represented by the temperature signal is higher than the first preset temperature value for a certain period of time, the user data in the non-volatile memory 121 and the user data in the phase change memory 122 will be checked for consistency. If the data are inconsistent, the user data in the non-volatile memory 121 will be migrated to the phase change memory 122. If the temperature represented by the temperature signal is higher than the first preset temperature value for a certain period of time, the user data in the phase change memory 122 may be lost or erroneous. By checking whether the user data in the non-volatile memory 121 and the user data in the phase change memory 122 are consistent, the possible loss or error of the user data in the phase change memory 122 can be discovered in time, and when the user data in the non-volatile memory 121 and the user data in the phase change memory 122 are inconsistent, the user data stored in the non-volatile memory 121 will be migrated to the phase change memory 122, so as to protect the integrity of the user data under the risk of high temperature.

[0094] Optionally, the second preset temperature value can be set to be the same as the first preset temperature value; the second preset temperature value can also be set to be less than the first preset temperature value; when the second preset temperature value can be set to be less than the first preset temperature value, repeated data verification can be avoided when the temperature fluctuates around the first preset temperature.

[0095] In a specific embodiment, if the verification result is that the user data in the non-volatile memory 121 is inconsistent with the data in the phase change memory 122, the user data stored in the non-volatile memory 121 is migrated to the phase change memory 122, specifically including:

[0096] At least a portion of user data stored in the non-volatile memory is migrated to the phase-change memory, wherein the at least a portion of user data includes a portion where the user data in the non-volatile memory and the user data in the phase-change memory are inconsistent.

[0097] All user data in the non-volatile memory 121 can be written into the phase change memory 122 to ensure the integrity of the user data, or some user data that is inconsistent with the user data in the non-volatile memory 121 and the user data in the phase change memory 122 can be written into the phase change memory 122 to improve the data migration speed.

[0098] In one embodiment, if Figure 4 As shown, Figure 4 A schematic diagram of the structure of a non-volatile memory 121 provided in an embodiment of the present application. The non-volatile memory 121 includes a first storage area 1211, a second storage area 1212, and a third storage area 1213; the first storage area 1211 is used to store system parameters; the second storage area 1212 is used to store system parameter flags corresponding to the system parameters; the third storage area 1213 is used to store user data; and the system parameter flags are used to reflect the status of the system parameters.

[0099] Optionally, the system parameters include but are not limited to on-chip circuit calibration parameters and system configuration parameters. The system parameter flag indicates whether the corresponding system parameter is valid. User data refers to custom parameters that the user will use multiple times during the user use phase, including but not limited to user keys and algorithm parameters.

[0100] In one embodiment, the non-volatile memory 121 stores system parameters and system parameter flags corresponding to the system parameters; the system parameter flags are used to reflect the status of the system parameters. The storage control circuit also includes a system configuration module (not shown in the figure), which includes a system parameter configuration register group and a system parameter status register group. Before step S202, the method also includes:

[0101] The system configuration module reads the system parameter flag bits in the non-volatile memory 121 .

[0102] Specifically, Figure 5 As shown, Figure 5 A schematic diagram of system parameters and system parameter flags provided in an embodiment of the present application. The system parameters are written into the specified address of the first storage area 1211 through the system configuration module. The system parameters are derived from, for example, the circuit calibration test performed in the test packaging stage, and the calibration values ​​that meet the requirements are obtained. A valid flag value is written into the system parameter flag address corresponding to the system parameter. After completing the writing operation of all system parameters and system parameter flags, the packaging and welding process is entered. The non-volatile memory 121 can ensure data stability in a high temperature environment. The storage control circuit enters the user use stage. After the first power-on, the system configuration module executes the system parameter configuration.

[0103] Specifically, the system configuration module executes system parameter configuration including: the system configuration module confirms whether the system parameter flag is valid, if the system parameter flag is valid, reads the system parameter corresponding to the system parameter flag, and writes the system parameter into the system parameter configuration register group to complete the system parameter configuration.

[0104] Specifically, the system configuration module includes a system parameter configuration register group and a system parameter status register group; the system parameter status register group is used to read the system parameter flag bit in the non-volatile memory 121. If the system parameter flag bit is valid, the system parameter status register group sends a configuration instruction to the system parameter configuration register group; the system parameter configuration register group reads the system parameter corresponding to the system parameter flag bit in the non-volatile memory 121 according to the configuration instruction, and writes the system parameter into the system parameter configuration register group to complete the system parameter configuration. Optionally, the system parameter configuration register group includes a system parameter 1 configuration register, a system parameter 2 configuration register ... a system parameter N configuration register, which is used to store system parameters; the system parameter status register group includes a system parameter 1 status register, a system parameter 2 status register ... a system parameter N status register, which is used to store the system parameter flag bit.

[0105] In one embodiment, the non-volatile memory 121 includes N system parameter flags and N system parameters, and the system parameter flags correspond to the system parameters one by one; confirming whether the system parameter flags are valid specifically includes the following steps:

[0106] When the ith system parameter flag is valid, the system configuration module reads the system parameter corresponding to the system parameter flag and writes the system parameter into the system parameter configuration register group.

[0107] The system configuration module reads the i+1th system parameter flag bit and confirms whether the i+1th system parameter flag bit is valid; where 1≤i <N。

[0108] Specifically, see Figure 5 , the first storage area 1211 has a total of n 32-bit system parameters, the second storage area 1212 has a total of n 32-bit system parameter flags, and the third storage area 1213 has a total of m+1 user data. The system parameter 1 flag address is 0x000, the system parameter 1 address is 0x004, ..., the system parameter n flag is 0x000+8(n-1), the system parameter n address is 0x000+8(n-1)+4, the user data 1 address is 0x000+8n, the user data 2 address is 0x000+8n+4, ..., the user data m address is , the address of user data m+1 is 0x000+8(n+m / 2). The specific working logic of system parameter configuration is as follows: after power-on, the system parameter 1 status register in the system configuration module reads the 32-bit system parameter 1 flag from the address 0x000 of the first storage area 1211. If the system parameter 1 flag is in a valid state, the system configuration module reads the 32-bit system parameter 1 from the address 0x004 of the first storage area 1211 and writes it into the system parameter 1 configuration register. The system parameter 1 configuration register drives the system parameter 1 to the corresponding system parameter application module; then enters the system parameter 2 initialization process. If the system parameter 1 flag is in an invalid state, the system configuration module reads the 32-bit system parameter 1 from the address 0x004 of the first storage area 1211, writes it into the system parameter 1 configuration register and the subsequent process, and directly enters the system parameter 2 initialization process. And so on, complete the initialization of n system parameters. After the system parameter configuration is completed, the processing module 110 migrates the user data in the non-volatile memory 121 to the phase change memory 122 and then executes the user program. If the system parameter flag is invalid, the corresponding system parameter is directly skipped, which can speed up the configuration of the system parameters.

[0109] In one embodiment, the method further comprises the following steps:

[0110] If the system configuration module detects that the i-th system parameter flag bit is invalid, it reads the i+1-th system parameter flag bit and confirms whether the i+1-th system parameter flag bit is valid.

[0111] Specifically, if the i-th system parameter flag is invalid, then continue to query the i+1-th system parameter flag and confirm whether the i+1-th system parameter flag is valid. If the system parameter flag is valid, then complete the system parameter configuration corresponding to the system parameter flag. If the system parameter flag is invalid, read the next system parameter flag. Poll the system parameter flags in sequence until all system parameter configurations are completed.

[0112] In one embodiment, before the system configuration module reads the system parameter flag in the non-volatile memory 121 , the method further includes the following steps: after the first power-on, the system configuration module polls the status of the first storage area 1211 of the non-volatile memory 121 .

[0113] When the first storage area 1211 of the non-volatile memory 121 is idle, the system configuration module reads the system parameter flag bit in the non-volatile memory 121 .

[0114] Specifically, the system configuration module polls the state of the first storage area 121 of the non-volatile memory 121, and actually waits until the first storage area 1211 in the non-volatile memory 121 is in an idle state before reading the system parameter flag.

[0115] like Figure 6 As shown, Figure 6 This is a flowchart of a storage control method provided in an embodiment of the present application. The storage control method includes the following steps:

[0116] Step S601, receiving a power-on signal, which is a signal received when the storage control circuit is powered on for the first time during the user use phase.

[0117] Step S602: The system configuration module waits for the first storage area 1211 of the non-volatile memory 121 to be in an idle state.

[0118] Step S603: The system configuration module reads the system parameter 1 flag.

[0119] Step S604: The system configuration module confirms whether the system parameter 1 flag is valid. If the system parameter 1 flag is valid, the process goes to step S605; if the system parameter 1 flag is invalid, the process goes to step S606.

[0120] Step S605: The system configuration module writes the system parameter 1 into the system parameter 1 configuration register and waits for the configuration of the system parameter 1 to be completed. After the configuration is completed, the process turns to step S606.

[0121] Step S606: The system configuration module reads the system parameter 2 flag.

[0122] Until the configuration of system parameter N is completed.

[0123] Step S610 : The processing module 110 reads the user data in the non-volatile memory 121 , and writes the user data in the non-volatile memory 121 into the phase change memory 122 .

[0124] An embodiment of the present application provides a storage control circuit for executing any of the above-mentioned storage control methods.

[0125] An embodiment of the present application provides a microprocessor chip for executing any of the above-mentioned storage control methods.

[0126] The microprocessor chip may be, for example, an MCU, DSP, MPU, micro CPU, or other micro central control chip or system-on-chip chip that can process digital signals, analog signals, or perform signal control, instruction processing, and calculation functions.

[0127] In the above embodiments, it should be understood that the processing module can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), etc. The steps of the method disclosed in the invention can be directly implemented by a hardware processor, or implemented by a combination of hardware and software modules in the processor.

[0128] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the bus in the drawings of this application is not limited to only one bus or one type of bus.

[0129] The present application also provides a computer program product, including a computer program, which implements the above method when executed by a processor.

[0130] The present application also provides a computer-readable storage medium, in which computer-executable instructions are stored. When a processor executes the computer-executable instructions, the above method is implemented.

[0131] The above-mentioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk. The readable storage medium can be any available medium that can be accessed by a general or special-purpose computer.

[0132] An exemplary readable storage medium is coupled to a processor so that the processor can read information from the readable storage medium and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can be located in an application specific integrated circuit (Application Specific Integrated Circuits, referred to as: ASIC). Of course, the processor and the readable storage medium can also exist in the device as discrete components.

[0133] The division of units is only a logical function division, and there may be other divisions in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interface, device or unit, which can be electrical, mechanical or other forms.

[0134] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0135] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0136] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods of each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc. Various media that can store program codes.

[0137] Those skilled in the art can understand that all or part of the steps of implementing the above-mentioned method embodiments can be completed by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned storage medium includes: ROM, RAM, disk or optical disk and other media that can store program codes.

[0138] Finally, it should be noted that those skilled in the art will readily conceive of other embodiments of the present invention after considering the specification and practicing the invention disclosed herein. The present invention is intended to cover any variations, uses or adaptations of the present invention, which follow the general principles of the present invention and include common knowledge or customary technical means in the art not disclosed by the present invention, are not limited to the precise structure described above and shown in the drawings, and may be modified and changed in various ways without departing from the scope thereof. The scope of the present invention is limited only by the appended claims.

Claims

1. A storage control method, characterized in that: Applied to a storage control circuit, the storage control circuit includes a processing module, a non-volatile memory and a phase change memory; wherein the access speed of the phase change memory is faster than that of the non-volatile memory, and the anti-interference ability of the phase change memory is lower than that of the non-volatile memory; the method includes: Storing user data in the non-volatile memory; When the device is powered on for the first time during the user use phase, the user data in the non-volatile memory is migrated to the phase change memory.

2. The method according to claim 1, characterized in that Also includes: Determine whether the conditions for data migration are met; If the data migration condition is met, a data migration operation is performed to migrate the user data stored in the non-volatile memory to the phase change memory.

3. The method according to claim 2, characterized in that If the data migration condition is met, a data migration operation is performed to migrate the user data stored in the non-volatile memory to the phase change memory, specifically including: receiving a temperature signal; If the temperature represented by the temperature signal drops from higher than the first preset temperature to lower than the second preset temperature, the user data in the non-volatile memory is read, and the user data in the non-volatile memory is written into the phase change memory.

4. The method according to claim 2, characterized in that: If the data migration condition is met, a data migration operation is performed to migrate the user data stored in the non-volatile memory to the phase change memory, specifically including: The non-volatile memory and the phase change memory both store the user data; Detecting whether the user data in the non-volatile memory is consistent with the user data in the phase change memory; If the user data in the non-volatile memory is inconsistent with the user data in the phase-change memory, the user data stored in the non-volatile memory is migrated to the phase-change memory.

5. The method according to claim 3, characterized in that: The method further comprises: The non-volatile memory and the phase change memory both store the user data; If the duration of the temperature represented by the temperature signal being higher than the first preset temperature value is greater than a first preset time, detecting whether the user data in the non-volatile memory is consistent with the user data in the phase change memory; If the user data in the non-volatile memory is inconsistent with the user data in the phase-change memory, the user data stored in the non-volatile memory is migrated to the phase-change memory.

6. The method according to any one of claims 4-5, characterized in that: If the user data in the non-volatile memory is inconsistent with the user data in the phase change memory, migrating the user data stored in the non-volatile memory to the phase change memory specifically includes: At least a portion of user data stored in the non-volatile memory is migrated to the phase-change memory, wherein the at least a portion of user data includes a portion where the user data in the non-volatile memory and the user data in the phase-change memory are inconsistent.

7. The method according to claim 1, characterized in that The non-volatile memory stores system parameters and system parameter flags corresponding to the system parameters; the system parameter flags are used to reflect the status of the system parameters; the storage control circuit also includes a system configuration module, the system configuration module includes a system parameter configuration register group and a system parameter status register group; Before writing the user data in the non-volatile memory into the phase change memory, the method further includes: The system configuration module reads the system parameter flag bit in the non-volatile memory; The system configuration module confirms whether the system parameter flag is valid. If the system parameter flag is valid, the system parameter corresponding to the system parameter flag is read, and the system parameter is written into the system parameter configuration register group to complete the system parameter configuration.

8. The method according to claim 6, characterized in that The non-volatile memory includes N system parameter flag bits and N system parameters, and the system parameter flag bits correspond to the system parameters one by one; The system configuration module confirms whether the system parameter flag is valid, specifically including: If the i-th system parameter flag is valid, the system configuration module reads the system parameter corresponding to the system parameter flag, and writes the system parameter into the system parameter configuration register group; The system configuration module reads the i+1th system parameter flag bit, and confirms whether the i+1th system parameter flag bit is valid; If the i-th system parameter flag is invalid; The system configuration module reads the i+1th system parameter flag bit, and confirms whether the i+1th system parameter flag bit is valid; Among them, 1≤i <N。 9. A storage control circuit, characterized in that: Used to execute the storage control method as described in any one of claims 1-8.

10. A microprocessor chip, characterized in that: Used to execute the storage control method as described in any one of claims 1-8.

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