Chip packaging structure for relieving Poisson effect and processing method thereof

Abstract

The invention discloses a chip packaging structure for relieving a Poisson effect, which comprises a packaging layer and a substrate from top to bottom, a plurality of chips are mounted on the substrate, and the chips are plastically packaged by the packaging layer; the packaging layer comprises a first packaging layer and a second packaging layer, the second packaging layer is a reinforced packaging layer, the thickness of the second packaging layer is smaller than that of the first packaging layer, and the second packaging layer is plastically packaged for the second time on the first packaging layer. The invention further discloses a processing method of the chip packaging structure for relieving the Poisson effect. Under the condition that the thickness and heat dissipation of the chip are not greatly influenced, a small grid-shaped EMC layer is added on the flat EMC layer through a nanoimprint means, and under the condition that only a small amount of packaging thickness is increased, the packaging strength is remarkably improved, and the warping rate is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor packaging, and in particular to a chip packaging structure for alleviating Poisson's effect and a processing method thereof. Background Art

[0002] As the pace of global informatization accelerates, integrated circuit technology continues to develop and innovate, and electronic products are moving towards high reliability, high density, and miniaturization. According to Moore's Law, every eighteen months, the characteristic size of transistors on silicon-based semiconductors is reduced by half, and the circuit performance is doubled. However, it is becoming increasingly difficult to reduce the characteristic size of semiconductor process technology, and whether Moore's Law can continue has become a concern of the semiconductor industry.

[0003] During the packaging process, the complex structure and packaging process make it easy for problems such as package warping, breakage, and excessive internal stress to occur during the packaging manufacturing process due to the mismatch in thermal expansion coefficients between packaging materials.

[0004] The occurrence of warping may cause problems in the following aspects:

[0005] Increased assembly difficulty: Warpage can make it difficult to precisely align the package with the substrate or other components during assembly, increasing the difficulty and cost of assembly. This alignment problem can result in poor connections, affecting the performance and reliability of electronic products.

[0006] Reliability: Warpage may cause defects such as cracks and delamination in the package, which will reduce the reliability and service life of the product. Since package warpage is usually caused by shape changes due to material thermal expansion coefficient mismatch, mechanical stress, etc., these inherent defects may be exacerbated under the influence of thermal cycles or other environmental factors, resulting in package failure.

[0007] Performance degradation: Warpage can also affect the electrical connections and signal transmission within the package, resulting in a degradation of product performance. For example, warpage can cause circuit connections to break or become poorly connected, affecting the transmission quality of electronic signals.

[0008] Impact on thermal management: Warpage may interfere with heat distribution within the package, causing hot spots and affecting the thermal performance of the device. Poor thermal management may accelerate device aging and reduce reliability.

[0009] Increased risk of moisture and chemical attack: Warpage can provide a path for moisture and other chemicals to enter the package, increasing the risk of corrosion and electromigration, further affecting reliability.

[0010] Impact on mechanical stability: Warping may make the package more susceptible to damage under mechanical shock or vibration, affecting its mechanical stability and durability.

[0011] Impact on subsequent processes: Warpage may interfere with subsequent packaging processes such as wire bonding, post-packaging testing, etc., resulting in more processing defects and higher scrap rates.

[0012] According to the IPS standard, the warpage degree (WD) of the required printed circuit board PCB should be less than or equal to 0.75%. In other words, when the WD is greater than 0.75%, it should be judged as a warp board, or a defective product.

[0013] Currently, manufacturers use roller levelers to level the boards with large warpage before entering the next process. Many PCB manufacturers believe that this approach is effective in reducing the warpage of finished PCB boards. However, this method processes the board after the warpage is formed, which cannot be used in scenes with large warpage. It is also easy to damage the board, resulting in a decrease in yield.

[0014] Some manufacturers heat and press the warped boards, but excessive pressure will cause the wire to deform; if the temperature is too high, defects such as rosin discoloration and base discoloration will occur. Moreover, whether it is cold pressing or hot pressing, it takes a long time (several hours to more than ten hours) to see the effect, and the warping rebound rate of the flattened PCB board is also very high. Summary of the invention

[0015] The present invention provides a chip packaging structure and a processing method thereof for alleviating the Poisson effect in order to solve the technical problems existing in the known technology.

[0016] The technical solution adopted by the present invention to solve the technical problems existing in the known technology is:

[0017] A chip packaging structure for alleviating the Poisson effect comprises a packaging layer and a substrate from top to bottom, wherein a plurality of chips are mounted on the substrate and the packaging layer plastic-seales the chips; the packaging layer comprises a first packaging layer and a second packaging layer, wherein the second packaging layer is a reinforced packaging layer having a thickness less than that of the first packaging layer and is plastic-sealed for the second time on the first packaging layer.

[0018] Furthermore, the second encapsulation layer is encapsulated for a second time before the first encapsulation layer is encapsulated, dried, solidified, and soft-flow soldered.

[0019] Furthermore, the thickness of the second encapsulation layer is 1 / 8 to 1 / 4 of the thickness of the first encapsulation layer.

[0020] Furthermore, according to the warpage accuracy requirement, when the material and thickness of the first packaging layer are known, the thickness of the second packaging layer is calculated according to the following formula:

[0021]

[0022] Where:

[0023] x is the warpage of the packaging layer;

[0024] ΔT is the temperature offset to which the package layer is subjected;

[0025] α1 is the thermal expansion coefficient of the first packaging layer;

[0026] α2 is the thermal expansion coefficient of the second packaging layer;

[0027] t1 is the thickness of the first encapsulation layer;

[0028] t2 is the thickness of the second encapsulation layer;

[0029] E1 is the Young’s modulus of the first encapsulation layer;

[0030] E2 is the Young’s modulus of the second encapsulation layer;

[0031] L is the length of the first packaging layer that is warped.

[0032] Furthermore, the material of the first encapsulation layer and / or the second encapsulation layer is epoxy resin molding compound; the epoxy resin molecular chain structure is a network structure; the epoxy resin molding compound includes the following components by mass: 15-25 parts of bisphenol F epichlorohydrin polymer, 0-5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 5-10 parts of amine hardener, 0-1 part of carbon black, 60-70 parts of silica, and 0-5 parts of additives.

[0033] Furthermore, the epoxy resin molding compound includes the following components by mass: 18-22 parts of bisphenol F epichlorohydrin polymer, 3-5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 6-10 parts of amine hardener, 0-1 part of carbon black, 65-70 parts of silica, and 3-5 parts of additives.

[0034] Furthermore, the epoxy resin molding compound includes the following components by mass: 20 parts of bisphenol F epichlorohydrin polymer, 4 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 6-10 parts of amine hardener, 0.5 parts of carbon black, 67.5 parts of silica, and 0-5 parts of additives.

[0035] The present invention also provides a processing method for the chip packaging structure for alleviating the Poisson effect, using a nanoimprint method to shape the epoxy resin molding material into a pattern of a nanoimprint template under the assistance of pressure, heat or ultraviolet light.

[0036] Furthermore, a hard-pressing nanoimprinting method is used, and the hard-pressing nanoimprinting method includes the following steps:

[0037] Step A1, heating the epoxy resin molding material and covering it on the substrate and the chip, and / or heating the epoxy resin molding material and covering it on the first packaging layer;

[0038] Step A2, using a template of a nanoimprinting device to cover the flowing epoxy resin molding material;

[0039] Step A3, shaping the epoxy resin molding material into a pattern of the nanoimprint template under the assistance of pressure, heat or ultraviolet light;

[0040] Step A4, removing the nanoimprinting equipment.

[0041] Furthermore, a roller-type nanoimprinting method is used, and the roller-type nanoimprinting method includes the following steps:

[0042] Step B1, heating the epoxy resin molding material and covering the substrate and the chip through a dispensing system; and / or heating the epoxy resin molding material and covering the first packaging layer through a dispensing system;

[0043] Step B2, leveling the covered epoxy resin molding material by a material leveling roller;

[0044] Step B3, using a roller-type imprinting device, transfer the prepared nanoimprint template to the epoxy resin under set pressure, heat, and ultraviolet light process conditions, and at the same time, quickly cool the epoxy resin molding material through bottom cooling to demold and fix it on the chip.

[0045] The advantages and positive effects of the present invention are:

[0046] A chip packaging structure for alleviating the Poisson effect of the present invention adds a small grid-shaped EMC layer on a flat EMC layer by nanoimprinting while ensuring that the chip thickness and heat dissipation are not greatly affected. The packaging strength is significantly improved and the warpage is reduced while only a small amount of packaging thickness is increased.

[0047] The processing method of a chip packaging structure for alleviating the Poisson effect of the present invention can strengthen the structure before drying, curing and soft melting welding, reduce subsequent operation steps, and significantly improve the strength of the package and reduce the warping rate.

[0048] A more versatile nanoimprint technology can be selected to process a unique structure through preliminary laser direct writing or e-beam. This structure has been shown through simulation and experiments to effectively alleviate the package warping caused by the mismatch of thermal expansion coefficients between packaging materials, and also reduce problems such as fracture and excessive internal stress caused by package warping. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] Figure 1It is a schematic diagram of chip packaging structure simulation in the prior art.

[0050] Figure 2 It is a schematic diagram of a chip packaging structure for alleviating Poisson's effect according to the present invention that generates warping when subjected to temperature deviation.

[0051] Figure 3 This is a schematic diagram of the workflow of the roller nanoimprinting method.

[0052] Figure 4 This is a schematic diagram of the workflow of the hard-pressing nanoimprinting method.

[0053] Figure 5 It is a simulation schematic diagram of relatively large warping produced by using existing technical methods.

[0054] Figure 6 It is a simulation schematic diagram of relatively small warping produced by the method of the present invention.

[0055] In the figure: 1. Copper substrate layer; 2-1. First copper foil layer; 2-2. Second copper foil layer; 3. Chip 4. Packaging layer; 5-1. First tin-based lead-free solder layer; 5-2. Second tin-based lead-free solder layer; 6. Ceramic substrate layer; 7. Photosensitive polymer; 8. Glue dispensing system; 9. Material leveling roller; 10. Roller die; 11. Gap control system; 12. Glass substrate.

[0056] Figure 3 The lower middle arrow indicates the cooling direction, the right arrow indicates the workpiece discharge direction; the upper arrow indicates the rolling direction of the roller die.

[0057] Figure 4 The direction of the hollow arrow indicates the process flow direction. The direction of the solid arrow indicates the pressure direction. DETAILED DESCRIPTION

[0058] The present invention will be described in detail below with reference to the accompanying drawings and in combination with embodiments. It should be understood that the preferred embodiments described herein are only used to illustrate and explain the present invention, and are not used to limit the present invention.

[0059] In the description of the present invention, the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention rather than requiring the present invention to be constructed and operated in a specific orientation, and therefore should not be construed as limiting the present invention. The terms "connected" and "connection" used in the present invention should be understood in a broad sense, for example, it can be a fixed connection or a detachable connection; it can be a direct connection or an indirect connection through an intermediate component; it can also be an electrical connection or signal transmission; for those of ordinary skill in the art, the specific meanings of the above terms can be understood according to the specific circumstances.

[0060] See also Figures 1 to 6 A chip packaging structure for alleviating the Poisson effect includes a packaging layer 4 and a substrate from top to bottom, a plurality of chips 3 are mounted on the substrate, and the packaging layer 4 plastic-seales the chips 3; the packaging layer 4 includes a first packaging layer and a second packaging layer, the second packaging layer is a reinforced packaging layer, and its thickness is less than the first packaging layer, and the second plastic sealing is performed on the first packaging layer.

[0061] The chip packaging structure of the prior art includes a packaging layer 4 and a substrate from top to bottom, a plurality of chips 3 are mounted on the substrate, and the packaging layer 4 plastic-seales the chips 3 on the substrate.

[0062] The substrate includes a ceramic substrate layer 6 and a copper substrate layer 1 from top to bottom. A first copper foil layer 2-1 is also provided on the ceramic substrate layer 6. A second copper foil layer 2-2 is also provided below the ceramic substrate layer 6. A first tin-based lead-free solder layer 5-1 is located between the chip layer 3 and the first copper foil layer 2-1, and a second tin-based lead-free solder layer 5-2 is located between the copper substrate layer 1 and the second copper foil layer 2-2.

[0063] Chip 3 layer: This is the top layer of the package, directly carrying the circuit part of chip 3 and responsible for connecting chip 3 to the external circuit.

[0064] Copper foil layer: Located below chip 3, it plays the role of conducting electricity and dissipating heat, helping chip 3 dissipate heat during operation.

[0065] Ceramic: The ceramic substrate layer 6 is located below the chip 3 layer and plays an insulating and protective role to prevent the chip 3 from being disturbed by the outside world.

[0066] Copper substrate layer 1: the bottom layer of the package, providing stable support and grounding functions to ensure the stable operation of chip 3.

[0067] Preferably, the second encapsulation layer can be encapsulated for the second time before the first encapsulation layer is encapsulated, dried, solidified, and soft-flow soldered.

[0068] Preferably, the thickness of the second encapsulation layer may be 1 / 8 to 1 / 4 of the thickness of the first encapsulation layer.

[0069] Preferably, according to the warpage accuracy requirement, when the material and thickness of the first packaging layer are known, the thickness of the second packaging layer can be calculated according to the following formula:

[0070]

[0071] Where:

[0072] x is the warpage amount of the encapsulation layer 4;

[0073] ΔT is the temperature deviation to which the encapsulation layer 4 is subjected;

[0074] α1 is the thermal expansion coefficient of the first packaging layer;

[0075] α2 is the thermal expansion coefficient of the second packaging layer;

[0076] t1 is the thickness of the first encapsulation layer;

[0077] t2 is the thickness of the second encapsulation layer;

[0078] E1 is the Young’s modulus of the first encapsulation layer;

[0079] E2 is the Young’s modulus of the second encapsulation layer;

[0080] L is the length of the first packaging layer that is warped.

[0081] Preferably, the material of the first encapsulation layer and / or the second encapsulation layer may be epoxy resin molding compound; the epoxy resin molecular chain structure may be a network structure; the epoxy resin molding compound may include the following components by mass: 15-25 parts of bisphenol F epichlorohydrin polymer, 0-5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 5-10 parts of amine hardener, 0-1 part of carbon black, 60-70 parts of silica, and 0-5 parts of additives.

[0082] The network structure of epoxy resin molecular chains is formed through curing reaction. During the curing process, the epoxy groups in the epoxy resin react with the active hydrogen in the curing agent to form a cross-linked structure. This cross-linked structure forms a three-dimensional network between the epoxy resin molecular chains, thus giving it unique physical and chemical properties.

[0083] The network structure has an important influence on the performance of epoxy resin. First, the network structure makes epoxy resin have higher strength. Due to the three-dimensional network structure between the molecular chains, epoxy resin can effectively resist deformation when subjected to force, thereby maintaining the stability of the structure. Secondly, the network structure also makes epoxy resin have good chemical corrosion resistance. Due to the close cross-linking between the molecular chains, it is difficult for chemicals to penetrate into the material, thus protecting the material from corrosion. In addition, the network structure also gives epoxy resin good insulation properties, making it widely used in fields such as electronic packaging.

[0084] Preferably, the epoxy resin molding compound may include the following components by mass: 18-22 parts of bisphenol F epichlorohydrin polymer, 3-5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 6-10 parts of amine hardener, 0-1 part of carbon black, 65-70 parts of silica, and 3-5 parts of additives.

[0085] Preferably, the epoxy resin molding compound may include the following components by mass: 20 parts of bisphenol F epichlorohydrin polymer, 4 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 6-10 parts of amine hardener, 0.5 parts of carbon black, 67.5 parts of silica, and 0-5 parts of additives.

[0086] Preferably, the epoxy resin molding compound may include the following components by mass: 25 parts of bisphenol F epichlorohydrin polymer, 1 part of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 5 parts of amine hardener, 65 parts of silicon dioxide, and 4 parts of additives.

[0087] Preferably, the epoxy resin molding compound may include the following components by mass: 25 parts of a polymer of bisphenol F epichlorohydrin, 5 parts of an amine hardener, 65 parts of silicon dioxide, and 5 parts of an additive.

[0088] Preferably, the epoxy resin molding compound may include the following components by mass: 20 parts of a polymer of bisphenol F epichlorohydrin, 5 parts of an amine hardener, 70 parts of silicon dioxide, and 5 parts of an additive.

[0089] Preferably, the epoxy resin molding compound may include the following components by mass: 25 parts of bisphenol F epichlorohydrin polymer, 1 part of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 5 parts of amine hardener, 65 parts of silicon dioxide, and 4 parts of additives.

[0090] Preferably, the epoxy resin molding compound may include the following components by mass: 17 parts of a polymer of bisphenol F epichlorohydrin, 7.5 parts of an amine hardener, 0.5 parts of carbon black, 70 parts of silicon dioxide, and 5 parts of an additive.

[0091] Preferably, the epoxy resin molding compound may include the following components by mass: 15 parts of bisphenol F epichlorohydrin polymer, 5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 8.5 parts of amine hardener, 1 part of carbon black, 68 parts of silica, and 2.5 parts of additives.

[0092] Preferably, the epoxy resin molding compound may include the following components by mass: 20 parts of bisphenol F epichlorohydrin polymer, 5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 7.5 parts of amine hardener, 1 part of carbon black, 64 parts of silica, and 2.5 parts of additives.

[0093] Preferably, the epoxy resin molding compound may include the following components by mass: 25 parts of bisphenol F epichlorohydrin polymer, 2.5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 7.5 parts of amine hardener, 60 parts of silicon dioxide, 0.5 parts of carbon black, and 4.5 parts of additives.

[0094] Preferably, the epoxy resin molding compound may include the following components by mass: 20 parts of bisphenol F epichlorohydrin polymer, 2.5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 7.5 parts of amine hardener, 67.5 parts of silicon dioxide, and 2.5 parts of additives.

[0095] Preferably, the epoxy resin molding compound may include the following components by mass: 15 parts of bisphenol F epichlorohydrin polymer, 2 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 8 parts of amine hardener, 70 parts of silicon dioxide, and 5 parts of additives.

[0096] Preferably, the epoxy resin molding compound may include the following components by mass: 19 parts of bisphenol F epichlorohydrin polymer, 2 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 8 parts of amine hardener, 68 parts of silicon dioxide, and 3 parts of additives.

[0097] The present invention also provides a processing method for the chip packaging structure for alleviating the Poisson effect, using a nanoimprint method to shape the epoxy resin molding material into a pattern of a nanoimprint template under the assistance of pressure, heat or ultraviolet light.

[0098] The nanoimprint method is to transfer the pattern on the template to the substrate through a transfer medium, and the transfer medium is mostly a polymer film. The nanoimprint process includes two steps: pattern replication and pattern transfer. The template is pressed into the transfer medium under pressure. After a period of time, the transfer medium fully fills the nanocavity, and then the pressure is released for curing and demoulding, and an auxiliary transfer pattern can be formed on the substrate.

[0099] After the pattern replication process is completed, the resist residual layer on the substrate needs to be removed by anisotropic etching or reactive ion etching, and then the pattern transfer process begins. The transferred pattern can be obtained by etching or stripping (deposition, dissolution) methods.

[0100] During the etching process, the graphic structure of the resist material on the substrate is used as a masking layer, and then the substrate is etched using methods such as anisotropic etching, so that the pattern is transferred to the substrate. The stripping process consists of two steps: deposition and stripping. First, a metal film is plated on the surface of the resist, and then the resist and the metal film on its surface are dissolved with an organic solvent. The remaining metal film on the substrate forms a microstructure that is the same as the pattern on the template, that is, the transferred pattern is obtained. The basic process of nanoimprinting is as follows: Figure 4 shown.

[0101] Preferably, a hard-pressing nanoimprinting method may be used, and the hard-pressing nanoimprinting method may include the following method steps:

[0102] Step A1, heating the epoxy resin molding material and covering the substrate and the chip 3, and / or heating the epoxy resin molding material and covering the first packaging layer.

[0103] In step A2, a template of a nanoimprinting device is covered on the flowing epoxy molding compound.

[0104] Step A3, shaping the epoxy resin molding material into the pattern of the nanoimprint template under the assistance of pressure, heat or ultraviolet light.

[0105] Step A4, removing the nanoimprinting equipment.

[0106] Preferably, if Figure 3 As shown, a roller-type nanoimprinting method may be used, and the roller-type nanoimprinting method may include the following method steps:

[0107] The roller-type nanoimprinting system includes a dispensing system 8, a material leveling roller 9, a roller pressing mold 10, a gap control system 11, and a glass substrate 12.

[0108] Step B1, heating the epoxy resin molding material and covering the substrate and the chip 3 through the dispensing system 8; and / or heating the epoxy resin molding material and covering the first packaging layer through the dispensing system 8.

[0109] When the epoxy resin molding compound is heated and covered on the substrate by the dispensing system 8, the photosensitive polymer 7 is coated on the surface of the substrate.

[0110] Step B2, leveling the covered epoxy resin molding material using a material leveling roller 9.

[0111] Step B3, using a roller-type imprinting device, transfer the prepared nanoimprint template, i.e., the roller mold 10, to the epoxy resin under the set process conditions of pressure, heat, and ultraviolet light, and at the same time, cool the epoxy resin molding material quickly and demold it through cooling from below, and fix it on the chip 3.

[0112] The thickness of the epoxy resin molding compound can be adjusted by the gap control system 11 .

[0113] Working principle of the present invention:

[0114] The chip packaging 3 process includes cutting and cleaning, chip mounting, welding, cleaning, plastic sealing, curing, degumming, inspection and storage. Each step involves the treatment of different materials and pollutants to ensure product performance and reliability, and finally qualified products are stored.

[0115] (1) Cutting and cleaning

[0116] The purchased chips 3 are cut to the required size, and then the cut chips 3 are cleaned at room temperature using pure water in a cleaning machine to remove dust on the product. No cleaning agent is needed. After cleaning, they are naturally dried and then enter the next process. The main pollutants in this process are chip 3 scraps and cutting wastewater.

[0117] (3) Mounting

[0118] First, arrange the purchased copper wire and aluminum wire on the lead frame, then put the solder paste and chip 3 on the lead frame, first put the solder paste, and then put the chip 3. This project does not involve tinning process.

[0119] (4) Welding

[0120] The entire lead frame is placed in a welding machine for welding, the working temperature is about 360°C, and hydrogen nitrogen or nitrogen shielded welding is used. After welding, the welding piece, the lead wire and the chip 3 are firmly welded together. The main pollutant in this process is welding waste gas.

[0121] (5) Cleaning

[0122] During the semiconductor packaging process, residues such as solder paste often adhere to the surface of the chip 3 and the frame. These residues will affect the performance and reliability of semiconductor products. The residues are dispersed and peeled off from the surface of the parts using a cleaning agent (isopropyl alcohol) in a cleaning machine to ensure the purity and residue-free surface of the frame and chip 3. The cleaning agent is completely volatilized, which will produce a very small amount of residue. The main pollutants in this process are organic waste gas and cleaning residues.

[0123] (6) Plastic sealing

[0124] Plastic packaging is a low-cost and easy-to-automate packaging form for semiconductor devices. The epoxy resin plastic packaging material is placed in the base frame of the compression molding plastic packaging machine, and the welded chip 3 is sealed by heating to soften the seal, so that the product is basically formed and the product can be kept stable. The pyrolysis temperature of epoxy resin is above 200℃. The softening temperature of the plastic packaging of this project is about 160℃~170℃. The pyrolysis amount is low and a small amount of organic waste gas will be generated. The main pollutant in this process is organic waste gas.

[0125] (7) Curing

[0126] The conversion curing of epoxy resin molding compound is completed 80% in the mold, and then the remaining 20% ​​curing work is completed in the post-molding curing process. The baking temperature of post-molding curing is 175℃ and the time is 8h. The main pollutant in this process is organic waste gas.

[0127] (8) Glue removal

[0128] The glue remover uses a hydraulic pressure to cut off the excess epoxy resin that has already solidified. The main pollutant in this process is epoxy resin scraps.

[0129] (9) Inspection and warehousing

[0130] Qualified products are put into storage after testing and inspection, while unqualified products are sold to third parties as downgraded materials or scrap.

[0131] During the manufacturing and assembly of the package, when the environmental heat load changes, due to the mismatch of thermal expansion coefficients between different materials in the package, the thermal gradient and geometric constraints in the package, the various parts of the package cannot be completely deformed freely, thus generating stress and strain. This stress caused by the constraint of thermal deformation caused by temperature change without external force is called thermal stress. In the package, most materials are elastic materials such as bare chips 3 and epoxy molding compounds (EMC). When the external force on the object exceeds the yield strength of the material, the deformation generated cannot be restored to the original state of the object, resulting in failure of the package.

[0132] The present invention adopts a mesh structure, and adds a thinner mesh epoxy molding compound (EMC) layer on the flat epoxy molding compound (EMC) layer while ensuring that the thickness and heat dissipation of the chip 3 are not greatly affected. Simulation experiments show that this can greatly improve the packaging strength of the chip 3.

[0133] The second packaging layer is used for secondary packaging before the first packaging layer is packaged, dried, solidified and reflow soldered, which reduces the subsequent operation steps and can significantly improve the strength of the packaging and reduce the warpage.

[0134] like Figure 2 As shown, the first encapsulation layer is located below the second encapsulation layer, and the Young's modulus, thickness and thermal expansion coefficient of the first encapsulation layer material are E1, t1 and α1 respectively. The Young's modulus, thickness and thermal expansion coefficient of the second encapsulation layer material are E2, t2 and α2 respectively. When the structure composed of the first encapsulation layer and the second encapsulation layer is heated or cooled from temperature T1 to T2, the entire assembly will bend. Where ΔT is the temperature offset to which the double-layer structure is subjected.

[0135] PCB warpage calculation formula:

[0136] Warpage = single angle warpage height / (diagonal length of printed circuit board*2)*100%.

[0137] The ingredients of epoxy resin molding compound are as follows:

[0138] Chemical Name content Bisphenol F, polymer with epichlorohydrin 15-25 2,2'-[1,6-Naphthylenebis(oxymethylene)]dioxirane <5 Amine hardener 5-10 Carbon Black <1 Silicon dioxide 60-70 additive <5

[0139] Bisphenol F epichlorohydrin polymer is a type of epoxy resin that forms a hard and durable material after curing, capable of withstanding high mechanical stress. It has good chemical resistance and can resist attack by a wide range of chemicals, such as acids, alkalis and organic solvents.

[0140] 2,2'-[1,6-Naphthylenebis(oxymethylene)]dioxirane is a modifier for epoxy resins, which enhances the stability of the resin in high temperature environments, chemical resistance, and mechanical properties.

[0141] Amine hardeners react with epoxy groups to generate alcohol groups and new amine groups, gradually forming a three-dimensional network structure to achieve the purpose of curing the resin.

[0142] The microstructure of carbon black can effectively absorb ultraviolet rays and improve the anti-aging performance of the material. At the same time, it has good dispersibility and can be evenly distributed in the matrix material to enhance the overall performance. It also has excellent antistatic and wear resistance.

[0143] Silicon dioxide is an inorganic filler that can enhance the hardness and wear resistance of composite materials while having good electrical insulation and heat resistance.

[0144] Additives improve the material's fluidity, flexibility, UV resistance, and antioxidant properties, etc.

[0145] The embodiments described above are only used to illustrate the technical ideas and features of the present invention, and their purpose is to enable those skilled in the art to understand the contents of the present invention and implement them accordingly. The patent scope of the present invention cannot be limited only by this embodiment, that is, any equivalent changes or modifications made to the spirit disclosed by the present invention still fall within the patent scope of the present invention.

Claims

1. A chip packaging structure for alleviating Poisson effect, comprising a packaging layer and a substrate from top to bottom, a plurality of chips are mounted on the substrate, and the packaging layer plastic-seales the chips; characterized in that: The encapsulation layer comprises a first encapsulation layer and a second encapsulation layer. The second encapsulation layer is a reinforced encapsulation layer, the thickness of which is smaller than that of the first encapsulation layer, and a second plastic encapsulation is performed on the first encapsulation layer.

2. The chip packaging structure for alleviating Poisson effect according to claim 1, characterized in that: The second packaging layer is packaged twice before the first packaging layer is packaged, dried, solidified and soft-flow soldered.

3. The chip packaging structure for alleviating Poisson effect according to claim 1, characterized in that: The thickness of the second encapsulation layer is 1 / 8 to 1 / 4 of the thickness of the first encapsulation layer.

4. The chip packaging structure for alleviating Poisson effect according to claim 1, characterized in that: According to the warpage accuracy requirements, when the material and thickness of the first packaging layer are known, the thickness of the second packaging layer is calculated according to the following formula: Where: x is the warpage of the packaging layer; ΔT is the temperature offset experienced by the packaging layer; α1 is the thermal expansion coefficient of the first packaging layer; α2 is the thermal expansion coefficient of the second packaging layer; t1 is the thickness of the first encapsulation layer; t2 is the thickness of the second encapsulation layer; E1 is the Young’s modulus of the first encapsulation layer; E2 is the Young’s modulus of the second encapsulation layer; L is the length of the first packaging layer that is warped.

5. The chip packaging structure for alleviating Poisson effect according to claim 1, characterized in that: The material of the first encapsulation layer and / or the second encapsulation layer is epoxy resin molding compound; the molecular chain structure of the epoxy resin is a network structure; the epoxy resin molding compound includes the following components by mass: 15-25 parts of bisphenol F epichlorohydrin polymer, 0-5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 5-10 parts of amine hardener, 0-1 part of carbon black, 60-70 parts of silicon dioxide, and 0-5 parts of additives.

6. The chip packaging structure for alleviating Poisson effect according to claim 1, characterized in that: The epoxy resin molding compound includes the following components by mass: 18-22 parts of bisphenol F epichlorohydrin polymer, 3-5 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 6-10 parts of amine hardener, 0-1 part of carbon black, 65-70 parts of silicon dioxide, and 3-5 parts of additives.

7. The chip packaging structure for alleviating Poisson effect according to claim 1, characterized in that: The epoxy resin molding compound includes the following components by mass: 20 parts of bisphenol F epichlorohydrin polymer, 4 parts of 2,2'-[1,6-naphthylenebis(oxymethylene)]dioxirane, 6-10 parts of amine hardener, 0.5 parts of carbon black, 67.5 parts of silicon dioxide, and 0-5 parts of additives.

8. A method for processing a chip packaging structure for alleviating Poisson's effect according to any one of claims 1 to 7, characterized in that: Using the nanoimprint method, the epoxy resin molding material is shaped into the pattern of the nanoimprint template under the assistance of pressure or heat or ultraviolet light.

9. The processing method of a chip packaging structure for alleviating Poisson's effect according to claim 8, characterized in that: A hard-pressing nanoimprinting method is used, and the hard-pressing nanoimprinting method includes the following steps: Step A1, heating the epoxy resin molding material and covering it on the substrate and the chip, and / or heating the epoxy resin molding material and covering it on the first packaging layer; Step A2, using a template of a nanoimprinting device to cover the flowing epoxy resin molding material; Step A3, shaping the epoxy resin molding material into a pattern of the nanoimprint template under the assistance of pressure, heat or ultraviolet light; Step A4, removing the nanoimprinting equipment.

10. The processing method of a chip packaging structure for alleviating Poisson's effect according to claim 8, characterized in that: The roller-type nanoimprinting method is adopted, and the roller-type nanoimprinting method includes the following steps: Step B1, heating the epoxy resin molding material and covering the substrate and the chip through a dispensing system; and / or heating the epoxy resin molding material and covering the first packaging layer through a dispensing system; Step B2, leveling the covered epoxy resin molding material by a material leveling roller; Step B3, using a roller-type imprinting device, transfer the prepared nanoimprint template to the epoxy resin under set pressure, heat, and ultraviolet light process conditions, and at the same time, quickly cool the epoxy resin molding material through bottom cooling to demold and fix it on the chip.

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